CN117008915B - Code compiling method, device and equipment based on register quantity control - Google Patents
Code compiling method, device and equipment based on register quantity control Download PDFInfo
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Abstract
The invention provides a code compiling method, device and equipment based on register quantity control, wherein the method comprises the following steps: compiling object code to construct SSA by a compiler, and determining an active interval of each form variable based on the SSA, wherein the active interval is used for indicating a time span from the first time the form variable is defined to the last time the form variable is used; determining the first register number through a register pre-allocation operation, and creating a variable array when the first register number exceeds a length threshold; determining a target storage variable from a plurality of form variables based on the active interval and storing the target storage variable into a variable array; and determining the second register number through a register allocation operation, and generating a target instruction according to the form variable and the variable array when the second register number is smaller than or equal to the length threshold value. According to the technical scheme provided by the embodiment of the invention, the variables can be stored through the array when the number of the registers is larger than the length threshold, so that the occupation of the registers is reduced, and the space of instructions is effectively reduced.
Description
Technical Field
The present invention relates to the field of code compiling technologies, and in particular, to a method, an apparatus, and a device for compiling a code based on register quantity control.
Background
In an autonomously implemented register-based operating system, both variables of method code and temporary variables need to occupy registers, usually 1 byte is used to represent register numbers, and in the case of limited operating system resources, 1 byte is used to represent register numbers, which results in a larger space occupied by instructions. In order to reduce the space occupied by instructions, in the related art, a nibble is generally used to represent a register number in an instruction, and when the code amount of a method is huge and the method cannot be split, both variables and temporary variables need to occupy registers, so that the number of registers is large, and the space occupied by the register number is large.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems existing in the prior art. Therefore, the invention provides a code compiling method, device and equipment based on register quantity control, which can reduce the byte number representing the register number and reduce the space occupation of instructions.
In a first aspect, an embodiment of the present invention provides a method for compiling code based on register quantity control, including:
compiling target codes through a compiler to construct SSA, wherein the target codes are source codes of a target method, and a plurality of form variables are recorded in the SSA;
Determining an active interval of each form variable based on the SSA, wherein the active interval is used for indicating a time span from the first time the form variable is defined to the last time the form variable is used;
Determining the first register number through a register pre-allocation operation, and creating a variable array when the first register number exceeds a length threshold;
Determining a target deposit variable from a plurality of form variables based on the active interval, and storing the target deposit variable into the variable array;
and determining a second register number through a register allocation operation, and generating a target instruction according to the form variable and the variable array when the second register number is smaller than or equal to the length threshold.
According to some embodiments of the invention, the determining the active interval for each of the form variables based on the SSA includes:
Performing subsequent traversal on the SSA to obtain a traversal set for recording a definition time point and a reference time point of each form variable, wherein the definition time point is used for indicating the time point when the form variable is assigned for the first time, and the reference time point is used for indicating the time point when the form variable is referenced;
traversing backwards from the defined time point for each form variable, and determining the last reference time point;
and determining the time span between the defined time point and the last reference time point as the active interval.
According to some embodiments of the invention, the determining a target logging variable from a plurality of the form variables based on the active interval includes:
Determining a third register number, wherein the third register number is the number of registers occupied by the operation elements of the variable array;
And determining a deposit quantity according to the difference value of the first register quantity, the third register quantity and the length threshold value, and determining the target deposit variable from a plurality of form variables according to the deposit quantity.
According to some embodiments of the invention, the determining the target deposit variable from a plurality of the form variables according to the deposit quantity includes:
determining at least one candidate variable from a plurality of form variables, wherein the length of the active section of the candidate variable is larger than a preset section threshold value, and the quoted times of the candidate variable are smaller than a preset times threshold value;
and determining the target deposit variable from the candidate variables according to the deposit quantity.
According to some embodiments of the invention, the operation elements of the variable array include an array object, an array index, and an array access operation.
According to some embodiments of the invention, when the form variable is used for method parametrization, the deposit quantity is obtained by the following expression:
wherein M is the number of the stored data, N is the number of the first registers, P is the number of the parameters in the array when the method transmits the instruction, P is greater than or equal to 0, and Q is the maximum number of the idle registers when the method transmits the instruction.
According to some embodiments of the invention, after the determining a target logging variable from a plurality of the form variables based on the active interval, the method further comprises:
constructing a variable index table, wherein the variable index table is used for indicating the mapping relation between the variable name and the index number of the target stored variable;
Inserting an array creation instruction before the target stored variable of the variable array is inserted for the first time, wherein the array creation instruction is used for creating the variable array;
Inserting an array storage instruction after the assignment operation of the target storage variable, wherein the array storage instruction is used for storing the target storage variable into the variable array;
and inserting an array reading instruction before the use operation of the target storage variable, wherein the array reading instruction is used for acquiring the target storage variable from the variable array according to the variable index table.
In a second aspect, an embodiment of the present invention provides a code compiling apparatus controlled based on the number of registers, including at least one control processor and a memory for communicatively connecting with the at least one control processor; the memory stores instructions executable by the at least one control processor to enable the at least one control processor to perform the register number control based code compilation method as described in the first aspect above.
In a third aspect, an embodiment of the present invention provides an electronic device, including a code compiling apparatus controlled based on the number of registers according to the second aspect.
In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium storing computer-executable instructions for performing the method for compiling code based on register quantity control according to the first aspect.
The code compiling method based on register quantity control according to the embodiment of the invention has at least the following beneficial effects: compiling target codes through a compiler to construct SSA, wherein the target codes are source codes of a target method, and a plurality of form variables are recorded in the SSA; determining an active interval of each form variable based on the SSA, wherein the active interval is used for indicating a time span from the first time the form variable is defined to the last time the form variable is used; determining the first register number through a register pre-allocation operation, and creating a variable array when the first register number exceeds a length threshold; determining a target deposit variable from a plurality of form variables based on the active interval, and storing the target deposit variable into the variable array; and determining a second register number through a register allocation operation, and generating a target instruction according to the form variable and the variable array when the second register number is smaller than or equal to the length threshold. According to the technical scheme provided by the embodiment of the invention, the variables can be stored through the array when the number of the registers is larger than the length threshold, so that the occupation of the registers is reduced, and the space of instructions is effectively reduced.
Drawings
FIG. 1 is a flow chart of a code compiling method based on register quantity control according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of registers and arrays provided by one embodiment of the present invention;
Fig. 3 is a flow chart of determining an active interval provided by another embodiment of the present invention;
FIG. 4 is a flow chart of determining a deposit quantity provided by another embodiment of the present invention;
FIG. 5 is a flow chart for determining a target logging variable provided by another embodiment of the present invention;
FIG. 6 is a flow chart of a read-write target logging variable provided by another embodiment of the present invention;
fig. 7 is a block diagram of a code compiling apparatus based on register quantity control according to another embodiment of the invention.
Detailed Description
Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the invention.
In the description of the present invention, it should be understood that references to orientation descriptions such as upper, lower, front, rear, left, right, etc. are based on the orientation or positional relationship shown in the drawings, are merely for convenience of description of the present invention and to simplify the description, and do not indicate or imply that the apparatus or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention.
In the description of the present invention, a number means one or more, a number means two or more, and greater than, less than, exceeding, etc. are understood to not include the present number, and above, below, within, etc. are understood to include the present number. The description of the first and second is for the purpose of distinguishing between technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless explicitly defined otherwise, terms such as arrangement, installation, connection, etc. should be construed broadly and the specific meaning of the terms in the present invention can be reasonably determined by a person skilled in the art in combination with the specific contents of the technical scheme.
The embodiment of the invention provides a code compiling method, device and equipment based on register quantity control, wherein the code compiling method based on register quantity control comprises the following steps: compiling target codes through a compiler to construct SSA, wherein the target codes are source codes of a target method, and a plurality of form variables are recorded in the SSA; determining an active interval of each form variable based on the SSA, wherein the active interval is used for indicating a time span from the first time the form variable is defined to the last time the form variable is used; determining the first register number through a register pre-allocation operation, and creating a variable array when the first register number exceeds a length threshold; determining a target deposit variable from a plurality of form variables based on the active interval, and storing the target deposit variable into the variable array; and determining a second register number through a register allocation operation, and generating a target instruction according to the form variable and the variable array when the second register number is smaller than or equal to the length threshold. According to the technical scheme provided by the embodiment of the invention, the variables can be stored through the array when the number of the registers is larger than the length threshold, so that the occupation of the registers is reduced, and the space of instructions is effectively reduced.
The control method of the embodiment of the invention is further described below with reference to the accompanying drawings.
Referring to fig. 1, fig. 1 is a flowchart of a code compiling method based on register quantity control according to an embodiment of the present invention, where the code compiling method based on register quantity control includes, but is not limited to, the following steps:
S11, compiling target codes through a compiler to construct SSA, wherein the target codes are source codes of a target method, and a plurality of form variables are recorded in the SSA;
S12, determining an active section of each form variable based on SSA, wherein the active section is used for indicating a time span from the first time the form variable is defined to the last time the form variable is used;
s13, determining the first register number through register pre-allocation operation, and creating a variable array when the first register number exceeds a length threshold;
s14, determining a target storage variable from a plurality of form variables based on the active interval, and storing the target storage variable into a variable array;
s15, determining the second register number through register allocation operation, and generating a target instruction according to the form variable and the variable array when the second register number is smaller than or equal to the length threshold value.
It should be noted that, the static Form assignment Form (STATIC SINGLE ASSIGNMENT Form, SSA) is an intermediate code Form, in SSA, each Form variable is assigned only once, each Form variable assignment statement generates a new Form variable name, and the Form variable is assigned only once. Therefore, the embodiment compiles the target code through the compiler to obtain the SSA, and uses the unique characteristic of the form variable in the SSA as the basis of the register optimization, so that the number of registers required by the target method can be determined according to the occupation of the form variable on the registers, and the subsequent optimization can be performed when the number of the registers is larger than the length threshold.
It should be noted that, the active interval characterizes the active period of the variable in the program execution process, that is, from the first time the variable is defined to the last time the variable is used, and since the reference to each variable in the SSA is a reference to one assignment, the time length of the variable referenced can be represented through the active interval, and a screening basis is provided for selecting the target deposit variable.
It should be noted that, through the pre-allocation operation of the registers, the maximum number of registers required to be used by the target method can be determined as the first register number, that is, the maximum number of registers required to be used during the program execution. For example, as shown in fig. 2, n registers are needed to be used in the target method determined by pre-allocation of registers, taking a length threshold value as an example of nibbles, where n is greater than 16, when n is greater than 16, the number of first registers is greater than 16, and exceeds the length threshold value, registers numbered R16 to Rn in fig. 2 have no instruction to support access, according to the technical scheme of this embodiment, form variables corresponding to R15 to Rn can be stored in an array, and the register numbered R15 is used to point to the array, so that when the variables from R15 to Rn need to be read, the variables from R15 to Rn need to be read are converted into the data to be read from the array, thereby realizing that the register number is represented by using fewer bytes without affecting the variable reading, and effectively reducing the resource occupation.
It should be noted that in compiler optimization, variables in a program are generally stored in registers as much as possible, so as to reduce the overhead of accessing the memory, thereby improving the execution efficiency of the program. Therefore, the smaller the register is at most, the more optimized the assembly code generated by the compiler is, and the higher the execution efficiency of the program is. Because the number of times that different variables are referenced is different, the embodiment saves part of the variables to the variable array, although the problem that the register occupies bytes is solved, a certain time is also consumed for reading data from the array, therefore, the embodiment determines the variables which are longer in active interval and are not frequently used as target storage variables, can save the target storage variables which are less in calling times and occupy more resources through the variable array, and the variables which are required to be frequently called are still saved in the register, thereby ensuring the execution efficiency of instructions.
It should be noted that after the target storage variable is saved in the variable array, the code construction is finished, the register allocation operation is performed, and it is checked again whether the second register number is less than or equal to the length threshold, that is, less than or equal to 16, if still greater than 16, the above steps may be repeatedly performed to determine more target storage variables until the second register number is less than or equal to 16, so as to ensure that the register number can be represented by fewer bytes.
In addition, referring to fig. 3, in an embodiment, step S12 of the embodiment shown in fig. 1 further includes, but is not limited to, the following steps:
S31, performing subsequent traversal on the SSA to obtain a traversal set for recording a definition time point and a reference time point of each form variable, wherein the definition point is used for indicating the time point when the form variable is assigned for the first time, and the reference time point is used for indicating the time point when the form variable is referenced;
s32, traversing backwards from the defined time point for each form variable, and determining the last reference time point;
And S33, determining the time span between the definition time point and the last reference time point as an active interval.
It should be noted that after the SSA is constructed, the definition time point and the reference time point of each form variable are known, so that the traversal set of the definition time point and the reference time point can be recorded through subsequent traversal, and then the time span is determined as the active interval by traversing back from the definition time point to the last reference time point for each form variable.
In addition, referring to fig. 4, in an embodiment, step S14 of the embodiment shown in fig. 1 further includes, but is not limited to, the following steps:
S41, determining the number of third registers, wherein the number of the third registers is the number of registers occupied by operation elements of the variable array;
S42, determining the deposit quantity according to the difference value of the first register quantity, the third register quantity and the length threshold value, and determining a target deposit variable from a plurality of form variables according to the deposit quantity.
It should be noted that, in this embodiment, the form variables need to be stored in the array, so that the operation elements of the variable array need to be constructed, and each operation element occupies a register.
In one embodiment, the operation elements of the variable array include array objects, array indexes, and array access operations, and each occupy 1 register, so the operation elements need to occupy 3 registers.
It should be noted that, after the third register number occupied by the operation element is determined, the difference obtained by subtracting the third register number and the length threshold (for example, 13, 14 or 16) from the first register number is the deposit number, for example, the deposit number is 3, and then 3 target deposit variables need to be determined, so that not only can the requirement of fewer bytes to represent the register be satisfied, but also the storage advantage of the register can be fully utilized to ensure the performance.
In addition, referring to fig. 5, in an embodiment, step S42 of the embodiment shown in fig. 4 further includes, but is not limited to, the following steps:
S51, determining at least one candidate variable from a plurality of form variables, wherein the length of an active section of the candidate variable is greater than a preset section threshold value, and the number of times the candidate variable is referenced is less than a preset number of times threshold value;
s52, determining a target deposit variable from the candidate variables according to the deposit quantity.
It should be noted that, according to the description of the above embodiment, in order to improve the utilization rate of the register, in this embodiment, the active interval is greater than the interval threshold, and the number of times of reference is less than the number of times threshold, which is used as a candidate variable, that is, the form variable with the active interval being longer and the operation being less frequent is determined as the candidate variable, and the specific interval threshold and the number of times threshold may be selected according to actual requirements.
After determining the number of entries, a corresponding number of target entries may be selected from the candidate variables, for example, the candidate variables may be sorted from fewer to more than one according to the number of references, and the top-sorted candidate variables may be used as the target entries, so that the variable array may be used to store the form variables with fewer references, or may be defined in accordance with other selection logic.
In addition, in one embodiment, when form variables are used for method parametrization, the amount deposited is obtained by the following expression:
Wherein M is the number of the stored data, N is the number of the first registers, P is the number of the parameters in the array when the method transmits the instruction, P is greater than or equal to 0, and Q is the maximum number of the idle registers when the method transmits the instruction.
It should be noted that, in the intermediate language obtained by compiling the object code, there may be a method parameter, and the method parameter also needs to occupy a certain register, so the embodiment further determines the stored number by the above formula, so as to ensure that the method parameter can be considered when the number of registers is adjusted.
In addition, referring to fig. 6, after step S14 of the embodiment shown in fig. 1, the method further includes, but is not limited to, the following steps:
s61, constructing a variable index table, wherein the variable index table is used for indicating the mapping relation between the variable name and the index number of the target stored variable;
S62, inserting an array creation instruction before the target of the first inserted variable array stores the variable, wherein the array creation instruction is used for creating the variable array;
s63, inserting an array storage instruction after the assignment operation of the target storage variable, wherein the array storage instruction is used for storing the target storage variable into a variable array;
S64, inserting an array reading instruction before the using operation of the target storage variable, wherein the array reading instruction is used for acquiring the target storage variable from the variable array according to the variable index table.
It should be noted that, the constructed variable index table is used for reading the corresponding target stored variable from the variable array, and mapping can be performed through a simple number, and the embodiment is not limited herein.
In the process of constructing the code, since the target storage variable is required to be saved in the variable array, an instruction for creating the array (for example, a new_array instruction), an instruction for storing the array (for example, an array_put instruction) and an instruction for reading the array (for example, an array_get instruction) need to be added to the instructions, so that the creation of the variable array, the writing and reading of the variable are ensured.
For example, a new_array instruction for creating an array may be inserted before the first target stores the variable, the created array is stored in the current method stack frame, and the lifecycle is eliminated as the method call ends; after the assignment of the target stored variable, the result is stored in a variable array, and an array_put instruction is inserted; this value may be fetched into a temporary variable and inserted into the array_get instruction before the variable is used.
As shown in fig. 7, fig. 7 is a block diagram of a code compiling apparatus based on register number control according to an embodiment of the invention. The invention also provides a code compiling device based on register quantity control, which comprises:
the processor 701 may be implemented by a general purpose central processing unit (Central Processing Unit, CPU), a microprocessor, an Application SPECIFIC INTEGRATED Circuit (ASIC), or one or more integrated circuits, etc. for executing related programs, so as to implement the technical solution provided by the embodiments of the present application;
The Memory 702 may be implemented in the form of a Read Only Memory (ROM), a static storage device, a dynamic storage device, or a random access Memory (Random Access Memory, RAM). The memory 702 may store an operating system and other application programs, and when the technical solutions provided in the embodiments of the present disclosure are implemented by software or firmware, relevant program codes are stored in the memory 702, and the processor 701 invokes a code compiling method based on register quantity control to perform the embodiments of the present disclosure;
an input/output interface 703 for implementing information input and output;
The communication interface 704 is configured to implement communication interaction between the device and other devices, and may implement communication in a wired manner (e.g. USB, network cable, etc.), or may implement communication in a wireless manner (e.g. mobile network, WIFI, bluetooth, etc.);
A bus 705 for transferring information between various components of the device (e.g., the processor 701, memory 702, input/output interfaces 703, and communication interfaces 704);
Wherein the processor 701, the memory 702, the input/output interface 703 and the communication interface 704 are in communication connection with each other inside the device via a bus 705.
The embodiment of the application also provides electronic equipment, which comprises the code compiling device based on the register quantity control.
The embodiment of the application also provides a storage medium, which is a computer readable storage medium, and the storage medium stores a computer program, and the computer program realizes the code compiling method based on the register quantity control when being executed by a processor.
The memory, as a non-transitory computer readable storage medium, may be used to store non-transitory software programs as well as non-transitory computer executable programs. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory remotely located relative to the processor, the remote memory being connectable to the processor through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof. The apparatus embodiments described above are merely illustrative, in which the elements illustrated as separate components may or may not be physically separate, implemented to reside in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically include computer readable instructions, data structures, program modules, or other data in a modulated data signal, such as a carrier wave or other transport mechanism, and may include any information delivery media.
While the preferred embodiment of the present invention has been described in detail, the present invention is not limited to the above embodiments, and those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit and scope of the present invention, and these equivalent modifications or substitutions are included in the scope of the present invention as defined in the appended claims.
Claims (10)
1. A code compiling method based on register quantity control, comprising:
Compiling target codes through a compiler to construct a static single assignment form SSA, wherein the target codes are source codes of a target method, and a plurality of form variables are recorded in the SSA;
Determining an active interval of each form variable based on the SSA, wherein the active interval is used for indicating a time span from the first time the form variable is defined to the last time the form variable is used;
Determining the first register number through a register pre-allocation operation, and creating a variable array when the first register number exceeds a length threshold;
Determining a target deposit variable from a plurality of form variables based on the active interval, and storing the target deposit variable into the variable array;
and determining a second register number through a register allocation operation, and generating a target instruction according to the form variable and the variable array when the second register number is smaller than or equal to the length threshold.
2. The register quantity control-based code compilation method of claim 1, wherein said determining an active interval for each of said form variables based on said SSA comprises:
Performing subsequent traversal on the SSA to obtain a traversal set for recording a definition time point and a reference time point of each form variable, wherein the definition time point is used for indicating the time point when the form variable is assigned for the first time, and the reference time point is used for indicating the time point when the form variable is referenced;
traversing backwards from the defined time point for each form variable, and determining the last reference time point;
and determining the time span between the defined time point and the last reference time point as the active interval.
3. The register-number control-based code compilation method of claim 1, wherein said determining a target logging variable from a plurality of said form variables based on said active interval comprises:
Determining a third register number, wherein the third register number is the number of registers occupied by the operation elements of the variable array;
And determining a deposit quantity according to the difference value of the first register quantity, the third register quantity and the length threshold value, and determining the target deposit variable from a plurality of form variables according to the deposit quantity.
4. A register-number-control-based code compilation method in accordance with claim 3, wherein said determining said target deposit variable from a plurality of said form variables in accordance with said deposit number comprises:
determining at least one candidate variable from a plurality of form variables, wherein the length of the active section of the candidate variable is larger than a preset section threshold value, and the quoted times of the candidate variable are smaller than a preset times threshold value;
and determining the target deposit variable from the candidate variables according to the deposit quantity.
5. A method of compiling code based on register quantity control according to claim 3, wherein the operation elements of the variable array include an array object, an array index and an array access operation.
6. A method of compiling code based on register quantity control according to claim 3, wherein when said form variable is used for method parametrization, said stored quantity is obtained by the following expression:
wherein M is the number of the stored data, N is the number of the first registers, P is the number of the parameters in the array when the method transmits the instruction, P is greater than or equal to 0, and Q is the maximum number of the idle registers when the method transmits the instruction.
7. The register-quantity control-based code compilation method of claim 1, wherein after said determining a target logging variable from a plurality of said form variables based on said active interval, said method further comprises:
constructing a variable index table, wherein the variable index table is used for indicating the mapping relation between the variable name and the index number of the target stored variable;
Inserting an array creation instruction before the target stored variable of the variable array is inserted for the first time, wherein the array creation instruction is used for creating the variable array;
Inserting an array storage instruction after the assignment operation of the target storage variable, wherein the array storage instruction is used for storing the target storage variable into the variable array;
and inserting an array reading instruction before the use operation of the target storage variable, wherein the array reading instruction is used for acquiring the target storage variable from the variable array according to the variable index table.
8. A code compiling device based on register quantity control, characterized by comprising at least one control processor and a memory for communication connection with the at least one control processor; the memory stores instructions executable by the at least one control processor to enable the at least one control processor to perform the register-number-control-based code compiling method according to any one of claims 1 to 7.
9. An electronic device comprising the register-number-control-based code compiling apparatus according to claim 8.
10. A computer-readable storage medium storing computer-executable instructions for causing a computer to execute the register-number-control-based code compiling method according to any one of claims 1 to 7.
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| CN114860567A (en) * | 2021-02-04 | 2022-08-05 | 新岸线(北京)科技集团有限公司 | Variable debugging method and system for embedded system |
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| CN114860567A (en) * | 2021-02-04 | 2022-08-05 | 新岸线(北京)科技集团有限公司 | Variable debugging method and system for embedded system |
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