CN116936613B - Quasi-vertical device based on sapphire substrate epitaxy and preparation method thereof - Google Patents

Abstract

The invention discloses a quasi-vertical device based on sapphire substrate epitaxy and a preparation method thereof, comprising the following steps: a substrate; a p-type oxide heteroepitaxial layer on the substrate; the gallium oxide epitaxial layer is positioned on the p-type oxide heteroepitaxial layer; the p-type oxide heteroepitaxial layer and the gallium oxide epitaxial layer form a composite gate structure together; cathode metal on the gallium oxide epitaxial layer; an anode metal on the p-type oxide heteroepitaxial layer and at least partially surrounding the gallium oxide epitaxial layer; applying a bias voltage to the composite gate structure through the cathode metal and the anode metal; the p-type oxide heteroepitaxial layer, the anode metal, the gallium oxide epitaxial layer and the cathode metal form a heteropn junction quasi-vertical device together. The invention can expand the application range of gallium oxide epitaxial thin film devices.

Description

Quasi-vertical device based on sapphire substrate epitaxy and its preparation method

Technical Field

The present invention belongs to the technical field of semiconductor devices, and in particular relates to a quasi-vertical device based on sapphire substrate epitaxy and a preparation method thereof.

Background technique

Gallium oxide semiconductor materials have great development potential in power electronic devices and deep ultraviolet optoelectronic devices due to their ultra-wide bandgap (4.4eV~5.3eV) and extremely high breakdown field strength (~8MV/cm). Current reports indicate that gallium oxide materials can be doped with group III and IV elements to serve as highly conductive n-type semiconductors, but there is a problem of difficulty in p-type doping. Existing studies have tried a variety of heterogeneous p-type semiconductor materials, such as heterogeneous pn junctions formed by gallium oxide and metal oxides such as nickel oxide and cuprous oxide, but their research is based on gallium oxide substrates and does not solve the problem of insufficient thermal conductivity of gallium oxide.

In the research of heterojunction of gallium oxide epitaxial thin film based on sapphire substrate, most of them focus on epitaxial research of other metal oxides on gallium oxide epitaxial film. Although epitaxial thin film cannot carry out research on vertical devices, sapphire substrate can significantly help improve the heat dissipation of gallium oxide thin film. In addition, due to the large lattice mismatch between sapphire substrate and gallium oxide epitaxial layer, gallium oxide epitaxial layer cannot obtain good enough film quality, which poses a great challenge to the application of gallium oxide heteroepitaxial materials.

Therefore, the existing research on gallium oxide heterojunction film epitaxy and heterogeneous pn junction devices is not sufficient to give full play to the advantages of gallium oxide materials, and it is urgent to develop new gallium oxide heterogeneous pn junction device structures.

Summary of the invention

In order to solve the above problems existing in the prior art, the present invention provides a quasi-vertical device based on sapphire substrate epitaxy and a preparation method thereof. The technical problem to be solved by the present invention is achieved by the following technical solutions:

In a first aspect, the present invention provides a quasi-vertical device of gallium oxide heterogeneity based on sapphire substrate epitaxy, comprising:

substrate;

A p-type oxide heteroepitaxial layer disposed on a substrate;

A gallium oxide epitaxial layer is located on the p-type oxide heteroepitaxial layer; the p-type oxide heteroepitaxial layer and the gallium oxide epitaxial layer together form a composite gate structure;

a cathode metal, located on the gallium oxide epitaxial layer;

an anode metal disposed on the p-type oxide heteroepitaxial layer and at least partially surrounding the gallium oxide epitaxial layer; and applying a bias voltage to the composite gate structure through the cathode metal and the anode metal;

Among them, the p-type oxide heteroepitaxial layer, the anode metal, the gallium oxide epitaxial layer and the cathode metal together constitute a heterogeneous pn junction quasi-vertical device.

In a second aspect, the present invention further provides a method for preparing a quasi-vertical device of heterogeneous gallium oxide based on sapphire substrate epitaxy, comprising:

providing a substrate;

epitaxially growing a p-type oxide heteroepitaxial layer on a substrate using a semiconductor epitaxial process;

epitaxially growing a gallium oxide layer on the p-type oxide heteroepitaxial layer using a semiconductor epitaxial process, performing ion implantation on the gallium oxide layer, and epitaxially growing a highly doped gallium oxide layer, so as to obtain a controllable high electron mobility on the upper surface of the gallium oxide layer;

The gallium oxide layer is patterned using an etching process to form a gallium oxide epitaxial layer having a circular projection shape, wherein the projection direction is a direction perpendicular to the substrate;

depositing a cathode metal on the gallium oxide epitaxial layer using a metal deposition process;

After removing the excess photoresist, a rapid annealing process is used to form an ohmic contact between the cathode metal and the gallium oxide epitaxial layer;

Depositing an anode metal on the p-type oxide heteroepitaxial layer and on the periphery of the gallium oxide epitaxial layer using a metal deposition process;

After removing the excess photoresist, a rapid annealing process is used to form an ohmic contact between the anode metal and the p-type oxide heteroepitaxial layer.

Beneficial effects of the present invention:

The invention provides a quasi-vertical device based on sapphire substrate epitaxy and a preparation method thereof. A p-type oxide heteroepitaxial layer adopts nickel oxide. Nickel oxide has higher thermal conductivity than gallium oxide. Heat generated by a gallium oxide film can be dissipated by nickel oxide, thereby solving the heat dissipation problem of gallium oxide. The lattice mismatch of gallium oxide grown on nickel oxide is smaller than that of gallium oxide grown directly on a substrate, thereby reducing the lattice mismatch problem between gallium oxide and the sapphire substrate, thereby improving the film formation quality of the gallium oxide film. The anode metal is a ring-shaped electrode, thereby effectively controlling the electric field within the ring. The p-oxide heteroepitaxial film and the gallium oxide heteroepitaxial film together form a p-i-n structure. Due to the existence of an i-type layer, a pin junction enables an electric field to be evenly distributed in the i-type layer, thereby having better pressure bearing capacity than a pn junction, thereby greatly improving the pressure bearing capacity between epitaxial films to obtain lower leakage current and higher breakdown voltage, thereby expanding the application range of gallium oxide epitaxial film devices.

The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic structural diagram of a quasi-vertical device of heterogeneous gallium oxide based on sapphire substrate epitaxy provided by an embodiment of the present invention;

FIG. 2 is a flow chart of a method for preparing a gallium oxide heterogeneous quasi-vertical device based on sapphire substrate epitaxy provided in an embodiment of the present invention.

Detailed ways

The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

In view of the shortcomings of the prior art, the present invention proposes that a p-type oxide and a gallium oxide heteroepitaxial thin film form a heterogeneous pn junction, and a p-i-n structure is formed between the pn junctions by controlling the surface doping of gallium oxide, so as to improve the breakdown voltage of the device. In addition, the introduction of the p-type oxide has a positive effect on reducing the lattice mismatch between gallium oxide and sapphire, which can improve the quality of the gallium oxide epitaxial layer and expand the application range of the device.

Please refer to FIG. 1 , which is a schematic diagram of a structure of a gallium oxide heterogeneous quasi-vertical device based on sapphire substrate epitaxy provided by an embodiment of the present invention. The gallium oxide heterogeneous quasi-vertical device based on sapphire substrate epitaxy provided by the present invention includes:

Substrate 10;

A p-type oxide heteroepitaxial layer 20 , located on the substrate 10 ;

The gallium oxide epitaxial layer 30 is located on the p-type oxide heteroepitaxial layer 20; the p-type oxide heteroepitaxial layer 20 and the gallium oxide epitaxial layer 30 together form a composite gate structure; the i layer and the n layer can be formed by controlling the doping concentration to form a p-i-n structure with the p-type oxide;

A cathode metal 40 is located on the gallium oxide epitaxial layer 30;

an anode metal 50 disposed on the p-type oxide heteroepitaxial layer 20 and at least partially surrounding the gallium oxide epitaxial layer 30; and applying a bias voltage to the composite gate structure through the cathode metal 40 and the anode metal 50;

The p-type oxide heteroepitaxial layer 20 , the anode metal 50 , the gallium oxide epitaxial layer 30 and the cathode metal 40 together constitute a heterogeneous pn junction quasi-vertical device.

It should be noted that, taking nickel oxide as an example, the p-type oxide heteroepitaxial layer 20 has a thickness of 100nm~1μm; the thickness of the gallium oxide epitaxial layer 30 is 100nm~2μm; the thickness of the anode metal 50 is 80nm~200nm; the thickness of the cathode metal 40 is 120nm~200nm; the anode metal 50 includes 50nm thick nickel metal and 150nm thick gold metal from bottom to top; the cathode metal 40 includes 60nm thick titanium metal and 120nm thick gold metal from bottom to top.

It should be noted that the embodiment shown in FIG. 1 only schematically shows the positions of the layers of the quasi-vertical device and does not represent its actual size.

In summary, the present invention provides a quasi-vertical device of heterogeneous gallium oxide based on epitaxy of a sapphire substrate 10, wherein the p-type oxide heteroepitaxial layer 20 uses nickel oxide, and nickel oxide has a higher thermal conductivity than gallium oxide. The heat generated by the gallium oxide film can be dissipated by nickel oxide, which can solve the heat dissipation problem of gallium oxide; the lattice mismatch of gallium oxide grown on nickel oxide is smaller than that of gallium oxide grown directly on sapphire, which can reduce the lattice mismatch problem between gallium oxide and the sapphire substrate 10, thereby improving the film formation quality of the gallium oxide film; the anode metal 50 is a ring-shaped electrode, which can effectively control the electric field within the ring; the p-oxide heteroepitaxial film and the gallium oxide heteroepitaxial film together form a p-i-n structure, and the pin junction, due to the presence of the i-type layer, allows the electric field to be evenly distributed in the i-type layer, and has better pressure-bearing capacity than the pn junction, which can greatly improve the pressure-bearing capacity between epitaxial films to obtain lower leakage current and higher breakdown voltage, thereby expanding the application range of gallium oxide epitaxial thin film devices.

In an optional embodiment of the present invention, the anode metal 50 is ring-shaped, surrounds the gallium oxide epitaxial layer 30 , and is spaced apart from the gallium oxide epitaxial layer 30 .

In an optional embodiment of the present invention, the material of the p-type oxide heteroepitaxial layer 20 includes nickel oxide or cuprous oxide.

In an optional embodiment of the present invention, the substrate 10 is a sapphire substrate 10, and the sapphire substrate 10 is a C-plane sapphire wafer, an R-plane sapphire wafer, an A-plane sapphire wafer, or an M-plane sapphire wafer.

In an optional embodiment of the present invention, the thickness of the p-type oxide heteroepitaxial layer 20 is 100nm~1μm along the direction perpendicular to the substrate; optionally, the thickness of the p-type oxide heteroepitaxial layer 20 is 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm or 1μm, which can ensure the performance of the quasi-vertical device.

In an optional embodiment of the present invention, the thickness of the gallium oxide epitaxial layer 30 in a direction perpendicular to the substrate is 100nm~2μm; optionally, the thickness of the gallium oxide epitaxial layer 30 is 100nm, 300nm, 600nm, 800nm, 1μm, 1.3μm, 1.6μm, 1.8μm or 2μm; all of which can ensure the performance of the quasi-vertical device.

Based on the same inventive concept, please refer to FIG. 2 , which is a flow chart of a method for preparing a quasi-vertical device of heterogeneous gallium oxide based on sapphire substrate epitaxy provided by an embodiment of the present invention. The present invention also provides a method for preparing a quasi-vertical device of heterogeneous gallium oxide based on sapphire substrate epitaxy, comprising:

Providing a substrate 10;

epitaxially grow a p-type oxide heteroepitaxial layer 20 on the substrate 10 using a semiconductor epitaxial process;

Using a semiconductor epitaxial process to grow an epitaxial gallium oxide layer on the p-type oxide heteroepitaxial layer 20, performing ion implantation on the gallium oxide layer, and growing an epitaxial highly doped gallium oxide layer, so as to obtain a controllable doping gradient on the upper surface of the gallium oxide layer and form a good ohmic contact with the metal;

The gallium oxide layer is patterned by an etching process to form a gallium oxide epitaxial layer 30 having a circular projection shape, wherein the projection direction is a direction perpendicular to the substrate;

Depositing cathode metal 40 on the gallium oxide epitaxial layer 30 using a metal deposition process;

After removing the excess photoresist, a rapid annealing process is used to form an ohmic contact between the cathode metal 40 and the gallium oxide epitaxial layer 30;

Depositing an anode metal 50 on the p-type oxide heteroepitaxial layer 20 and on the periphery of the gallium oxide epitaxial layer 30 using a metal deposition process;

After removing the excess photoresist, a rapid annealing process is used to form an ohmic contact between the anode metal 50 and the p-type oxide heteroepitaxial layer 20 .

Specifically, it is achieved through the following process:

Prepare 0.2 mol/L nickel oxide precursor solution (nickel acetylacetonate) and 0.05 mol/L gallium oxide precursor solution (gallium acetylacetonate);

Using a nickel oxide precursor liquid, an atomized chemical vapor deposition epitaxial process is used to grow an epitaxial nickel oxide layer at 600° C. on the sapphire substrate 10; using a gallium oxide precursor liquid, the temperature is further raised to 850° C. to grow an epitaxial gallium oxide layer;

Ion implantation and continued epitaxial growth of a highly doped gallium oxide layer can be performed on the surface of the gallium oxide layer to obtain a controllable high electron mobility.

The gallium oxide epitaxial layer is patterned using a standard photolithography-etching process, and the gallium oxide layer is etched into a circular shape;

Using a photolithography-metal deposition process, a cathode metal 40 (60 nm titanium and 12 nm gold) is deposited on the gallium oxide layer;

After removing the excess photoresist, a 500° C. rapid annealing process is used to form an ohmic contact between the cathode metal 40 and the gallium oxide layer;

Using the photolithography-metal deposition process, an anode metal 50 (nickel 50nm, gold 150nm) is deposited on the periphery of the gallium oxide layer on the nickel oxide heteroepitaxial layer, so that an ohmic contact is formed between the anode metal 50 and the nickel oxide layer.

In an optional embodiment of the present invention, the substrate 10 is a sapphire substrate;

The method further includes: cleaning the substrate 10 .

Specifically, the C-side sapphire wafer is cleaned using a standard cleaning process.

In an optional embodiment of the present invention, nickel oxide is epitaxially grown on the substrate 10 using a first Mist-CVD to form a p-type oxide heteroepitaxial layer; wherein the source of the first Mist-CVD is an aqueous solution of gallium acetylacetonate doped with lithium hydroxide, and the nickel oxide is a single crystal face family;

A second Mist-CVD is used to epitaxially grow gallium oxide on nickel oxide to form a gallium oxide epitaxial layer, thereby obtaining a single crystal gallium oxide film; wherein the source of the second Mist-CVD is an aqueous solution of gallium chloride or an aqueous solution of gallium acetylacetonate doped with tin chloride.

Specifically, compared with existing physical film formation methods (magnetron sputtering, etc.), the formed films are mostly polycrystalline or amorphous phases, and polycrystalline and amorphous will bring more defects, which will cause the device to easily break down at the defects under high voltage; the single-crystalline gallium oxide film obtained in this embodiment is of great help to improve the voltage resistance characteristics of the device.

It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the term "include", "comprise" or any other variant is intended to cover non-exclusive inclusion, so that the article or device including a series of elements includes not only those elements, but also other elements that are not explicitly listed. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the article or device including the elements. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The orientation or position relationship indicated by "up", "down", "left", "right", etc. is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention.

In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.

The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the scope of protection of the present invention.

Claims (6)

1. The preparation method of the gallium oxide heterogeneous quasi-vertical device based on sapphire substrate epitaxy is characterized by comprising the following steps of:

Providing a substrate;

Epitaxial a p-type oxide heteroepitaxial layer on the substrate using a semiconductor epitaxial process; epitaxially growing nickel oxide or cuprous oxide on the substrate by using first Mist-CVD to form a p-type oxide heteroepitaxial layer; wherein the source of the first Mist-CVD is lithium hydroxide doped with aqueous solution of gallium acetylacetonate;

A semiconductor epitaxial process is used for carrying out epitaxial gallium oxide layer on the p-type oxide heteroepitaxial layer, ion implantation is carried out on the gallium oxide layer, and a highly doped gallium oxide layer is epitaxially used for obtaining controllable high electron mobility on the upper surface of the gallium oxide layer; epitaxially growing gallium oxide on the nickel oxide or cuprous oxide by using a second Mist-CVD to form a gallium oxide epitaxial layer; wherein the source of the second Mist-CVD is aqueous solution of gallium chloride or aqueous solution of gallium acetylacetonate doped with stannic chloride; wherein the p-type oxide heteroepitaxial layer and the gallium oxide layer form a heterojunction p-i-n structure together;

Patterning the gallium oxide layer by using an etching process to form a gallium oxide epitaxial layer with a circular projection shape, wherein the projection direction is a direction perpendicular to the substrate;

Depositing a cathode metal on the gallium oxide epitaxial layer using a metal deposition process;

After removing the redundant photoresist, using a rapid annealing process to form ohmic contact between the cathode metal and the gallium oxide epitaxial layer;

Depositing anode metal on the p-type oxide heteroepitaxial layer and on the periphery of the gallium oxide epitaxial layer by using a metal deposition process;

after removing the excess photoresist, a rapid annealing process is used to form an ohmic contact between the anode metal and the p-type oxide heteroepitaxial layer.

2. A gallium oxide heterogeneous quasi-vertical device based on sapphire substrate epitaxy, prepared using the preparation method of claim 1, comprising:

a substrate;

a p-type oxide heteroepitaxial layer on the substrate;

the gallium oxide epitaxial layer is positioned on the p-type oxide heteroepitaxial layer; the p-type oxide heteroepitaxial layer and the gallium oxide epitaxial layer form a heterojunction p-i-n structure together;

Cathode metal on the gallium oxide epitaxial layer;

An anode metal on the p-oxide heteroepitaxial layer and at least partially surrounding the gallium oxide epitaxial layer; applying a bias voltage to the heterojunction p-i-n structure through the cathode metal and the anode metal;

Wherein the p-oxide heteroepitaxial layer, the anode metal, the gallium oxide epitaxial layer and the cathode metal together form a heterogeneous pn junction quasi-vertical device.

3. The sapphire substrate-epitaxial-based gallium oxide hetero-quasi-vertical device of claim 2 wherein the anode metal is ring-shaped surrounding and spaced apart from the gallium oxide epitaxial layer.

4. The sapphire substrate epitaxy-based gallium oxide heterogeneous quasi-vertical device of claim 2, wherein the substrate is a sapphire substrate that is a C-plane sapphire wafer, an R-plane sapphire wafer, an a-plane sapphire wafer, or an M-plane sapphire wafer.

5. The sapphire substrate epitaxial-based gallium oxide hetero-quasi-vertical device of claim 2 wherein the p-type oxide hetero-epitaxial layer has a thickness of 100 nm-1 μm in a direction perpendicular to the substrate.

6. The sapphire substrate epitaxy-based gallium oxide heterogeneous quasi-vertical device of claim 2, wherein the thickness of the gallium oxide epitaxial layer is 100 nm-2 μm in a direction perpendicular to the substrate.