CN116932430A - Memory access control system for RDMA network cards - Google Patents

Abstract

The application discloses a memory access control system for an RDMA network card, which comprises: a memory access control software module and a memory access control logic module; the memory access control software module is arranged in the host RDMA network card driver and is used for registering and deregistering a memory area and a memory window and mapping a virtual address space to a physical address space; the memory access control logic module is arranged in the RDMA network card and used for judging whether the access authority of the RDMA request is legal or not, and converting the virtual address into the physical address when the access authority is legal, so as to provide information for DMA operation of the RDMA network card. The memory access control system for the RDMA network card provided by the application has the beneficial effects that query logic related to virtual-physical address conversion and memory access authority control is unloaded to RDMA network card hardware, so that the performance of high-speed transmission of the network card is brought into play, the transmission bandwidth of the network card is improved, the time delay of RDMA read and write operations is reduced, and the occupation of storage space is reduced.

Description

Memory access control system for RDMA network cards

Technical field

The invention belongs to the field of network technology, and specifically relates to a memory access control system for RDMA network cards.

Background technique

RDMA (Remote Direct Memory Access) network has become the mainstream of data center networks in recent years due to its excellent characteristics of low latency, low CPU overhead and high bandwidth. Its types include Infiniband network and RoCE network. RDMA supports data transfer directly from the memory of one computer to the memory of another computer without the intervention of the operating systems of both parties. RDMA technology eliminates the overhead of copying and context switching of data packets in user space and kernel space, thereby freeing up memory bandwidth and CPU cycles to improve application system performance. Most RDMA networks use specialized smart network cards to offload network services to hardware, further reducing CPU load.

RDMA provides a set of software transmission interfaces through which applications can create transmission requests (WorkRequest, WR for short). WR describes the content that they wish to interact with the peer, such as memory address, length and key. The memory address in WR is a virtual address. The virtual memory must have been registered, has remote access permission, and the key is correct to allow the peer's RDMA request. Taking the RDMA Write request as an example, the initiating end puts the starting address of the memory to be written by the peer, the write length and the key into the WR; the responding end's network card parses the WR and needs to verify that the memory has been registered. With remote write permission and the key is correct, the virtual address is converted to a physical address, and the network card uses the physical address to initiate DMA access to the host memory.

Some RDMA network cards obtain physical addresses and memory access rights by transmitting memory read and write requests and virtual addresses to the driver. This method has good flexibility, but because it involves interaction with the driver, the software overhead is large and delays High, not suitable for RDMA networks with high bandwidth and delay requirements; some RDMA network cards save a copy of the host address mapping table and perform storage and address retrieval through the on-chip CAM (Content Address Memory) resource, but this method requires constant updating. For the cache in the network card, due to the limited CAM resources in the chip, there may be a large number of query misses, resulting in a decrease in query efficiency. Therefore, in order to improve the query efficiency of virtual-physical address translation, reduce the storage resource occupation in the network card, enhance the parallelism of memory access control and address translation, and improve the versatility of the system, further research on memory access control technical solutions is needed.

Contents of the invention

The present invention provides a memory access control system for RDMA network cards to solve the above-mentioned technical problems, and specifically adopts the following technical solutions:

A memory access control system for RDMA network cards, including a memory access control software module and a memory access control logic module;

The memory access control software module is set in the host RDMA network card driver and is used to register and unregister the memory area and memory window, and to map the virtual address space to the physical address space;

The memory access control logic module is set in the RDMA network card. The memory access control logic module is used to determine whether the access permission requested by RDMA is legal, and if the access permission is legal, perform conversion from the virtual address to the physical address, as Provides information for DMA operations of the network card.

Further, the memory access control software module manages a memory registration list for storing registered memory areas and memory window related information;

The memory access control software module also manages a B+ tree data structure for storing the mapping of virtual addresses to physical addresses;

The memory access control logic module uses storage resources in the RDMA network card hardware to save copies of the memory registration list and B+ tree data structure. The memory access control software module actively initiates updates to the memory registration list and B+ tree data structure in the RDMA network card hardware to ensure Consistency of software and hardware storage;

The memory access control logic module determines whether the access permission requested by RDMA is legal by accessing the memory registration list, and obtains the mapping from the virtual address to the physical address by querying the B+ tree data structure.

Further, the memory access control software module includes:

The virtual-physical address mapping unit is used to map the virtual address requested by the application program to a unified IO virtual address space, and then perform virtual-physical address conversion to map a continuous virtual address space into one or more continuous physical address segments. part;

The B+ tree management unit is used to use the registered virtual address as the key of the B+ tree, the registered memory length and physical segmentation information as the value of the B+ tree, and save it to the B+ tree data structure;

Memory area/memory window management unit, used to perform registration and deregistration of memory areas and memory windows, generate access keys including local access keys and remote access keys, and register effective identification, access keys, and virtual address spaces Information such as address and length, address type and access permissions are stored in a memory registration list.

Further, the memory access control software module uses an array to store the memory registration list in the system memory;

The elements of the array of the memory registration list include: valid identification, local access key, remote access key, registration address and length of the virtual address space, address type and access permissions.

Further, the valid flag indicates whether the array element is valid. When the memory area/memory window is successfully registered, the valid flag is 1. When the memory area/memory window is logged out, the valid flag is 0;

The local access key and the remote access key are valid when the memory area/memory window has local access permissions and remote access permissions respectively. Both are 32-bit integers, of which the upper 24 bits are the query index of the memory registration list and the lower 8 bits are Globally unique key;

The registration address and length of the virtual address space are the starting address and total registration length of the virtual address space specified when registering the memory area or memory window;

Address types include ordinary addresses and zero-based addresses, represented by the numbers 0 and 1 respectively;

Access permissions are divided into local write, remote read, remote write and remote atomic operations, expressed using a 4-bit mask.

Further, the memory access control software module uses a tree structure node array and a content node array to store the B+ tree data structure in the system memory;

The tree structure node array stores the middle nodes and leaf nodes of the B+ tree. The middle node elements contain keys and pointers to the left and right subtree nodes. The leaf node elements contain keys and pointers to content array elements. The content node array stores complete key-value pairs. , the content node element corresponds to the leaf node element, and each content node element saves its right sibling node element pointer to facilitate range query;

The maximum number of elements contained in each B+ tree node is determined when the network card is initialized;

The maximum number of physical segments contained in each B+ tree element is determined when the network card is initialized;

During a memory mapping process, if the number of physical segments after virtual address space mapping exceeds the maximum value, the virtual address and physical segment information will be split into multiple B+ tree elements for storage;

The creation, update and deletion of the B+ tree can only be processed by the memory access control software module, and the processing results are synchronized to the memory access control logic module, so that the B+ tree virtual-physical address translation table in the RDMA network card is consistent with the system The contents of the B+ tree data structure in memory are consistent.

Further, the memory access control logic module includes a memory access permission matching logic unit, a virtual-physical address conversion logic unit, a memory registration list storage unit and a B+ tree storage unit;

The memory access rights matching logic unit takes the virtual address, length and key in the RDMA request as input, uses the high 24 bits of the key as the index of the memory registration list, obtains the memory registration information, and then compares the RDMA request with the memory registration table. The information in the RDMA request is matched. When the memory area in the RDMA request is within the memory registration range, the requested key is completely equal to the registered key, and the requested read and write permissions are within the registered permission range, the memory access permissions are matched successfully. , otherwise permission matching fails;

The virtual-to-physical address conversion logical unit uses the virtual address in the RDMA request as a key to query the B+ tree virtual-to-physical address translation table. The B+ tree query is a range query, and it is found that the virtual address is in a certain B+ tree element. If the length information in the key and value is within the memory range, the query is successful;

The memory registration list storage unit is used to store a copy of the memory registration list;

The B+ tree storage unit is used to store a copy of the B+ tree data structure.

Further, the memory access control system for RDMA network cards is suitable for RDMA network card devices based on Infiniband network or RoCE network.

The present invention is also beneficial in that the provided memory access control system for the RDMA network card offloads the query logic related to virtual-physical address conversion and memory access permission control to the RDMA network card hardware, which not only helps to maximize the high-speed transmission of the network card performance, improve network card transmission bandwidth, reduce RDMA read and write operation delays, and reduce storage space usage.

The present invention is also beneficial in that it provides a memory access control system for RDMA network cards, and proposes to store a virtual-to-physical address conversion table based on a B+ tree data structure, which facilitates rapid updates and queries, while processing any data from the registered memory space. When the location starts an RDMA request for transmission, virtual address to physical address translation can be performed quickly.

The invention is also beneficial in that it provides a memory access control system for an RDMA network card, uses the network card driver software to manage the B+ tree virtual-physical address conversion table and the memory registration list, and stores the B+ tree and memory in the RDMA network card hardware. A copy of the registry only allows RDMA network card hardware to perform query operations, simplifying the logical design of the network card hardware and reducing query latency.

Description of the drawings

In order to explain the embodiments of the present application or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are only These are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without exerting any creative effort.

Figure 1 is a schematic diagram of a memory access control system for RDMA network cards of the present invention;

Figure 2 is a schematic diagram of the internal structure of the memory access control software module of the present invention;

Figure 3a is a schematic diagram of a B+ tree storing key-value pair content provided by an exemplary embodiment of the present invention;

Figure 3b is a schematic diagram of a B+ tree storing key-value pair content provided by another exemplary embodiment of the present invention;

Figure 3c is a schematic diagram of the B+ tree data structure provided by an exemplary embodiment of the present invention;

Figure 4 is a schematic diagram of a memory registration list array provided by an exemplary embodiment of the present invention;

Figure 5 is a schematic diagram of the internal structure of the memory access control logic module of the present invention.

Detailed ways

The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present application, but should not be construed as limiting the present application.

Figure 1 shows a memory access control system for RDMA network cards of the present application, which includes a memory access control software module 10 and a memory access control logic module 20.

The memory access control software module 10 is set in the host RDMA network card driver. Used to register and unregister memory areas and memory windows, as well as map virtual address space to physical address space.

The memory access control logic module 20 is provided in the RDMA network card. RDMA network cards are based on ASIC or FPGA. The memory access control logic module 20 is used to determine whether the access permission requested by RDMA is legal, and if the access permission is legal, convert the virtual address to the physical address to provide information for the DMA operation of the network card.

In the embodiment of the present application, the memory access control software module 10 manages a memory registration list for storing registered memory areas and memory window related information.

The memory access control software module 10 also manages a B+ tree data structure for storing virtual address to physical address mapping.

The memory access control logic module 20 uses the storage resources in the RDMA network card hardware to save copies of the memory registration list and B+ tree data structure. The memory access control software module 10 actively initiates updates to the memory registration list and B+ tree data structure in the RDMA network card hardware to ensure Consistency of software and hardware storage. The memory registration list and B+ tree data structure managed by the memory access control software module 10 have the same storage format and content as the memory registration list and B+ tree data structure managed by the memory access control logic module 20 . The memory access control logic module 20 determines whether the access permission requested by the RDMA is legal by accessing the memory registration list, and obtains the mapping from the virtual address to the physical address by querying the B+ tree data structure.

In the embodiment of the present application, the memory access control software module 10 includes: a virtual-physical address mapping unit 11, a B+ tree management unit 12, and a memory area/memory window management unit 13.

Among them, the virtual-physical address mapping unit 11 is used to map the virtual address requested by the application program to a unified IO virtual address space, and then perform virtual-physical address conversion to map a continuous virtual address space into one or more continuous physical addresses. Address segmentation. Specifically, the starting virtual address and memory length requested by the application program are recorded as <UVA,L>, and the starting virtual address and length mapped to the unified IO virtual address space are recorded as <IOVA,L>. After address translation, a continuous virtual address space will be mapped into N (N is a positive integer) continuous physical address segments. The i-th physical segment is recorded as <PAi, Offseti>, and all physical segments are recorded as is {<PAi,Offseti>|0<=i<N}, where PAi is the starting physical address of the i-th segment, and Offseti is the offset of the starting position of the i-th segment in the entire memory registration area.

The B+ tree management unit 12 is configured to, upon receiving a memory registration request, use the registered virtual address as the key of the B+ tree, use the registered memory length and physical segmentation information as the value of the B+ tree, and save it to the B+ tree data structure.

The B+ tree management unit 12 is also configured to use the virtual address as the key of the B+ tree and delete the corresponding B+ tree node when receiving a memory deregistration request.

In the embodiment of the present application, the memory access control software module 10 stores the B+ tree data structure in the form of a tree structure node array and a content node array. Preferably, the memory access control software module 10 saves the B+ tree data structure in system memory.

Specifically, the B+ tree management unit 12 uses the virtual address IOVA generated by the virtual-physical address mapping unit 11 as the key of the B+ tree, and uses the length L and the physical segment information {<PAi, Offseti>|0<=i< N} is saved to the B+ tree structure as the value of the B+ tree. It is set that a B+ tree element can save K (K is a positive integer) physical segments. The memory of more than K physical segments is split into multiple B+ tree elements for storage. B+ trees are stored in fixed-length arrays, including a tree structure node array and a content node array. The tree structure node array stores the middle nodes and leaf nodes of the B+ tree, where the middle node elements contain keys and pointers to the left and right subtree nodes, while the leaf node elements contain keys and pointers to content array elements. The content node array stores complete key-value pairs. Content node elements correspond to leaf node elements. Each content node element stores its right sibling node element pointer to facilitate range queries.

Among them, the maximum number of elements contained in each B+ tree node is determined when the network card is initialized. The maximum number of physical segments contained in each B+ tree element is determined when the network card is initialized. During a memory mapping process, if the number of physical segments mapped to the virtual address space exceeds the maximum value, the virtual address and physical segment information will be split into multiple B+ tree elements for storage. The creation, update and deletion of the B+ tree can only be processed by the memory access control software module 10, and the processing results are synchronized to the memory access control logic module 20, so that the B+ tree virtual-physical address translation table in the RDMA network card is consistent with the system memory. The contents of the B+ tree data structure are consistent.

Figure 3a shows an embodiment of a B+ tree storing key-value pairs. In this embodiment, a B+ tree element can store K = 4 physical segments, and the memory space registered by the application is mapped to N = 3 Physical segmentation. All physical segments can be saved into a B+ tree element. The key of this element is: IOVA, and the value is: {L,PA0,Offset0,PA1,Offset1,PA2,Offset2}.

Figure 3b shows another embodiment of B+ tree storing key-value pairs. In this embodiment, one B+ tree element can save K=4 physical segments, and the memory space registered by the application is mapped to N=6 physical segments. These physical segments will be split into two B+ tree elements for storage. The key of the first element is IOVA0 and the value is {L0,PA0,Offset0,PA1,Offset1,PA2,Offset2,PA3, Offset3}, the key of the second element is IOVA1, and the value is {L1,PA4,Offset4,PA5,Offset5}.

Figure 3c shows a schematic diagram of a B+ tree data structure provided by an exemplary example of this application. In this example, a B+ tree node is set to contain at most R=3 elements, and each element can store at most K=4 physical segments. Figure 3c shows a three-layer B+ tree structure. It is worth noting that since tree structure nodes and content nodes are saved in different arrays, the leaf nodes of the B+ tree structure store the key of the element and the index pointing to the content node element corresponding to the key. Other layers of the tree structure node What is saved is the key of the element and the pointers to the left and right child nodes corresponding to the key.

It should be noted that the number of nodes that the tree structure node array and content node array can accommodate has been determined when the RDMA network card driver is initialized. In some scenarios, if there are too many B+ tree nodes and the reserved array storage space is insufficient, The B+ tree management unit 12 needs to re-apply to the system for a larger array storage space, copy all elements in the original array to the new storage space, and finally release the original array storage space. The number of elements that each tree structure node or content node can accommodate is determined when the RDMA network card driver is initialized, and will not change midway.

The memory area/memory window management unit 13 is used to perform registration and deregistration of the memory area and memory window, generate an access key including a local access key (L_Key) and a remote access key (R_Key), and convert the access key, virtual address Information such as the registered address and length of the space, address type and access permissions are stored in the memory registration list.

The operations of adding, deleting and updating B+ tree nodes by the memory access control software module 10 are all synchronized to the RDMA network card. The operations of adding, deleting and updating the memory registration list of the memory access control software module 10 are all synchronized to the RDMA network card.

In the embodiment of the present application, the memory access control software module 10 stores the memory registration list in the form of an array. Preferably, the memory access control software module 10 stores the memory registration list in system memory.

The elements of the array of the memory registration list include: valid identification, local access key, remote access key, registration address and length of the virtual address space, address type and access permissions.

In the implementation of the present application, the valid flag indicates whether the array element is valid. When the memory area/memory window is successfully registered, the valid flag is 1. When the memory area/memory window is deregistered, the valid flag is 0.

The local access key and the remote access key are valid when the memory area/memory window has local access permissions and remote access permissions respectively. Both are 32-bit integers, of which the upper 24 bits are the query index of the memory registration list and the lower 8 bits are Globally unique key.

The registration address and length of the virtual address space are the starting address and total registration length of the virtual address space specified when registering the memory area or memory window.

Address types include ordinary addresses and zero-based addresses, represented by the numbers 0 and 1 respectively. Access permissions are divided into local write, remote read, remote write and remote atomic operations, expressed using a 4-bit mask. It is worth noting that address types and access rights types may be expanded with the development of the RDMA network protocol, and the address types and access rights types included in the examples of the present invention should also be expanded accordingly with the upgrade of the protocol version.

Figure 4 shows a schematic diagram of an example of a memory registration list array in this application. The element with array index 0 describes a valid memory area/memory window registration information. The registered starting virtual address is 0x141200, the registration length is 10000 bytes, the address type is a normal IO address, and the access permission is local writable, Remotely writable and remotely readable, L_Key and R_Key are 0x0A3. The element with array index 1 describes an invalid memory area/memory window registration information. Although this element contains complete registration information, the valid bit is 0, indicating that it is a set of invalid information.

In the embodiment of the present application, the memory access control logic module 20 includes a memory access permission matching logic unit 21, a virtual-physical address conversion logic unit 22, a memory registration list storage unit 23 and a B+ tree storage unit 24. The memory registration list storage unit 23 is used to store a copy of the memory registration list. The B+ tree storage unit 24 is used to store a copy of the B+ tree data structure.

The memory access permission matching logic unit 21 takes the virtual address, length and key in the RDMA request as input, uses the high 24 bits of the key as the index of the memory registration list, obtains the memory registration information, and then compares the RDMA request with the memory registration table. The information is matched. When the memory area in the RDMA request is within the memory registration range, the requested key is completely equal to the registered key, and the requested read and write permissions are within the registered permission range, the memory access permissions are matched successfully. Otherwise permission matching fails.

As a preferred implementation, the specific implementation steps of the memory access permission matching logic unit 21 are as follows:

S211: Use the virtual address (IOVA_in), length (L_in), key (L_Key_in or R_Key_in), and access permission request (Access_in) in the RDMA request as input, use the high 24 bits of the key as the index of the memory registration list, and access The memory registration list storage unit 23 obtains a piece of memory registration information, including the aforementioned valid identification (V), access key (L_Key, R_Key), virtual address space registration address (IOVA) and length (L), address type (AType) and access rights (Access) and other information;

S212: If it is judged that the valid flag V is 1, proceed to step S213, otherwise it will end and the request failure will be returned;

S213: Determine whether the input key (L_Key_in or R_Key_in) is completely equal to the key (L_Key or R_Key) in the memory registration information, and whether the input access permission request (Access_in) is all included in the access permission of the memory registration information ( Access), only when the keys are completely equivalent and the access rights are completely included, proceed to step S214, otherwise it will end and the request failure will be returned;

S214: Determine whether the memory area to be accessed in the RDMA request is within the registration range, that is, only when ((IOVA_in>=IOVA)&&(IOVA_in+L_in<=IOVA+L)) is established, it means that the memory access permissions are matched successfully and return The request is successful, otherwise the request fails.

It can be understood that the above steps S212, S213, and S214 can be executed in parallel, and the execution results of the three steps are logically "ANDed". If the result is true, the request is returned as successful, and if the result is false, the request is returned as failed.

In a specific embodiment, only when the memory access rights matching logic unit 21 returns a successful request, the processing of the virtual-to-physical address conversion logic unit 22 will be started. If the memory access rights matching logic unit 21 returns a request failure, the memory access control logic module 20 immediately returns a failure, and the processing of the virtual-to-physical address translation logic unit 22 will not be started.

Optionally, the memory registration list storage unit 23 and the B+ tree storage unit 24 may be an on-chip storage resource SRAM or an off-chip storage resource DDR. To reduce data access latency, on-chip storage resources are preferred.

The virtual-to-physical address conversion logic unit 22 uses the virtual address in the RDMA request as a key to query the B+ tree virtual-to-physical address translation table. The B+ tree query is a range query, and it is found that the virtual address is in a certain B+ tree element key. If the query is within the memory range represented by the length information in the value, the query is successful.

The specific implementation steps of the virtual-to-physical address conversion logic unit 22 are as follows:

S221: Take the virtual address (IOVA_in) and length (L_in) in the RDMA request as input, first go to the B+ tree structure node array to obtain the root node, compare IOVA_in with the key of the root node element, and obtain the index of the next layer of child nodes. ;

S222: Query each layer of the B+ tree up to the leaf node in sequence according to the B+ tree query method, query the last element that is less than or equal to IOVA_in, and obtain the content node element index corresponding to the element;

S223: Use the content node element index as the address, query the content node array element, and obtain the complete key-value pair, that is, key=IOVA, value={L,PA0,Offset0,PA1,Offset1,PA2,Offset2,PA3,Offset3}, And the right sibling pointer RightP;

S224: Based on the offset of each physical segment, calculate the starting address and length of each physical segment within the memory range starting from the virtual address IOVA_in and having a length of L_in; if the expression (IOVA_in+L_in<=IOVA+L) If it is true, the query ends and the starting address and length of each physical segment mentioned above are output; if the expression IOVA_in+L_in>IOVA+L) is true, you need to continue to query its right sibling element, and use the right sibling pointer RightP as the content node element index. address, repeat step S223.

It can be understood that in the implementation of the present application, the aforementioned memory access control system for RDMA network cards is applicable to RDMA network card devices based on Infiniband network or RoCE network.

The basic principles, main features and advantages of the present invention have been shown and described above. Those skilled in the art should understand that the above embodiments do not limit the present invention in any way, and any technical solutions obtained by equivalent substitution or equivalent transformation fall within the protection scope of the present invention.

Claims (8)

1. A memory access control system for an RDMA network card, comprising a memory access control software module and a memory access control logic module;

the memory access control software module is arranged in the host RDMA network card driver and is used for registering and deregistering a memory area and a memory window and mapping a virtual address space to a physical address space;

the memory access control logic module is arranged in the RDMA network card and is used for judging whether the access authority of the RDMA request is legal or not, and converting the virtual address into the physical address under the condition that the access authority is legal, so as to provide information for DMA operation of the network card.

2. The memory access control system for an RDMA network card of claim 1,

the memory access control software module manages a memory registration list for storing registered memory areas and related information of memory windows;

the memory access control software module also manages a B+ tree data structure for storing a mapping of virtual addresses to physical addresses;

the memory access control logic module uses a storage resource in the RDMA network card hardware to store a memory registration list and a copy of a B+ tree data structure, and the memory access control software module actively initiates updating of the memory registration list and the B+ tree data structure in the RDMA network card hardware to ensure consistency of software and hardware storage;

the memory access control logic module judges whether the access authority of the RDMA request is legal or not by accessing the memory registration list, and obtains the mapping from the virtual address to the physical address by inquiring the B+ tree data structure.

3. The memory access control system for an RDMA network card of claim 2, wherein,

the memory access control software module includes:

the virtual-physical address mapping unit is used for mapping the virtual address requested by the application program into a unified IO virtual address space, performing virtual-physical address conversion, and mapping a section of continuous virtual address space into one or more sections of continuous physical address segments;

the B+ tree management unit is used for taking the registered virtual address as a key of the B+ tree, taking the registered memory length and the physical segmentation information as values of the B+ tree, and storing the values into a B+ tree data structure;

the memory area/memory window management unit is used for executing registration and cancellation of the memory area and the memory window, generating an access key comprising a local access key and a remote access key, and storing information such as effective identification, the access key, the registration address and length of the virtual address space, the address type, the access authority and the like into a memory registration list.

4. The memory access control system for an RDMA network card of claim 3,

the memory access control software module adopts an array form to store a memory registration list in a system memory;

the elements of the array of the memory registration list include: valid identification, local access key, remote access key, registered address and length of virtual address space, address type and access rights.

5. The memory access control system for an RDMA network card of claim 4, wherein,

the effective mark indicates whether the array element is effective, when the memory area/memory window is registered successfully, the effective mark is 1, and when the memory area/memory window is registered off, the effective mark is 0;

the local access key and the remote access key are respectively 32-bit integers when the memory area/memory window has local access authority and remote access authority, wherein the upper 24 bits are query indexes of a memory registration list, and the lower 8 bits are globally unique keys;

the registered address and length of the virtual address space are the initial address and total registered length of the virtual address space appointed when the memory area or the memory window is registered;

the address type comprises two types of common addresses and zero base addresses, which are respectively represented by numerals 0 and 1;

the access rights are divided into local write, remote read, remote write and remote atomic operations, using a 4-bit mask representation.

6. The memory access control system for an RDMA network card of claim 4, wherein,

the memory access control software module adopts a tree structure node array and a content node array to store a B+ tree data structure in a system memory;

the tree structure node array stores intermediate nodes and leaf nodes of the B+ tree, the intermediate node elements comprise keys and pointers of left and right subtree nodes, the leaf node elements comprise keys and pointers pointing to content array elements, the content node array stores complete key-value pairs, the content node elements correspond to the leaf node elements, and each content node element stores a right brother node element pointer thereof, so that range query is convenient to perform;

the maximum value of the number of elements contained in each B+ tree node is determined when the network card is initialized;

the maximum value of the number of the physical segments contained in each B+ tree element is determined when the network card is initialized;

in a memory mapping process, if the number of physical segments mapped by the virtual address space exceeds the maximum value, splitting the virtual addresses and the physical segment information into a plurality of B+ tree elements for storage;

and B+ tree creation, updating and deletion can only be processed by the memory access control software module, and the processing result is synchronized to the memory access control logic module, so that the B+ tree virtual-physical address conversion table in the RDMA network card is consistent with the B+ tree data structure content in the system memory.

7. The memory access control system for an RDMA network card of claim 6, wherein,

the memory access control logic module comprises a memory access right matching logic unit, a virtual-physical address conversion logic unit, a memory registration list storage unit and a B+ tree storage unit;

the memory access permission matching logic unit takes a virtual address, a length and a secret key in an RDMA request as input, takes the high 24 bits of the secret key as an index of a memory registration list to obtain memory registration information, matches the RDMA request with information in the memory registration list, and if a memory area in the RDMA request is in a memory registration range, a request secret key is completely equal to a registered secret key, and if the requested read-write permission is in a registered permission range, the memory access permission is successfully matched, otherwise, the permission matching is failed;

the virtual-physical address conversion logic unit takes a virtual address in an RDMA request as a key, queries the virtual-physical address conversion table of a B+ tree, wherein the B+ tree query is a range query, and queries that the virtual address is in a memory range represented by length information in a certain B+ tree element key and value, and the query is successful;

the memory registration list storage unit is used for storing copies of the memory registration list;

the B+ tree storage unit is used for storing a copy of the B+ tree data structure.

8. The memory access control system for an RDMA network card of claim 1,

the memory access control system for the RDMA network card is suitable for RDMA network card equipment based on an Infiniband network or a RoCE network.