CN1169218C - silicon controlled rectifier circuit with high trigger current - Google Patents

Abstract

A silicon controlled rectifier with high trigger current is constructed on a semiconductor substrate and is defined with a well region with different electrical properties. A P-doped region and an N-doped region are formed in the well region and the semiconductor substrate, respectively. Wherein, the P doped region and the N doped region in the well region are connected and used as the anode of the silicon controlled rectifier circuit; the P doped region and the N doped region in the semiconductor substrate are connected with another doped region formed at the interface of the semiconductor substrate and the well region and used as the cathode of the silicon controlled rectifier circuit. In addition, the anode and the cathode of the SCR circuit may be formed by a single doped region.

Description

Silicon controlled rectifier circuit with high trigger current

The present invention relates to an anti-static discharge protection circuit, and in particular to a silicon-controlled rectifier circuit with high trigger current, which can prevent the silicon-controlled rectifier from being accidentally triggered by external noise interference and ensure the normal operation of the circuit to be protected. action.

Please refer to FIG. 1A , which is an anti-static discharge protection circuit disclosed in US Pat. No. 5,012,317, which is used to connect between a contact pad 12 (Pad) to be protected and a reference point. The circuit 20 is basically a four-layer semiconductor device 20 having a P-type material layer 22 adjacent to an N-type material layer 24 ; Wherein, the P-type material layer 22 is connected to the contact pad 12 to be protected; the N-type material layer 28 is connected to the reference point. A PN junction 30 is formed between the P-type material layer 22 and the N-type material layer 24; a PN interface 32 is formed between the N-type material layer 24 and the P-type material layer 26; A PN interface 34 is formed. Usually, this semiconductor device 20 is called a silicon controlled rectifier (SCR).

FIG. 1B is an equivalent circuit diagram of FIG. 1A . Wherein, the emitter of the PNP transistor 36 is connected to the contact pad 12 to be protected, the base is connected to the collector of the NPN transistor 38 , and the collector is connected to the base of the NPN transistor 38 . The emitter of NPN transistor 38 is connected to reference ground. In addition, the PN interface 30 is the emitter-base interface of the PNP transistor 36; the interface 34 is the emitter-base interface of the NPN transistor 38; the PN interface 32 is the collector-base interface of the NPN transistor 38 (or the PNP transistor 36). pole interface. Resistor 40 is connected between the base of NPN transistor 38 and the reference point to supply the base current of NPN transistor 38 when the collector-emitter current of PNP transistor 36 increases; and resistor 42 is connected to the base of PNP transistor 36 Between the electrode and the connection pad 12 to be protected, the gain of the PNP transistor 36 is reduced.

As shown in Figure 1A, when the base of the NPN transistor 38 has a positive pulse voltage, the NPN transistor 38 will be turned on and the potential of the collector (the base of the PNP transistor 36) will drop rapidly, and the current will pass through the NPN transistor 38. collector-emitter interface. At this time, since the PNP transistor 36 is in an active state, its collector current passes through the base of the NPN transistor 38 (the collector current of the PNP transistor 36 is equal to the base current of the NPN transistor 38), so the silicon controlled rectifier will form a positive feedback (Regeneration). In this state, even if the pulse voltage at the base of the NPN transistor 38 disappears, the silicon controlled rectifier will remain on (as long as there is enough current between the collector and the emitter of the NPN transistor 38), until the collector current of the transistor 36 cannot Enables NPN transistor 38 to conduct.

FIG. 2 is a schematic cross-sectional view of the silicon controlled rectifier shown in FIGS. 1A and 1B applied to a semiconductor substrate. Wherein, an N-type well region 46 is defined on the P-type semiconductor substrate 44 with low doping concentration, which is equivalent to the N-type material layer 24 in FIG. 1A . The PN interface 32 is formed between the N-type well region 46 (N-type material layer 24 ) and the P-type semiconductor substrate 44 . A P-type doped region 48 is defined on the P-type semiconductor substrate 44 , which corresponds to the P-type material layer 22 . The PN interface 30 is formed between the P-type doped region 48 and the N-type well region 46 . The P-type doped region 48 is connected to the connection pad 12 to be protected. In addition, an N-type doped region 50 is also defined on the N-type well region 46 to provide a resistive connection between the connection pad 12 and the N-type well region, and to make the PN interface 32 in negative transients (Negative transients) ) can be reversed conduction.

Furthermore, the N-type doped region 52 is provided in the P-type semiconductor substrate 44 and outside the N-type well region 46, which is equivalent to the N-type material layer 28 in FIG. 1A. The PN interface 34 is formed between the N-type doped region 52 and the P-type semiconductor substrate 44 . The P-type doped region 54 with a high doping concentration is formed inside the semiconductor substrate 44 and outside the N-type well region 46 to provide a low-resistivity region. In addition, the P-type doped region 54 is also connected to the resistor 40 formed by the P-type semiconductor substrate 44 and connected to the N-type doped region 52 to a reference point.

And Fig. 3 is the current/potential (I/V) characteristic diagram of this silicon controlled rectifier. When the voltage of the connection pad 12 to be protected is lower than the activation voltage V _T (usually between 30-50V), the circuit to be protected is in a normal operating state, as shown in icon A. At this time, the PNP transistor 36 and the NPN transistor 38 of the silicon controlled rectifier are in the off state (the current approaches zero), which does not affect the operation of the original circuit. And when the connection pad 12 to be protected has a voltage greater than the activation voltage V _T (such as: noise or large signal output) and is received by the silicon controlled rectifier, the PNP transistor 36 is first turned on and absorbs the part generated by the connection pad 12 to be protected. current, as shown in Figure B. At this time, the NPN transistor 38 is turned off, and the collector current of the PNP transistor 36 is grounded through the resistor 40 . When the voltage across the resistor 40 is greater than the threshold voltage V _TH of the NPN transistor 38 , the NPN transistor 38 of the silicon controlled rectifier will also be turned on and form a positive feedback circuit with the PNP transistor 36 , as shown in figure C. At this time, the equivalent impedance of the silicon controlled rectifier approaches zero, which can absorb most of the current generated by the connection pad 12 to be protected, and greatly reduce the voltage of the connection pad 12 to be protected, and prevent the circuit to be protected from static electricity Discharge effects or destruction by high currents.

However, the trigger current of this protection circuit is extremely low, so if the silicon controlled rectifier suddenly receives an overshooting/undershooting surge during normal operation, the circuit may be interrupted unexpectedly and an error may occur.

In order to overcome the deficiencies of the prior art, the main purpose of the present invention is to provide a silicon-controlled rectifier circuit with high trigger current, which can prevent the silicon-controlled rectifier from being accidentally triggered by external noise interference and ensure the normal operation of the circuit to be protected.

The object of the present invention can be achieved through the following measures:

A high trigger current silicon controlled rectifier circuit formed on a semiconductor substrate comprising:

a well region formed in the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate;

a first P-doped region and a first N-doped region formed in the well region and connected to each other to form the anode of the silicon controlled rectifier circuit;

a second P-doped region and a second N-doped region formed on the semiconductor substrate; and

An interface doping region is formed on the interface between the semiconductor substrate and the well region, and connects the second P doping region and the second N doping region to form the cathode of the silicon controlled rectifier circuit.

The semiconductor substrate is a P-type silicon substrate, and the well region is an N-type lightly doped region. In addition, the semiconductor substrate is another well region adjacent to the well region.

The present invention also relates to a high trigger current silicon controlled rectifier circuit formed on a semiconductor substrate, comprising:

a well region formed in the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate;

a first P-doped region and a first N-doped region formed in the well region and connected to each other to form the anode of the silicon controlled rectifier circuit;

a second doped region having a conductivity type different from that of the semiconductor substrate and formed in the semiconductor substrate; and

a third doped region having the same conductivity type as the semiconductor substrate and formed at the interface between the semiconductor substrate and the well surface, the third doped region is connected to the second doped region to form the silicon controlled rectifier circuit cathode. The semiconductor substrate is a P-type silicon substrate, and the well region is an N-type lightly doped region.

The present invention also relates to a high trigger current silicon controlled rectifier circuit formed on a semiconductor substrate, comprising:

a well region formed in the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate;

a first doped region, formed in the well region and having a conductivity type different from that of the well region, used as an anode of the silicon controlled rectifier;

a second doped region having a conductivity type different from that of the semiconductor substrate and formed in the semiconductor substrate; and

A third doping region has the same conductivity type as the semiconductor substrate and is formed on the interface between the semiconductor substrate and the well region, and is used to connect with the second doping region as a cathode of the silicon controlled rectifier circuit.

The present invention also relates to a silicon controlled rectifier circuit triggered by a Zener diode, formed on a semiconductor substrate, comprising:

a well region formed in the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate;

a first P-doped region and a first N-doped region formed in the well region and connected to each other to form the anode of the silicon controlled rectifier circuit;

A second P-doped region and a second N-doped region formed on the semiconductor substrate;

an interface doping region, formed at the interface between the semiconductor substrate and the well region, and connecting the second P doping region and the second N doping region to form the cathode of the silicon controlled rectifier circuit; and

A third N-doped region and a third P-doped region are formed on the semiconductor substrate and the well region, connected to each other to form a Zener diode connected to the anode of the silicon controlled rectifier.

Compared with the prior art, the present invention has the following advantages:

In the example of the present invention, the high trigger current silicon controlled rectifier is constructed on a semiconductor substrate, and an electrically different well region is defined thereon. A P-doped region and an N-doped region are respectively formed in the well region and the semiconductor substrate. Wherein, the P-doped region and the N-doped region in the well region are connected to serve as the anode of the silicon controlled rectifier circuit; and the P-doped region and the N-doped region in the semiconductor substrate are formed in the semiconductor substrate and the well region. The other doped region of the interface is connected to serve as the cathode of the silicon controlled rectifier circuit. When the voltage of the electrode to be protected starts to rise, the transistor formed by the doped region formed by the anode-well region-interface will be turned on first, and absorb part of the electrostatic discharge current to moderately reduce the voltage. This can effectively avoid malfunctions caused by noise surges. However, when the voltage continues to increase, the transistor formed by the anode-well region-substrate will also be turned on, so that the voltage of the electrode to be protected is greatly reduced.

In another embodiment of the present invention, the high-trigger current silicon-controlled rectifier is constructed on a semiconductor substrate, and an electrically different well region is defined thereon. An electrically different doped region is formed in the semiconductor substrate; and a P doped region and an N doped region are formed in the well region. Wherein, the P-doped region and the N-doped region in the well region are connected to serve as the anode of the silicon controlled rectifier circuit; and the doped region in the semiconductor substrate is connected with another doped region formed at the interface between the semiconductor substrate and the well region The area is connected to serve as the cathode of the silicon controlled rectifier circuit.

In yet another example of the present invention, a high trigger current silicon controlled rectifier is constructed on a semiconductor substrate defining an electrically different well region thereon. An electrically different doped region is formed in the semiconductor substrate and the well region respectively. Wherein, the doped region in the well region is used as the anode of the silicon controlled rectifier circuit; and the doped region in the semiconductor substrate is connected with another doped region formed at the interface between the semiconductor substrate and the well region, so as to serve as The cathode of the Silicon Controlled Rectifier circuit.

To sum up, the silicon controlled rectifier circuit of the present invention has a relatively high trigger current, so it can avoid accidental triggering of the silicon controlled rectifier in external noise interference and ensure the normal operation of the circuit to be protected.

In order to make the above-mentioned purpose, features and advantages of the present invention more comprehensible, preferred embodiments are enumerated and further described as follows in conjunction with the accompanying drawings.

Description of drawings

FIG. 1A is a silicon controlled rectifier circuit disclosed in US Pat. No. 5,012,317;

Fig. 1B is an equivalent circuit diagram of the silicon controlled rectifier circuit in Fig. 1A;

2 is a schematic cross-sectional view of the silicon controlled rectifier circuit in FIGS. 1A and 1B when it is implemented on a semiconductor substrate;

3 is a current-voltage (IV) relationship diagram of the silicon controlled rectifier circuit in Figures 1A and 1B;

Fig. 4 is the equivalent circuit diagram of silicon controlled rectifier circuit of the present invention;

5A to 5C are schematic cross-sectional views of the silicon-controlled rectifier circuit of the present invention when it is implemented on a semiconductor substrate;

Fig. 6 is the current-voltage (IV) relationship diagram of silicon controlled rectifier circuit of the present invention; And

FIG. 7 is a schematic cross-sectional view of a silicon controlled rectifier circuit of the present invention combined with a Zener diode triggered silicon controlled rectifier.

Example

Please refer to FIG. 4 , which is an equivalent circuit diagram of the silicon controlled rectifier circuit of the present invention. Wherein, the emitters of the PNP transistors Q1 and Q3 are connected to the connection pad 2 to be protected, and the substrate is connected to the collector and the collector of the NPN transistor Q2, which are respectively connected to the reference point and directly connected to the reference point through the resistor R _SUB . In addition, the emitter-base of the PNP transistors Q1 and Q3 are connected in parallel to the resistor R _NW ; while the emitter of the NPN transistor Q2 is directly connected to the reference point. Compared with the existing silicon controlled rectifier circuit, the present invention adds a PNP transistor Q3 in the circuit. Moreover, the emitter and base of the PNP transistor Q3 are shared with the PNP transistor Q1, and the collector is directly connected to the reference point.

When the voltage of the connection pad 2 to be protected rises abnormally, the PNP transistors Q1 and Q3 are first turned on because the emitter-base voltage reaches the breakdown voltage, so that the voltage of the connection pad 2 to be protected is moderately reduced. At this time, the collector of the PNP transistor Q3 can absorb most of the current generated by the connection pad 2 because it is directly connected to the reference point, so the collector current of the PNP transistor Q1 will be lower than conventional ones. The main purpose of this design is to make the silicon controlled rectifier circuit withstand more connection pad 2 current without turning on the NPN transistor Q2, so accidental triggering (misoperation) caused by external noise can be effectively reduced.

If the connection pad 2 continues to have a high voltage, so that the two ends of the resistor R _SUB (the base and emitter of the NPN transistor Q2) have a voltage greater than the breakdown voltage, the NPN transistor Q2 starts to conduct and forms a positive feedback circuit with the PNP transistors Q1 and Q3 . At this time, the equivalent impedance of the silicon controlled rectifier approaches zero, and the voltage of the connection pad 2 drops back quickly to avoid damage to the connected circuit. In addition, the resistor R _NW is connected between the bases of the PNP transistors Q1 and Q3 and the connection pad 2 to be protected to reduce the gain of the PNP transistor 36 .

Please refer to FIGS. 5A-5C , which are schematic cross-sectional views of a silicon controlled rectifier circuit implemented on a semiconductor substrate according to the present invention. In FIG. 5A , an N-type well region 70 is defined in the P-type semiconductor substrate 60 . The P-doped region 62 , the N-doped region 64 and the P-doped region 72 and the N-doped region 74 are respectively formed on the semiconductor substrate 60 and the N-type well region 70 . In addition, another P-doped region 76 is formed at the interface between the semiconductor substrate 60 and the N-type well region 70 . The P-doped region 72 and the P-doped region 74 are connected to each other as the anode A of the silicon controlled rectifier and connected to the connection pad 2 to be protected; and the P-doped region 62, the N-doped region 64, and the P-doped region 76 are connected to each other as the cathode CA of the silicon controlled rectifier and connected to the reference point.

In this example, the P-doped region 72 , the N-type well region 70 and the semiconductor substrate 60 are the PNP transistor Q1 of FIG. 4 . The P-doped region 72 , the N-type well region 70 and the P-doped region 76 are the PNP transistor Q3 in FIG. 4 . The N-type well region 70 , the semiconductor substrate 60 and the N-doped region 64 are the NPN transistor Q2 in FIG. 4 . The resistor R _SUB and the resistor R _NW are equivalent resistance pits at the interface of the semiconductor substrate 60 -N-type well region 70 and the interface of the N-type well region 70 -P doped region 72 .

When the voltage of the connection pad 2 increases to be greater than the breakdown voltage of the interface between the N-type well region 70 and the semiconductor substrate 60, the interface between the P-doped region 72 and the N-type well region 70 is forward biased, and the vertical PNP transistor Q1 is turned on. At this time, the interface between the semiconductor substrate 60 and the N-doped region 64 is also forward-biased, so that the lateral NPN transistor Q2 is turned on. Therefore, the P-doped region 72, the N-type well region 70, the semiconductor substrate 60, and the P-doped region 62 will form a positive feedback latch, so that the turn-on (Turn-on) impedance is greatly reduced, so as to serve as a low holding voltage ( Holdingvoltage) anti-static discharge protection circuit.

Here, the P-type semiconductor substrate 60 and the N-type well region 70 may be well regions adjacent to each other and electrically different. Alternatively, the electrical properties of the semiconductor substrate 60 and the well region 70 can also be reversed, and it is not limited to this embodiment.

Please refer to FIG. 5B , which is another schematic cross-sectional view of a silicon controlled rectifier circuit implemented on a semiconductor substrate according to the present invention. Wherein, the cathode of the silicon controlled rectifier circuit is formed by a single doped region. As shown, the P-type semiconductor substrate 80 defines an N-type well region 90 . A P-doped region 92 and an N-doped region 94 are formed in the well region 90 , and the two are connected to form the anode A of the silicon controlled rectifier circuit. In addition, the P-doped region 84 at the interface between the semiconductor substrate 80 and the N-type well region 90 is connected to the N-doped region 82 formed on the semiconductor substrate 80 to form the cathode CA of the silicon controlled rectifier circuit. The action principle of this circuit is the same as that of the silicon controlled rectifier in Fig. 4, so it will not be repeated here.

FIG. 5C is another schematic cross-sectional view of a silicon controlled rectifier circuit implemented on a semiconductor substrate according to the present invention. Wherein, the anode and the cathode of the silicon controlled rectifier are completed with a single doped region. As shown in the figure, an N-type well region 110 is defined on the P-type semiconductor substrate 100 . The P-doped region 112 is formed in the N-type well region to form the anode A of the silicon controlled rectifier circuit. In addition, the P-doped region 94 at the interface between the semiconductor substrate 100 and the N-type well region 110 is connected to the N-doped region 92 formed on the semiconductor substrate 100 to form the cathode CA of the silicon controlled rectifier circuit, as shown in FIG. 5B . The action principle of this circuit is the same as that of the silicon controlled rectifier in Fig. 4, so it will not be repeated here.

Fig. 6 is the current-voltage (IV) characteristic diagram of the silicon-controlled rectifier circuit of the present invention, wherein, the dotted line part is the current-voltage (IV) curve of the existing silicon-controlled rectifier circuit; and the solid line part is the silicon-controlled rectifier circuit of the present invention Current-voltage (IV) curves. When the voltage of the connection pad 2 to be protected is lower than the activation voltage V _T , the circuit to be protected is in a normal operating state, as shown in icon A'. At this time, the PNP transistors Q1 and Q3 and the NPN transistor Q2 of the silicon controlled rectifier are all in an off state (the current tends to zero). And when the connection pad 12 to be protected has a voltage greater than the activation voltage V _T (such as: noise or large signal output), when the silicon controlled rectifier receives it, the PNP transistors Q1 and Q3 are first turned on and absorb the voltage generated by the connection pad 2 to be protected. part current. Note that the collector of PNP transistor Q3 is directly connected to the reference ground, so most of the connection pad 2 current is absorbed by it, as shown in the diagram B'. This silicon controlled rectifier circuit therefore has a higher trigger current than conventional circuits. After the voltage at both ends of the resistor R _NW is greater than the critical voltage V _TH of the NPN transistor Q2 and the NPN transistor Q2 is turned on, the silicon controlled rectifier circuit will form a positive feedback, and greatly reduce the impedance of its open state, so that the voltage of the connection pad 12 to be protected A large drop, and the silicon-controlled rectifier circuit will not be turned on due to unexpected noise, and the circuit to be protected will not be damaged by electrostatic discharge effects or large currents, as shown in icon C'.

In addition to increasing the trigger current, the silicon controlled rectifier circuit of the present invention can also be applied to other related circuits. For example, FIG. 7 is a schematic cross-sectional view of combining the silicon controlled rectifier circuit of the present invention with the Zener diode triggered silicon controlled rectifier. Wherein, the anode A of the silicon controlled rectifier of the present invention is connected in series with a Zener diode composed of an N-doped region 66 and a P-doped region 68 to provide a discharge path for the circuit.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore The scope of protection of the present invention should be defined by the appended claims in combination with the scope of the specification and drawings.

Claims (7)

1. A silicon-controlled rectifier circuit of high trigger current is formed on a semiconductor substrate, and is characterized in that: it comprises: a well region formed in the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate; a first P-doped region and a first N-doped region formed in the well region and connected to each other to form the anode of the silicon controlled rectifier circuit; a second P-doped region and a second N-doped region formed on the semiconductor substrate; and An interface doping region is formed on the interface between the semiconductor substrate and the well region, and connects the second P doping region and the second N doping region to form the cathode of the silicon controlled rectifier circuit. 2. The silicon controlled rectifier circuit with high trigger current as claimed in claim 1, wherein the semiconductor substrate is a P-type silicon substrate, and the well region is an N-type lightly doped region. 3. A silicon-controlled rectifier circuit with high trigger current, formed on a semiconductor substrate, is characterized in that: it comprises: a well region formed in the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate; a first P-doped region and a first N-doped region formed in the well region and connected to each other to form the anode of the silicon controlled rectifier circuit; a second doped region having a conductivity type different from that of the semiconductor substrate and formed in the semiconductor substrate; and a third doped region having the same conductivity type as the semiconductor substrate and formed at the interface between the semiconductor substrate and the well surface, the third doped region is connected to the second doped region to form the silicon controlled rectifier circuit cathode. 4. The silicon controlled rectifier circuit with high trigger current as claimed in claim 3, wherein the semiconductor substrate is a P-type silicon substrate, and the well region is an N-type lightly doped region. 5. A silicon-controlled rectifier circuit with high trigger current, formed on a semiconductor substrate, is characterized in that: it comprises: a well region formed in the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate; a first doped region, formed in the well region and having a conductivity type different from that of the well region, used as an anode of the silicon controlled rectifier; a second doped region having a conductivity type different from that of the semiconductor substrate and formed in the semiconductor substrate; and A third doping region has the same conductivity type as the semiconductor substrate and is formed on the interface between the semiconductor substrate and the well region, and is used to connect with the second doping region as a cathode of the silicon controlled rectifier circuit. 6. The silicon controlled rectifier circuit with high trigger current as claimed in claim 5, wherein the semiconductor substrate is a P-type silicon substrate, and the well region is an N-type lightly doped region. 7. A silicon-controlled rectifier circuit triggered by a zener diode, formed on a semiconductor substrate, is characterized in that: it comprises: a well region formed in the semiconductor substrate and having a conductivity type different from that of the semiconductor substrate; a first P-doped region and a first N-doped region formed in the well region and connected to each other to form the anode of the silicon controlled rectifier circuit; A second P-doped region and a second N-doped region formed on the semiconductor substrate; an interface doping region, formed at the interface between the semiconductor substrate and the well region, and connecting the second P doping region and the second N doping region to form the cathode of the silicon controlled rectifier circuit; and a third N-doped region formed in the semiconductor substrate and the well region; and A third P-doped region is formed on the semiconductor substrate and connected to the third N-doped region to form a Zener diode connected to the anode of the silicon controlled rectifier.

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