CN116885982B

CN116885982B - Brushless direct current motor control device and method without position sensor

Info

Publication number: CN116885982B
Application number: CN202310885529.5A
Authority: CN
Inventors: 刘赏; 李博; 孙妮; 王浩; 王小霞; 王丽芳; 蒋雁飞; 李少辉; 杨倩; 李攀; 刘康
Original assignee: Xi'an Realect Electronic Development Co ltd
Current assignee: Xi'an Realect Electronic Development Co ltd
Priority date: 2023-07-19
Filing date: 2023-07-19
Publication date: 2024-04-19
Anticipated expiration: 2043-07-19
Also published as: CN116885982A

Abstract

The invention belongs to the technical field of motor control, and discloses a brushless direct current motor control device and method without a position sensor; the zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip; the FPGA chip extracts a control conduction square wave in the six-phase square wave control model and converts the control conduction square wave into a control signal; the three-phase inverter receives the control signal to act as a three-phase winding to change phase and supply power; the zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip; and the FPGA chip accumulates the continuous zero crossing times according to the counter electromotive force zero crossing signal, and the brushless direct current motor is switched into a normal running state after the continuous zero crossing times exceed a starting set value. The FPGA chip drives and controls the brushless direct current motor with high commutation frequency at low driving frequency, and ensures the detection of zero crossing points and the normal operation of the brushless direct current motor by means of a self-adaptive control method and a zero crossing detection module.

Description

Brushless direct current motor control device and method without position sensor

Technical Field

The invention belongs to the technical field of motor control, and relates to a brushless direct current motor control device and method without a position sensor.

Background

The brushless direct current motor without the position sensor is characterized in that the motor phase current and voltage information which are sampled through hardware detection is matched with an electric mathematical model of the motor, and the rotor position information of the motor is calculated in real time through a digital algorithm, so that the aim of controlling the motor to normally move is fulfilled. Commutation control of a sensorless brushless dc motor is generally classified into sensorless square wave control and vector control. In the non-inductive square wave control, the motor is operated through six-step phase change, the commonly used rotor detection is a back electromotive force zero crossing point detection method, and the starting, stopping and speed regulation of the motor are controlled through detecting the back electromotive force zero crossing point of the motor rotor.

At present, in a control method of a non-inductive square wave control motor, in order to facilitate detection of a back electromotive force zero crossing point, a driving frequency is higher than a commutation frequency of the non-inductive motor, and detection is carried out at a middle point of driving control when the zero crossing point is detected, so that the resolution of rotor position information is low; and by adopting driving control lower than the commutation frequency, misjudgment is easy to occur when detecting the zero crossing point or the zero crossing point is not detected, so that the commutation is wrong, the motor is wrong in operation, and the like.

Disclosure of Invention

The invention solves the technical problem of providing a brushless direct current motor control device and a method without a position sensor; the FPGA chip drives and controls the brushless direct current motor with high commutation frequency at low driving frequency, and ensures the detection of zero crossing points and the normal operation of the brushless direct current motor by means of a self-adaptive control method and a zero crossing detection module.

The invention is realized by the following technical scheme:

A brushless direct current motor control device without a position sensor comprises an FPGA chip, a three-phase inverter and a zero-crossing detection module, wherein the three-phase inverter and the zero-crossing detection module are connected with a three-phase winding of the brushless direct current motor; the three-phase inverter and the zero-crossing detection module are connected with the FPGA chip;

the motor starting instruction is received by the FPGA chip, and the three-phase inverter is controlled to supply power to any two phases of the three-phase winding so as to start the brushless direct current motor; the zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip; the FPGA chip receives the back electromotive force zero crossing signal and adjusts the six-phase square wave control model according to the back electromotive force zero crossing signal, and the FPGA chip extracts a control conduction square wave in the six-phase square wave control model and converts the control conduction square wave into a control signal; the three-phase inverter receives the control signal to act as a three-phase winding to change phase and supply power;

The zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip; and the FPGA chip accumulates the continuous zero crossing times according to the counter electromotive force zero crossing signal, and the brushless direct current motor is switched into a normal running state after the continuous zero crossing times exceed a starting set value.

Further, the three-phase windings of the brushless direct current motor are respectively recorded as follows: phase a, phase B and phase C;

The phase A, the phase B and the phase C of the three-phase winding are two-phase conduction one-phase suspension when in operation; the two-phase conduction state of the three-phase winding comprises AB phase, AC phase, BA phase, BC phase, CA phase and CB phase conduction; the conduction of the AB phase, the AC phase, the BA phase, the BC phase, the CA phase and the CB phase is controlled by a control conduction square wave generated by a six-phase square wave control model.

The FPGA chip sequentially extracts the control conduction square waves conducted by the AB phase, the AC phase, the BC phase, the BA phase, the CA phase and the CB phase in the six-phase square wave control model and converts the control conduction square waves into control signals.

Further, the six-phase square wave control model is a six-phase square wave control model with a duty ratio, the FPGA chip extracts a control conduction square wave in the six-phase square wave control model and converts the control conduction square wave into a control signal, and the three-phase inverter receives the control signal to act so as to switch the three-phase winding into a two-phase conduction one-phase suspension state.

Further, the three-phase inverter comprises MOS field effect transistors Q1, Q2, Q3, Q4, Q5 and Q6; the third pins of the MOS field effect transistors Q1, Q3 and Q5 are connected with a direct current power supply;

the first pin of the MOS field effect transistor Q1 is connected with the third pin of the MOS field effect transistor Q2 and the A phase of the three-phase winding; the second pin of the MOS field effect transistor Q1 is connected to the FPGA chip; the first pin and the second pin of the MOS field effect transistor Q2 are connected to the FPGA chip;

The first pin of the MOS field effect transistor Q3 is connected with the third pin of the MOS field effect transistor Q4 and the B phase of the three-phase winding; the second pin of the MOS field effect transistor Q3 is connected to the FPGA chip; the first pin and the second pin of the MOS field effect transistor Q4 are connected to the FPGA chip;

the first pin of the MOS field effect transistor Q5 is connected with the third pin of the MOS field effect transistor Q6 and the C phase of the three-phase winding; the second pin of the MOS field effect transistor Q5 is connected to the FPGA chip; the first pin and the second pin of the MOS field effect transistor Q6 are connected to the FPGA chip;

the first pins of the MOS field effect transistors Q2, Q4 and Q6 are also connected with one end of a resistor Rs, and the other end of the resistor Rs is grounded.

Further, the zero crossing detection module comprises operational amplifiers U1, U2 and U3;

the first pins of the operational amplifiers U1, U2 and U3 are connected to the FPGA chip; the third pins of the operational amplifiers U1, U2 and U3 are connected;

The second pin of the operational amplifier U1 is connected with one end of a resistor R3, and the other end of the resistor R3 is connected with the B phase of the three-phase winding; the second pin of the operational amplifier U1 is connected with one end of a capacitor and one ends of resistors R5 and R4, the other end of the capacitor is connected with the other end of the resistor R5 and is grounded, and the other end of the resistor R4 is connected with the third pin of the operational amplifier U1;

the second pin of the operational amplifier U2 is connected with one end of a resistor R2, and the other end of the resistor R2 is connected with the phase A of the three-phase winding;

The second pin of the operational amplifier U2 is connected with one end of a capacitor C2 and one ends of resistors R7 and R6, the other end of the capacitor C2 is connected with the other end of the resistor R7 and is grounded, and the other end of the resistor R6 is connected with the third pin of the operational amplifier U2;

The second pin of the operational amplifier U3 is connected with one end of a resistor R1, and the other end of the resistor R1 is connected with a C phase of the three-phase winding; the second pin of the operational amplifier U3 is connected with one end of a capacitor C3 and one ends of resistors R9 and R8, the other end of the capacitor C3 is connected with the other end of the resistor R9 and grounded, and the other end of the resistor R8 is connected with the third pin of the operational amplifier U3.

A brushless DC motor control method without a position sensor comprises the following steps:

S1, a motor starting instruction received by an FPGA chip and controlling a three-phase inverter to supply power to any two phases of three-phase windings of a brushless direct current motor so as to start the brushless direct current motor;

s2, a zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to an FPGA chip;

s3, the FPGA chip receives the back electromotive force zero crossing signal and adjusts a six-phase square wave control model according to the back electromotive force zero crossing signal;

s4, the FPGA chip extracts a control conduction square wave in the six-phase square wave control model and converts the control conduction square wave into a control signal;

S5, the three-phase inverter receives the control signal to act as a three-phase winding group for phase conversion and power supply;

s6, a zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to an FPGA chip;

S7, the FPGA chip receives a counter electromotive force zero crossing point signal, and the zero crossing point times are accumulated through a zero crossing point counter; if the number of continuous zero crossing points does not exceed the starting set value, returning to S4 to continue execution;

Otherwise, the brushless direct current motor is switched into a normal running state, and the FPGA chip controls the motor to run normally by a self-adaptive control method.

Further, in the step S7, the method for switching the brushless dc motor into the normal running state includes:

S10, an FPGA chip extracts a control conduction square wave of an AB phase in a six-phase square wave control model and converts the control conduction square wave into a control signal, a three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, the AB phase of the three-phase winding is conducted, and the time delay is 20ms;

s20, extracting control conduction square waves of the AC phases in the six-phase square wave control model by the FPGA chip, converting the control conduction square waves into control signals, enabling the three-phase inverter to receive the control signals to act as a three-phase winding to change phases and supply power, and conducting the AC phases of the three-phase windings;

s30, detecting the rising edge of the phase B of the three-phase winding within 20ms by a zero crossing detection module, adding 1 to a zero crossing counter if the rising edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms;

S40, the FPGA chip extracts a control conduction square wave of the BC phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, and the BC phase of the three-phase winding is conducted; recording phase change time T1;

S50, detecting the falling edge of the A phase of the three-phase winding within 8ms by a zero crossing detection module, adding 1 to a zero crossing counter if the falling edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms;

S60, extracting a control conduction square wave of a BA phase in the six-phase square wave control model by the FPGA chip, converting the control conduction square wave into a control signal, and enabling the three-phase inverter to receive the control signal to act as a three-phase winding to exchange phase and supply power to conduct the BA phase of the three-phase winding; recording phase change time T2;

s70, detecting the rising edge of the C phase of the three-phase winding within 20ms by a zero crossing detection module, and adding 1 to a zero crossing counter if the rising edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms;

S80, extracting a control conduction square wave of a CA phase in the six-phase square wave control model by the FPGA chip, converting the control conduction square wave into a control signal, and enabling the three-phase inverter to receive the control signal to act as a three-phase winding to exchange phases and supply power to conduct the CA phase of the three-phase winding; recording phase change time T3;

S90, detecting the falling edge of the phase B of the three-phase winding within 8ms by a zero crossing detection module, and adding 1 to a zero crossing counter if the falling edge is detected, wherein the time delay is 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms;

S100, extracting a control conduction square wave of a CB phase in a six-phase square wave control model by an FPGA chip, converting the control conduction square wave into a control signal, and enabling a three-phase inverter to receive the control signal to act as a three-phase winding to change the phase and supply power to conduct the CB phase of the three-phase winding; recording phase change time T4;

s110, detecting the rising edge of the A phase of the three-phase winding within 20ms by a zero crossing detection module, and adding 1 to a zero crossing counter if the rising edge is detected, wherein the time delay is 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms;

S120, repeating the steps, and if the value of the zero crossing counter exceeds the starting set value, controlling the brushless direct current motor to cut into a normal running state by the FPGA chip; otherwise, returning to S10 to be operated again.

Further, in the step S7, after the brushless dc motor is switched into the normal running state, the method for controlling the normal running of the motor by the FPGA chip through the adaptive control method includes:

S01, extracting a control conduction square wave in a six-phase square wave control model by an FPGA chip, converting the control conduction square wave into a control signal, and enabling a three-phase inverter to receive the control signal to act as a three-phase winding to change phase and supply power; after the commutation is completed, the FPGA chip starts timing;

s02, updating a commutation period T, a delay commutation time D, an effective zero crossing time M and a predicted zero crossing time point L;

S03, detecting a skip edge Al of a suspended phase of the three-phase winding and a counter electromotive force zero crossing point signal in the effective zero crossing time M by a zero crossing detection module;

S04, judging whether the timing time or the updated effective zero crossing time M of the FPGA chip exceeds the effective zero crossing time M; if the effective zero-crossing time M is not exceeded, executing S05; otherwise, executing S08;

s05, judging whether a jump edge A1 is detected or not; if the jump edge A1 is not detected, returning to S04 to continue execution; otherwise, continuing to execute S06;

s06, calculating the time difference between the predicted zero crossing point time point L and the jump edge A1, taking an absolute value, and recording the absolute value of the time difference as Deta;

S07, updating the effective zero crossing time M, and enabling the effective zero crossing time M=the absolute value Deta of the time difference of the predicted zero crossing point time point L+; continuing to execute S04;

s08, judging whether a zero crossing point is detected; if a counter electromotive force zero crossing signal is detected, the zero crossing point closest to the predicted zero crossing time point L is taken as an actual zero crossing point;

Otherwise, taking the predicted zero-crossing time point L as an actual zero-crossing point;

s09, delaying the phase change time D, and returning to S01 to continue execution.

Further, if the brushless dc motor cannot continuously detect the back electromotive force zero crossing signal within the set protection value during the normal operation, the specific processing method is as follows:

S001, the FPGA chip outputs six paths of control signals according to a six-phase square wave control model, and the three-phase inverter switches and supplies power to the three-phase winding according to the control signals so as to realize phase conversion;

S002, updating the commutation period T and the delay commutation time D;

The zero-crossing detection module detects the skip edge Al of the suspended phase of the three-phase winding and the counter electromotive force zero-crossing signal in the effective zero-crossing time M;

S003, judging whether a counter electromotive force zero crossing signal exists in the effective zero crossing time M; if the counter electromotive force zero crossing signal exists, continuing to execute S004; otherwise, executing S006;

S004, enabling a counter CNT in the FPGA to be 0, and enabling a counter CNT1 to be 0; wherein CNT is a count value at which zero crossing is not detected; CNT1 is a count value in which zero crossing points are not detected continuously within a set protection value;

s005, delaying the phase change time D, and returning to S001 to continue execution;

s006, let counter cnt=cnt+1; wherein CNT is a count value at which zero crossing is not detected;

S007, judging whether the count value of the CNT is larger than a set protection value; if the count value of the CNT is not greater than the set protection value, S005 is executed; otherwise, continuing to execute S008;

S008, letting the counter CNT 1=cnt 1+1, stopping using the FPGA chip to output six control signals according to the six-phase square wave control model; CNT1 is a count value in which zero crossing points are not detected continuously within a set protection value;

s009, judging whether the count value of the counter CNT1 is larger than 3; if the count value of the counter CNT1 is greater than 3, S013 is executed; otherwise, continuing to execute S010;

S010, delaying 100us;

s011, detecting the jump edge Al of any phase of the three-phase winding through a zero-crossing detection module;

s012, the FPGA chip is used for outputting six paths of control signals according to a six-phase square wave control model according to the jump edge Al of any phase, and S005 is returned to be executed;

and S013, stopping using the FPGA chip to output six paths of control signals according to the six-phase square wave control model.

Further, the manner of updating the commutation period T is: the FPGA chip carries out sliding window filtering on the phase change times T1, T2, T3 and T4 through a sliding window filter to obtain a phase change period T;

the updated delay phase change time D is (phase change electric period T is in degrees)/60;

The updated predicted zero crossing point L is the commutation period T-delay commutation time D;

The updated effective zero crossing time M is: predicting a time point of zero crossing angle l+15°; wherein, the zero-crossing detection module needs a delay angle d after detecting zero crossing; the predicted zero crossing angle l is the difference between 60 ° and the delay angle d.

Compared with the prior art, the invention has the following beneficial technical effects:

The invention provides a brushless DC motor control device and method, a brushless DC motor with a position sensor, which uses low frequency (drive period is set to be a protection value of 5 us) to drive an electric rotating speed to be a protection value of 0000rpm (commutation period is 83 us); the three-phase inverter is used for being matched with control signals of the FPGA chip to switch three-phase windings of the brushless direct current motor, so that the brushless direct current motor can operate. Meanwhile, the FPGA chip is matched with the six-phase square wave control model and the self-adaptive control method to control the brushless direct current motor to run, and the FPGA chip is matched with the zero-crossing detection module, the self-adaptive control method and the six-phase square wave control model to collect back electromotive force zero-crossing signals of suspended phases of three-phase windings of the brushless direct current motor in the running process of the brushless direct current motor; the FPGA chip receives the back electromotive force zero-crossing signal to judge the zero-crossing point, so that the FPGA chip can control the brushless direct current motor to precisely commutate. Meanwhile, the problems that misjudgment is easy to occur or zero crossing points are not detected when the driving frequency is lower than the commutation frequency of the brushless direct current motor without the position sensor, so that commutation errors, motor operation errors and the like are caused are solved.

Drawings

FIG. 1 is a schematic diagram of a drive control circuit of a sensorless brushless DC motor;

FIG. 2 is a schematic diagram of a six-phase control square wave model according to the present invention;

FIG. 3 is a flow chart of a method of sensorless brushless DC motor control;

FIG. 4 is a flow chart of a specific control method for a sensorless brushless DC motor cut-in running state;

FIG. 5 is a flow chart of a specific control method of the brushless DC motor without the position sensor in a normal operation state;

Fig. 6 is a control flow chart after the counter electromotive force zero-crossing signal cannot be continuously detected within the set protection value.

Detailed Description

The invention will now be described in further detail with reference to the accompanying drawings, which illustrate but do not limit the invention.

See fig. 1-2; the invention discloses a brushless direct current motor control device without a position sensor, which comprises an FPGA chip, a three-phase inverter and a zero crossing detection module, wherein the three-phase inverter and the zero crossing detection module are connected with a three-phase winding of the brushless direct current motor; the three-phase inverter and the zero-crossing detection module are connected with the FPGA chip.

The motor starting instruction is received by the FPGA chip, and the three-phase inverter is controlled to supply power to any two phases of the three-phase winding so as to start the brushless direct current motor; the zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip; the FPGA chip receives the back electromotive force zero crossing signal and adjusts the six-phase square wave control model according to the back electromotive force zero crossing signal, and the FPGA chip extracts a control conduction square wave in the six-phase square wave control model and converts the control conduction square wave into a control signal; the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power.

Specifically, the FPGA chip is a GW1NSR series chip; the six-phase square wave control model is loaded in the FPGA chip.

The three-phase windings of the brushless direct current motor are respectively recorded as follows: phase a, phase B and phase C.

The FPGA chip receives the back electromotive force zero crossing signal and adjusts the six-phase square wave control model according to the back electromotive force zero crossing signal, and the specific adjustment mode is as follows: the FPGA chip judges the conduction of the AB phase, the AC phase, the BA phase, the BC phase, the CA phase or the CB phase of the current three-phase winding according to the counter electromotive force zero crossing signals of the three-phase winding, collected by the zero crossing point detection module, and then sequentially extracts the rule of controlling the conduction square waves of the AB phase, the AC phase, the BC phase, the BA phase, the CA phase and the CB phase in the six-phase square wave control model to judge the next group of conduction phases, and the FPGA chip extracts the controlling conduction square waves in the six-phase square wave control model according to the conduction phases.

The six-phase square wave control model is a six-phase square wave control model with a duty ratio, the FPGA chip extracts a control conduction square wave in the six-phase square wave control model and converts the control conduction square wave into a control signal, and the three-phase inverter receives the control signal to act so as to switch the three-phase winding into a two-phase conduction one-phase suspension state.

Specifically, the six-phase square wave control model with the duty ratio is shown in the sections 207-212 in fig. 2, and is used for regulating the speed of the brushless direct current motor.

The three-phase inverter comprises MOS field effect transistors Q1, Q2, Q3, Q4, Q5 and Q6; and the third pins of the MOS field effect transistors Q1, Q3 and Q5 are connected with a direct current power supply.

The first pin of the MOS field effect transistor Q1 is connected with the third pin of the MOS field effect transistor Q2 and the A phase of the three-phase winding; the second pin of the MOS field effect transistor Q1 is connected to the FPGA chip; the first pin and the second pin of the MOS field effect transistor Q2 are both connected to the FPGA chip.

The first pin of the MOS field effect transistor Q3 is connected with the third pin of the MOS field effect transistor Q4 and the B phase of the three-phase winding; the second pin of the MOS field effect transistor Q3 is connected to the FPGA chip; the first pin and the second pin of the MOS field effect transistor Q4 are both connected to the FPGA chip.

The first pin of the MOS field effect transistor Q5 is connected with the third pin of the MOS field effect transistor Q6 and the C phase of the three-phase winding; the second pin of the MOS field effect transistor Q5 is connected to the FPGA chip; the first pin and the second pin of the MOS field effect transistor Q6 are both connected to the FPGA chip.

The zero crossing detection module comprises operational amplifiers U1, U2 and U3.

The first pins of the operational amplifiers U1, U2 and U3 are connected to the FPGA chip; the third pins of the operational amplifiers U1, U2 and U3 are connected.

The second pin of the operational amplifier U1 is connected with one end of a resistor R3, and the other end of the resistor R3 is connected with the B phase of the three-phase winding; the second pin of the operational amplifier U1 is connected with one end of a capacitor and one ends of resistors R5 and R4, the other end of the capacitor is connected with the other end of the resistor R5 and grounded, and the other end of the resistor R4 is connected with the third pin of the operational amplifier U1.

The second pin of the operational amplifier U2 is connected with one end of a resistor R2, and the other end of the resistor R2 is connected with the A phase of the three-phase winding.

The second pin of the operational amplifier U2 is connected with one end of a capacitor C2 and one ends of resistors R7 and R6, the other end of the capacitor C2 is connected with the other end of the resistor R7 and grounded, and the other end of the resistor R6 is connected with the third pin of the operational amplifier U2.

S1, a motor starting instruction received by an FPGA chip and controlling a three-phase inverter to supply power to any two phases of three-phase windings of the brushless direct current motor so as to start the brushless direct current motor.

S2, the zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip.

S3, the FPGA chip receives the back electromotive force zero crossing signal and adjusts the six-phase square wave control model according to the back electromotive force zero crossing signal.

S4, the FPGA chip extracts a control conduction square wave in the six-phase square wave control model and converts the control conduction square wave into a control signal.

S5, the three-phase inverter receives the control signal to act as a three-phase winding group to change phase and supply power.

S6, the zero-crossing detection module collects counter electromotive force zero-crossing point signals of the suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip.

S7, the FPGA chip receives a counter electromotive force zero crossing point signal, and the zero crossing point times are accumulated through a zero crossing point counter; if the number of continuous zero crossing points does not exceed the starting set value, returning to S4 to continue execution.

In the step S7, the method for switching the brushless direct current motor into the normal running state comprises the following steps:

S10, the FPGA chip extracts a control conduction square wave of an AB phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, the AB phase of the three-phase winding is conducted, and the time delay is 20ms.

S20, the FPGA chip extracts a control conduction square wave of an AC phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, and the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, so that the AC phase of the three-phase winding is conducted.

S30, detecting the rising edge of the phase B of the three-phase winding within 20ms by a zero crossing detection module, adding 1 to a zero crossing counter if the rising edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

S40, the FPGA chip extracts a control conduction square wave of the BC phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, and the BC phase of the three-phase winding is conducted; the commutation time T1 is recorded.

S50, detecting the falling edge of the A phase of the three-phase winding within 8ms by a zero crossing detection module, adding 1 to a zero crossing counter if the falling edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

S60, extracting a control conduction square wave of a BA phase in the six-phase square wave control model by the FPGA chip, converting the control conduction square wave into a control signal, and enabling the three-phase inverter to receive the control signal to act as a three-phase winding to exchange phase and supply power to conduct the BA phase of the three-phase winding; the commutation time T2 is recorded.

S70, detecting the rising edge of the C phase of the three-phase winding within 20ms by a zero crossing detection module, and adding 1 to a zero crossing counter if the rising edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

S80, extracting a control conduction square wave of a CA phase in the six-phase square wave control model by the FPGA chip, converting the control conduction square wave into a control signal, and enabling the three-phase inverter to receive the control signal to act as a three-phase winding to exchange phases and supply power to conduct the CA phase of the three-phase winding; the commutation time T3 is recorded.

S90, detecting the falling edge of the phase B of the three-phase winding within 8ms by a zero crossing detection module, and adding 1 to a zero crossing counter if the falling edge is detected, wherein the time delay is 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

S100, extracting a control conduction square wave of a CB phase in a six-phase square wave control model by an FPGA chip, converting the control conduction square wave into a control signal, and enabling a three-phase inverter to receive the control signal to act as a three-phase winding to change the phase and supply power to conduct the CB phase of the three-phase winding; the commutation time T4 is recorded.

S110, detecting the rising edge of the A phase of the three-phase winding within 20ms by a zero crossing detection module, and adding 1 to a zero crossing counter if the rising edge is detected, wherein the time delay is 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

In the step S7, after the brushless direct current motor is switched into a normal running state, the method for controlling the normal running of the motor by the FPGA chip through the self-adaptive control method comprises the following steps:

s01, extracting a control conduction square wave in a six-phase square wave control model by an FPGA chip, converting the control conduction square wave into a control signal, and enabling a three-phase inverter to receive the control signal to act as a three-phase winding to change phase and supply power; after the commutation is completed, the FPGA chip starts timing.

S02, updating a commutation period T, a delayed commutation time D, an effective zero crossing time M and a predicted zero crossing time point L.

S03, detecting a skip edge Al of a suspended phase of the three-phase winding and a counter electromotive force zero crossing point signal in the effective zero crossing time M by the zero crossing detection module.

S04, judging whether the timing time or the updated effective zero crossing time M of the FPGA chip exceeds the effective zero crossing time M; if the effective zero-crossing time M is not exceeded, executing S05; otherwise, S08 is performed.

S05, judging whether a jump edge A1 is detected or not; if the jump edge A1 is not detected, returning to S04 to continue execution; otherwise, S06 is continued.

S06, calculating the time difference between the predicted zero crossing point time point L and the jump edge A1, taking an absolute value, and recording the absolute value of the time difference as Deta.

S07, updating the effective zero crossing time M, and enabling the effective zero crossing time M=the absolute value Deta of the time difference of the predicted zero crossing point time point L+; s04 is continued.

S08, judging whether a zero crossing point is detected; if the counter electromotive force zero crossing signal is detected, the zero crossing point closest to the predicted zero crossing time point L is taken as the actual zero crossing point.

Otherwise, the predicted zero-crossing time point L is taken as the actual zero-crossing point.

If the brushless direct current motor cannot continuously detect the back electromotive force zero crossing point signal in the set protection value in the normal operation process, the specific processing method comprises the following steps:

s001, the FPGA chip outputs six paths of control signals according to the six-phase square wave control model, and the three-phase inverter switches and supplies power to the three-phase winding according to the control signals so as to realize phase conversion.

S002, updating the commutation period T and the delay commutation time D.

The zero-crossing detection module detects the skip edge Al of the suspended phase of the three-phase winding and the counter electromotive force zero-crossing signal in the effective zero-crossing time M.

S003, judging whether a counter electromotive force zero crossing signal exists in the effective zero crossing time M; if the counter electromotive force zero crossing signal exists, continuing to execute S004; otherwise, S006 is performed.

S004, enabling a counter CNT in the FPGA to be 0, and enabling a counter CNT1 to be 0; wherein CNT is a count value at which zero crossing is not detected; CNT1 is a count value in which zero crossing points are not detected continuously within the set protection value.

S005, delaying the phase change time D, and returning to S001 to continue execution.

S006, let counter cnt=cnt+1; wherein CNT is a count value at which zero crossing is not detected.

S007, judging whether the count value of the CNT is larger than a set protection value; if the count value of the CNT is not greater than the set protection value, S005 is executed; otherwise, S008 is continued.

S008, letting the counter CNT 1=cnt 1+1, stopping using the FPGA chip to output six control signals according to the six-phase square wave control model; CNT1 is a count value in which zero crossing points are not detected continuously within the set protection value.

S009, judging whether the count value of the counter CNT1 is larger than 3; if the count value of the counter CNT1 is greater than 3, S013 is executed; otherwise, S010 is continued.

S010, delay 100us.

And S011, detecting the jump edge Al of any phase of the three-phase winding through a zero-crossing detection module.

S012, the FPGA chip is used for outputting six paths of control signals according to a six-phase square wave control model according to the jump edge Al of any phase, and S005 is returned to be executed.

The way to update the commutation period T is: the FPGA chip carries out sliding window filtering on the phase change times T1, T2, T3 and T4 through a sliding window filter to obtain a phase change period T.

The updated delay commutation time D is (commutation period T x degrees)/60.

The updated predicted zero crossing point L is the commutation period T-delay commutation time D.

A circuit diagram of a brushless dc motor control device with no position sensor is built according to fig. 1; the start-up setting value was set to 256 times and the set protection value was set to 12 times.

The six-phase square wave control model with the duty ratio according to fig. 2 controls the motor to start, specifically, the method comprises the following steps:

a1, a motor starting instruction received by the FPGA chip and controlling the three-phase inverter to supply power to any two phases of three-phase windings of the brushless direct current motor so as to start the brushless direct current motor.

A2, the zero-crossing detection module collects counter electromotive force zero-crossing point signals of suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip.

A3, the FPGA chip receives the back electromotive force zero crossing signal and adjusts the six-phase square wave control model according to the back electromotive force zero crossing signal.

And A4, extracting a control conduction square wave in the six-phase square wave control model by the FPGA chip and converting the control conduction square wave into a control signal.

A5, the three-phase inverter receives the control signal to act as a three-phase winding group to change phase and supply power.

And A6, the zero-crossing detection module collects counter electromotive force zero-crossing point signals of the suspended phases of the three-phase winding and sends the counter electromotive force zero-crossing point signals to the FPGA chip.

A7, the FPGA chip receives a counter electromotive force zero crossing point signal, and the zero crossing point times are accumulated through a zero crossing point counter; if the number of continuous zero crossing points does not exceed 256 times, returning to the step A4 to continue execution.

The method for switching the brushless direct current motor into the normal running state comprises the following steps:

A01, the FPGA chip extracts the control conduction square wave of the AB phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, the AB phase of the three-phase winding is conducted, and the time delay is 20ms.

A02, the FPGA chip extracts a control conduction square wave of an AC phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, and the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, so that the AC phase of the three-phase winding is conducted.

A03, detecting the rising edge of the phase B of the three-phase winding within 20ms by a zero crossing detection module, adding 1 to a zero crossing counter if the rising edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

A04, the FPGA chip extracts a control conduction square wave of the BC phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, and the BC phase of the three-phase winding is conducted; the commutation time T1 is recorded.

A05, detecting the falling edge of the A phase of the three-phase winding within 8ms by a zero crossing detection module, adding 1 to a zero crossing counter if the falling edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

A06, the FPGA chip extracts a control conduction square wave of the BA phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power, and the BA phase of the three-phase winding is conducted; the commutation time T2 is recorded.

A07, detecting the rising edge of the C phase of the three-phase winding within 20ms by a zero crossing detection module, adding 1 to a zero crossing counter if the rising edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

A08, extracting a control conduction square wave of a CA phase in the six-phase square wave control model by the FPGA chip, converting the control conduction square wave into a control signal, and enabling the three-phase inverter to receive the control signal to act as a three-phase winding to exchange phase and supply power to conduct the CA phase of the three-phase winding; the commutation time T3 is recorded.

A09, the zero crossing detection module detects the falling edge of the phase B of the three-phase winding within 8ms, and if the falling edge is detected, the zero crossing counter is added with 1, and the time delay is 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

A010, the FPGA chip extracts a control conduction square wave of a CB phase in the six-phase square wave control model and converts the control conduction square wave into a control signal, and the three-phase inverter receives the control signal to act as a three-phase winding to change the phase and supply power to conduct the CB phase of the three-phase winding; the commutation time T4 is recorded.

A011, detecting the rising edge of the A phase of the three-phase winding within 20ms by a zero crossing detection module, adding 1 to a zero crossing counter if the rising edge is detected, and delaying 300us; otherwise, zero crossing counter is cleared, and the time delay is 20ms.

A012, repeating the steps, and if the value of the zero crossing counter exceeds 256 times, controlling the brushless direct current motor to cut into a normal running state by the FPGA chip; otherwise, returning to A010 to rerun.

After the brushless direct current motor is switched into a normal running state, the FPGA chip controls the normal running of the motor by a self-adaptive control method, and the method comprises the following steps:

A001, the FPGA chip extracts a control conduction square wave in the six-phase square wave control model and converts the control conduction square wave into a control signal, and the three-phase inverter receives the control signal to act as a three-phase winding to change phase and supply power; after the commutation is completed, the FPGA chip starts timing.

A002, updating the commutation period T, delaying the commutation time D, effectively crossing time M and predicting the zero crossing time point L.

And A003, the zero-crossing detection module detects the skip edge Al of the suspended phase of the three-phase winding and the counter electromotive force zero-crossing signal in the effective zero-crossing time M.

A004, judging whether the timing time or the updated effective zero crossing time M of the FPGA chip exceeds the effective zero crossing time M; if the effective zero crossing time M is not exceeded, executing A005; otherwise, a008 is performed.

A005, judging whether a jump edge A1 is detected or not; if the jump edge A1 is not detected, returning to A004 for continuous execution; otherwise, execution continues at A006.

And A006, calculating the time difference between the predicted zero crossing point time point L and the jump edge A1, taking an absolute value, and recording the absolute value of the time difference as Deta.

A007, updating the effective zero crossing time M, and enabling the effective zero crossing time m=the absolute value Deta of the time difference of the predicted zero crossing point time point L+; execution continues with a004.

A008, judging whether a zero crossing point is detected; if the counter electromotive force zero crossing signal is detected, the zero crossing point closest to the predicted zero crossing time point L is taken as the actual zero crossing point.

A009, delay commutation time D, and return to A001 for continued execution.

If the brushless direct current motor cannot continuously detect the back electromotive force zero crossing point signal in 12 times in the normal operation process, the specific processing method is as follows:

a10, the FPGA chip outputs six paths of control signals according to the six-phase square wave control model, and the three-phase inverter switches and supplies power to the three-phase winding according to the control signals so as to realize phase conversion.

A20, updating the commutation period T and the delay commutation time D.

A30, judging whether a counter electromotive force zero crossing signal exists in the effective zero crossing time M; if the counter electromotive force zero crossing point signal exists, continuing to execute A40; otherwise, a60 is performed.

A40, making a counter CNT in the FPGA be 0, and making a counter CNT1 be 0; wherein CNT is a count value at which zero crossing is not detected; CNT1 is a count value in which zero-crossing points are not detected continuously for 12 times.

A50, delaying the phase change time D, and returning to the step A10 to continue execution.

A60, let counter cnt=cnt+1; wherein CNT is a count value at which zero crossing is not detected.

A70, judging whether the count value of the CNT is larger than 12 times; if the count value of the CNT is not greater than 12 times, executing A50; otherwise, execution of A80 continues.

A80, enabling a counter CNT1 to be equal to CNT1+1, and stopping using the FPGA chip to output six paths of control signals according to a six-phase square wave control model; CNT1 is a count value in which zero-crossing points are not detected continuously for 12 times.

A90, judging whether the count value of the counter CNT1 is larger than 3; if the count value of the counter CNT1 is greater than 3, executing a130; otherwise, execution of A100 continues.

A100, delaying 100us.

A110, detecting the jump edge Al of any phase of the three-phase winding through a zero-crossing detection module.

And A120, the FPGA chip is used for outputting six paths of control signals according to a six-phase square wave control model by using the FPGA chip according to the jump edge Al of any phase, and the A50 is returned to execute.

And A130, stopping using the FPGA chip to output six paths of control signals according to the six-phase square wave control model.

A brushless DC motor having a position sensor with an electric rotation speed of 120000rpm (phase change time of 83 us) is driven by an FPGA chip (GW 1NSR series chip) with a drive frequency of 8KHz (drive period of 125 us); the three-phase inverter is used for being matched with control signals of the FPGA chip to switch three-phase windings of the brushless direct current motor, so that the brushless direct current motor can operate. Meanwhile, the FPGA chip is matched with the six-phase square wave control model and the self-adaptive control method to control the brushless direct current motor to run, and the FPGA chip is matched with the zero-crossing detection module, the self-adaptive control method and the six-phase square wave control model to collect back electromotive force zero-crossing signals of suspended phases of three-phase windings of the brushless direct current motor in the running process of the brushless direct current motor; the FPGA chip receives the back electromotive force zero-crossing signal to judge the zero-crossing point, so that the FPGA chip can control the brushless direct current motor to precisely commutate. Meanwhile, the problems that misjudgment is easy to occur or zero crossing points are not detected when the driving frequency is lower than the commutation frequency of the brushless direct current motor without the position sensor, so that commutation errors, motor operation errors and the like are caused are solved.

The embodiments given above are preferred examples for realizing the present invention, and the present invention is not limited to the above-described embodiments. Any immaterial additions and substitutions made by those skilled in the art according to the technical features of the technical scheme of the invention are all within the protection scope of the invention.

Claims

1. The control method of the brushless direct current motor control device based on the position sensor is characterized in that the brushless direct current motor control device comprises an FPGA chip, a three-phase inverter and a zero crossing detection module, wherein the three-phase inverter and the zero crossing detection module are connected with three-phase windings of the brushless direct current motor, and the three-phase inverter is connected with a direct current power supply; the three-phase inverter and the zero-crossing detection module are connected with the FPGA chip; the control method comprises the following steps:

Otherwise, the brushless direct current motor is switched into a normal running state, and the FPGA chip controls the motor to run normally by a self-adaptive control method:

2. The method for controlling a brushless dc motor control device based on a position sensor according to claim 1, wherein in S7, the method for switching the brushless dc motor into the normal operation state is as follows:

3. The control method of a brushless dc motor control device based on a position sensor according to claim 2, wherein if the brushless dc motor cannot continuously detect the back electromotive force zero crossing signal within the set protection value during the normal operation, the specific processing method is as follows:

S002, updating the commutation period T and the delay commutation time D;

S010, delaying 100us;

4. A control method of a brushless dc motor control apparatus based on a position sensor as claimed in claim 3, wherein the commutation period T is updated by: the FPGA chip carries out sliding window filtering on the phase change times T1, T2, T3 and T4 through a sliding window filter to obtain a phase change period T;