CN116837463A - Preparation method of modulation device based on silicon carbide and modulation device - Google Patents
Preparation method of modulation device based on silicon carbide and modulation device Download PDFInfo
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Abstract
Description
技术领域Technical field
本申请涉及信息功能材料技术领域,尤其涉及一种基于碳化硅的调制器件制备方法及调制器件。The present application relates to the technical field of information functional materials, and in particular to a silicon carbide-based modulation device preparation method and modulation device.
背景技术Background technique
作为第三代半导体中的代表性材料,碳化硅(SiC)结合了高物理强度(莫氏硬度9.5,努氏硬度2480kg/mm2),高热导率(480W/mK),高抗腐蚀性,高熔点,高光学二阶三阶非线性系数,宽透光窗口(0.37μm-5.6μm),广域缺陷发光窗口(可见光至中红外),宽带隙(2.4eV-3.2eV)等多方面的优异特性于一身。其中,高折射率能够实现光学模式的高限制,在色散领域将带来更大的灵活性。宽带隙使得在大功率下的光吸收损失最小化,高二阶和三阶使得碳化硅在非线性光学应用中具有出色的性能,而广域缺陷发光窗口又使其是用作光源的理想材料。因此,碳化硅是集成光学、非线性光学以及光机械器件的理想材料。As a representative material in the third generation of semiconductors, silicon carbide (SiC) combines high physical strength (Mohs hardness 9.5, Knoop hardness 2480kg/mm 2 ), high thermal conductivity (480W/mK), high corrosion resistance, High melting point, high optical second-order and third-order nonlinear coefficients, wide light transmission window (0.37μm-5.6μm), wide-area defect luminescence window (visible light to mid-infrared), wide bandgap (2.4eV-3.2eV) and many other aspects Excellent features in one. Among them, high refractive index can achieve high restriction of optical modes and will bring greater flexibility in the field of dispersion. The wide bandgap minimizes light absorption losses at high powers, the high second and third orders make silicon carbide excellent in nonlinear optical applications, and the wide defect emission window makes it an ideal material for use as a light source. Therefore, silicon carbide is an ideal material for integrated optical, nonlinear optics, and optomechanical devices.
然而,碳化硅在集成光学中应用却存在较多的限制。一方面,碳化硅在集成光学中需要以单晶薄膜的形式加以应用。但由于高质量的碳化硅单晶薄膜制备难度大,这造成了碳化硅在集成光学应用中薄膜制备上的困难。另一方面,碳化硅具有较弱的电光效应,这导致了碳化硅在集成光系统中难以实现高效、高速的光调制。However, there are many limitations in the application of silicon carbide in integrated optics. On the one hand, silicon carbide needs to be used in the form of single-crystal thin films in integrated optics. However, due to the difficulty in preparing high-quality silicon carbide single crystal thin films, this has caused difficulties in the preparation of silicon carbide thin films for integrated optical applications. On the other hand, silicon carbide has a weak electro-optical effect, which makes it difficult to achieve efficient and high-speed light modulation in integrated optical systems.
发明内容Contents of the invention
为了解决上述技术问题,本申请提供了一种基于碳化硅的调制器件制备方法及调制器件,通过在碳化硅外延基底上制备外延碳化硅薄膜层,实现了碳化硅在集成光学应用中薄膜制备;通过对外延碳化硅薄膜层中的预设区域进行重掺杂,并在重掺杂区域进行调制器件结构制备,从而可以基于载流子色散的机制,实现碳化硅在集成光系统中的高效、高速光调制。In order to solve the above technical problems, this application provides a silicon carbide-based modulation device preparation method and modulation device. By preparing an epitaxial silicon carbide film layer on a silicon carbide epitaxial substrate, silicon carbide thin film preparation in integrated optical applications is realized; By heavily doping the preset area in the epitaxial silicon carbide film layer and preparing the modulation device structure in the heavily doped area, it is possible to achieve high efficiency and high efficiency of silicon carbide in integrated optical systems based on the mechanism of carrier dispersion. High-speed light modulation.
第一方面,本申请实施例公开了一种基于碳化硅的调制器件制备方法,方法包括:In a first aspect, embodiments of the present application disclose a method for preparing a silicon carbide-based modulation device. The method includes:
获取碳化硅外延基底;Obtain silicon carbide epitaxial substrate;
在碳化硅外延基底上制备外延碳化硅薄膜层;Preparing an epitaxial silicon carbide thin film layer on a silicon carbide epitaxial substrate;
对外延碳化硅薄膜层中的预设区域进行重掺杂,得到重掺杂区域;The preset area in the epitaxial silicon carbide film layer is heavily doped to obtain a heavily doped area;
在重掺杂区域中制备调制器件结构;调制器件结构包括相对的第一表面和第二表面,第一表面靠近碳化硅外延基底,第二表面远离碳化硅外延基底;Preparing a modulation device structure in a heavily doped region; the modulation device structure includes opposite first surfaces and second surfaces, the first surface is close to the silicon carbide epitaxial substrate, and the second surface is away from the silicon carbide epitaxial substrate;
在第二表面上制备第一器件保护层;preparing a first device protective layer on the second surface;
获取第一支撑衬底,并将第一支撑衬底与第一器件保护层进行键合,得到第一键合结构;Obtain a first support substrate, and bond the first support substrate to the first device protective layer to obtain a first bonding structure;
将第一键合结构中的碳化硅外延基底去除,并裸露出第一表面;removing the silicon carbide epitaxial substrate in the first bonding structure and exposing the first surface;
获取第二支撑衬底,并将第二支撑衬底与第一表面进行键合,得到第二键合结构;Obtain a second support substrate, and bond the second support substrate to the first surface to obtain a second bonding structure;
将第二键合结构中的第一支撑衬底和第二键合结构中的第一器件保护层去除,以裸露出第二表面,得到基于碳化硅的调制器件。The first supporting substrate in the second bonding structure and the first device protective layer in the second bonding structure are removed to expose the second surface to obtain a modulation device based on silicon carbide.
在一些可选的实施例中,获取碳化硅外延基底,包括:In some optional embodiments, obtaining a silicon carbide epitaxial substrate includes:
获取碳化硅衬底;Obtain silicon carbide substrate;
对碳化硅衬底进行离子注入,以在碳化硅衬底中形成缺陷层;Perform ion implantation into the silicon carbide substrate to form a defect layer in the silicon carbide substrate;
获取第三支撑衬底,并将碳化硅衬底与第三支撑衬底进行键合,得到第三键合结构;Obtain a third support substrate, and bond the silicon carbide substrate to the third support substrate to obtain a third bonding structure;
对第三键合结构进行热处理,以使第三键合结构中的碳化硅衬底沿缺陷层剥离,得到键合在第三支撑衬底上的碳化硅外延基底。The third bonding structure is heat treated to peel off the silicon carbide substrate in the third bonding structure along the defect layer to obtain a silicon carbide epitaxial substrate bonded to the third support substrate.
在一些可选的实施例中,第三支撑衬底的材质为碳化硅或蓝宝石。In some optional embodiments, the third support substrate is made of silicon carbide or sapphire.
在一些可选的实施例中,外延碳化硅薄膜层为轻掺杂外延碳化硅薄膜层,外延碳化硅薄膜层的掺杂浓度为1E13/cm3-1E15/cm3,外延碳化硅薄膜层(204)的厚度为400nm-1500nm。In some optional embodiments, the epitaxial silicon carbide film layer is a lightly doped epitaxial silicon carbide film layer, and the doping concentration of the epitaxial silicon carbide film layer is 1E 13 /cm 3 -1E 15 /cm 3 . The epitaxial silicon carbide film layer The thickness of layer (204) ranges from 400nm to 1500nm.
在一些可选的实施例中,重掺杂区域的尺寸为2.2μm-101μm,重掺杂区域的厚度小于等于外延碳化硅薄膜层的厚度。In some optional embodiments, the size of the heavily doped region is 2.2 μm-101 μm, and the thickness of the heavily doped region is less than or equal to the thickness of the epitaxial silicon carbide film layer.
在一些可选的实施例中,在重掺杂区域中制备调制器件结构,包括:In some optional embodiments, the modulation device structure is prepared in a heavily doped region, including:
采用光刻在重掺杂区域中刻蚀出调制器件结构;刻蚀深度为200nm-1300nm,且小于等于重掺杂区域的厚度。Use photolithography to etch the modulation device structure in the heavily doped region; the etching depth is 200nm-1300nm, and is less than or equal to the thickness of the heavily doped region.
在一些可选的实施例中,调制器件结构包括第一预设区域、第二预设区域和间隔区域,间隔区域设置在第一预设区域与第二预设区域之间;在在第二表面上制备第一器件保护层;In some optional embodiments, the modulation device structure includes a first preset area, a second preset area and a spacing area, and the spacing area is provided between the first preset area and the second preset area; in the second preset area Preparing a first device protective layer on the surface;
之前,方法还包括:Previously, methods also included:
对第一预设区域按照第一掺杂类型进行区域掺杂,得到第一电极区;Perform regional doping on the first preset region according to the first doping type to obtain the first electrode region;
对第二预设区域按照第二掺杂类型进行区域掺杂,得到第二电极区;其中,第一掺杂类型与第二掺杂类型相反;Perform regional doping on the second preset region according to the second doping type to obtain a second electrode region; wherein the first doping type is opposite to the second doping type;
对第一电极区、第二电极区和间隔区域进行激活处理,得到激活后的调制器件。The first electrode area, the second electrode area and the spacer area are activated to obtain an activated modulation device.
在一些可选的实施例中,第一预设区域的尺寸为1μm-50μm,第二预设区域的尺寸为1μm-50μm,间隔区域的尺寸为200nm-1000nm。In some optional embodiments, the size of the first preset area is 1 μm-50 μm, the size of the second preset area is 1 μm-50 μm, and the size of the spacing area is 200 nm-1000 nm.
在一些可选的实施例中,将第二键合结构中的第一支撑衬底和第二键合结构中的第一器件保护层去除,以裸露出第二表面,得到基于碳化硅的调制器件,包括:In some optional embodiments, the first support substrate in the second bonding structure and the first device protective layer in the second bonding structure are removed to expose the second surface to obtain silicon carbide-based modulation. Devices, including:
将第二键合结构中的第一支撑衬底和第二键合结构中的第一器件保护层去除,以裸露出第二表面,得到第一器件结构;removing the first supporting substrate in the second bonding structure and the first device protective layer in the second bonding structure to expose the second surface to obtain the first device structure;
在第一器件结构中的第一电极区制备第一金属电极,以及在第一器件结构中的第二电极区制备第二金属电极,得到第二器件结构;Prepare a first metal electrode in the first electrode region in the first device structure, and prepare a second metal electrode in the second electrode region in the first device structure, to obtain a second device structure;
在第二器件结构中的第二表面制备第二器件保护层,得到基于碳化硅的调制器件。A second device protective layer is prepared on the second surface in the second device structure to obtain a modulation device based on silicon carbide.
第二方面,本申请实施例公开了一种基于碳化硅的调制器件,该调制器件为通过如上所述的基于碳化硅的调制器件制备方法制备得到;该调制器件包括:第二支撑衬底和外延碳化硅薄膜层;In a second aspect, embodiments of the present application disclose a silicon carbide-based modulation device, which is prepared by the silicon carbide-based modulation device preparation method as described above; the modulation device includes: a second support substrate and Epitaxial silicon carbide thin film layer;
外延碳化硅薄膜层设置在第二支撑衬底上;The epitaxial silicon carbide film layer is disposed on the second support substrate;
外延碳化硅薄膜层中设置有重掺杂区域;A heavily doped region is provided in the epitaxial silicon carbide film layer;
重掺杂区域内设置有调制器件结构。A modulation device structure is provided in the heavily doped region.
本申请实施例提供的技术方案具有如下技术效果:The technical solutions provided by the embodiments of this application have the following technical effects:
本申请实施例所述的基于碳化硅的调制器件制备方法及调制器件,通过在碳化硅外延基底上制备外延碳化硅薄膜层,实现了碳化硅在集成光学应用中薄膜制备;通过对外延碳化硅薄膜层中的预设区域进行重掺杂,得到重掺杂区域,然后在重掺杂区域中进行调制器件结构制备,从而可以基于载流子色散的机制,实现碳化硅在集成光系统中的高效、高速光调制。此外,通过获取第一支撑衬底,并将第一支撑衬底和第二支撑衬底,实现将调制器件结构转移至第二支撑衬底上,以降低碳化硅单片成本,有利于基于碳化硅的调制器件的大规模推广应用。The silicon carbide-based modulation device preparation method and modulation device described in the embodiments of the present application realize the preparation of silicon carbide thin films in integrated optical applications by preparing an epitaxial silicon carbide film layer on a silicon carbide epitaxial substrate; through the epitaxial silicon carbide The preset area in the thin film layer is heavily doped to obtain a heavily doped area, and then the modulation device structure is prepared in the heavily doped area, so that the silicon carbide can be used in the integrated optical system based on the mechanism of carrier dispersion. Efficient, high-speed light modulation. In addition, by obtaining the first support substrate and combining the first support substrate and the second support substrate, the modulation device structure is transferred to the second support substrate to reduce the cost of the silicon carbide single piece and facilitate the carbonization-based Large-scale promotion and application of silicon modulation devices.
附图说明Description of the drawings
为了更清楚地说明本申请实施例或现有技术中的技术方案和优点,下面将对实施例或现有技术描述中所需要使用的附图作简单的介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其它附图。In order to more clearly explain the technical solutions and advantages in the embodiments of the present application or the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description The drawings are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without exerting creative efforts.
图1是本申请实施例提供的一种基于碳化硅的调制器件制备方法的流程示意图;Figure 1 is a schematic flow chart of a silicon carbide-based modulation device preparation method provided by an embodiment of the present application;
图2a是本申请实施例提供的一种高质量碳化硅衬底的结构示意图;Figure 2a is a schematic structural diagram of a high-quality silicon carbide substrate provided by an embodiment of the present application;
图2b是本申请实施例提供的一种对高质量碳化硅衬底进行离子注入后的结构示意图;Figure 2b is a schematic structural diagram of a high-quality silicon carbide substrate after ion implantation according to an embodiment of the present application;
图2c是本申请实施例提供的一种对低成本碳化硅衬底进行表面处理的结构变化示意图;Figure 2c is a schematic diagram of structural changes for surface treatment of a low-cost silicon carbide substrate according to an embodiment of the present application;
图2d是本申请实施例提供的一种第三键合结构的结构示意图;Figure 2d is a schematic structural diagram of a third bonding structure provided by an embodiment of the present application;
图2e是本申请实施例提供的一种碳化硅外延基底的结构示意图;Figure 2e is a schematic structural diagram of a silicon carbide epitaxial substrate provided by an embodiment of the present application;
图2f是本申请实施例提供的一种对外延碳化硅薄膜层进行重掺杂后的结构示意图;Figure 2f is a schematic structural diagram of a heavily doped epitaxial silicon carbide film layer provided by an embodiment of the present application;
图2g是本申请实施例提供的一种对重掺杂区域进行刻蚀后的结构示意图;Figure 2g is a schematic structural diagram of a heavily doped region after etching according to an embodiment of the present application;
图2h是本申请实施例提供的一种对重掺杂区域进行刻蚀后的结构示意图;Figure 2h is a schematic structural diagram of a heavily doped region after etching according to an embodiment of the present application;
图2i是本申请实施例提供的一种制备第一器件保护层后的结构示意图;Figure 2i is a schematic structural diagram after preparing a first device protective layer according to an embodiment of the present application;
图2j是本申请实施例提供的一种对第一器件保护层进行平坦化处理后的结构示意图;Figure 2j is a schematic structural diagram of a first device protective layer after planarization according to an embodiment of the present application;
图2k是本申请实施例提供的一种键合第一支撑衬底后的结构示意图;Figure 2k is a schematic structural diagram after bonding the first support substrate provided by the embodiment of the present application;
图2l是本申请实施例提供的一种去除碳化硅外延基底后的结构示意图;Figure 2l is a schematic structural diagram after removing the silicon carbide epitaxial substrate provided by the embodiment of the present application;
图2m是本申请实施例提供的一种键合第二支撑衬底后的结构示意图;Figure 2m is a schematic structural diagram after bonding the second support substrate provided by the embodiment of the present application;
图2n是本申请实施例提供的一种去除第一支撑衬底中硅层后的结构示意图;Figure 2n is a schematic structural diagram after removing the silicon layer in the first support substrate provided by an embodiment of the present application;
图2o是本申请实施例提供的一种去除第一支撑衬底和第一器件保护层后的结构示意图;Figure 2o is a schematic structural diagram after removing the first support substrate and the first device protective layer according to an embodiment of the present application;
图2p是本申请实施例提供的一种基于碳化硅的调制器件的结构示意图;Figure 2p is a schematic structural diagram of a silicon carbide-based modulation device provided by an embodiment of the present application;
图3是本申请实施例提供的一种基于碳化硅的调制器件的结构示意图。FIG. 3 is a schematic structural diagram of a silicon carbide-based modulation device provided by an embodiment of the present application.
以下对附图作补充说明:The following is a supplementary explanation of the accompanying drawings:
201-高质量碳化硅衬底;202-缺陷层;203-低成本碳化硅衬底;204-外延碳化硅薄膜层;205-重掺杂区域;206-第一预设区域;207-第二预设区域;208-间隔区域;209-第一电极区;210-第二电极区;211-第一器件保护层;212-第一支撑衬底;213-第二支撑衬底;214-第一金属电极;215-第二金属电极;216-第二器件保护层。201-High-quality silicon carbide substrate; 202-Defect layer; 203-Low-cost silicon carbide substrate; 204-Epitaxial silicon carbide film layer; 205-Heavily doped area; 206-First preset area; 207-Second Preset area; 208-spacing area; 209-first electrode area; 210-second electrode area; 211-first device protective layer; 212-first support substrate; 213-second support substrate; 214-th A metal electrode; 215-a second metal electrode; 216-a second device protective layer.
具体实施方式Detailed ways
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例,都属于本申请保护的范围。The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.
需要说明的是,本申请实施例的说明书所称的“一个实施例”或“实施例”是指可包含于本申请至少一个实现方式中的特定特征、结构或特性。需要理解的是,在本申请实施例的说明书和权利要求书及上述附图中,术语“上”、“下”、“顶”、“底”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含的包括一个或者更多个该特征。而且,术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,以便这里描述的本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施。此外,在本实施例的描述中,除非另有说明,“多个”的含义是两个或两个以上。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元的过程、方法、系统或产品不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。It should be noted that “one embodiment” or “embodiment” referred to in the description of the embodiments of this application refers to specific features, structures or characteristics that may be included in at least one implementation of this application. It should be understood that in the description and claims of the embodiments of the present application and the above-mentioned drawings, the directions or positional relationships indicated by terms such as "upper", "lower", "top" and "bottom" are based on those shown in the drawings. The orientation or positional relationship shown is only to facilitate the description of the present application and simplify the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present application. limit. The terms “first” and “second” are used for descriptive purposes only and shall not be understood as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Therefore, features defined as “first” and “second” may explicitly or implicitly include one or more of these features. Furthermore, the terms "first", "second", etc. are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It is to be understood that the data so used are interchangeable under appropriate circumstances so that the embodiments of the application described herein can be practiced in sequences other than those illustrated or described herein. Furthermore, in the description of this embodiment, unless otherwise specified, "plurality" means two or more. Furthermore, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, e.g., a process, method, system or product that encompasses a series of steps or units need not be limited to those steps that are expressly listed. or units, but may include other steps or units not expressly listed or inherent to such processes, methods, products or devices.
为了使本申请实施例公开的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本申请实施例进行进一步详细说明。应当理解,此处描述的具体实施例仅仅用以解释本申请实施例,并不用于限定本申请实施例。In order to make the purpose, technical solutions and advantages disclosed in the embodiments of the present application clearer, the embodiments of the present application will be further described in detail below in conjunction with the drawings and examples. It should be understood that the specific embodiments described here are only used to explain the embodiments of the present application and are not used to limit the embodiments of the present application.
碳化硅材料具有200多种晶型,其中应用最多的是3C-SiC,4H-SiC和6H-SiC。3C-SiC主要是利用常压化学气相沉积(Amospheric Pressure Chemical Vapor Deposition,APCVD)和减压化学气相沉积(Reduced Pressure Chemical Vapor Deposition,RPCVD)的方法,在硅(Si)衬底表面沉积碳化硅薄膜。用这种方法制备得到的3C-SiC薄膜主要是多晶薄膜,晶体质量无法达到单晶。而且,对于4H-SiC和6H-SiC来说,它们的生长温大于硅的熔点温度,也无法通过传统薄膜沉积异质外延的方法在硅衬底生长单晶碳化硅薄膜。因此,这造成了碳化硅在集成光学中应用时,碳化硅薄膜生长上的困难。此外,碳化硅具有较弱的电光效应,这就为碳化硅在集成光系统中的实现高效、高速光调制方面,制造了极大的障碍。Silicon carbide materials have more than 200 crystal forms, among which 3C-SiC, 4H-SiC and 6H-SiC are the most widely used. 3C-SiC mainly uses atmospheric pressure chemical vapor deposition (Amospheric Pressure Chemical Vapor Deposition, APCVD) and reduced pressure chemical vapor deposition (Reduced Pressure Chemical Vapor Deposition, RPCVD) methods to deposit a silicon carbide film on the surface of a silicon (Si) substrate. . The 3C-SiC film prepared by this method is mainly a polycrystalline film, and the crystal quality cannot reach single crystal. Moreover, for 4H-SiC and 6H-SiC, their growth temperature is greater than the melting point temperature of silicon, and it is impossible to grow single crystal silicon carbide films on silicon substrates through traditional thin film deposition heteroepitaxial methods. Therefore, this causes difficulties in the growth of silicon carbide films when silicon carbide is used in integrated optics. In addition, silicon carbide has a weak electro-optical effect, which creates great obstacles for the realization of efficient and high-speed light modulation of silicon carbide in integrated optical systems.
有鉴于此,本申请实施例提供了一种基于碳化硅的调制器件制备方法及调制器件,通过在碳化硅外延基底上制备外延碳化硅薄膜层,实现了碳化硅在集成光学应用中薄膜制备;通过对外延碳化硅薄膜层中的预设区域进行重掺杂,得到重掺杂区域,然后在重掺杂区域中进行调制器件结构制备,从而可以基于载流子色散的机制,实现碳化硅在集成光系统中的高效、高速光调制。此外,通过获取第一支撑衬底,并将第一支撑衬底和第二支撑衬底,实现将调制器件结构转移至第二支撑衬底上,以降低碳化硅单片成本,有利于基于碳化硅的调制器件的大规模推广应用。In view of this, embodiments of the present application provide a silicon carbide-based modulation device preparation method and a modulation device. By preparing an epitaxial silicon carbide film layer on a silicon carbide epitaxial substrate, silicon carbide thin film preparation in integrated optical applications is realized; By heavily doping a preset area in the epitaxial silicon carbide film layer to obtain a heavily doped area, and then preparing a modulated device structure in the heavily doped area, silicon carbide can be realized based on the mechanism of carrier dispersion. Efficient, high-speed light modulation in integrated optical systems. In addition, by obtaining the first support substrate and combining the first support substrate and the second support substrate, the modulation device structure is transferred to the second support substrate to reduce the cost of the silicon carbide single piece and facilitate the carbonization-based Large-scale promotion and application of silicon modulation devices.
请参阅图1,图1是本申请实施例提供的一种基于碳化硅的调制器件制备方法的流程示意图,如图1所示,该制备方法包括:Please refer to Figure 1. Figure 1 is a schematic flow chart of a method for preparing a silicon carbide-based modulation device provided by an embodiment of the present application. As shown in Figure 1, the preparation method includes:
S101:获取碳化硅外延基底。S101: Obtain silicon carbide epitaxial substrate.
本申请实施例中,对所有碳化硅电子器件的制造而言,在碳化硅衬底中无法进行扩散掺杂,且若在其中直接注入离子,会导致碳化硅的电气质量较差,因此需要先在碳化硅衬底上进行外延薄膜的生长。而由于同质外延生长的碳化硅薄膜具有出色的电气特性,目前几乎所有的碳化硅高性能器件都使用这种外延薄膜制造。因此,在制备基于碳化硅的调制器件时,首先需要获取碳化硅外延基底。碳化硅外延基底作为外延外延碳化硅薄膜层204的基础,需要具有较高的质量。可选的,碳化硅外延基底可以是高质量碳化硅衬底201。高质量碳化硅衬底201是指在工业生产中,产品质量在工业级P级或精选级Z级的碳化硅晶片。In the embodiments of this application, for the manufacture of all silicon carbide electronic devices, diffusion doping cannot be performed in the silicon carbide substrate, and if ions are directly injected into it, the electrical quality of the silicon carbide will be poor, so it is necessary to first The epitaxial film is grown on a silicon carbide substrate. Due to the excellent electrical properties of homoepitaxially grown silicon carbide films, almost all high-performance silicon carbide devices are currently manufactured using this epitaxial film. Therefore, when preparing silicon carbide-based modulation devices, it is first necessary to obtain a silicon carbide epitaxial substrate. The silicon carbide epitaxial substrate serves as the basis for the epitaxial silicon carbide thin film layer 204 and needs to be of high quality. Optionally, the silicon carbide epitaxial substrate may be a high-quality silicon carbide substrate 201. High-quality silicon carbide substrate 201 refers to silicon carbide wafers whose product quality is industrial grade P or selected grade Z in industrial production.
本申请实施例中,在制备基于碳化硅的调制器件时,碳化硅外延基底的作用是用于提供高质量碳化硅单晶表面,从而使在碳化硅外延过程中可以在该表面上生长出高质量的外延碳化硅薄膜层204。在实际生产中,使用高质量碳化硅衬底201通常需要较高的生产成本,而碳化硅外延基底只需要一层薄薄的碳化硅薄膜来提供质量碳化硅单晶表面即可满足高质量的碳化硅外延需要。因此,为了降低生产成本,可以采用在高质量碳化硅衬底201上剥离一层碳化硅薄膜来作为碳化硅外延基底。具体的,获取碳化硅衬底。此处的碳化硅衬底即为高质量碳化硅衬底201。对碳化硅衬底进行离子注入,以在碳化硅衬底中形成缺陷层202。获取第三支撑衬底,并将碳化硅衬底与第三支撑衬底进行键合,得到第三键合结构。对第三键合结构进行热处理,以使第三键合结构中的碳化硅衬底沿缺陷层202剥离,得到键合在第三支撑衬底上的碳化硅外延基底。In the embodiments of the present application, when preparing modulation devices based on silicon carbide, the role of the silicon carbide epitaxial substrate is to provide a high-quality silicon carbide single crystal surface, so that high-quality silicon carbide can be grown on the surface during the silicon carbide epitaxial process. Quality epitaxial silicon carbide thin film layer 204. In actual production, the use of high-quality silicon carbide substrate 201 usually requires higher production costs, while the silicon carbide epitaxial substrate only requires a thin layer of silicon carbide film to provide a high-quality silicon carbide single crystal surface to meet the high-quality requirements. Silicon carbide epitaxy is required. Therefore, in order to reduce the production cost, a silicon carbide film can be peeled off on the high-quality silicon carbide substrate 201 to serve as the silicon carbide epitaxial substrate. Specifically, a silicon carbide substrate is obtained. The silicon carbide substrate here is a high-quality silicon carbide substrate 201. The silicon carbide substrate is ion implanted to form a defect layer 202 in the silicon carbide substrate. Obtain a third supporting substrate, and bond the silicon carbide substrate and the third supporting substrate to obtain a third bonding structure. The third bonding structure is heat treated to peel off the silicon carbide substrate in the third bonding structure along the defect layer 202 to obtain a silicon carbide epitaxial substrate bonded to the third support substrate.
本申请实施例中,根据不同碳化硅衬底的切型,为了实现较好的同质外延,得到高质量的外延碳化硅薄膜层204,所选取的碳化硅衬底可以是N型碳化硅衬底。在得到碳化硅衬底后,对碳化硅衬底进行离子注入,以在碳化硅衬底中形成缺陷层202。通过对碳化硅衬底进行离子注入在碳化硅衬底内形成缺陷层202,以使碳化硅衬底经过热处理后能够沿注入缺陷层202剥离。离子注入的方向为自碳化硅衬底的一个表面注入。可选的,离子注入方向可以垂直于注入表面,也可以与第二表面之间呈预设夹角。离子注入所采用的离子包括氢离子、氦离子、氖离子中的至少一种。离子注入可以是单一离子注入,也可以是多种离子的共注入的方式。例如,采用氢氦离子共注入。当采用两种以上离子共注入的方式时,注入顺序可以依据实际需求调整。离子注入的深度依据所需要的碳化硅外延基底的厚度来确定。可选的,注入离子的剂量为1E15cm-2-1E18cm-2,离子注入的能量为20keV-2MeV。In the embodiment of the present application, according to the cutting type of different silicon carbide substrates, in order to achieve better homogeneous epitaxy and obtain a high-quality epitaxial silicon carbide film layer 204, the selected silicon carbide substrate may be an N-type silicon carbide substrate. end. After obtaining the silicon carbide substrate, ion implantation is performed on the silicon carbide substrate to form a defect layer 202 in the silicon carbide substrate. A defect layer 202 is formed in the silicon carbide substrate by ion implantation into the silicon carbide substrate, so that the silicon carbide substrate can be peeled off along the implanted defect layer 202 after heat treatment. The direction of ion implantation is from one surface of the silicon carbide substrate. Optionally, the ion implantation direction may be perpendicular to the implantation surface, or may form a preset angle with the second surface. The ions used in ion implantation include at least one of hydrogen ions, helium ions, and neon ions. Ion implantation can be a single ion implantation or a co-implantation of multiple ions. For example, co-implantation of hydrogen and helium ions is used. When two or more ion co-implantation methods are used, the injection sequence can be adjusted according to actual needs. The depth of ion implantation is determined based on the required thickness of the silicon carbide epitaxial substrate. Optional, the dose of ion implantation is 1E15cm -2 -1E18cm -2 , and the energy of ion implantation is 20keV-2MeV.
本申请实施例中,完成对碳化硅衬底的离子注入后,获取第三支撑衬底,并将碳化硅衬底与第三支撑衬底进行键合,得到第三键合结构。第三支撑衬底用于支撑从碳化硅衬底上剥离的碳化硅薄膜。由于后续需要在碳化硅外延基底进行制备外延碳化硅薄膜层204,而碳化硅外延基底设置在第三支撑衬底上,因此第三支撑衬底需要能够适配碳化硅外延过程中的热应力,以免由于热失配所导致的外延层破裂等问题。同时第三支撑衬底还需要不会对外延出的外延碳化硅薄膜层204造成污染。可选的,第三支撑衬底的材质为低成本的碳化硅或蓝宝石。此处的低成本碳化硅是指在工业生产中使用成本较低的碳化硅衬底,比如产品质量在测试级(Dummy)的碳化硅衬底、混合晶型碳化硅衬底、多晶碳化硅衬底等。在选用低成本碳化硅衬底203作为第三支撑衬底时,在将碳化硅衬底与第三支撑衬底进行键合之前,需要对第三支撑衬底的表面进行表面处理,从而使其表面具备超平水平。可选的,对第三支撑衬底的表面进行表面处理的工艺流程包括:粗研磨、细研磨、粗抛光、低能离子束辐照修整、精细抛光。通过表面处理后,第三支撑衬底的总厚度变化(total thicknessvariation,TTV)小于等于1μm。In the embodiment of the present application, after completing the ion implantation into the silicon carbide substrate, a third support substrate is obtained, and the silicon carbide substrate and the third support substrate are bonded to obtain a third bonding structure. The third support substrate is used to support the silicon carbide film peeled off from the silicon carbide substrate. Since the epitaxial silicon carbide film layer 204 needs to be prepared on the silicon carbide epitaxial substrate later, and the silicon carbide epitaxial substrate is disposed on the third support substrate, the third support substrate needs to be able to adapt to the thermal stress during the silicon carbide epitaxial process. To avoid problems such as cracking of the epitaxial layer due to thermal mismatch. At the same time, the third supporting substrate also needs to not cause contamination to the epitaxial silicon carbide film layer 204. Optionally, the third supporting substrate is made of low-cost silicon carbide or sapphire. Low-cost silicon carbide here refers to the use of lower-cost silicon carbide substrates in industrial production, such as silicon carbide substrates with product quality at test grade (Dummy), mixed crystalline silicon carbide substrates, and polycrystalline silicon carbide. substrate etc. When the low-cost silicon carbide substrate 203 is selected as the third support substrate, before bonding the silicon carbide substrate to the third support substrate, the surface of the third support substrate needs to be surface treated to make it The surface is super flat. Optionally, the process flow for surface treatment of the surface of the third support substrate includes: rough grinding, fine grinding, rough polishing, low-energy ion beam irradiation trimming, and fine polishing. After surface treatment, the total thickness variation (TTV) of the third support substrate is less than or equal to 1 μm.
本申请实施例中,在得到第三键合结构后,对第三键合结构进行热处理,以使第三键合结构中的碳化硅衬底沿缺陷层202剥离,得到键合在第三支撑衬底上的碳化硅外延基底。具体地,将第三键合结构逐渐升温至剥离温度。对第三键合结构加热预设时长,使键合结构在较小形变下沿缺陷层202剥离得到键合在第三支撑衬底上的碳化硅薄膜。在对第三键合结构进行加热处理,促使注入离子在高质量碳化硅衬底201中聚集,并形成微缺陷,然后微缺陷沿横向扩展,即可实现第三键合结构中的高质量碳化硅衬底201沿注入缺陷层202分离,得到键合在第三支撑衬底上的碳化硅薄膜,然后通过对碳化硅薄膜的表面进行处理,得到碳化硅外延基底。对对第三键合结构进行热处理的具体的热处理温度和热处理时长可结合高质量碳化硅的材质以及晶型进行确定。对键合在第三支撑衬底上的碳化硅薄膜的表面可以利用化学机械抛光进行处理,处理的碳化硅薄膜的表面至粗糙度小于等于0.2nm。在高质量碳化硅衬底201经过热处理后得到的剥离余料,经过处理后可以循环利用,从而降低生产成本。In the embodiment of the present application, after the third bonding structure is obtained, the third bonding structure is heat treated, so that the silicon carbide substrate in the third bonding structure is peeled off along the defect layer 202 to obtain the bonded third support. Silicon carbide epitaxial substrate on substrate. Specifically, the third bonding structure is gradually heated to the peeling temperature. The third bonding structure is heated for a preset time, so that the bonding structure is peeled off along the defect layer 202 under small deformation to obtain a silicon carbide film bonded to the third support substrate. After heating the third bonding structure, the implanted ions are gathered in the high-quality silicon carbide substrate 201 and micro-defects are formed, and then the micro-defects expand laterally, thereby achieving high-quality carbonization in the third bonding structure. The silicon substrate 201 is separated along the implanted defect layer 202 to obtain a silicon carbide film bonded to the third support substrate, and then the surface of the silicon carbide film is processed to obtain a silicon carbide epitaxial substrate. The specific heat treatment temperature and heat treatment duration for heat treatment of the third bonding structure can be determined based on the material and crystal form of high-quality silicon carbide. The surface of the silicon carbide film bonded to the third support substrate can be processed by chemical mechanical polishing, and the surface of the treated silicon carbide film has a roughness of less than or equal to 0.2 nm. The peeling residue obtained after heat treatment of the high-quality silicon carbide substrate 201 can be recycled after treatment, thereby reducing production costs.
S103:在碳化硅外延基底上制备外延碳化硅薄膜层204。S103: Prepare an epitaxial silicon carbide film layer 204 on the silicon carbide epitaxial substrate.
本申请实施例中,在得到碳化硅外延基底后,可以在碳化硅外延基底上外延制备外延碳化硅薄膜层204。可选的,外延方法包括但不仅限于物理气相传输法(PhySiCalVapor Transport,PVT)、溶液法和高温气相化学沉积法(High temperature chemicalvapor deposition,HTCVD)等。可选的,外延出的外延碳化硅薄膜层204的厚度为400nm-1500nm。可选的,在同质外延过程中,也可以对制备出的外延碳化硅薄膜层204采用轻掺杂的方式进行掺杂,以在外延碳化硅薄膜层204中引入载流子,从而改善碳化硅的电光效应。可选的,对外延碳化硅薄膜层204进行掺杂的掺杂类型可以是N型掺杂,也可以是P型掺杂。可选的,对外延碳化硅薄膜层204采用N型掺杂所采用的掺杂元素为氮元素或磷元素。对外延碳化硅薄膜层204采用P型掺杂所采用的掺杂元素为硼元素或铝元素。可选的,对外延碳化硅薄膜层204进行轻掺杂后,得到的外延碳化硅薄膜层204的掺杂浓度为1E13/cm3-1E15/cm3。In the embodiment of the present application, after obtaining the silicon carbide epitaxial substrate, the epitaxial silicon carbide film layer 204 can be epitaxially prepared on the silicon carbide epitaxial substrate. Optionally, epitaxial methods include but are not limited to physical vapor transport (PhySiCalVapor Transport, PVT), solution method, high temperature chemical vapor deposition (HTCVD), etc. Optionally, the thickness of the epitaxial silicon carbide film layer 204 is 400nm-1500nm. Optionally, during the homoepitaxial process, the prepared epitaxial silicon carbide thin film layer 204 can also be doped with light doping to introduce carriers into the epitaxial silicon carbide thin film layer 204 to improve carbonization. The electro-optical effect of silicon. Optionally, the doping type of the epitaxial silicon carbide film layer 204 may be N-type doping or P-type doping. Optionally, the doping element used for N-type doping of the epitaxial silicon carbide film layer 204 is nitrogen or phosphorus. The doping element used for P-type doping of the epitaxial silicon carbide thin film layer 204 is boron element or aluminum element. Optionally, after the epitaxial silicon carbide thin film layer 204 is lightly doped, the resulting doping concentration of the epitaxial silicon carbide thin film layer 204 is 1E 13 /cm 3 -1E 15 /cm 3 .
S105:对外延碳化硅薄膜层204中的预设区域进行重掺杂,得到重掺杂区域205。S105: Perform heavy doping on a preset area in the epitaxial silicon carbide film layer 204 to obtain a heavily doped area 205.
本申请实施例中,在外延碳化硅薄膜层204制备完成后,对外延碳化硅薄膜层204中的预设区域进行重掺杂,得到重掺杂区域205。重掺杂区域205用于制备调制器件结构。预设区域指的是一个器件单元所包含区域中的部分区域。在外延碳化硅薄膜层204中,可以制备出多个器件单元。可选的,预设区域的尺寸为2.2μm-101μm。重掺杂的掺杂类型与前述制备外延碳化硅薄膜层204时轻掺杂的掺杂类型相同。即对外延碳化硅薄膜层204进行轻掺杂的掺杂类型为N型掺杂,则外延碳化硅薄膜层204中的预设区域进行重掺杂时,所采用的掺杂类型也为N型掺杂。对外延碳化硅薄膜层204进行轻掺杂的掺杂类型为P型掺杂,则外延碳化硅薄膜层204中的预设区域进行重掺杂时,所采用的掺杂类型也为P型掺杂。对外延碳化硅薄膜层204进行重掺杂后,得到的外延碳化硅薄膜层204的掺杂浓度为1E15/cm3-1E17/cm3。在对预设区域进行重掺杂时,可以采用离子注入的方式实现重掺杂。可选的,采用N型掺杂对预设区域进行重掺杂时,所注入离子为氮离子或磷离子。采用P型掺杂对预设区域进行重掺杂时,所注入离子为硼离子或铝离子。可选的,掺杂离子注入区域深度为500nm-1500nm,且掺杂离子注入区域深度不大于外延碳化硅薄膜层204的厚度。也就是说,最终得到的重掺杂区域205的尺寸为2.2μm-101μm,重掺杂区域205的厚度为500nm-1500nm,且小于等于外延碳化硅薄膜层204的厚度。In the embodiment of the present application, after the preparation of the epitaxial silicon carbide thin film layer 204 is completed, the preset area in the epitaxial silicon carbide thin film layer 204 is heavily doped to obtain a heavily doped area 205. The heavily doped region 205 is used to prepare the modulation device structure. The preset area refers to a part of the area included in a device unit. In the epitaxial silicon carbide film layer 204, multiple device units can be prepared. Optional, the size of the preset area is 2.2μm-101μm. The doping type of heavy doping is the same as the doping type of light doping when preparing the epitaxial silicon carbide film layer 204 . That is, the doping type for lightly doping the epitaxial silicon carbide film layer 204 is N-type doping. When the preset area in the epitaxial silicon carbide film layer 204 is heavily doped, the doping type used is also N-type. Doping. The doping type for lightly doping the epitaxial silicon carbide film layer 204 is P-type doping. When the preset area in the epitaxial silicon carbide film layer 204 is heavily doped, the doping type used is also P-type doping. miscellaneous. After the epitaxial silicon carbide thin film layer 204 is heavily doped, the resulting doping concentration of the epitaxial silicon carbide thin film layer 204 is 1E15/cm 3 -1E 17 /cm 3 . When heavily doping the preset region, ion implantation can be used to achieve heavy doping. Optionally, when N-type doping is used to heavily dope the preset region, the implanted ions are nitrogen ions or phosphorus ions. When P-type doping is used to heavily dope the preset area, the ions implanted are boron ions or aluminum ions. Optionally, the depth of the doped ion implantation region is 500 nm to 1500 nm, and the depth of the doping ion implantation region is no greater than the thickness of the epitaxial silicon carbide film layer 204 . That is to say, the size of the finally obtained heavily doped region 205 is 2.2 μm-101 μm, and the thickness of the heavily doped region 205 is 500 nm-1500 nm, which is less than or equal to the thickness of the epitaxial silicon carbide film layer 204 .
S107:在重掺杂区域205中制备调制器件结构;调制器件结构包括相对的第一表面和第二表面,第一表面靠近碳化硅外延基底,第二表面远离碳化硅外延基底。S107: Prepare a modulation device structure in the heavily doped region 205; the modulation device structure includes opposite first surfaces and second surfaces, the first surface is close to the silicon carbide epitaxial substrate, and the second surface is far away from the silicon carbide epitaxial substrate.
本申请实施例中,在实现对外延碳化硅薄膜层204中的预设区域进行重掺杂后,可以在得到的重掺杂区域205中制备调制器件结构。在加工调制器件结构时,采用光刻在重掺杂区域205中刻蚀出调制器件结构。可选的,对外延碳化硅薄膜层204中的重掺杂区域205进行调制器件结构加工时,所采用的光刻方法为电子束光刻、深紫外光刻中至少一种,具体加工方法为干法刻蚀,刻蚀深度为200nm-1300nm,且小于等于重掺杂区域205的厚度。In this embodiment of the present application, after the preset region in the epitaxial silicon carbide film layer 204 is heavily doped, a modulation device structure can be prepared in the resulting heavily doped region 205 . When processing the modulation device structure, photolithography is used to etch the modulation device structure in the heavily doped region 205 . Optionally, when processing the modulation device structure of the heavily doped region 205 in the epitaxial silicon carbide film layer 204, the photolithography method used is at least one of electron beam lithography and deep ultraviolet lithography. The specific processing method is: Dry etching, the etching depth is 200nm-1300nm, and is less than or equal to the thickness of the heavily doped region 205 .
本申请实施例中,通过对重掺杂区域205进行刻蚀,得到的调制器件结构中包括第一预设区域206、第二预设区域207和间隔区域208,间隔区域208设置在第一预设区域206与第二预设区域207之间。其中,第一预设区域206和第二预设区域207用于制作调制器件的电极区。间隔区域208用于将调制器件的两个电极区间隔开。可选的,第一预设区域206的尺寸为1μm-50μm,第二预设区域207的尺寸为1μm-50μm,间隔区域208的尺寸为200nm-1000nm。通过对重掺杂区域205进行刻蚀,得到第一预设区域206、第二预设区域207和间隔区域208后,通过对第一预设区域206和第二预设区域207进行掺杂,从而得到第一电极区209和第二电极区210,以完成调制器件的制备。具体的,对第一预设区域206按照第一掺杂类型进行区域掺杂,得到第一电极区209。对第二预设区域207按照第二掺杂类型进行区域掺杂,得到第二电极区210。其中,第一掺杂类型与第二掺杂类型相反。对第一电极区209、第二电极区210和间隔区域208进行激活处理,得到激活后的调制器件。In this embodiment of the present application, by etching the heavily doped region 205, the modulation device structure obtained includes a first preset region 206, a second preset region 207 and a spacer region 208. The spacer region 208 is disposed in the first preset region. Between the area 206 and the second preset area 207. Among them, the first preset area 206 and the second preset area 207 are used to make the electrode area of the modulation device. The spacer region 208 is used to separate the two electrode regions of the modulation device. Optionally, the size of the first preset area 206 is 1 μm-50 μm, the size of the second preset area 207 is 1 μm-50 μm, and the size of the spacing area 208 is 200 nm-1000 nm. After etching the heavily doped region 205 to obtain the first preset region 206, the second preset region 207 and the spacing region 208, the first preset region 206 and the second preset region 207 are doped, Thus, the first electrode region 209 and the second electrode region 210 are obtained to complete the preparation of the modulation device. Specifically, the first preset region 206 is regionally doped according to the first doping type to obtain the first electrode region 209 . The second preset region 207 is regionally doped according to the second doping type to obtain the second electrode region 210 . Wherein, the first doping type is opposite to the second doping type. The first electrode region 209, the second electrode region 210 and the spacer region 208 are activated to obtain an activated modulation device.
本申请实施例中,第一掺杂类型可以是N型掺杂,也可以是P型掺杂。对第一预设区域206进行掺杂可以通过注入掺杂离子来实现,可选的,掺杂离子注入深度为10nm-400nm。当第一掺杂类型为N型掺杂时,通过在第一预设区域206中注入氮离子或磷离子,以实现对第一预设区域206的区域掺杂。当第一掺杂类型为P型掺杂时,通过在第一预设区域206中注入硼离子或铝离子,以实现对第一预设区域206的区域掺杂。对第一预设区域206进行掺杂后所得到的第一电极区209的区域掺杂浓度为1E17/cm3-1E19/cm3。第二掺杂类型可以是N型掺杂,也可以是P型掺杂,具体需要根据第一掺杂类型进行确定。即当第一掺杂类型为N型掺杂时,第二掺杂类型为P型掺杂,当第一掺杂类型为P型掺杂时,第二掺杂类型为N型掺杂。对第二预设区域207进行掺杂可以通过注入掺杂离子来实现,可选的,掺杂离子注入深度为10nm-400nm。当第二掺杂类型为N型掺杂时,通过在第二预设区域207中注入氮离子或磷离子,以实现对第二预设区域207的区域掺杂。当第二掺杂类型为P型掺杂时,通过在第二预设区域207中注入硼离子或铝离子,以实现对第二预设区域207的区域掺杂。对第二预设区域207进行掺杂后所得到的第二电极区210的区域掺杂浓度为1E17/cm3-1E19/cm3。In the embodiment of the present application, the first doping type may be N-type doping or P-type doping. Doping the first preset region 206 can be achieved by injecting doping ions, and optionally, the doping ion implantation depth is 10 nm-400 nm. When the first doping type is N-type doping, the first preset region 206 is doped by implanting nitrogen ions or phosphorus ions into the first preset region 206 . When the first doping type is P-type doping, boron ions or aluminum ions are implanted into the first preset region 206 to achieve area doping of the first preset region 206 . The regional doping concentration of the first electrode region 209 obtained after doping the first preset region 206 is 1E17/cm 3 -1E19/cm 3 . The second doping type may be N-type doping or P-type doping, which needs to be determined according to the first doping type. That is, when the first doping type is N-type doping, the second doping type is P-type doping, and when the first doping type is P-type doping, the second doping type is N-type doping. Doping the second preset region 207 can be achieved by injecting doping ions, and optionally, the doping ion implantation depth is 10 nm-400 nm. When the second doping type is N-type doping, the second preset region 207 is doped by implanting nitrogen ions or phosphorus ions into the second preset region 207 . When the second doping type is P-type doping, boron ions or aluminum ions are implanted into the second preset region 207 to achieve area doping of the second preset region 207 . The regional doping concentration of the second electrode region 210 obtained after doping the second preset region 207 is 1E17/cm 3 -1E19/cm 3 .
本申请实施例中,当掺杂元素和晶格不匹配时,掺杂离子就会在晶格中会形成缺陷。因此,在得到第一电极区209和第二电极区210后,通过对第一电极区209、第二电极区210和间隔区域208后,可以对第一电极区209、第二电极区210和间隔区域208进行激活处理,实现对晶格中的缺陷进行修补,以改善材料的性能,从而更好发挥出掺杂离子的作用。对第一电极区209、第二电极区210和间隔区域208进行激活处理,可以采用退火的方式来实现。可选的,在退火激活掺杂区域时,退火环境包括但不限于真空或保护气氛,比如N2、Ar等,选用保护气氛时,压强可以为0.2-0.5大气压。退火温度为1500℃-1800℃,退火时长为0.5h-5h,退火时长与退火温度为反比关系。此外,由于碳化硅在高温条件下会呈现升华现象,为了避免制备出的调制器件结构在退火中被破坏,可以在退火前在调制器件结构上设置碳膜进行保护。可选的,碳膜厚度为100nm-1000nm,碳膜的厚度与退火温度、气压为反比关系。In the embodiment of the present application, when the doping element and the crystal lattice do not match, the doping ions will form defects in the crystal lattice. Therefore, after obtaining the first electrode region 209 and the second electrode region 210, by assembling the first electrode region 209, the second electrode region 210 and the spacing region 208, the first electrode region 209, the second electrode region 210 and the spacing region 208 can be The spacer region 208 undergoes an activation process to repair defects in the crystal lattice to improve the performance of the material and thereby better exert the role of doping ions. The activation treatment of the first electrode region 209, the second electrode region 210 and the spacer region 208 can be implemented by annealing. Optionally, when annealing the activated doped region, the annealing environment includes but is not limited to vacuum or protective atmosphere, such as N 2 , Ar, etc. When a protective atmosphere is selected, the pressure can be 0.2-0.5 atmospheres. The annealing temperature is 1500℃-1800℃, the annealing time is 0.5h-5h, and the annealing time is inversely proportional to the annealing temperature. In addition, since silicon carbide will sublime under high temperature conditions, in order to prevent the prepared modulation device structure from being damaged during annealing, a carbon film can be placed on the modulation device structure for protection before annealing. Optional, the thickness of the carbon film is 100nm-1000nm, and the thickness of the carbon film is inversely proportional to the annealing temperature and air pressure.
S109:在第二表面上制备第一器件保护层。S109: Prepare a first device protective layer on the second surface.
本申请实施例中,在完成调制器件结构的制备之后就可以将碳化硅外延基底去除。在去除碳化硅外延基底之前,需要将制备好的调制器件结构键合在支撑衬底上,以实现对器件结构层的支撑。为了避免调制器件结构直接与支撑衬底接触,可以在将调制器件结构与支撑衬底进行键合之前,在第二表面上制备一层第一器件保护层211,以保护调制器件结构。In the embodiment of the present application, the silicon carbide epitaxial substrate can be removed after completing the preparation of the modulation device structure. Before removing the silicon carbide epitaxial substrate, the prepared modulation device structure needs to be bonded to the support substrate to support the device structure layer. In order to avoid direct contact between the modulation device structure and the support substrate, a first device protection layer 211 may be prepared on the second surface to protect the modulation device structure before bonding the modulation device structure to the support substrate.
本申请实施例中,调制器件结构包括相对的第一表面和第二表面。第一表面靠近碳化硅外延基底,第一表面即为调制器件结构的底面。第一表面可以直接与碳化硅外延基底接触,也可以与碳化硅外延基底之间间隔部分外延碳化硅薄膜层204。这是由于前述对外延碳化硅薄膜层204进行多次掺杂处理所决定的。如果掺杂处理时注入杂质离子的深度恰好等于外延碳化硅薄膜层204的厚度,则调制器件结构的底面直接与碳化硅外延基底结构接触,如果掺杂处理时注入杂质离子的深度小于外延碳化硅薄膜层204的厚度,则调制器件结构的底面与碳化硅外延基底结构之间会间隔有部分外延碳化硅薄膜层204。第二表面远离碳化硅外延基底,第二表面即为调制器件结构的顶面。第一器件保护层211制作在调制器件结构的顶面以及裸露在外的部分外延碳化硅薄膜层204表面上。第一器件保护层211用于保护调制器件结构,可选的,第一器件保护层211的材质为氧化硅、氮化硅等。为了便于第一器件保护层211与支撑衬底键合,以及便于后续去除第一器件保护层211裸露出调制器件结构,第一器件保护层211可以采用氧化硅材料进行制作。In the embodiment of the present application, the modulation device structure includes an opposite first surface and a second surface. The first surface is close to the silicon carbide epitaxial substrate, and is the bottom surface of the modulation device structure. The first surface may be in direct contact with the silicon carbide epitaxial substrate, or may be separated from the silicon carbide epitaxial substrate by a portion of the epitaxial silicon carbide film layer 204 . This is determined by the aforementioned multiple doping processes on the epitaxial silicon carbide thin film layer 204 . If the depth of the impurity ions injected during the doping process is exactly equal to the thickness of the epitaxial silicon carbide film layer 204, the bottom surface of the modulation device structure is directly in contact with the silicon carbide epitaxial base structure. If the depth of the impurity ions injected during the doping process is smaller than the thickness of the epitaxial silicon carbide If the thickness of the thin film layer 204 is small, a portion of the epitaxial silicon carbide thin film layer 204 will be spaced between the bottom surface of the modulation device structure and the silicon carbide epitaxial base structure. The second surface is away from the silicon carbide epitaxial substrate, and the second surface is the top surface of the modulation device structure. The first device protection layer 211 is formed on the top surface of the modulation device structure and the exposed part of the epitaxial silicon carbide film layer 204 surface. The first device protective layer 211 is used to protect the modulation device structure. Optionally, the first device protective layer 211 is made of silicon oxide, silicon nitride, etc. In order to facilitate the bonding of the first device protective layer 211 to the supporting substrate and to facilitate the subsequent removal of the first device protective layer 211 to expose the modulation device structure, the first device protective layer 211 can be made of silicon oxide material.
可选的,在调制器件结构表面沉积氧化硅作为第一器件保护层211的方法包括为等离子体增强化学气相沉积法(Plasma Enhanced Chemical Vapor Deposition,PECVD)、低压力化学气相沉积法(Low Pressure Chemical Vapor Deposition,LPCVD)、物理气相沉积(Physical Vapor Deposition,PVD)中至少一种。可选的,第一器件保护层211的厚度为3μm-5μm。在一些实施例中,在调制器件结构表面制作第一器件保护层211后,还可以对第一器件保护层211进行平坦化处理。可选的,平坦化处理后,第一器件保护层211的表面粗糙度小于等于0.2nm。Optionally, the method of depositing silicon oxide as the first device protective layer 211 on the surface of the modulation device structure includes plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD), low pressure chemical vapor deposition (Low Pressure Chemical Vapor Deposition). At least one of Vapor Deposition (LPCVD) and Physical Vapor Deposition (PVD). Optionally, the thickness of the first device protection layer 211 is 3 μm-5 μm. In some embodiments, after forming the first device protective layer 211 on the surface of the modulation device structure, the first device protective layer 211 may also be planarized. Optionally, after the planarization process, the surface roughness of the first device protective layer 211 is less than or equal to 0.2 nm.
S111:获取第一支撑衬底,并将第一支撑衬底与第一器件保护层进行键合,得到第一键合结构。S111: Obtain the first support substrate, and bond the first support substrate to the first device protective layer to obtain the first bonding structure.
本申请实施例中,第一器件保护层211制备完成之后,可以获取第一支撑衬底212,然后将第一支撑衬底212与第一器件保护层211进行键合,得到第一键合结构。第一支撑衬底212用于支撑调制器件结构层,以免在去除碳化硅外延基底过程中损坏调制器件结构。由于第一支撑衬底212仅仅是在去除碳化硅外延基底过程中对调制器件结构进行支撑,后续需要将第一支撑衬底212去除掉,以裸露出调制器件结构。因此,第一支撑衬底212可以选用使用成本较低的衬底,比如硅衬底。硅衬底表面通常都会设置有一层氧化层以保护硅衬底,当选用硅衬底作为第一支撑衬底212时,硅衬底表面的氧化层厚度不宜过厚,以免增加后续去除第一支撑衬底212的难度。可选的,选用硅衬底作为第一支撑衬底212时,硅衬底中的氧化层的厚度为500nm-2000nm。In the embodiment of the present application, after the preparation of the first device protection layer 211 is completed, the first support substrate 212 can be obtained, and then the first support substrate 212 and the first device protection layer 211 are bonded to obtain the first bonding structure. . The first support substrate 212 is used to support the modulation device structure layer to prevent damage to the modulation device structure during the removal of the silicon carbide epitaxial substrate. Since the first support substrate 212 only supports the modulation device structure during the removal of the silicon carbide epitaxial substrate, the first support substrate 212 needs to be removed subsequently to expose the modulation device structure. Therefore, the first support substrate 212 may be a lower cost substrate, such as a silicon substrate. There is usually an oxide layer on the surface of the silicon substrate to protect the silicon substrate. When the silicon substrate is selected as the first support substrate 212, the thickness of the oxide layer on the surface of the silicon substrate should not be too thick to avoid increasing the subsequent removal of the first support. Difficulty of substrate 212. Optionally, when a silicon substrate is selected as the first support substrate 212, the thickness of the oxide layer in the silicon substrate is 500nm-2000nm.
S113:将第一键合结构中的碳化硅外延基底去除,并裸露出第一表面。S113: Remove the silicon carbide epitaxial substrate in the first bonding structure and expose the first surface.
本申请实施例中,在得到第一键合结构后,可以将第一键合结构中的碳化硅外延基底去除。可选的,可以采用机械研磨的方式去除碳化硅外延基底。在第一表面直接与碳化硅外延基底接触的情况下,去除碳化硅外延基底后可以直接裸露出第一表面。在第一表面与碳化硅外延基底之间间隔有部分外延碳化硅薄膜层204的情况下,在去除碳化硅外延基底后,还需要继续将第一表面与碳化硅外延基底之间间隔的部分外延碳化硅薄膜层204去除,从而使第一表面裸露出来。In the embodiment of the present application, after the first bonding structure is obtained, the silicon carbide epitaxial substrate in the first bonding structure can be removed. Optionally, the silicon carbide epitaxial substrate can be removed by mechanical grinding. In the case where the first surface is in direct contact with the silicon carbide epitaxial substrate, the first surface can be directly exposed after the silicon carbide epitaxial substrate is removed. In the case where a portion of the epitaxial silicon carbide film layer 204 is spaced between the first surface and the silicon carbide epitaxial substrate, after the silicon carbide epitaxial substrate is removed, it is necessary to continue to epitaxially extend the portion of the space between the first surface and the silicon carbide epitaxial substrate. The silicon carbide film layer 204 is removed, thereby exposing the first surface.
S115:获取第二支撑衬底,并将第二支撑衬底与第一表面进行键合,得到第二键合结构。S115: Obtain a second supporting substrate, and bond the second supporting substrate to the first surface to obtain a second bonding structure.
本申请实施例中,在将碳化硅外延基底去除后,需要将第一支撑衬底212和第一器件保护层211去除,以使调制器件结构裸露出来。在去除第一支撑衬底212之前,需要获取第二支撑衬底213,并将第二支撑衬底213与第一表面进行键合,得到第二键合结构。第二支撑衬底213用于支撑调制器件结构,并为调制器件结构提供高折射率对比度,以实现局限调制器件结构中的光场。可选的,第二支撑衬底213可以为氧化硅衬底、硅衬底或氧化铝衬底等。当选用硅衬底作为第二支撑衬底213时,为了实现良好的光场局限效果,硅衬底表面的氧化层厚度不宜过薄,可选的,选用硅衬底作为第二支撑衬底213时,硅衬底中的氧化层的厚度为2000nm-5000nm。In the embodiment of the present application, after the silicon carbide epitaxial substrate is removed, the first support substrate 212 and the first device protection layer 211 need to be removed to expose the modulation device structure. Before removing the first support substrate 212, it is necessary to obtain the second support substrate 213 and bond the second support substrate 213 to the first surface to obtain a second bonding structure. The second supporting substrate 213 is used to support the modulation device structure and provide a high refractive index contrast for the modulation device structure, so as to achieve localization of the light field in the modulation device structure. Optionally, the second support substrate 213 may be a silicon oxide substrate, a silicon substrate, an aluminum oxide substrate, or the like. When a silicon substrate is selected as the second supporting substrate 213, in order to achieve a good light field localization effect, the thickness of the oxide layer on the surface of the silicon substrate should not be too thin. Alternatively, a silicon substrate is selected as the second supporting substrate 213. At this time, the thickness of the oxide layer in the silicon substrate is 2000nm-5000nm.
S117:将第二键合结构中的第一支撑衬底和第二键合结构中的第一器件保护层去除,以裸露出第二表面,得到基于碳化硅的调制器件。S117: Remove the first support substrate in the second bonding structure and the first device protective layer in the second bonding structure to expose the second surface to obtain a modulation device based on silicon carbide.
本申请实施例中,在得到第二键合结构后,通过将第一支撑衬底212和第一器件保护层211去除,以裸露出第二表面,从而完成基于碳化硅的调制器件的制备。在裸露出第二表面后,还可以在第一电极区209和第二电极区210制备金属电极,以将调制器件的电极引出。此外,为了保护调制器结构,在制备金属电极后,还可以至调制器件的顶面上制备一层第二器件保护层216,以保护调制器件。具体的,将第二键合结构中的第一支撑衬底212和第二键合结构中的第一器件保护层211去除,以裸露出第二表面,得到第一器件结构。在第一器件结构中的第一电极区209制备第一金属电极214,以及在第一器件结构中的第二电极区210制备第二金属电极215,得到第二器件结构。在第二器件结构中的第二表面制备第二器件保护层216,得到基于碳化硅的调制器件。In the embodiment of the present application, after the second bonding structure is obtained, the first supporting substrate 212 and the first device protective layer 211 are removed to expose the second surface, thereby completing the preparation of the silicon carbide-based modulation device. After the second surface is exposed, metal electrodes may also be prepared in the first electrode region 209 and the second electrode region 210 to lead out the electrodes of the modulation device. In addition, in order to protect the modulator structure, after preparing the metal electrode, a second device protection layer 216 can also be prepared on the top surface of the modulation device to protect the modulation device. Specifically, the first supporting substrate 212 in the second bonding structure and the first device protective layer 211 in the second bonding structure are removed to expose the second surface, thereby obtaining the first device structure. A first metal electrode 214 is prepared in the first electrode region 209 of the first device structure, and a second metal electrode 215 is prepared in the second electrode region 210 of the first device structure, thereby obtaining a second device structure. A second device protective layer 216 is prepared on the second surface of the second device structure to obtain a silicon carbide-based modulation device.
本申请实施例中,在去除第一支撑衬底212和第一器件保护层211时,可以基于第一支撑衬底212和第一器件保护层211的材质选择对应的去除工艺进行去除。比如,第一支撑衬底212为硅衬底,第一器件保护层211为氧化硅保护层时,可以采用深硅刻蚀的方式去除硅衬底中的硅层,然后再采用湿法刻蚀的方式去除硅衬底中的氧化层以及第一器件保护层211,从而使调制器件结构的顶面裸露出来。In the embodiment of the present application, when removing the first support substrate 212 and the first device protection layer 211, a corresponding removal process may be selected based on the materials of the first support substrate 212 and the first device protection layer 211. For example, when the first support substrate 212 is a silicon substrate and the first device protective layer 211 is a silicon oxide protective layer, deep silicon etching can be used to remove the silicon layer in the silicon substrate, and then wet etching can be used. The oxide layer and the first device protection layer 211 in the silicon substrate are removed by a method, thereby exposing the top surface of the modulation device structure.
本申请实施例中,在将调制器件结构的顶面裸露出来裸露出来后,可以在第一电极区209和第二电极区210分别制备第一金属电极214和第二金属电极215。可选的,制备第一金属电极214和第二金属电极215的方法包括但不仅限于蒸发、电镀、磁控溅射等。可选的,第一金属电极214和第二金属电极215的材质为金、银、铜、铝、镍、钛中至少一种。可选的,第一金属电极214和第二金属电极215的厚度为100nm-300nm。In the embodiment of the present application, after the top surface of the modulation device structure is exposed, the first metal electrode 214 and the second metal electrode 215 can be prepared in the first electrode region 209 and the second electrode region 210 respectively. Optionally, methods of preparing the first metal electrode 214 and the second metal electrode 215 include, but are not limited to, evaporation, electroplating, magnetron sputtering, and the like. Optionally, the first metal electrode 214 and the second metal electrode 215 are made of at least one of gold, silver, copper, aluminum, nickel, and titanium. Optionally, the thickness of the first metal electrode 214 and the second metal electrode 215 is 100 nm-300 nm.
本申请实施例中,第二器件保护层216覆盖在调制器件结构的顶面以及裸露在外的部分外延碳化硅薄膜层204表面上,但不覆盖第一金属电极214和第二金属电极215。可选的,第二器件保护层216的材质为氧化硅、氮化硅等,第二器件保护层216的厚度为500nm-2000nm,且第二器件保护层216的厚度不小于调制器件结构的厚度。可选的,可以采用等离子体增强化学气相沉积法或物理气相沉积等方式制备第二器件保护层216。In the embodiment of the present application, the second device protection layer 216 covers the top surface of the modulation device structure and the exposed part of the surface of the epitaxial silicon carbide film layer 204, but does not cover the first metal electrode 214 and the second metal electrode 215. Optionally, the material of the second device protective layer 216 is silicon oxide, silicon nitride, etc., the thickness of the second device protective layer 216 is 500nm-2000nm, and the thickness of the second device protective layer 216 is not less than the thickness of the modulation device structure. . Optionally, the second device protective layer 216 may be prepared by plasma enhanced chemical vapor deposition or physical vapor deposition.
在一些实施例中,也可以将第一器件保护层211作为最终保护调制器件结构的保护层。具体来说,在制备第一器件保护层211时,第一器件保护层211的厚度需要不小于调制器件结构的厚度。且在去除第一支撑衬底212后并不去除第一器件保护层211,而是在第一器件保护层211上刻蚀出电极孔,从而使第一电极区209和第二电极区210裸露出来,然后再在电机孔中制备出第一金属电极214以及第二金属电极215。应当理解的是,当第一支撑衬底212选用硅衬底时,在去除第一支撑衬底212时,可以仅采用深硅刻蚀的方式去除硅衬底中的硅层,而保留氧化层作为调制器件结构保护层的一部分。In some embodiments, the first device protection layer 211 may also be used as a protection layer that ultimately protects the modulation device structure. Specifically, when preparing the first device protection layer 211, the thickness of the first device protection layer 211 needs to be no less than the thickness of the modulation device structure. And after removing the first support substrate 212, the first device protective layer 211 is not removed, but electrode holes are etched on the first device protective layer 211, thereby exposing the first electrode region 209 and the second electrode region 210. out, and then prepare the first metal electrode 214 and the second metal electrode 215 in the motor hole. It should be understood that when the first supporting substrate 212 is a silicon substrate, when removing the first supporting substrate 212 , only deep silicon etching can be used to remove the silicon layer in the silicon substrate while retaining the oxide layer. As part of the protective layer of the modulation device structure.
基于以上对基于碳化硅的调制器件制备方法的介绍,以下将结合结构图对上述制备方法进行进一步的说明,以便于理解在基于碳化硅的调制器件制备过程中的结构变化。应当理解的是,以下附图仅仅是一种示例性说明,根据上文描述,本领域技术人员在无需付出创造性劳动的情况下,还可以获得其他附图。此外,以下附图中所示的结构变化仅仅是基于碳化硅的调制器件制备方法的一种可行性示例,并不表示本申请实施例所述的基于碳化硅的调制器件制备方法仅限于以下示例。Based on the above introduction to the preparation method of the silicon carbide-based modulation device, the above preparation method will be further described below in conjunction with the structural diagram to facilitate understanding of the structural changes during the preparation process of the silicon carbide-based modulation device. It should be understood that the following drawings are only illustrative illustrations. Based on the above description, those skilled in the art can also obtain other drawings without exerting creative efforts. In addition, the structural changes shown in the following figures are only a feasible example of the preparation method of the silicon carbide-based modulation device, and do not mean that the preparation method of the silicon carbide-based modulation device described in the embodiments of the present application is limited to the following examples. .
图2a是本申请实施例提供的一种高质量碳化硅衬底201的结构示意图,如图2a所示,在制备基于碳化硅的调制器件时,首先需要获取高质量碳化硅衬底201,以碳化硅外延基底。图2b是本申请实施例提供的一种对高质量碳化硅衬底201进行离子注入后的结构示意图,如图2b所示,在得到高质量碳化硅衬底201后,对高质量碳化硅衬底201进行离子注入,在碳化硅衬底内形成缺陷层202。可选的,注入离子为H离子和/或He离子,注入面可以是Si面,也可以是C面。离子注入能量范围为20keV-2MeV,离子注入剂量为1E15cm-2-1E18cm-2。图2c是本申请实施例提供的一种对低成本碳化硅衬底203进行表面处理的结构变化示意图,如图2c所示,获取低成本碳化硅衬底203作为第三支撑衬底,并对低成本碳化硅衬底203进行表面修整,使其形貌达到超平水平。图2d是本申请实施例提供的一种第三键合结构的结构示意图,如图2d所示,将高质量碳化硅衬底201与低成本碳化硅衬底203进行键合,可以得到第三键合结构。图2e是本申请实施例提供的一种碳化硅外延基底的结构示意图,如图2e所示,通过对第三键合结构进行加热处理,促使注入离子在高质量碳化硅衬底201中聚集,并形成微缺陷,然后微缺陷沿横向扩展,即可实现第三键合结构中的高质量碳化硅衬底201沿注入缺陷层202分离,得到键合在第三支撑衬底上的碳化硅薄膜,然后通过对碳化硅薄膜的表面进行处理,得到碳化硅外延基底。然后在碳化硅外延基底的表面外延一层外延碳化硅薄膜层204,外延碳化硅薄膜层204的厚度为500nm-1500nm,掺杂类型为N型掺杂,掺杂浓度为1E13/cm3-1E15/cm3。图2f是本申请实施例提供的一种对外延碳化硅薄膜层204进行重掺杂后的结构示意图,如图2f所示,在对外延碳化硅薄膜层204中的预设区域进行重掺杂,得到重掺杂区域205。重掺杂区域205的掺杂类型为N型掺杂,掺杂浓度1E15/cm3-1E17/cm3,预设区域的长度W为2.2μm-101μm,掺杂区域的深度h1:500nm-1500nm。图2g是本申请实施例提供的一种对重掺杂区域205进行刻蚀后的结构示意图,如图2g所示,通过对重掺杂区域205进行刻蚀,得到的调制器件结构。刻蚀深度为200nm-1300nm,且小于等于重掺杂区域205的厚度。调制器件结构包括第一预设区域206、第二预设区域207和间隔区域208。图2h是本申请实施例提供的一种对重掺杂区域205进行刻蚀后的结构示意图,如图2h所示,对第一预设区域206和第二预设区域207进行掺杂,第一预设区域206的掺杂类型为N型掺杂,掺杂浓度为1E17/cm3-1E19/cm3,第一预设区域206的区域长度1μm-50μm,掺杂区域深度h2为10nm-400nm。第二预设区域207的掺杂类型为P型掺杂,掺杂浓度为1E17/cm3-1E19/cm3,第一预设区域206的区域长度1μm-50μm,掺杂区域深度h2为10nm-400nm。对第一预设区域206进行区域掺杂,得到第一电极区209,对第二预设区域207进行区域掺杂,得到第二电极区210,然后对第一电极区209、第二电极区210和间隔区域208进行激活处理。图2i是本申请实施例提供的一种制备第一器件保护层211后的结构示意图,如图2i所示,在对第一电极区209、第二电极区210和间隔区域208进行激活处理后,可以在调制器件结构的顶面以及裸露在外的部分外延碳化硅薄膜层204表面上制作第一器件保护层211,以保护调制器件结构。图2j是本申请实施例提供的一种对第一器件保护层211进行平坦化处理后的结构示意图,如图2j所示,在调制器件结构表面制作第一器件保护层211后,通过对第一器件保护层211进行平坦化处理,使第一器件保护层211的表面粗糙度小于等于0.2nm。图2k是本申请实施例提供的一种键合第一支撑衬底212后的结构示意图,如图2k所示,第一器件保护层211制备完成之后,可以获取第一支撑衬底212,然后将第一支撑衬底212与第一器件保护层211进行键合,得到第一键合结构。第一支撑衬底212为硅衬底,包括硅层和设置在硅层上的氧化层。图2l是本申请实施例提供的一种去除碳化硅外延基底后的结构示意图,如图2l所示,采用机械研磨的方式去除碳化硅外延基底,并使调制器件结构的底面裸露出来。图2m是本申请实施例提供的一种键合第二支撑衬底213后的结构示意图,如图2m所示,在将碳化硅外延基底去除后,通过获取第二支撑衬底213,并将第二支撑衬底213与第一表面进行键合,得到第二键合结构。第二支撑衬底213为硅衬底,包括硅层和设置在硅层上的氧化层。图2n是本申请实施例提供的一种去除第一支撑衬底212中硅层后的结构示意图,如图2n所示,以采用深硅刻蚀的方式去除硅衬底中的硅层,从而使第一支撑衬底212中的氧化层裸露出来。图2o是本申请实施例提供的一种去除第一支撑衬底212和第一器件保护层211后的结构示意图,如图2o所示,可以采用湿法刻蚀的方式去除硅衬底中的氧化层以及第一器件保护层211,从而使调制器件结构的顶面裸露出来。图2p是本申请实施例提供的一种基于碳化硅的调制器件的结构示意图,如图2p所示,在将调制器件结构的顶面裸露出来裸露出来后,可以在第一电极区209和第二电极区210分别制备第一金属电极214和第二金属电极215,并在调制器件结构的顶面以及裸露在外的部分外延碳化硅薄膜层204表面上制备第二器件保护层216,从而完成基于碳化硅的调制器件制备。Figure 2a is a schematic structural diagram of a high-quality silicon carbide substrate 201 provided by an embodiment of the present application. As shown in Figure 2a, when preparing a modulation device based on silicon carbide, it is first necessary to obtain a high-quality silicon carbide substrate 201. Silicon carbide epitaxial substrate. Figure 2b is a schematic structural diagram of a high-quality silicon carbide substrate 201 after ion implantation provided by an embodiment of the present application. As shown in Figure 2b, after obtaining a high-quality silicon carbide substrate 201, the high-quality silicon carbide substrate is The bottom 201 is ion implanted to form a defect layer 202 in the silicon carbide substrate. Optionally, the implanted ions are H ions and/or He ions, and the implanted surface may be a Si surface or a C surface. The ion implantation energy range is 20keV-2MeV, and the ion implantation dose is 1E15cm -2 -1E18cm -2 . Figure 2c is a schematic diagram of a structural change for surface treatment of a low-cost silicon carbide substrate 203 provided by an embodiment of the present application. As shown in Figure 2c, the low-cost silicon carbide substrate 203 is obtained as the third support substrate, and the The low-cost silicon carbide substrate 203 is surface-modified to achieve an ultra-flat shape. Figure 2d is a schematic structural diagram of a third bonding structure provided by an embodiment of the present application. As shown in Figure 2d, a third bonding structure can be obtained by bonding a high-quality silicon carbide substrate 201 with a low-cost silicon carbide substrate 203. Bonding structure. Figure 2e is a schematic structural diagram of a silicon carbide epitaxial substrate provided by an embodiment of the present application. As shown in Figure 2e, the third bonding structure is heated to promote the accumulation of implanted ions in the high-quality silicon carbide substrate 201. And micro-defects are formed, and then the micro-defects expand laterally, so that the high-quality silicon carbide substrate 201 in the third bonding structure can be separated along the implanted defect layer 202 to obtain a silicon carbide film bonded on the third support substrate. , and then process the surface of the silicon carbide film to obtain a silicon carbide epitaxial substrate. Then, an epitaxial silicon carbide film layer 204 is epitaxially grown on the surface of the silicon carbide epitaxial substrate. The thickness of the epitaxial silicon carbide film layer 204 is 500nm-1500nm. The doping type is N-type doping, and the doping concentration is 1E 13 /cm 3 - 1E 15 /cm 3 . Figure 2f is a schematic structural diagram of a heavily doped epitaxial silicon carbide thin film layer 204 provided by an embodiment of the present application. As shown in Figure 2f, a preset area in the epitaxial silicon carbide thin film layer 204 is heavily doped. , obtaining the heavily doped region 205. The doping type of the heavily doped region 205 is N-type doping, the doping concentration is 1E15/cm 3 -1E 17 /cm 3 , the length W of the preset region is 2.2μm-101μm, and the depth h1 of the doped region: 500nm- 1500nm. Figure 2g is a schematic structural diagram after etching the heavily doped region 205 provided by an embodiment of the present application. As shown in Figure 2g, the modulation device structure is obtained by etching the heavily doped region 205. The etching depth is 200nm-1300nm, and is less than or equal to the thickness of the heavily doped region 205 . The modulation device structure includes a first preset area 206, a second preset area 207 and a spacer area 208. Figure 2h is a schematic structural diagram after etching the heavily doped region 205 provided by an embodiment of the present application. As shown in Figure 2h, the first preset region 206 and the second preset region 207 are doped. The doping type of a preset region 206 is N-type doping, the doping concentration is 1E17/cm 3 -1E19/cm 3 , the region length of the first preset region 206 is 1 μm-50 μm, and the doping region depth h2 is 10 nm- 400nm. The doping type of the second preset region 207 is P-type doping, the doping concentration is 1E17/cm 3 -1E19/cm 3 , the region length of the first preset region 206 is 1 μm-50 μm, and the doping region depth h2 is 10 nm. -400nm. The first preset region 206 is regionally doped to obtain the first electrode region 209, the second predetermined region 207 is regionally doped to obtain the second electrode region 210, and then the first electrode region 209 and the second electrode region are 210 and spacer area 208 for activation processing. Figure 2i is a schematic structural diagram after preparing the first device protective layer 211 provided by the embodiment of the present application. As shown in Figure 2i, after the first electrode region 209, the second electrode region 210 and the spacer region 208 are activated , the first device protection layer 211 can be formed on the top surface of the modulation device structure and the surface of the exposed part of the epitaxial silicon carbide film layer 204 to protect the modulation device structure. Figure 2j is a schematic structural diagram of the first device protective layer 211 after planarization according to an embodiment of the present application. As shown in Figure 2j, after the first device protective layer 211 is formed on the surface of the modulation device structure, the first device protective layer 211 is processed by The first device protective layer 211 is planarized so that the surface roughness of the first device protective layer 211 is less than or equal to 0.2 nm. Figure 2k is a schematic structural diagram after bonding the first support substrate 212 provided by the embodiment of the present application. As shown in Figure 2k, after the first device protective layer 211 is prepared, the first support substrate 212 can be obtained, and then The first support substrate 212 and the first device protection layer 211 are bonded to obtain a first bonding structure. The first supporting substrate 212 is a silicon substrate, including a silicon layer and an oxide layer disposed on the silicon layer. Figure 2l is a schematic structural diagram after removing the silicon carbide epitaxial substrate provided by the embodiment of the present application. As shown in Figure 2l, the silicon carbide epitaxial substrate is removed by mechanical grinding, and the bottom surface of the modulation device structure is exposed. Figure 2m is a schematic structural diagram after bonding the second support substrate 213 provided by the embodiment of the present application. As shown in Figure 2m, after the silicon carbide epitaxial substrate is removed, the second support substrate 213 is obtained and The second supporting substrate 213 is bonded to the first surface to obtain a second bonding structure. The second supporting substrate 213 is a silicon substrate, including a silicon layer and an oxide layer disposed on the silicon layer. Figure 2n is a schematic structural diagram after removing the silicon layer in the first support substrate 212 provided by the embodiment of the present application. As shown in Figure 2n, the silicon layer in the silicon substrate is removed by deep silicon etching, thereby The oxide layer in the first support substrate 212 is exposed. Figure 2o is a schematic structural diagram after removing the first support substrate 212 and the first device protective layer 211 according to an embodiment of the present application. As shown in Figure 2o, wet etching can be used to remove the silicon substrate. oxide layer and the first device protection layer 211, thereby exposing the top surface of the modulation device structure. Figure 2p is a schematic structural diagram of a modulation device based on silicon carbide provided by an embodiment of the present application. As shown in Figure 2p, after the top surface of the modulation device structure is exposed, the first electrode region 209 and the first The first metal electrode 214 and the second metal electrode 215 are respectively prepared in the two electrode areas 210, and the second device protection layer 216 is prepared on the top surface of the modulation device structure and the surface of the exposed part of the epitaxial silicon carbide film layer 204, thereby completing the Modulation device preparation of silicon carbide.
本申请实施例提供的基于碳化硅的调制器件制备方法,通过对高质量碳化硅衬底201进行离子注入,在高质量碳化硅衬底201的特定深度形成缺陷层202。提供低成本碳化硅衬底203,实现高质量碳化硅衬底201与低成本碳化硅衬底203的键合。然后对高质量碳化硅剥离及后处理,得到碳化硅外延基底,并进一步在碳化硅外延基底上外延出外延碳化硅薄膜层204。然后在外延碳化硅薄膜层204中预设区域实现对外延碳化硅薄膜层204的重掺杂。接着在外延碳化硅薄膜层204的重掺杂区域205中刻蚀调制器件结构并进一步掺杂,并在调制器件结构表面沉积氧化硅层并平坦化处理。然后提供第一支撑衬底212,实现二次晶圆键合,并研磨键合结构中的碳化硅外延基底,仅保留调制器件层。接着提供第二支撑衬底213,实现三次晶圆键合。然后通过深硅刻蚀去除第一支撑衬底212中的硅层,进一步湿法去除第一支撑衬底212氧化层以及制备在调制器件结构表面的氧化硅层。在调制器件结构中的第一电极区209和第二电极区210制备金属电极,然后制备覆盖顶层的氧化硅层,完成器件结构制备。碳化硅由于其电光效应较弱,难以类似铌酸锂对光路系统进行电光调制,本申请实施例所述的制备方法利用多次掺杂的技术,通过载流子色散的方法,实现了碳化硅在集成光学中的高效光调制。而且,通过离子束技术,将碳化硅薄膜经异质键合转移至硅衬底上,在克服硅基制备碳化硅材料困难的基础上,降低碳化硅单片成本,进一步跟随产业界进展可拓展晶圆尺寸至8英寸,同时保证其和现有硅基集成电路相兼容的特性。The silicon carbide-based modulation device preparation method provided by the embodiment of the present application forms a defect layer 202 at a specific depth of the high-quality silicon carbide substrate 201 by performing ion implantation on the high-quality silicon carbide substrate 201 . A low-cost silicon carbide substrate 203 is provided to realize the bonding of the high-quality silicon carbide substrate 201 and the low-cost silicon carbide substrate 203. Then, high-quality silicon carbide is stripped and post-processed to obtain a silicon carbide epitaxial substrate, and an epitaxial silicon carbide film layer 204 is further epitaxially grown on the silicon carbide epitaxial substrate. Then, the epitaxial silicon carbide film layer 204 is heavily doped in a predetermined area in the epitaxial silicon carbide film layer 204 . Then, the modulation device structure is etched and further doped in the heavily doped region 205 of the epitaxial silicon carbide film layer 204, and a silicon oxide layer is deposited on the surface of the modulation device structure and is planarized. Then the first supporting substrate 212 is provided, secondary wafer bonding is achieved, and the silicon carbide epitaxial substrate in the bonding structure is ground, leaving only the modulation device layer. Then a second support substrate 213 is provided to achieve three wafer bondings. Then, the silicon layer in the first support substrate 212 is removed by deep silicon etching, and the oxide layer of the first support substrate 212 is further removed by wet method and a silicon oxide layer is prepared on the surface of the modulation device structure. Metal electrodes are prepared in the first electrode region 209 and the second electrode region 210 in the modulation device structure, and then a silicon oxide layer covering the top layer is prepared to complete the device structure preparation. Due to its weak electro-optical effect, silicon carbide is difficult to electro-optically modulate the optical path system like lithium niobate. The preparation method described in the embodiments of this application utilizes multiple doping technology and carrier dispersion method to achieve silicon carbide Efficient light modulation in integrated optics. Moreover, through ion beam technology, the silicon carbide film is transferred to the silicon substrate through heterogeneous bonding. On the basis of overcoming the difficulty of preparing silicon carbide materials based on silicon, the cost of a silicon carbide single piece is reduced, and further expansion can be achieved following the progress of the industry. The wafer size is up to 8 inches, while ensuring its compatibility with existing silicon-based integrated circuits.
本申请实施例还提供了一种基于碳化硅的调制器件,该调制器件为通过如上所述的基于碳化硅的调制器件制备方法制备得到。图3是本申请实施例提供的一种基于碳化硅的调制器件的结构示意图,如图3所示,该基于碳化硅的调制器件包括:第二支撑衬底213和外延碳化硅薄膜层204。第二支撑衬底213为硅衬底,包括硅层和设置在硅层上的氧化层。外延碳化硅薄膜层204设置在第二支撑衬底213的氧化层上。外延碳化硅薄膜层204中设置有重掺杂区域205,重掺杂区域205内设置有调制器件结构。Embodiments of the present application also provide a silicon carbide-based modulation device, which is prepared by the silicon carbide-based modulation device preparation method as described above. Figure 3 is a schematic structural diagram of a silicon carbide-based modulation device provided by an embodiment of the present application. As shown in Figure 3, the silicon carbide-based modulation device includes: a second support substrate 213 and an epitaxial silicon carbide film layer 204. The second supporting substrate 213 is a silicon substrate, including a silicon layer and an oxide layer disposed on the silicon layer. The epitaxial silicon carbide film layer 204 is disposed on the oxide layer of the second support substrate 213 . A heavily doped region 205 is provided in the epitaxial silicon carbide film layer 204, and a modulation device structure is provided in the heavily doped region 205.
本申请实施例中,调制器件结构包括第一电极区209、第二电极区210和间隔区域208,间隔区域208设置在第一电极区209与第二电极区210之间。第一电极区209内设置有第一金属电极214,第二电极区210内设置有第二金属电极215。调制器件结构上设置有第二器件保护层216,第一金属电极214和第二金属电极215裸露出第二器件保护层216的表面。In the embodiment of the present application, the modulation device structure includes a first electrode region 209, a second electrode region 210 and a spacing region 208. The spacing region 208 is disposed between the first electrode region 209 and the second electrode region 210. A first metal electrode 214 is provided in the first electrode area 209 , and a second metal electrode 215 is provided in the second electrode area 210 . A second device protection layer 216 is provided on the modulation device structure, and the first metal electrode 214 and the second metal electrode 215 expose the surface of the second device protection layer 216 .
本申请实施例提供的基于碳化硅的调制器件,基于载流子色散的机制,突破性地将其应用于碳化硅光子器件中,解决了碳化硅在集成光系统中的调制问题。该基于碳化硅的调制器件通过与硅衬底集成,易于和主流硅基微纳产品工艺流程兼容,推动了碳化硅薄膜材料在集成光子学器件领域的发展与应用。The silicon carbide-based modulation device provided in the embodiment of the present application is based on the mechanism of carrier dispersion and is applied to silicon carbide photonic devices in a breakthrough manner, solving the modulation problem of silicon carbide in integrated optical systems. By integrating with the silicon substrate, this silicon carbide-based modulation device is easily compatible with the mainstream silicon-based micro-nano product process flow, promoting the development and application of silicon carbide thin film materials in the field of integrated photonic devices.
需要说明的是:上述本申请实施例先后顺序仅仅为了描述,不代表实施例的优劣。且上述对本说明书特定实施例进行了描述。其它实施例在所附权利要求书的范围内。在一些情况下,在权利要求书中记载的动作或步骤可以按照不同于实施例中的顺序来执行并且仍然可以实现期望的结果。另外,在附图中描绘的过程不一定要求示出的特定顺序或者连续顺序才能实现期望的结果。在某些实施方式中,多任务处理和并行处理也是可以的或者可能是有利的。It should be noted that the above-mentioned order of the embodiments of the present application is only for description and does not represent the advantages and disadvantages of the embodiments. Specific embodiments of this specification have been described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve desired results. Additionally, the processes depicted in the figures do not necessarily require the specific order shown, or sequential order, to achieve desirable results. Multitasking and parallel processing are also possible or may be advantageous in certain implementations.
本说明书中的各个实施例均采用递进的方式描述,各个实施例之间相同相似的部分互相参见即可,每个实施例重点说明的都是与其他实施例的不同之处。尤其,对于设备实施例而言,由于其基本相似于方法实施例,所以描述的比较简单,相关之处参见方法实施例的部分说明即可。Each embodiment in this specification is described in a progressive manner. The same and similar parts between the various embodiments can be referred to each other. Each embodiment focuses on its differences from other embodiments. In particular, for the equipment embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For relevant details, please refer to the partial description of the method embodiment.
本领域普通技术人员可以理解实现上述实施例的全部或部分步骤可以通过硬件来完成,也可以通过程序来指令相关的硬件完成,所述的程序可以存储于一种计算机可读存储介质中,上述提到的存储介质可以是只读存储器,磁盘或光盘等。Those of ordinary skill in the art can understand that all or part of the steps to implement the above embodiments can be completed by hardware, or can be completed by instructing relevant hardware through a program. The program can be stored in a computer-readable storage medium. The above-mentioned The storage media mentioned can be read-only memory, magnetic disks or optical disks, etc.
以上所述仅为本申请的较佳实施例,并不用以限制本申请,凡在本申请的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本申请的保护范围之内。The above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection of the present application. within the range.
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