CN116827741A - FPGA implementation method for time-frequency synchronization of multipath parallel transmission millimeter wave OFDM communication system - Google Patents
FPGA implementation method for time-frequency synchronization of multipath parallel transmission millimeter wave OFDM communication system Download PDFInfo
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Abstract
本发明公开了一种多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法,依据传输信号物理层帧结构及FPGA实现时基带并行传输路数,在时域生成具有特定结构的训练序列;利用延时自相关方法对基带多路并行接收信号进行相关运算,通过流式经验阈值比较的方法找到粗定时同步位置;利用自相关结果携带的角度信息实现系统的频偏估计计算;将本地缓存序列与接收信号序列进行相关运算,得到精定时同步位置;将粗同步与精同步结果相加得到最终系统符号定时同步结果位置索引,输出符号定时同步后的数据序列;同时产生对应的复指数信号对定时同步后的序列进行频偏补偿操作,完成系统同步任务。本发明能够提升系统同步准确性,降低硬件实现时间成本及复杂度。
The invention discloses an FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter wave OFDM communication system. Based on the physical layer frame structure of the transmission signal and the number of baseband parallel transmission channels during FPGA implementation, a training sequence with a specific structure is generated in the time domain. ;Use the delay autocorrelation method to perform correlation operations on baseband multi-channel parallel received signals, and find the rough timing synchronization position through the streaming empirical threshold comparison method; use the angle information carried by the autocorrelation results to realize the frequency offset estimation calculation of the system; convert the local The cache sequence is correlated with the received signal sequence to obtain the precise timing synchronization position; the coarse synchronization and fine synchronization results are added to obtain the final system symbol timing synchronization result position index, and the data sequence after symbol timing synchronization is output; at the same time, the corresponding complex index is generated The signal performs frequency offset compensation operation on the sequence after timing synchronization to complete the system synchronization task. The invention can improve system synchronization accuracy and reduce hardware implementation time cost and complexity.
Description
技术领域Technical field
本发明属于通信技术领域,具体涉及一种多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法。The invention belongs to the field of communication technology, and specifically relates to an FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter wave OFDM communication system.
背景技术Background technique
毫米波频段蕴藏丰富且免授权的频谱资源,使得毫米波通信技术逐渐成为无线通信领域的热门研究方向。但在另一方面,毫米波信号固有的高衰减传播特性将其主要应用局限于室内通信场景,而且高频段宽频谱带来的显著频率偏移与超高的符号速率也使得毫米波通信系统的实现面临艰巨的挑战。The millimeter wave frequency band contains abundant and license-free spectrum resources, making millimeter wave communication technology gradually become a popular research direction in the field of wireless communications. But on the other hand, the inherent high-attenuation propagation characteristics of millimeter wave signals limit its main application to indoor communication scenarios, and the significant frequency offset and ultra-high symbol rate brought by high-band wide spectrum also make millimeter-wave communication systems Implementation faces daunting challenges.
同步是在两个设备或系统之间规定一个共同的时间参考,使得在通信的收、发双方无法使用同一时钟源的场景下,能够保证它们能够步调一致地协调工作。尤其对于毫米波OFDM通信系统的接收机而言,同步是模拟信号转换为数字信号之后所进行基带处理的第一个环节,也是进行数据正确传输的关键,其性能直接决定了通信的质量,因此在任何场景下能够进行稳定、可靠、准确的同步对整个通信系统的可靠运行至关重要。毫米波OFDM系统中的同步技术包括:符号定时同步与载波频率同步。定时同步主要是为了找出OFDM符号帧的起始位置,以及确定FFT操作的起始边界以便进行解调操作。精确的定时同步在OFDM系统中意味着精确的码元同步,在得到OFDM符号数据帧的准确起始位置后,再通过已知循环前缀的时间,做出相应的延迟后,就能为FFT计算提供准确数据样点的位置。定时同步技术,其实现形式与其所在通信系统的传输模式有很大关联。一般而言,通信系统的传输模式共有两种,连续传输模式与突发分组传输模式。传统的语音移动通信系统采用的便是典型的连续传输模式,在这种系统中,可以利用周期发送的导频序列进行同步,由于数据传输时会遵循严格的节拍,因此可以利用当前以及过往的信息不断对同步结果进行调整,在一定程度上可以提高同步过程的精确度。而例如像Wi-Fi这类采用突发分组传输模式的通信系统,数据帧的起始时刻完全随机,无法利用过往的同步信息,因此需要实时进行定时同步。在这种模式下,一般采用在帧头位置加入训练序列的方法来进行同步。Synchronization is to specify a common time reference between two devices or systems, so that in scenarios where the receiver and sender of communication cannot use the same clock source, they can ensure that they can work in unison. Especially for the receiver of the millimeter wave OFDM communication system, synchronization is the first step in baseband processing after the analog signal is converted into a digital signal, and it is also the key to correct data transmission. Its performance directly determines the quality of the communication, so Stable, reliable, and accurate synchronization in any scenario is crucial to the reliable operation of the entire communication system. Synchronization technologies in millimeter wave OFDM systems include: symbol timing synchronization and carrier frequency synchronization. Timing synchronization is mainly to find the starting position of the OFDM symbol frame and determine the starting boundary of the FFT operation for demodulation operations. Precise timing synchronization means precise symbol synchronization in the OFDM system. After obtaining the accurate starting position of the OFDM symbol data frame, and then making the corresponding delay through the known cyclic prefix time, the FFT can be calculated Provides accurate data sample location. The implementation form of timing synchronization technology is closely related to the transmission mode of the communication system in which it is located. Generally speaking, there are two transmission modes in communication systems, continuous transmission mode and burst packet transmission mode. Traditional voice mobile communication systems use a typical continuous transmission mode. In this system, pilot sequences sent periodically can be used for synchronization. Since data transmission follows a strict beat, current and past data can be used. The information continuously adjusts the synchronization results, which can improve the accuracy of the synchronization process to a certain extent. For communication systems such as Wi-Fi that use burst packet transmission mode, the starting time of the data frame is completely random, and past synchronization information cannot be used, so real-time timing synchronization is required. In this mode, the method of adding a training sequence at the frame header position is generally used for synchronization.
载波频率同步是指通过频率偏差的估计与校正操作,能够使系统接收机的射频中心频率与发射端的射频中心频率保持一致。载波频率偏移首先会使得各个子载波之间的正交性被破坏,对于OFDM信号产生的影响主要体现为子载波间的串扰,并且会造成星座图的旋转。如果频率偏移较小,它产生的子载波间串扰不会十分明显,直接的体现主要是星座图的旋转;而如果频率偏移较大,其产生的子载波间串扰将导致解映射的失败。Carrier frequency synchronization refers to the ability to keep the RF center frequency of the system receiver consistent with the RF center frequency of the transmitter through the estimation and correction of frequency deviations. Carrier frequency offset will first destroy the orthogonality between each sub-carrier. The impact on OFDM signals is mainly reflected in the crosstalk between sub-carriers, and will cause the rotation of the constellation diagram. If the frequency offset is small, the inter-subcarrier crosstalk it generates will not be very obvious, and the direct manifestation is mainly the rotation of the constellation diagram; if the frequency offset is large, the inter-subcarrier crosstalk it generates will lead to the failure of demapping. .
目前常见的同步算法一般分为三类:适用于假设传输帧内无已知数据的场景的盲同步算法、基于循环前缀以及基于训练序列的同步算法。其中,盲同步是指在不借助特定序列以及帧结构的情况下,通过传输信号的能量或者统计信息进行的同步过程。基于循环前缀的最大似然算法不需要额外的数据开销且算法复杂度较低,但在复杂信道条件下同步性能较差。基于训练序列的同步算法还包括有互相关算法与延时自相关算法。传统的数据辅助型同步算法虽有较大的工作信噪比范围,但在符号定时精度、算法复杂度、频偏估计精度和频偏估计范围等方面无法兼顾,同时其序列相关特性也无法在多路并行传输时得到良好的体现,因此设计适用于大带宽场景下多路并行传输的同步序列的设计与同步算法的研究很有意义。Currently, common synchronization algorithms are generally divided into three categories: blind synchronization algorithms suitable for scenarios where there is no known data in the transmission frame, synchronization algorithms based on cyclic prefix and training sequence. Among them, blind synchronization refers to a synchronization process performed by transmitting signal energy or statistical information without resorting to specific sequences and frame structures. The maximum likelihood algorithm based on cyclic prefix does not require additional data overhead and has low algorithm complexity, but has poor synchronization performance under complex channel conditions. Synchronization algorithms based on training sequences also include cross-correlation algorithms and delayed autocorrelation algorithms. Although the traditional data-assisted synchronization algorithm has a large operating signal-to-noise ratio range, it cannot take into account symbol timing accuracy, algorithm complexity, frequency offset estimation accuracy and frequency offset estimation range. At the same time, its sequence correlation characteristics cannot be used in It is well reflected in multi-channel parallel transmission, so it is very meaningful to design a synchronization sequence and research on synchronization algorithm suitable for multi-channel parallel transmission in large bandwidth scenarios.
而在使用FPGA对OFDM系统进行硬件实现方面,虽然国内外专家学者也进行了较为完善的实验并有大量成果发表,但是就OFDM同步技术在毫米波频段大带宽多路并行传输同步实现的研究还少有详细分析,OFDM毫米波通信系统同步技术在同步算法的设计、FPGA实现过程中资源优化、模块化实现等方面还存在一定的提升空间。In terms of hardware implementation of OFDM systems using FPGAs, although domestic and foreign experts and scholars have also conducted relatively complete experiments and published a large number of results, research on the synchronization of OFDM synchronization technology in large bandwidth multi-channel parallel transmission in the millimeter wave band has not yet been carried out. There is little detailed analysis. OFDM millimeter wave communication system synchronization technology still has some room for improvement in terms of synchronization algorithm design, resource optimization during FPGA implementation, and modular implementation.
发明内容Contents of the invention
本发明所要解决的技术问题在于针对上述现有技术中的不足,提供一种多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法,用于解决现有未考虑信号大带宽特性,具有运算时延高及硬件资源消耗大的技术问题,提升系统同步准确性,降低硬件实现时间成本及复杂度。The technical problem to be solved by the present invention is to provide an FPGA implementation method for time-frequency synchronization of multi-channel parallel transmission millimeter wave OFDM communication system in order to solve the problem that the large bandwidth characteristics of the signal are not considered in the existing technology. The technical problems of high computing latency and large hardware resource consumption improve system synchronization accuracy and reduce hardware implementation time cost and complexity.
本发明采用以下技术方案:The present invention adopts the following technical solutions:
多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法,包括以下步骤:The FPGA implementation method of time-frequency synchronization of multi-channel parallel transmission millimeter wave OFDM communication system includes the following steps:
S1、依据传输信号物理层帧结构,以及具体FPGA实现时基带并行传输路数Npath,在时域生成具有特定结构的训练序列信号矩阵X;S1. Based on the physical layer frame structure of the transmission signal and the number of baseband parallel transmission paths N path in specific FPGA implementation, a training sequence signal matrix X with a specific structure is generated in the time domain;
S2、利用步骤S1得到的训练序列信号矩阵X的结构特性,采用延时自相关的方法对基带多路并行接收信号进行运算,再对结果进行累加操作,通过流式经验阈值比较方法找到粗定时同步位置syn_coarse;S2. Utilize the structural characteristics of the training sequence signal matrix Synchronization position syn_coarse;
S3、基于步骤S2得到的粗定时同步位置syn_coarse,利用自相关结果携带的角度信息实现毫米波OFDM通信系统的频偏估计实际值cfo_est;S3. Based on the rough timing synchronization position syn_coarse obtained in step S2, use the angle information carried by the autocorrelation result. Realize the frequency offset estimation actual value cfo_est of the millimeter wave OFDM communication system;
S4、基于步骤S2得到的粗定时同步位置syn_coarse,利用互相关算法将预先存储在接收机本地的本地缓存序列与接收信号序列进行运算,得到精定时同步位置syn_precious;S4. Based on the coarse timing synchronization position syn_coarse obtained in step S2, use the cross-correlation algorithm to calculate the local buffer sequence pre-stored locally in the receiver and the received signal sequence to obtain the precise timing synchronization position syn_precious;
S5、将步骤S2得到的粗定时同步位置syn_coarse与步骤S4得到的精定时同步位置syn_precious相加,得到最终系统符号定时同步结果位置索引,依据位置索引输出符号定时同步后的数据序列,同时根据步骤S3得到的频偏估计实际值cfo_est产生对应的复指数信号,对定时同步后的序列进行频偏补偿操作,最终完成系统同步任务。S5. Add the coarse timing synchronization position syn_coarse obtained in step S2 and the fine timing synchronization position syn_precious obtained in step S4 to obtain the final system symbol timing synchronization result position index. According to the position index, the data sequence after symbol timing synchronization is output, and at the same time, according to the step The actual frequency offset estimate cfo_est obtained by S3 generates a corresponding complex exponential signal, and the frequency offset compensation operation is performed on the sequence after timing synchronization, and finally the system synchronization task is completed.
具体的,步骤S1中,训练序列信号矩阵X为:Specifically, in step S1, the training sequence signal matrix X is:
其中,T为转置计算,CM×N为M×N维元素为复数的矩阵,MT_CP为时域CP部分,MT_data为时域数据部分,Nsamp为训练序列时域采样点数,Npath为并行路径数。Among them, T is the transposition calculation, C M×N is a matrix with M×N dimensional elements as complex numbers, M T_CP is the time domain CP part, M T_data is the time domain data part, N samp is the number of time domain sampling points of the training sequence, N path is the number of parallel paths.
进一步的,训练序列的具体构造方式如下:Further, the specific construction method of the training sequence is as follows:
其中,表示矩阵的克罗内克积符号,A=[1,1],R为恒幅值随机序列,SZC_1、SZC_2分别为Ncfft与/>点的ZC伪随机序列。in, Represents the Kronecker product symbol of the matrix, A=[1,1], R is a constant amplitude random sequence, S ZC_1 and S ZC_2 are N cfft and /> respectively. ZC pseudo-random sequence of points.
具体的,步骤S2中,粗定时同步位置syn_coarse为:Specifically, in step S2, the rough timing synchronization position syn_coarse is:
其中,Pavg[k]为平滑滤波后粗同步序列结果,Padv为对应训练序列的已知经验阈值,k为粗同步序列结果的序号。Among them, P avg [k] is the smoothed filtered coarse synchronization sequence result, P adv is the known empirical threshold corresponding to the training sequence, and k is the sequence number of the coarse synchronization sequence result.
进一步的,平滑滤波后粗同步序列结果Pavg[k]为:Furthermore, the rough synchronization sequence result P avg [k] after smoothing and filtering is:
其中,Lavg为平滑滤波窗口长度。Among them, L avg is the smoothing filter window length.
具体的,步骤S3中,频偏估计实际值cfo_est为:Specifically, in step S3, the actual frequency offset estimate cfo_est is:
其中,为自相关结果携带的角度信息,Nsub为子载波数,fsamp为系统采样频率。in, is the angle information carried by the autocorrelation result, N sub is the number of subcarriers, and f samp is the system sampling frequency.
具体的,步骤S4中,采用粗同步定时位置左右点与本地Ncfft点缓存序列patten_c进行互相关运算,互相关结果采用先对两段序列进行Ncfft点FFT操作、再对结果进行Ncfft点的IFFT操作,互相关产生一个类似脉冲的尖峰,尖峰对应的位置即为精定时同步位置syn_precious。Specifically, in step S4, the coarse synchronization timing position around The points are cross-correlated with the local N cfft point cache sequence pattern_c. The cross-correlation result is performed by first performing an N cfft point FFT operation on the two sequences, and then performing an N cfft point IFFT operation on the result. The cross-correlation generates a pulse-like spike. The position corresponding to the peak is the precise timing synchronization position syn_precious.
进一步的,精定时同步位置syn_precious为:Further, the precise timing synchronization position syn_precious is:
其中,Pcor为互相关运算后精同步序列结果,k为精同步序列结果的序号。Among them, P cor is the precise synchronization sequence result after the cross-correlation operation, and k is the sequence number of the precise synchronization sequence result.
更进一步的,Pcor为:Furthermore, P cor is:
其中,Ncfft为傅里叶变换样点点数,fft为快速傅里叶变换操作,xn为接收机接收信号的时域序列,syn_coarse为粗同步定位位置,patten_c为接收机预先缓存的Ncfft点缓存序列。Among them, N cfft is the number of Fourier transform sample points, fft is the fast Fourier transform operation, xn is the time domain sequence of the signal received by the receiver, syn_coarse is the coarse synchronization positioning position, and pattern_c is the N cfft points pre-buffered by the receiver. Cache sequence.
第二方面,本发明实施例提供了一种多路并行传输毫米波OFDM通信系统时频同步的FPGA实现系统,包括:In the second aspect, embodiments of the present invention provide an FPGA implementation system for time-frequency synchronization of a multi-channel parallel transmission millimeter wave OFDM communication system, including:
矩阵模块,依据传输信号物理层帧结构,以及具体FPGA实现时基带并行传输路数Npath,在时域生成具有特定结构的训练序列信号矩阵X;The matrix module generates a training sequence signal matrix X with a specific structure in the time domain based on the physical layer frame structure of the transmission signal and the number of baseband parallel transmission paths N path during specific FPGA implementation;
累加模块,利用矩阵模块得到的训练序列信号矩阵X的结构特性,采用延时自相关的方法对基带多路并行接收信号进行运算,再对结果进行累加操作,通过流式经验阈值比较方法找到粗定时同步位置syn_coarse;The accumulation module uses the structural characteristics of the training sequence signal matrix Timing synchronization position syn_coarse;
估计模块,基于累加模块得到的粗定时同步位置syn_coarse,利用自相关结果携带的角度信息实现毫米波OFDM通信系统的频偏估计实际值cfo_est;The estimation module, based on the rough timing synchronization position syn_coarse obtained by the accumulation module, uses the angle information carried by the autocorrelation result Realize the frequency offset estimation actual value cfo_est of the millimeter wave OFDM communication system;
运算模块,基于累加模块得到的粗定时同步位置syn_coarse,利用互相关算法将预先存储在接收机本地的本地缓存序列与接收信号序列进行运算,得到精定时同步位置syn_precious;The operation module, based on the coarse timing synchronization position syn_coarse obtained by the accumulation module, uses the cross-correlation algorithm to calculate the local buffer sequence pre-stored locally in the receiver and the received signal sequence to obtain the precise timing synchronization position syn_precious;
输出模块,将步累加模块得到的粗定时同步位置syn_coarse与运算模块得到的精定时同步位置syn_precious相加,得到最终系统符号定时同步结果位置索引,依据位置索引输出符号定时同步后的数据序列,同时根据估计模块得到的频偏估计实际值cfo_est产生对应的复指数信号,对定时同步后的序列进行频偏补偿操作,最终完成系统同步任务。The output module adds the coarse timing synchronization position syn_coarse obtained by the step accumulation module and the fine timing synchronization position syn_precious obtained by the operation module to obtain the final system symbol timing synchronization result position index, and outputs the data sequence after symbol timing synchronization based on the position index. At the same time According to the actual frequency offset estimate cfo_est obtained by the estimation module, the corresponding complex exponential signal is generated, and the frequency offset compensation operation is performed on the sequence after timing synchronization, and finally the system synchronization task is completed.
与现有技术相比,本发明至少具有以下有益效果:Compared with the prior art, the present invention at least has the following beneficial effects:
多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法,在发射端依据传输信号物理层帧结构,以及具体FPGA实现时基带并行传输路数生成具有特定结构的训练序列信号,充分利用了具体通信场景的传输信号特点,提升了同步算法的高效性。接收端首先采用时间成本和计算复杂度较低的延时自相关算法进行粗定时同步并采用阈值比较的方法确定粗同步位置,根据粗同步序列结果携带的角度信息顺势得到频偏估计值,再根据实际情况判断是否进行精同步以提升同步准确性。因此本方法能够在更高的同步精度与更低的时间及硬件消耗成本之间做到良好的取舍。The FPGA implementation method of time-frequency synchronization of multi-channel parallel transmission millimeter-wave OFDM communication system generates a training sequence signal with a specific structure based on the physical layer frame structure of the transmission signal and the number of baseband parallel transmission channels during specific FPGA implementation, making full use of The transmission signal characteristics of specific communication scenarios improve the efficiency of the synchronization algorithm. The receiving end first uses a delay autocorrelation algorithm with low time cost and computational complexity to perform coarse timing synchronization and uses a threshold comparison method to determine the coarse synchronization position. Based on the angle information carried by the coarse synchronization sequence result, the frequency offset estimate is obtained, and then Determine whether to perform fine synchronization based on actual conditions to improve synchronization accuracy. Therefore, this method can achieve a good trade-off between higher synchronization accuracy and lower time and hardware consumption costs.
进一步的,构造训练序列信号矩阵X,序列采用多路并行的设计,充分考虑了对于FPGA芯片来说,其时钟频率一般为150--200M左右,而根据奈奎斯特采样定理,需要采用多块FPGA并行工作以达到大带宽的传输需求。Furthermore, the training sequence signal matrix Block FPGAs work in parallel to meet large bandwidth transmission requirements.
进一步的,所提出的用于同步的训练序列具有前后高度一致的结构,在粗同步自相关运算时会产生缓变的梯形相关结果,而采用的ZC序列时频域均具有恒幅值特性,能良好匹配所设计的精同步互相关算法,产生尖锐的互相关峰值。Furthermore, the proposed training sequence for synchronization has a highly consistent structure, and will produce a slowly changing trapezoidal correlation result during the coarse synchronization autocorrelation operation, and the ZC sequence used has constant amplitude characteristics in both the time and frequency domains. It can well match the designed precise synchronization cross-correlation algorithm and produce sharp cross-correlation peaks.
进一步的,采用延时自相关的方法对基带多路并行接收信号进行相关运算,其次对相关结果进行累加操作,最后通过流式经验阈值比较的方法找到粗定时同步位置syn_coarse,充分利用了发射端设计的训练序列特性,且具有较低的硬件实现成本及计算时间。Furthermore, the delayed autocorrelation method is used to perform correlation operations on the baseband multi-channel parallel received signals, and then the correlation results are accumulated. Finally, the rough timing synchronization position syn_coarse is found through the streaming experience threshold comparison method, making full use of the transmitter. The designed training sequence characteristics, and has lower hardware implementation cost and calculation time.
进一步的,对延时自相关结果进行窗口长度为Lavg的平滑滤波操作,可以有效降低接收信号毛刺等不确定型因素的影响。Furthermore, a smoothing filtering operation with a window length of L avg is performed on the delayed autocorrelation results, which can effectively reduce the influence of uncertain factors such as received signal burrs.
进一步的,频偏估计实际值cfo_est可直接由自相关结果携带的角度信息获得,FPGA实现只需额外使用一个用于计算角度的Cordic IP核,大大降低了硬件资源消耗。Furthermore, the actual frequency offset estimate cfo_est can be directly carried by the angle information carried by the autocorrelation result. Obtained, FPGA implementation only needs to use an additional Cordic IP core for angle calculation, which greatly reduces hardware resource consumption.
进一步的,采用粗同步定时位置左右点与本地Ncfft点缓存序列patten_c进行互相关运算,互相关结果采用先对两段序列进行Ncfft点FFT操作、再对结果进行Ncfft点的IFFT操作,互相关产生一个类似脉冲的尖峰,尖峰对应的位置即为精定时同步位置syn_precious,由于互相关会产生尖锐的相关峰,因此精同步步骤的加入可以作为粗同步步骤的补充,提升定时同步的准确性。Further, coarse synchronization is used to determine the timing position of the left and right The points are cross-correlated with the local N cfft point cache sequence pattern_c. The cross-correlation result is performed by first performing an N cfft point FFT operation on the two sequences, and then performing an N cfft point IFFT operation on the result. The cross-correlation generates a pulse-like spike. The position corresponding to the sharp peak is the fine timing synchronization position syn_precious. Since cross-correlation will produce sharp correlation peaks, the addition of the fine synchronization step can be used as a supplement to the coarse synchronization step to improve the accuracy of timing synchronization.
进一步的,精定时同步位置syn_precious可作为粗定时同步位置的选择性补充,在实际环境信道状态良好(信噪比较高)的情况下可只进行粗同步而不进行精同步以节约时间与硬件消耗;在信道环境较差(信噪比较低)的情况下可使用精同步提升定时同步准确性。Furthermore, the precise timing synchronization position syn_precious can be used as a selective supplement to the coarse timing synchronization position. When the actual environmental channel status is good (the signal-to-noise ratio is high), only coarse synchronization can be performed instead of fine synchronization to save time and hardware. consumption; when the channel environment is poor (low signal-to-noise ratio), fine synchronization can be used to improve timing synchronization accuracy.
进一步的,对接收Ncfft点序列和本地点Ncfft缓存序列先分别做FFT(快速傅里叶变换),再对共轭相乘后的结果序列进行Ncfft点的IFFT(快速傅里叶反变换)操作,本质上相当于对两端序列进行互相关(滑动相关)运算,与传统的滑动相关相比可以大幅减少计算时间以及FPGA硬件资源(尤其是复数乘法器)的用量。Further, perform FFT (Fast Fourier Transform) on the received N cfft point sequence and local point N cfft buffer sequence respectively, and then perform N cfft point IFFT (Inverse Fast Fourier Transform) on the result sequence after conjugate multiplication. Transform) operation is essentially equivalent to performing a cross-correlation (sliding correlation) operation on both ends of the sequence. Compared with traditional sliding correlation, it can significantly reduce the calculation time and the usage of FPGA hardware resources (especially complex multipliers).
可以理解的是,上述第二方面的有益效果可以参见上述第一方面中的相关描述,在此不再赘述。It can be understood that the beneficial effects of the above-mentioned second aspect can be referred to the relevant descriptions in the above-mentioned first aspect, and will not be described again here.
综上所述,本发明设计了适合于大带宽多路并行传输的训练序列,并在此基础上提出了同信噪比下相比经典算法同步准确率更高的同步算法,同时降低了硬件实现的运算时间以及硬件复杂度。In summary, the present invention designs a training sequence suitable for large-bandwidth multi-channel parallel transmission, and on this basis proposes a synchronization algorithm with higher synchronization accuracy than the classic algorithm under the same signal-to-noise ratio, while reducing the hardware cost. Implementation time and hardware complexity.
下面通过附图和实施例,对本发明的技术方案做进一步的详细描述。The technical solution of the present invention will be further described in detail below through the accompanying drawings and examples.
附图说明Description of the drawings
图1为本发明方法所应用的毫米波OFDM通信系统示意图;Figure 1 is a schematic diagram of a millimeter wave OFDM communication system applied by the method of the present invention;
图2为所提方案实现模块流程图;Figure 2 is the flow chart of the implementation module of the proposed solution;
图3为在拟定传输场景下系统帧结构设计结构图;Figure 3 is a structural diagram of the system frame structure design in the proposed transmission scenario;
图4为在拟定传输场景及帧结构设计下同步序列设计结构图;Figure 4 is a synchronization sequence design structure diagram under the proposed transmission scenario and frame structure design;
图5为拟定实验条件下粗同步及平滑滤波结果的仿真图;Figure 5 is a simulation diagram of the coarse synchronization and smoothing filtering results under the proposed experimental conditions;
图6为拟定实验条件下1000次实验频偏估计值与标准值均方误差;Figure 6 shows the frequency offset estimation value and standard value mean square error of 1000 experiments under the proposed experimental conditions;
图7为拟定实验条件下精同步互相关结果的仿真图;Figure 7 is a simulation diagram of the precise synchronization cross-correlation results under the proposed experimental conditions;
图8为拟定实验条件下1000次实验定时同步正确概率;Figure 8 shows the probability of correct timing synchronization for 1,000 experiments under the proposed experimental conditions;
图9为拟定实验条件下硬件平台对所提时频同步算法的仿真结果。Figure 9 shows the simulation results of the proposed time-frequency synchronization algorithm on the hardware platform under the proposed experimental conditions.
具体实施方式Detailed ways
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.
在本发明的描述中,需要理解的是,术语“包括”和“包含”指示所描述特征、整体、步骤、操作、元素和/或组件的存在,但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。In the description of the present invention, it is to be understood that the terms "comprising" and "including" indicate the presence of described features, integers, steps, operations, elements and/or components, but do not exclude one or more other features, The existence or addition of an integer, a step, an operation, an element, a component, and/or a collection thereof.
还应当理解,在本发明说明书中所使用的术语仅仅是出于描述特定实施例的目的而并不意在限制本发明。如在本发明说明书和所附权利要求书中所使用的那样,除非上下文清楚地指明其它情况,否则单数形式的“一”、“一个”及“该”意在包括复数形式。It should also be understood that the terminology used in the description of the present invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this specification and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly dictates otherwise.
还应当进一步理解,在本发明说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合,并且包括这些组合,例如,A和/或B,可以表示:单独存在A,同时存在A和B,单独存在B这三种情况。另外,本发明中字符“/”,一般表示前后关联对象是一种“或”的关系。It will be further understood that the term "and/or" as used in the specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items. , for example, A and/or B can mean: A alone exists, A and B exist simultaneously, and B exists alone. In addition, the character "/" in the present invention generally indicates that the related objects are in an "or" relationship.
应当理解,尽管在本发明实施例中可能采用术语第一、第二、第三等来描述预设范围等,但这些预设范围不应限于这些术语。这些术语仅用来将预设范围彼此区分开。例如,在不脱离本发明实施例范围的情况下,第一预设范围也可以被称为第二预设范围,类似地,第二预设范围也可以被称为第一预设范围。It should be understood that although the terms first, second, third, etc. may be used to describe the preset ranges and the like in embodiments of the present invention, these preset ranges should not be limited to these terms. These terms are only used to distinguish preset ranges from each other. For example, without departing from the scope of the embodiments of the present invention, the first preset range may also be called a second preset range, and similarly, the second preset range may also be called a first preset range.
取决于语境,如在此所使用的词语“如果”可以被解释成为“在……时”或“当……时”或“响应于确定”或“响应于检测”。类似地,取决于语境,短语“如果确定”或“如果检测(陈述的条件或事件)”可以被解释成为“当确定时”或“响应于确定”或“当检测(陈述的条件或事件)时”或“响应于检测(陈述的条件或事件)”。Depending on the context, the word "if" as used herein may be interpreted as "when" or "when" or "in response to determination" or "in response to detection." Similarly, depending on the context, the phrase "if determined" or "if (stated condition or event) is detected" may be interpreted as "when determined" or "in response to determining" or "when (stated condition or event) is detected )" or "in response to detecting (a stated condition or event)".
在附图中示出了根据本发明公开实施例的各种结构示意图。这些图并非是按比例绘制的,其中为了清楚表达的目的,放大了某些细节,并且可能省略了某些细节。图中所示出的各种区域、层的形状及它们之间的相对大小、位置关系仅是示例性的,实际中可能由于制造公差或技术限制而有所偏差,并且本领域技术人员根据实际所需可以另外设计具有不同形状、大小、相对位置的区域/层。Various structural schematic diagrams according to disclosed embodiments of the present invention are shown in the accompanying drawings. The drawings are not drawn to scale, with certain details exaggerated and may have been omitted for purposes of clarity. The shapes of the various regions and layers shown in the figures and the relative sizes and positional relationships between them are only exemplary. In practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art will base their judgment on actual situations. Additional regions/layers with different shapes, sizes, and relative positions can be designed as needed.
本发明提供了一种多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法,首先在发射端依据传输信号物理层帧结构(包括)及具体FPGA实现时基带并行传输路数Npath在时域生成具有特定结构的训练序列X;信号经信道传输后在接收端首先利用延时自相关的方法,对基带多路并行接收信号进行相关运算,其次对相关结果进行累加操作,最后通过流式经验阈值比较的方法找到粗定时同步位置syn_coarse;而在得到粗定时同步位置时,利用自相关结果所携带的角度信息实现系统的频偏估计计算cfo_est;接下来在已获得粗定时同步位置的基础上,将本地缓存序列与接收信号序列进行相关运算,得到精定时同步位置syn_precious;最后将粗同步与精同步结果相加得到最终系统符号定时同步结果位置索引,依据该位置索引输出符号定时同步后的数据序列。同时根据频偏估计结果,产生对应的复指数信号对定时同步后的序列进行频偏补偿操作,最终完成系统同步任务。本发明能够结合大带宽高采样速率的特点生成改进的同步序列,使用粗细两级同步的方法提升定时同步及频偏估计的准确性,同时在硬件实现上具备更低的资源利用率、算法复杂度及计算时间成本。The present invention provides an FPGA implementation method for time-frequency synchronization of multi-channel parallel transmission millimeter wave OFDM communication system. First, at the transmitting end, the number of baseband parallel transmission paths N path is based on the transmission signal physical layer frame structure (including) and the specific FPGA implementation. A training sequence The rough timing synchronization position syn_coarse is found by using the empirical threshold comparison method; and when obtaining the rough timing synchronization position, the angle information carried by the autocorrelation result is used Realize the frequency offset estimation and calculation of the system cfo_est; then, on the basis of obtaining the coarse timing synchronization position, perform a correlation operation between the local cache sequence and the received signal sequence to obtain the fine timing synchronization position syn_precious; finally, compare the coarse synchronization and fine synchronization results. The position index of the final system symbol timing synchronization result is added, and the data sequence after symbol timing synchronization is output according to the position index. At the same time, according to the frequency offset estimation result, the corresponding complex exponential signal is generated to perform frequency offset compensation operation on the sequence after timing synchronization, and finally completes the system synchronization task. The present invention can combine the characteristics of large bandwidth and high sampling rate to generate an improved synchronization sequence, and uses a coarse and fine two-level synchronization method to improve the accuracy of timing synchronization and frequency offset estimation. At the same time, it has lower resource utilization and complex algorithms in hardware implementation. degree and calculation time cost.
请参阅图1和图2,本发明一种多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法,包括以下步骤:Please refer to Figures 1 and 2. An FPGA implementation method for time-frequency synchronization of a multi-channel parallel transmission millimeter wave OFDM communication system according to the present invention includes the following steps:
S1、发送端依据传输信号物理层帧结构(包括)及具体FPGA实现时基带并行传输路数Npath在时域生成具有特定结构的训练序列X;S1. The transmitter generates a training sequence X with a specific structure in the time domain based on the physical layer frame structure of the transmission signal (including) and the number of baseband parallel transmission paths N path in specific FPGA implementation;
由于毫米波系统大带宽与高传输速率的特性导致系统采样率急剧提升,因此在基带考虑结合FPGA并行告诉处理的优势将基带信号多路并行传输,并行路径数为Npath,发射端用于同步训练序列时域结构的基带等效离散时间训练序列信号矩阵X为:Due to the characteristics of large bandwidth and high transmission rate of millimeter wave systems, the system sampling rate has increased sharply. Therefore, in the baseband, it is considered to combine the advantages of FPGA parallel processing to transmit the baseband signals in multiple channels in parallel. The number of parallel paths is N path , and the transmitter is used for synchronization. The baseband equivalent discrete time training sequence signal matrix X of the time domain structure of the training sequence is:
其中,T表示转置计算,CM×N表示M×N维元素为复数的矩阵,MT_CP为时域CP部分,MT_data为时域数据部分,Nsamp=Nsub+Ncp,Nsamp为训练序列时域采样点数,Nsub为子载波数(OFDM调制因此等于数据符号点数),Ncp为循前缀点数。Among them, T represents the transposition calculation, C M×N represents a matrix with M×N dimensional elements as complex numbers, M T_CP is the time domain CP part, M T_data is the time domain data part, N samp = N sub +N cp , N samp is the number of time domain sampling points of the training sequence, N sub is the number of subcarriers (OFDM modulation is therefore equal to the number of data symbol points), and N cp is the number of cyclic prefix points.
具体并行第i路传输数据Xi为:The specific parallel i-th transmission data X i is:
请参阅图3,给出信号带宽4.5GHz、64QAM调制方式、OFDM子载波间隔参考5G NR协议,为488.28125KHz、FPGA时钟频率选择250MHz实验场景下的帧结构设计方案。Please refer to Figure 3, which shows the frame structure design scheme in the experimental scenario with a signal bandwidth of 4.5GHz, 64QAM modulation method, OFDM subcarrier spacing, and reference to the 5G NR protocol for 488.28125KHz and FPGA clock frequency of 250MHz.
其中每个无线帧包含10个子帧,每个子帧包含32个时隙,每个时隙包含16个OFDM符号,每个时隙的第一个OFDM符号为用于同步的训练序列,而后15个OFDM符号为数据符号。频域上子载波数为Nsub=4.5G÷488.28125K=9216个子载波,考虑FPGA时钟频率要求,采用Npath=36路并行、每路256个子载波的方式进行传输;时域上每个OFDM符号包含Nsamp=9792个采样点,其中前Ncp=576点为循环前缀CP部分,后9216点为有效数据部分。Each wireless frame contains 10 subframes, each subframe contains 32 time slots, each time slot contains 16 OFDM symbols, the first OFDM symbol of each time slot is a training sequence for synchronization, and the next 15 OFDM symbols are data symbols. The number of subcarriers in the frequency domain is N sub = 4.5G÷488.28125K = 9216 subcarriers. Considering the FPGA clock frequency requirements, N path = 36 parallel channels, each with 256 subcarriers, is used for transmission; each OFDM in the time domain The symbol contains N samp =9792 sampling points, of which the first N cp =576 points are the cyclic prefix CP part, and the last 9216 points are the valid data part.
发射端训练序列的具体构造方式为The specific construction method of the training sequence at the transmitter is:
其中,表示矩阵的克罗内克积符号,A=[1,1],/>为恒幅值随机序列,其中每个采样点ri满足/>SZC_1、SZC_2分别为Ncfft与/>点的ZC伪随机序列。in, Represents the Kronecker product symbol of the matrix, A=[1,1],/> is a constant amplitude random sequence, in which each sampling point r i satisfies/> S ZC_1 and S ZC_2 are N cfft and/> respectively ZC pseudo-random sequence of points.
请参阅图4,给出如上所述帧结构下设计的同步序列方案。用于同步的训练序列Training symbol部分结构循环前缀部分由前后一致的两部分构成,每部分包括一段点的恒幅值随机序列和Ncfft=256点的ZC序列。数据部分Training Sequence同样由前后一致的两部分构成,每部分包括长度/> 点的ZC序列Main Part和与CP部分完全相同的576点的序列。Please refer to Figure 4, which shows the synchronization sequence scheme designed under the frame structure as mentioned above. The structure of the training symbol part of the training sequence used for synchronization. The cyclic prefix part consists of two consistent parts. Each part includes a paragraph. A constant amplitude random sequence of points and a ZC sequence of N cfft = 256 points. The data part Training Sequence is also composed of two consistent parts, each part includes length/> The ZC sequence Main Part of points and the sequence of 576 points are exactly the same as the CP part.
S2、在接收端首先利用延时自相关的方法,对基带多路并行接收信号进行相关运算,其次对相关结果进行累加操作,最后通过流式经验阈值比较的方法找到粗定时同步位置syn_coarse;S2. At the receiving end, the delay autocorrelation method is first used to perform correlation operations on the baseband multi-channel parallel received signals, then the correlation results are accumulated, and finally the rough timing synchronization position syn_coarse is found through the streaming experience threshold comparison method;
利用如下公式对并行第i路接收信号进行延时自相关计算:Use the following formula to calculate the delay autocorrelation of the parallel i-th received signal:
对每路延时自相关结果累加以达到提升信噪比,减小定时误差的目的:The delay autocorrelation results of each channel are accumulated to achieve the purpose of improving the signal-to-noise ratio and reducing the timing error:
之后为防止接收信号毛刺等不确定型因素的影响,对延时自相关结果进行平滑操作:Then, in order to prevent the influence of uncertain factors such as received signal burrs, the delayed autocorrelation results are smoothed:
其中,Lavg为平滑滤波窗口长度,Pavg[k]为平滑滤波后粗同步序列结果。Among them, L avg is the smoothing filter window length, and P avg [k] is the rough synchronization sequence result after smoothing filtering.
理论粗同步定时位置索引syn_coarset应为平滑滤波后粗同步序列结果的最大值对应的索引位置:The theoretical coarse synchronization timing position index syn_coarse t should be the index position corresponding to the maximum value of the coarse synchronization sequence result after smoothing and filtering:
但考虑实现硬件载体为FPGA使用流的形式对数据进行持续处理,因此采用流式阈值比较的方法获得最终粗定时同步位置syn_coarse(阈值Padv由多次事先实验的经验值产生)。However, considering that the hardware carrier is FPGA that uses streams to continuously process data, the streaming threshold comparison method is used to obtain the final rough timing synchronization position syn_coarse (the threshold Padv is generated by the empirical value of multiple prior experiments).
请参阅图5,采用Lavg=16对粗同步及平滑滤波处理进行仿真,由仿真结果可看出延时自相关产生类似梯形的相关结果,其结果是一个慢变的过程,适用流式阈值比较的方式寻找峰值位置。Please refer to Figure 5. Lavg = 16 is used to simulate coarse synchronization and smooth filtering. From the simulation results, it can be seen that delayed autocorrelation produces trapezoid-like correlation results. The result is a slowly changing process, and the streaming threshold is applicable. Find the peak position by comparison.
S3、在得到粗定时同步位置时,利用自相关结果所携带的角度信息实现系统的频偏估计计算实际值cfo_est;S3. When obtaining the rough timing synchronization position, use the angle information carried by the autocorrelation result. Implement frequency offset estimation of the system to calculate the actual value cfo_est;
采用精确定时位置的角度信息进行频偏估计,频偏估计的理论值为:The angle information of precise timing position is used for frequency offset estimation. The theoretical value of frequency offset estimation is:
其中,fsamp为系统采样频率。Among them, f samp is the system sampling frequency.
采用粗同步定时位置的角度信息进行频偏估计,得到频偏估计的实际值cfo_est为:The angle information of the coarse synchronization timing position is used to estimate the frequency offset, and the actual value of the frequency offset estimate cfo_est is:
请参阅图6,在设计仿真条件下,在信噪比≥4dB条件下,多次实验频偏估计值与标准值的均方误差均在10-5以下,完全满足系统频偏估计需求。Refer to Figure 6. Under design simulation conditions, Under the condition of signal-to-noise ratio ≥ 4dB, the mean square error between the frequency offset estimation value and the standard value in multiple experiments is below 10 -5 , which fully meets the system frequency offset estimation requirements.
S4、在已获得粗定时同步位置的基础上,利用互相关的算法,将本地缓存序列与接收信号序列进行相关运算,得到精定时同步位置syn_precious;S4. On the basis of obtaining the coarse timing synchronization position, use the cross-correlation algorithm to perform correlation operations on the local cache sequence and the received signal sequence to obtain the precise timing synchronization position syn_precious;
精定时同步起到提升系统定时同步准确性的作用,在信道状况良好或整个通信系统调试初期、仅为能够保证定时同步算法可以快速实现,为其他系统组件的直连调试提供保证的功能时可不使用精定时同步模块。此时粗定时同步syn_coarse结果即为同步模块定时同步位置,在步骤S5中、根据该位置向频偏补偿模块输出定时同步后的数据。Precise timing synchronization plays a role in improving the accuracy of system timing synchronization. When the channel condition is good or the entire communication system is in the early stages of debugging, it is only necessary to ensure that the timing synchronization algorithm can be quickly implemented and to provide guaranteed functions for direct connection debugging of other system components. Use precision timing synchronization modules. At this time, the coarse timing synchronization syn_coarse result is the timing synchronization position of the synchronization module. In step S5, the timing synchronized data is output to the frequency offset compensation module according to the position.
精定时同步模块采用粗同步定时位置左右点与本地Ncfft点缓存序列patten_c进行互相关运算,为节约硬件资源及计算时间、互相关结果采用先对两段序列进行Ncfft点FFT操作、再对结果进行Ncfft点的IFFT操作得到:The fine timing synchronization module uses coarse synchronization timing position left and right Points are cross-correlated with the local N cfft point cache sequence pattern_c. In order to save hardware resources and calculation time, the cross-correlation result is obtained by first performing an N cfft point FFT operation on the two sequences, and then performing an N cfft point IFFT operation on the result:
因为互相关会产生一个类似脉冲的尖峰,尖峰对应的位置即为精确的定时位置syn_precious为:Because cross-correlation will produce a pulse-like spike, the position corresponding to the spike is the precise timing position. syn_precious is:
请参阅图7,在上述设计仿真条件下,Ncfft=256,由仿真结果可看出由于互相关运算自身特性,其结果产生了一个尖锐的相关峰值,因此无需预置判决门限,只需进行峰值检测就可以较为准确的进行参考点定位,另一方面也可以消除因为判决门限而引入的判决误差。Please refer to Figure 7. Under the above design simulation conditions, N cfft = 256. It can be seen from the simulation results that due to the characteristics of the cross-correlation operation, the result produces a sharp correlation peak. Therefore, there is no need to preset the decision threshold, and only need to perform Peak detection can position the reference point more accurately. On the other hand, it can also eliminate the decision error introduced by the decision threshold.
S5、将粗同步与精同步结果相加得到最终系统符号定时同步结果位置索引,依据该位置索引输出符号定时同步后的数据序列,同时根据步骤S3中频偏估计结果,产生对应的复指数信号对定时同步后的序列进行频偏补偿操作,最终完成系统同步任务。S5. Add the coarse synchronization and fine synchronization results to obtain the position index of the final system symbol timing synchronization result. According to this position index, the data sequence after symbol timing synchronization is output. At the same time, according to the frequency offset estimation result in step S3, the corresponding complex exponential signal pair is generated. The sequence after timing synchronization performs frequency offset compensation operation, and finally completes the system synchronization task.
本发明再一个实施例中,提供一种多路并行传输毫米波OFDM通信系统时频同步的FPGA实现系统,该系统能够用于实现上述多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法,具体的,该多路并行传输毫米波OFDM通信系统时频同步的FPGA实现系统包括矩阵模块、累加模块、估计模块、运算模块以及输出模块。In yet another embodiment of the present invention, an FPGA implementation system for time-frequency synchronization of a multi-channel parallel transmission millimeter wave OFDM communication system is provided. This system can be used to implement the FPGA implementation of the time-frequency synchronization of the above-mentioned multi-channel parallel transmission millimeter wave OFDM communication system. Method, specifically, the FPGA implementation system for time-frequency synchronization of the multi-channel parallel transmission millimeter wave OFDM communication system includes a matrix module, an accumulation module, an estimation module, an operation module and an output module.
其中,矩阵模块,依据传输信号物理层帧结构,以及具体FPGA实现时基带并行传输路数Npath,在时域生成具有特定结构的训练序列信号矩阵X;Among them, the matrix module generates a training sequence signal matrix X with a specific structure in the time domain based on the physical layer frame structure of the transmission signal and the number of baseband parallel transmission paths N path in specific FPGA implementation;
累加模块,利用矩阵模块得到的训练序列信号矩阵X的结构特性,采用延时自相关的方法对基带多路并行接收信号进行运算,再对结果进行累加操作,通过流式经验阈值比较方法找到粗定时同步位置syn_coarse;The accumulation module uses the structural characteristics of the training sequence signal matrix Timing synchronization position syn_coarse;
估计模块,基于累加模块得到的粗定时同步位置syn_coarse,利用自相关结果携带的角度信息实现毫米波OFDM通信系统的频偏估计实际值cfo_est;The estimation module, based on the rough timing synchronization position syn_coarse obtained by the accumulation module, uses the angle information carried by the autocorrelation result Realize the frequency offset estimation actual value cfo_est of the millimeter wave OFDM communication system;
运算模块,基于累加模块得到的粗定时同步位置syn_coarse,利用互相关算法将预先存储在接收机本地的本地缓存序列与接收信号序列进行运算,得到精定时同步位置syn_precious;The operation module, based on the coarse timing synchronization position syn_coarse obtained by the accumulation module, uses the cross-correlation algorithm to calculate the local buffer sequence pre-stored locally in the receiver and the received signal sequence to obtain the precise timing synchronization position syn_precious;
输出模块,将步累加模块得到的粗定时同步位置syn_coarse与运算模块得到的精定时同步位置syn_precious相加,得到最终系统符号定时同步结果位置索引,依据位置索引输出符号定时同步后的数据序列,同时根据估计模块得到的频偏估计实际值cfo_est产生对应的复指数信号,对定时同步后的序列进行频偏补偿操作,最终完成系统同步任务。The output module adds the coarse timing synchronization position syn_coarse obtained by the step accumulation module and the fine timing synchronization position syn_precious obtained by the operation module to obtain the final system symbol timing synchronization result position index, and outputs the data sequence after symbol timing synchronization based on the position index. At the same time According to the actual frequency offset estimate cfo_est obtained by the estimation module, the corresponding complex exponential signal is generated, and the frequency offset compensation operation is performed on the sequence after timing synchronization, and finally the system synchronization task is completed.
本发明再一个实施例中,提供了一种终端设备,该终端设备包括处理器以及存储器,所述存储器用于存储计算机程序,所述计算机程序包括程序指令,所述处理器用于执行所述计算机存储介质存储的程序指令。处理器可能是中央处理单元(Central ProcessingUnit,CPU),还可以是其他通用处理器、数字信号处理器(Digital Signal Processor、DSP)、专用集成电路(Application Specific Integrated Circuit,ASIC)、现成可编程门阵列(Field-Programmable Gate Array,FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等,其是终端的计算核心以及控制核心,其适于实现一条或一条以上指令,具体适于加载并执行一条或一条以上指令从而实现相应方法流程或相应功能;本发明实施例所述的处理器可以用于多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法的操作,包括:In yet another embodiment of the present invention, a terminal device is provided. The terminal device includes a processor and a memory. The memory is used to store a computer program. The computer program includes program instructions. The processor is used to execute the computer program. A storage medium stores program instructions. The processor may be a Central Processing Unit (CPU), or other general-purpose processor, Digital Signal Processor (DSP), Application Specific Integrated Circuit (ASIC), or off-the-shelf programmable gate Array (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., which are the computing core and control core of the terminal, and are suitable for implementing one or more instructions, specifically Suitable for loading and executing one or more instructions to implement the corresponding method flow or corresponding function; the processor described in the embodiment of the present invention can be used for the operation of the FPGA implementation method of time-frequency synchronization of multi-channel parallel transmission millimeter wave OFDM communication system, include:
依据传输信号物理层帧结构,以及具体FPGA实现时基带并行传输路数Npath,在时域生成具有特定结构的训练序列信号矩阵X;利用训练序列信号矩阵X的结构特性,采用延时自相关的方法对基带多路并行接收信号进行运算,再对结果进行累加操作,通过流式经验阈值比较方法找到粗定时同步位置syn_coarse;Based on the physical layer frame structure of the transmission signal and the number of baseband parallel transmission paths N path during specific FPGA implementation, a training sequence signal matrix X with a specific structure is generated in the time domain; using the structural characteristics of the training sequence signal matrix X, delay autocorrelation is used The method operates on the baseband multi-channel parallel received signals, then accumulates the results, and finds the rough timing synchronization position syn_coarse through the streaming empirical threshold comparison method;
基于粗定时同步位置syn_coarse,利用自相关结果携带的角度信息实现毫米波OFDM通信系统的频偏估计实际值cfo_est;基于粗定时同步位置syn_coarse,利用互相关算法将预先存储在接收机本地的本地缓存序列与接收信号序列进行运算,得到精定时同步位置syn_precious;将粗定时同步位置syn_coarse与精定时同步位置syn_precious相加,得到最终系统符号定时同步结果位置索引,依据位置索引输出符号定时同步后的数据序列,同时根据频偏估计实际值cfo_est产生对应的复指数信号,对定时同步后的序列进行频偏补偿操作,最终完成系统同步任务。Based on the coarse timing synchronization position syn_coarse, using the angle information carried by the autocorrelation result Realize the actual frequency offset estimation value cfo_est of the millimeter wave OFDM communication system; based on the coarse timing synchronization position syn_coarse, use the cross-correlation algorithm to calculate the local buffer sequence pre-stored locally in the receiver and the received signal sequence to obtain the precise timing synchronization position syn_precious; Add the coarse timing synchronization position syn_coarse and the fine timing synchronization position syn_precious to obtain the final system symbol timing synchronization result position index. According to the position index, the data sequence after symbol timing synchronization is output, and at the same time, the corresponding complex index is generated based on the frequency offset estimation actual value cfo_est signal, perform frequency offset compensation operation on the sequence after timing synchronization, and finally complete the system synchronization task.
本发明再一个实施例中,本发明还提供了一种存储介质,具体为计算机可读存储介质(Memory),所述计算机可读存储介质是终端设备中的记忆设备,用于存放程序和数据。可以理解的是,此处的计算机可读存储介质既可以包括终端设备中的内置存储介质,当然也可以包括终端设备所支持的扩展存储介质。计算机可读存储介质提供存储空间,该存储空间存储了终端的操作系统。并且,在该存储空间中还存放了适于被处理器加载并执行的一条或一条以上的指令,这些指令可以是一个或一个以上的计算机程序(包括程序代码)。需要说明的是,此处的计算机可读存储介质可以是高速RAM存储器,也可以是非不稳定的存储器(Non-Volatile Memory),例如至少一个磁盘存储器。In yet another embodiment of the present invention, the present invention also provides a storage medium, specifically a computer-readable storage medium (Memory). The computer-readable storage medium is a memory device in a terminal device and is used to store programs and data. . It can be understood that the computer-readable storage medium here may include a built-in storage medium in the terminal device, and of course may also include an extended storage medium supported by the terminal device. The computer-readable storage medium provides storage space, and the storage space stores the operating system of the terminal. Furthermore, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space. These instructions may be one or more computer programs (including program codes). It should be noted that the computer-readable storage medium here may be a high-speed RAM memory or a non-volatile memory (Non-Volatile Memory), such as at least one disk memory.
可由处理器加载并执行计算机可读存储介质中存放的一条或一条以上指令,以实现上述实施例中有关多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法的相应步骤;计算机可读存储介质中的一条或一条以上指令由处理器加载并执行如下步骤:One or more instructions stored in the computer-readable storage medium can be loaded and executed by the processor to implement the corresponding steps of the FPGA implementation method for time-frequency synchronization of multi-channel parallel transmission millimeter-wave OFDM communication systems in the above embodiments; computer-readable One or more instructions in the storage medium are loaded by the processor and execute the following steps:
基于粗定时同步位置syn_coarse,利用自相关结果携带的角度信息实现毫米波OFDM通信系统的频偏估计实际值cfo_est;基于粗定时同步位置syn_coarse,利用互相关算法将预先存储在接收机本地的本地缓存序列与接收信号序列进行运算,得到精定时同步位置syn_precious;将粗定时同步位置syn_coarse与精定时同步位置syn_precious相加,得到最终系统符号定时同步结果位置索引,依据位置索引输出符号定时同步后的数据序列,同时根据频偏估计实际值cfo_est产生对应的复指数信号,对定时同步后的序列进行频偏补偿操作,最终完成系统同步任务。Based on the coarse timing synchronization position syn_coarse, using the angle information carried by the autocorrelation result Realize the actual frequency offset estimation value cfo_est of the millimeter wave OFDM communication system; based on the coarse timing synchronization position syn_coarse, use the cross-correlation algorithm to calculate the local buffer sequence pre-stored locally in the receiver and the received signal sequence to obtain the precise timing synchronization position syn_precious; Add the coarse timing synchronization position syn_coarse and the fine timing synchronization position syn_precious to obtain the final system symbol timing synchronization result position index. According to the position index, the data sequence after symbol timing synchronization is output, and at the same time, the corresponding complex index is generated based on the frequency offset estimation actual value cfo_est. signal, perform frequency offset compensation operation on the sequence after timing synchronization, and finally complete the system synchronization task.
为使本发明实施例的目的、技术方案和优点更加清楚,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。通常在此处附图中的描述和所示的本发明实施例的组件可以通过各种不同的配置来布置和设计。因此,以下对在附图中提供的本发明的实施例的详细描述并非旨在限制要求保护的本发明的范围,而是仅仅表示本发明的选定实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, rather than all embodiments. The components of the embodiments of the invention generally described and illustrated in the figures herein may be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the invention provided in the appended drawings is not intended to limit the scope of the claimed invention, but rather to represent selected embodiments of the invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts fall within the scope of protection of the present invention.
请参阅图8,在上述设计仿真条件下,以对于STO的估计基本满足定时位置偏移不超过正确位置左右点为定时正确标准,可以看出在4-25dB信噪比范围内,本发明方法的定时准确概率均高于典型SC算法,满足系统定时同步需求。Please refer to Figure 8. Under the above design simulation conditions, the estimation of STO basically satisfies that the timing position offset does not exceed the correct position. The point is the timing accuracy standard. It can be seen that within the signal-to-noise ratio range of 4-25dB, the timing accuracy probability of the method of the present invention is higher than that of the typical SC algorithm, meeting the system timing synchronization requirements.
请参阅图9,通过Matlab生成36路并行同步序列(每路序列之前有20点随机噪声),并添加0.1倍归一化频偏,使用Vivado2019.2版本平台对设计算法的FPGA实现进行仿真,又Matlab计算硬件计算索引偏移量为145;由仿真结果看出,定时同步位置地址索引(coarse_number信号)为165=145+20,定时同步准确;频偏估计值(bias信号)为4’h0333(fix16_13)十进制数为0.1,频偏估计准确,整个计算过程需要339个时钟周期,满足硬件条件需求。Please refer to Figure 9. Generate 36 parallel synchronization sequences through Matlab (there are 20 points of random noise before each sequence), and add 0.1 times normalized frequency offset. Use the Vivado2019.2 version platform to simulate the FPGA implementation of the design algorithm. In addition, the Matlab calculation hardware calculation index offset is 145; from the simulation results, it can be seen that the timing synchronization position address index (coarse_number signal) is 165=145+20, and the timing synchronization is accurate; the frequency offset estimate value (bias signal) is 4'h0333 (fix16_13) The decimal number is 0.1, the frequency offset estimation is accurate, and the entire calculation process requires 339 clock cycles, which meets the hardware conditions.
通过对本发明方法的软硬件仿真验证可以看出,相比经典算法,本发明方法所设计的训练序列与同步方法更适合大带宽毫米波OFDM并行传输系统的传输场景下。定时同步及频偏估计准确率均在业界标准之上,且算法实现的硬件计算时间开销及资源开销水平也均有所降低。Through the software and hardware simulation verification of the method of the present invention, it can be seen that compared with the classic algorithm, the training sequence and synchronization method designed by the method of the present invention are more suitable for the transmission scenario of the large-bandwidth millimeter wave OFDM parallel transmission system. The timing synchronization and frequency offset estimation accuracy are both above industry standards, and the hardware computing time overhead and resource overhead of algorithm implementation have also been reduced.
综上所述,本发明一种多路并行传输毫米波OFDM通信系统时频同步的FPGA实现方法,与认知毫米波OFDM通信系统同步方案相比较,本发明能够结合大带宽高采样速率的特点生成改进的同步序列,使用粗细两级同步的方法提升定时同步及频偏估计的准确性,并可依据实际通信环境的信道状况选择是否进行精同步操作以考虑同步准确性与计算复杂度二者间的权衡,同时在硬件实现上本发明具备更低的资源利用率、算法复杂度及计算时间成本。In summary, the present invention is an FPGA implementation method for time-frequency synchronization of multi-channel parallel transmission millimeter wave OFDM communication systems. Compared with the cognitive millimeter wave OFDM communication system synchronization scheme, the present invention can combine the characteristics of large bandwidth and high sampling rate Generate an improved synchronization sequence and use a coarse and fine two-level synchronization method to improve the accuracy of timing synchronization and frequency offset estimation. You can choose whether to perform fine synchronization operations based on the channel conditions of the actual communication environment to consider both synchronization accuracy and computational complexity. At the same time, in terms of hardware implementation, the present invention has lower resource utilization, algorithm complexity and calculation time cost.
所属领域的技术人员可以清楚地了解到,为了描述的方便和简洁,仅以上述各功能单元、模块的划分进行举例说明,实际应用中,可以根据需要而将上述功能分配由不同的功能单元、模块完成,即将所述装置的内部结构划分成不同的功能单元或模块,以完成以上描述的全部或者部分功能。实施例中的各功能单元、模块可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中,上述集成的单元既可以采用硬件的形式实现,也可以采用软件功能单元的形式实现。另外,各功能单元、模块的具体名称也只是为了便于相互区分,并不用于限制本申请的保护范围。上述系统中单元、模块的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above functional units and modules is used as an example. In actual applications, the above functions can be allocated to different functional units and modules according to needs. Module completion means dividing the internal structure of the device into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be hardware-based. It can also be implemented in the form of software functional units. In addition, the specific names of each functional unit and module are only for the convenience of distinguishing each other and are not used to limit the scope of protection of the present application. For the specific working processes of the units and modules in the above system, please refer to the corresponding processes in the foregoing method embodiments, and will not be described again here.
在上述实施例中,对各个实施例的描述都各有侧重,某个实施例中没有详述或记载的部分,可以参见其它实施例的相关描述。In the above embodiments, each embodiment is described with its own emphasis. For parts that are not detailed or documented in a certain embodiment, please refer to the relevant descriptions of other embodiments.
本领域普通技术人员可以意识到,结合本发明中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本发明的范围。Those of ordinary skill in the art can appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the present invention can be implemented with electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each specific application, but such implementations should not be considered to be beyond the scope of the present invention.
在本发明所提供的实施例中,应该理解到,所揭露的装置/终端和方法,可以通过其它的方式实现。例如,以上所描述的装置/终端实施例仅仅是示意性的,例如,所述模块或单元的划分,仅仅为一种逻辑功能划分,实际实现时可以有另外的划分方式,例如多个单元或组件可以结合或者可以集成到另一个系统,或一些特征可以忽略,或不执行。另一点,所显示或讨论的相互之间的耦合或直接耦合或通讯连接可以是通过一些接口,装置或单元的间接耦合或通讯连接,可以是电性,机械或其它的形式。In the embodiments provided by the present invention, it should be understood that the disclosed device/terminal and method can be implemented in other ways. For example, the device/terminal embodiments described above are only illustrative. For example, the division of modules or units is only a logical function division. In actual implementation, there may be other division methods, such as multiple units or units. Components may be combined or may be integrated into another system, or some features may be ignored, or not implemented. On the other hand, the coupling or direct coupling or communication connection between each other shown or discussed may be through some interfaces, indirect coupling or communication connection of devices or units, which may be in electrical, mechanical or other forms.
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的,作为单元显示的部件可以是或者也可以不是物理单元,即可以位于一个地方,或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.
另外,在本发明各个实施例中的各功能单元可以集成在一个处理单元中,也可以是各个单元单独物理存在,也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现,也可以采用软件功能单元的形式实现。In addition, each functional unit in various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above integrated units can be implemented in the form of hardware or software functional units.
所述集成的模块/单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时,可以存储在一个计算机可读取存储介质中。基于这样的理解,本发明实现上述实施例方法中的全部或部分流程,也可以通过计算机程序来指令相关的硬件来完成,所述的计算机程序可存储于一计算机可读存储介质中,该计算机程序在被处理器执行时,可实现上述各个方法实施例的步骤。其中,所述计算机程序包括计算机程序代码,所述计算机程序代码可以为源代码形式、对象代码形式、可执行文件或某些中间形式等。所述计算机可读介质可以包括:能够携带所述计算机程序代码的任何实体或装置、记录介质、U盘、移动硬盘、磁碟、光盘、计算机存储器、只读存储器(Read-Only Memory,ROM)、随机存取存储器(RandomAccess Memory,RAM)、电载波信号、电信信号以及软件分发介质等,需要说明的是,所述计算机可读介质包含的内容可以根据司法管辖区内立法和专利实践的要求进行适当的增减,例如在某些司法管辖区,根据立法和专利实践,计算机可读介质不包括是电载波信号和电信信号。If the integrated module/unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention can implement all or part of the processes in the methods of the above embodiments, and can also be completed by instructing relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can be stored in a computer-readable storage medium. When the program is executed by the processor, the steps of each of the above method embodiments can be implemented. Wherein, the computer program includes computer program code, which may be in the form of source code, object code, executable file or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording media, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (Read-Only Memory, ROM) , random access memory (Random Access Memory, RAM), electrical carrier signals, telecommunications signals, software distribution media, etc. It should be noted that the content contained in the computer readable media can be based on the requirements of legislation and patent practice in the jurisdiction. Making appropriate additions or subtractions, for example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunications signals.
本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器,使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each process and/or block in the flowchart illustrations and/or block diagrams, and combinations of processes and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing device to produce a machine, such that the instructions executed by the processor of the computer or other programmable data processing device produce a use A device for realizing the functions specified in one process or multiple processes of the flowchart and/or one block or multiple blocks of the block diagram.
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中,使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品,该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。These computer program instructions may also be stored in a computer-readable memory that causes a computer or other programmable data processing apparatus to operate in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including the instruction means, the instructions The device implements the functions specified in a process or processes of the flowchart and/or a block or blocks of the block diagram.
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上,使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理,从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。These computer program instructions may also be loaded onto a computer or other programmable data processing device, causing a series of operating steps to be performed on the computer or other programmable device to produce computer-implemented processing, thereby executing on the computer or other programmable device. Instructions provide steps for implementing the functions specified in a process or processes of a flowchart diagram and/or a block or blocks of a block diagram.
以上内容仅为说明本发明的技术思想,不能以此限定本发明的保护范围,凡是按照本发明提出的技术思想,在技术方案基础上所做的任何改动,均落入本发明权利要求书的保护范围之内。The above contents are only for illustrating the technical ideas of the present invention and cannot be used to limit the protection scope of the present invention. Any changes made based on the technical ideas proposed by the present invention and based on the technical solutions shall fall within the scope of the claims of the present invention. within the scope of protection.
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CN118553080A (en) * | 2024-07-24 | 2024-08-27 | 济南瑞源智能城市开发有限公司 | Remote control method for fire control of tunnel fire control system |
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