CN116827095A - A SiC MOSFET driving circuit and driving method - Google Patents

Abstract

The invention discloses a SiCMOSFET driving circuit and relates to the field of electronic driving. The SiCMOSFET drive circuit includes: synchronous Buck circuit, RC voltage dividing circuit, gate-source equivalent impedance adjustment circuit, output filter circuit, load resistor R, DC power supply, and upper switching tube M1 and lower switching tube _M1 on the bridge arm of the bridge circuit Switch tube M ₂ . The present invention provides a turn-off negative voltage by connecting an RC voltage dividing circuit in parallel between the gate and source of the SiC MOSFET, adding a variable capacitance structure of a transistor series capacitor in the gate-source equivalent impedance adjustment circuit, and changing the switching mode 1 of the SiC MOSFET drive circuit. Control to switching mode 8, which can effectively suppress the crosstalk voltage without increasing the switching time.

Description

A SiC MOSFET driving circuit and driving method

Technical field

The present invention relates to the field of electronic driving technology, and in particular to a SiC MOSFET driving circuit and a driving method.

Background technique

In recent years, as the application scenarios of power semiconductor devices have become increasingly diverse, the performance requirements for power semiconductor devices have continued to increase, and Si-based power semiconductor devices can no longer meet their needs. Wide-bandgap semiconductor devices represented by SiC MOSFET (silicon carbide metal-oxide semiconductor field-effect transistor) have lower on-resistance and faster switching speed, and are more suitable for use in high-frequency power electronic converters. However, in practical applications, the increase in switching frequency means greater dv/dt (voltage change rate) and di/dt (current change rate), causing parasitic parameters that have no obvious impact at low frequencies to generate voltages that can damage system operation. Spikes, when applied in bridge circuits, will produce severe crosstalk voltages and destroy the stable operation of the circuit. The threshold voltage and the maximum negative voltage that can be tolerated by SiC MOSFET are very small. When the forward crosstalk voltage is too large, it will cause the device to mislead, causing the bridge arm to pass through, damaging the device; when the negative crosstalk voltage exceeds the maximum negative voltage that the SiC MOSFET can withstand, the power device will be damaged.

At present, the drive design to suppress crosstalk is mainly divided into two aspects: the first is to adjust the equivalent impedance between the gate and the source, and the second is to use the negative voltage turn-off method. However, most of the existing SiC MOSFET crosstalk suppression methods come at the expense of increased switching losses, switching delays or increased control complexity. Therefore, analyzing the causes of bridge arm crosstalk and designing a new SiC MOSFET drive circuit that can suppress crosstalk voltage is of great significance to improving the operating reliability of the converter.

Contents of the invention

In response to the problems raised in the above background art, the present invention provides a SiC MOSFET driving circuit and driving method to suppress crosstalk voltage without increasing the switching time.

In order to achieve the above objects, the present invention provides the following solutions:

The invention provides a SiC MOSFET drive circuit, which includes: a synchronous Buck circuit, an RC voltage dividing circuit, a gate-source equivalent impedance adjustment circuit, an output filter circuit, a load resistor R, a DC power supply and an upper switch on the arm of a bridge circuit. The tube M ₁ and the lower switch tube M ₂ ; the upper switch tube M ₁ and the lower switch tube M ₂ are both SiC MOSFETs; the RC voltage dividing circuit includes a resistor R _{1_H} , a resistor R _{2_H} , a capacitor C _{1_H} , a resistor R _{1_L} , and a resistor R _{2_L} and capacitor C _{1_L} ; the gate-source equivalent impedance adjustment circuit includes resistor R _{3_H} , transistor Q _{1_H} , diode D _{1_H} , capacitor C _{2_H} , resistor R _{3_L} , transistor Q _{1_L} , diode D _{1_L} and capacitor C _{2_L} ; The output filter circuit includes a filter inductor L and a filter capacitor C;

One end of the resistor R _{1_H} and one end of the capacitor C _{1_H} are both connected to the upper tube synchronous drive signal S ₁ of the synchronous Buck circuit; the base of the transistor Q _{1_H} is connected to the other end of the resistor R _{1_H} , the other end of the capacitor C _{1_H} , and the resistor R respectively. One end of _{2_H} and one end of resistor R _{3_H} ; the other end of resistor R _{3_H} is connected to the emitter of transistor Q _{1_H} , the cathode of diode D _{1_H} and the gate of upper switch M ₁ respectively; the collector of transistor Q _{1_H} is connected to diode D The positive electrode of _{1_H} and one end of the capacitor C _{2_H} ; the source of the upper switching tube M ₁ is connected to the synchronous Buck circuit, the other end of the resistor R _{2_H} , the other end of the capacitor C _{2_H} , the drain of the lower switching tube M ₂ and the filter inductor L. One end of the filter inductor L; the other end of the filter inductor L is connected to one end of the filter capacitor C and one end of the load resistor R; the drain of the upper switch _M1 is connected to the positive electrode of the DC power supply;

One end of the resistor R _{1_L} and one end of the capacitor C _{1_L} are both connected to the lower tube synchronous drive signal S2 of the synchronous Buck circuit; the base of the transistor Q _{1_L} is connected to the other end of the resistor R _{1_L} , the other end of the capacitor C _{1_L} , and the resistor R _{2_L} respectively. One end and one end of the resistor R _{3_L} ; the other end of the resistor R _{3_L} is connected to the emitter of the transistor Q _{1_L} , the cathode of the diode D _{1_L} and the gate of the lower switch M ₂ respectively; the collector of the transistor Q _{1_L} is connected to the diode D _{1_L} respectively. The positive electrode and one end of the capacitor C _{2_L} ; the source of the lower switch tube M ₂ are respectively connected to the synchronous Buck circuit, the other end of the resistor R _{2_L} , the other end of the capacitor C _{2_L} , the other end of the filter capacitor C, the other end of the load resistor R and The negative pole of the DC power supply.

Optionally, both transistor Q _{1_H} and transistor Q _{1_L} are PNP type transistors.

Optionally, both diode D _{1_H} and diode D _{1_L} are Zener diodes.

A SiC MOSFET driving method, applied to the SiC MOSFET driving circuit; the SiC MOSFET driving method includes:

In the 1st stage of working mode, the upper switch _M1 is completely turned off, the lower switch _M2 is fully turned on, and the lower switch driving voltage _V2 charges the gate-source capacitance C _gsL of the lower switch _M2 . At the same time, the driving current flows through The RC voltage divider circuit composed of capacitor C _{1_L} , resistor R _{1_L} and resistor R _{2_L} charges capacitor C 1_L; _the charging current flows through resistor R _{3_L} . Since the conduction conditions of transistor Q _{1_L} are not met, the auxiliary circuit does not work;

In the second stage of working mode, the lower switch _M2 begins to turn off, and the upper switch _M1 is still completely turned off. The capacitor _{C1_L} provides a turn-off negative pressure for the lower switch _M2 . The channel of the lower switch _M2 and its The body diode performs commutation;

In the third stage of working mode, the upper switching tube _M1 and the lower switching tube _M2 are both in the off state, and the bridge arm is in the dead zone state;

In the 4th stage of working mode, the upper switch M ₁ begins to conduct, and the upper switch driving voltage V ₁ charges the gate-source capacitor C _gsH of the upper switch M ₁ . At the same time, the driving current flows through the capacitor C _{1_H} , the resistor R _{1_H} and the resistor The RC voltage dividing circuit composed of R _{2_H} charges the capacitor C _{1_H} ; the crosstalk suppression circuit of the lower switching tube M ₂ starts to work. First, the capacitor C _{1_L} is in a fully charged state after operating mode 1, providing a switch for the lower switching tube M ₂ . Turn off the negative voltage, accelerating the turn-off process of the lower switch _M2 ; secondly, the drain-source voltage V _dsH of the upper switch M ₁ drops rapidly, and the drain-source voltage V dsL of the lower switch M ₂ rises rapidly, and the drain-source voltage V _dsL of the lower switch M 2 rises rapidly. The gate-drain capacitance C _gdL of M ₂ begins to charge, and the charging current C _gdL dV _dsL /dt flows through the resistor R _{3_L} , producing a right positive and left negative voltage drop, causing the transistor Q _{1_L} to conduct, and the capacitor C _{2_L} is connected to the circuit to absorb the charge. current; the two work together to suppress the gate-source forward crosstalk voltage of the lower switch _M2 ; after the transistor Q _{1_L} is turned on, the charging current is absorbed, so that when the voltage across the resistor R _{3_L} is less than 0.7V, the transistor Q _{1_L} does not The conduction condition is met, so that the transistor Q _{1_L} is turned off and the capacitor C _{2_L} is disconnected from the drive circuit;

In the 5th stage of working mode, the upper switching tube _M1 is fully turned on, the lower switching tube _M2 is completely turned off, and the load current flows through the channel of the upper switching tube _M1 ;

In the 6th stage of operating mode, the upper switch M ₁ begins to turn off. At this time, the channel of the upper switch M ₁ commutates with the body diode of the lower switch M ₂ , and the drain-source voltage V _dsH of the upper switch M ₁ rapidly rises, the drain-source voltage V _dsL of the lower switching tube M ₂ drops rapidly, and the gate-drain capacitance C _gdL of the lower switching tube M ₂ begins to discharge. The discharge current passes through the branch composed of the capacitor C _{2_L} and the diode D _{1_L} , and decreases The equivalent impedance of the gate-source drive circuit of the lower switch _M2 suppresses the negative crosstalk voltage of the gate-source of the lower switch _M2 ;

In the 7th stage of working mode, after the commutation is completed, the load current freewheels through the body diode of the lower switching tube _M2 , the upper switching tube _M1 and the lower switching tube _M2 are both in the off state, and the bridge arm is in the dead zone state;

In the 8th stage of the working mode, the lower switching tube _M2 starts to conduct, the upper switching tube _M1 remains in the off state, and the channel of the lower switching tube _M2 commutates with the body diode of the lower switching tube _M2 ; after the commutation is completed, The working mode changes to working mode 1.

According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

The invention provides a SiC MOSFET drive circuit and a drive method. The SiC MOSFET drive circuit includes: a synchronous Buck circuit, an RC voltage dividing circuit, a gate-source equivalent impedance adjustment circuit, an output filter circuit, a load resistor R, a DC power supply, and The upper switch tube M ₁ and the lower switch tube M ₂ on the bridge arm of the bridge circuit; the RC voltage dividing circuit includes resistor R _{1_H} , resistor R _{2_H} , capacitor C _{1_H} , resistor R _{1_L} , resistor R _{2_L} and capacitor C _{1_L} ; gate The source equivalent impedance adjustment circuit includes resistor R _{3_H} , transistor Q _{1_H} , diode D _{1_H} , capacitor C _{2_H} , resistor R _{3_L} , transistor Q _{1_L} , diode D _{1_L} and capacitor C _{2_L} ; the output filter circuit includes filter inductor L and filter capacitor C. The present invention provides a turn-off negative voltage by connecting an RC voltage dividing circuit in parallel between the gate and source of the SiC MOSFET, adding a variable capacitance structure of a transistor series capacitor in the gate-source equivalent impedance adjustment circuit, and controlling the switching mode of the SiC MOSFET drive circuit. Controlling from 1 to switching mode 8 can effectively suppress the crosstalk voltage without increasing the switching time.

Description of the drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the drawings needed to be used in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some of the drawings of the present invention. Embodiments, for those of ordinary skill in the art, other drawings can also be obtained based on these drawings without exerting creative efforts.

Figure 1 is a schematic structural diagram of a SiC MOSFET drive circuit of the present invention;

Figure 2 is a working waveform diagram of the SiC MOSFET drive circuit of the present invention;

Figure 3 is a schematic diagram of the SiC MOSFET drive circuit operating mode 1 of the present invention;

Figure 4 is a schematic diagram of the SiC MOSFET drive circuit operating mode 2 of the present invention;

Figure 5 is a schematic diagram of the SiC MOSFET drive circuit operating mode 3 of the present invention;

Figure 6 is a schematic diagram of the SiC MOSFET drive circuit operating mode 4 of the present invention;

Figure 7 is a schematic diagram of the SiC MOSFET drive circuit operating mode 5 of the present invention;

Figure 8 is a schematic diagram of the SiC MOSFET drive circuit operating mode 6 of the present invention;

Figure 9 is a schematic diagram of the SiC MOSFET drive circuit operating mode 7 of the present invention;

Figure 10 is a schematic diagram of the SiC MOSFET drive circuit operating mode 8 of the present invention;

Figure 11 is a comparison diagram of the gate-source voltage of the upper tube and the forward crosstalk voltage waveform of the lower tube during the turn-on stage of the upper tube; Figure 11(a) is a waveform diagram of the gate-source voltage of the upper tube changing with time, and Figure 11(b) ) is the waveform diagram of the gate-source voltage of the low-side transistor changing with time;

Figure 12 is a comparison chart of the gate-source voltage of the high-side tube and the negative crosstalk voltage waveform of the low-side tube during the turn-off stage of the high-side tube; Figure 12(a) is a waveform diagram of the gate-source voltage of the high-side tube changing with time, Figure 12( b) is the waveform diagram of the gate-source voltage of the low-side transistor changing with time.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

The purpose of the present invention is to provide a SiC MOSFET drive circuit that suppresses crosstalk voltage without increasing the switching time.

In order to make the above objects, features and advantages of the present invention more obvious and understandable, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.

The SiC MOSFET driving circuit diagram of the present invention is shown in Figure 1. The driven SiC MOSFET is in the dotted box, that is, M ₁ and M ₂ are respectively the upper and lower switching tubes on a certain bridge arm of the bridge circuit. R _g(in) is the gate internal resistance of the switching tube SiC MOSFET, C _gsn , C _gdn , and C _dsn are the gate-source capacitance, gate-drain capacitance, and drain-source capacitance of the switching tube SiC MOSFET respectively, where n=L ,H. V _DC is the DC power supply voltage. L and C are the output filter inductor and filter capacitor respectively, and R is the load resistance. The parameter marked H is related to the upper tube M ₁ , and the parameter marked L is related to the down tube M ₂ . The drive circuit includes the following three parts: the first part is an RC voltage divider circuit composed of resistor R _{1_n} , resistor R _{2_n} , and capacitor C _{1_n} that generates negative voltage shutdown; the second part is composed of resistor R _{3_n} , transistor Q _{1_n} , and diode The gate-source equivalent impedance adjustment circuit composed of D _{1_n} and capacitor C _{2_n} is used to adjust the equivalent impedance of the gate and source; the third part is the driven SiC MOSFET, that is, the switching tubes M ₁ and M ₂ .

Referring to Figure 1, the SiC MOSFET drive circuit of the present invention specifically includes: a synchronous Buck circuit, an RC voltage dividing circuit, a gate-source equivalent impedance adjustment circuit, an output filter circuit, a load resistor R, a DC power supply, and an upper resistor on the bridge arm of the bridge circuit. The switching tube (upper tube for short) M ₁ and the lower switching tube (lower tube for short) M ₂ . The upper switching tube _M1 and the lower switching tube _M2 are both SiC MOSFETs, located on a certain bridge arm of the bridge circuit. The RC voltage dividing circuit specifically includes a resistor R _{1_H} , a _resistor R _{2_H, a capacitor C 1_H} , a resistor R _{1_L} , a resistor R _{2_L} and a capacitor C _{1_L} . The gate-source equivalent impedance adjustment circuit specifically includes a resistor R _{3_H} , a transistor Q _{1_H} , a diode D _{1_H} , a capacitor C _{2_H} , a resistor R _{3_L} , a transistor Q _{1_L} , a diode D _{1_L} and a capacitor C _{2_L} . The output filter circuit specifically includes a filter inductor L and a filter capacitor C.

As shown in Figure 1, one end of the resistor R _{1_H} and one end of the capacitor C _{1_H} are both connected to the upper tube synchronous drive signal S ₁ of the synchronous Buck circuit; the base of the transistor Q _{1_H} is connected to the other end of the resistor R _{1_H} and the capacitor C _{1_H} respectively. The other end, one end of the resistor R _{2_H} and one end of the resistor R _{3_H} ; the other end of the resistor R _{3_H} is connected to the emitter of the transistor Q _{1_H} , the cathode of the diode D _{1_H} and the gate of the upper switching tube M ₁ ; the collector of the transistor Q _{1_H} The electrodes are connected to the anode of the diode D _{1_H} and one end of the capacitor C _{2_H} ; the source of the upper switch M ₁ is connected to the synchronous Buck circuit, the other end of the resistor R _{2_H} , the other end of the capacitor C _{2_H} , and the drain of the lower switch M ₂ respectively. pole and one end of the filter inductor L; the other end of the filter inductor L is connected to one end of the filter capacitor C and one end of the load resistor R respectively; the drain of the upper switch tube M ₁ is connected to the positive electrode of the DC power supply.

As shown in Figure 1, one end of resistor R _{1_L} and one end of capacitor C _{1_L} are both connected to the low-side synchronous drive signal S2 of the synchronous Buck circuit; the base of transistor Q _{1_L} is connected to the other end of resistor R _{1_L} and the other end of capacitor C _{1_L} respectively. One end, one end of the resistor R _{2_L} and one end of the resistor R _{3_L} ; the other end of the resistor R _{3_L} is connected to the emitter of the transistor Q _{1_L} , the cathode of the diode D _{1_L} and the gate of the lower switch M ₂ ; the collector of the transistor Q _{1_L} Connect the anode of the diode D _{1_L} and one end of the capacitor C _{2_L} respectively; the source of the lower switch tube M ₂ is connected to the synchronous Buck circuit, the other end of the resistor R _{2_L} , the other end of the capacitor C _{2_L} , the other end of the filter capacitor C, and the load. The other end of the resistor R and the negative terminal of the DC power supply.

Among them, the transistor Q _{1_H} and the transistor Q _{1_L} are both PNP type transistors. Both diode D _{1_H} and diode D _{1_L} use Zener diodes. The synchronous Buck circuit can be implemented using a driver chip (DriverIC).

The waveforms of relevant variables in the SiC MOSFET drive circuit of the present invention during a switching cycle are shown in Figure 2, and the corresponding operating mode diagrams are shown in Figures 3 to 10. The abscissa in Figure 2 is time, and the ordinate is voltage. S ₁ and S ₂ are the synchronous drive signals that control the upper tube M ₁ and the lower tube M ₂ in the synchronous Buck circuit respectively. V _gsH and V _gsL are M ₁ and V gsL respectively. The gate-source voltage of M ₂ , V _dsH and V _dsL are the drain-source voltages of M ₁ and M ₂ respectively, V ₁ and V ₂ are the driving voltages of M ₁ and M ₂ respectively, V _miller is M ₁ and M ₂ Miller voltage, V _th is the turn-on voltage of M ₁ and M ₂ .

Each working mode of the SiC MOSFET driving circuit of the present invention is introduced as follows:

Working mode 1 [t ₀ , t ₁ ]: The schematic diagram of the working mode at this stage is shown in Figure 3. At this stage, the upper tube M ₁ is completely turned off, the lower tube M ₂ is fully turned on, and the driving voltage V ₂ is M ₂ The gate-source capacitance C _gsL is charged, and at the same time, the driving current flows through the RC voltage divider circuit composed of C _{1_L} , R _{1_L} , and R _{2_L} to charge C _{1_L} . The charging current flows through R _{3_L} . Since the conduction condition of Q _1L is not met, the auxiliary circuit does not work.

Working mode 2 [t ₁ , t ₂ ]: The schematic diagram of the working mode at this stage is shown in Figure 4. At t ₁ , M ₂ begins to turn off, the upper arm M ₁ is still completely turned off, and C _{1_L} is M ₂ Providing turn-off negative voltage, _M2 's channel and its body diode commutate.

Working mode 3 [t ₂ , t ₃ ]: The schematic diagram of the working mode in this stage is shown in Figure 5. At this stage, M ₁ and M ₂ are both in the off state, and the bridge arm is in the dead zone state.

Working mode 4 [t ₃ , t ₄ ]: The schematic diagram of the working mode at this stage is shown in Figure 6. At t ₃ , M ₁ begins to conduct, V ₁ charges C _gsH , and the driving current flows through C _{1_H} , The voltage dividing circuit composed of R _{1_H} and R _{2_H} charges the capacitor C _{1_H} . At this stage, the crosstalk suppression circuit of M ₂ starts to work. First, the capacitor C _{1_L} is in a fully charged state after operating mode 1, which can provide shutdown for M ₂ . Negative pressure accelerates the turn-off process of M ₂ ; secondly, at this stage, V _dsH drops rapidly, V _dsL rises rapidly, C _gdL begins to charge, and the charging current C _gdL dV _dsL /dt flows through R _{3_L} to produce right positive and left negative The voltage drop causes Q _{1_L} to turn on, and the capacitor C _{2_L} is connected to the circuit to absorb the charging current; the two work together to suppress the gate-source forward crosstalk voltage of M ₂ ; after Q _{1_L} turns on, the charging current is absorbed, When the voltage across R _{3_L} is less than 0.7V, Q _{1_L} does not meet the conduction conditions, causing Q _{1_L} to turn off and C _{2_L} to be disconnected from the drive circuit.

Working mode 5 (t ₄ , t ₅ ): The schematic diagram of the working mode at this stage is shown in Figure 7. M ₁ is completely turned on, M ₂ is completely turned off, and the load current flows through the channel of M ₁ .

Operating mode 6 (t ₅ , t ₆ ): The schematic diagram of the operating mode at this stage is shown in Figure 8. M ₁ begins to turn off. At this time, the channel of M ₁ commutates with the body diode of M ₂ , and V _dsH rapidly rises, V _dsL drops rapidly, C _gdL begins to discharge, and the discharge current passes through the C _{2_L} -D _{1_L} branch, reducing the equivalent impedance of the gate-source drive circuit of M ₂ and suppressing the negative crosstalk voltage of the gate-source of M ₂ .

Working mode 7 (t ₆ , t ₇ ): The schematic diagram of the working mode at this stage is shown in Figure 9. After the commutation is completed, the load current freewheels through the body diode of M ₂ , and both M ₁ and M ₂ are turned off. status, the bridge arm is in a dead zone state.

Working mode 8 (t ₇ , t ₈ ): The schematic diagram of the working mode at this stage is shown in Figure 10. M ₂ starts to conduct, M ₁ remains in the off state, and the channel of M ₂ and the body diode of M ₂ switch. flow.

After the commutation is completed, the working mode changes to switching mode 1. The subsequent working modes are similar to the above and will not be described again here.

The present invention provides a turn-off negative voltage by connecting an RC voltage dividing circuit in parallel between the gate and source of the SiC MOSFET, and adds a variable capacitance structure of a transistor series capacitor in the gate-source equivalent impedance adjustment circuit, and combines the control of switching mode 4 and switching mode From the description of state 6, it can be seen that the SiC MOSFET driving circuit and method of the present invention can effectively suppress the crosstalk voltage without increasing the switching time.

In Figure 11, the gate-source voltages of the upper and lower switching tubes are compared between the traditional drive circuit and the improved SiC MOSFET drive circuit of the present invention (abbreviated as improved drive circuit in the figure) when the upper transistor _M1 is turned on; Figure 11(a) is The gate-source voltage of the upper tube, Figure 11(b) shows the gate-source voltage of the lower tube. It can be seen from Figure 11 that the improved SiC MOSFET driving circuit of the present invention simultaneously suppresses the forward crosstalk voltage and the negative crosstalk voltage without sacrificing the turn-on time of the upper tube.

In Figure 12, the gate-source voltages of the upper and lower switching tubes of the traditional drive circuit and the improved SiC MOSFET drive circuit of the present invention are compared when the upper tube is turned off; Figure 12(a) shows the gate-source voltage of the upper tube. 12(b) is the gate-source voltage of the lower tube. It can be seen from Figure 12 that the improved SiC MOSFET driving circuit of the present invention greatly suppresses the negative crosstalk voltage; at the same time, the improved SiC MOSFET driving circuit also shortens the turn-off time of the upper tube.

Based on the SiC MOSFET driving circuit, the present invention also proposes a SiC MOSFET driving method, including:

In the 1st stage of working mode, the upper switch _M1 is completely turned off, the lower switch _M2 is fully turned on, and the lower switch driving voltage _V2 charges the gate-source capacitance C _gsL of the lower switch _M2 . At the same time, the driving current flows through The RC voltage divider circuit composed of capacitor C _{1_L} , resistor R _{1_L} and resistor R _{2_L} charges capacitor C 1_L; the charging current flows through resistor R _{3_L} . Since the conduction conditions _of transistor Q _1L are not met, the auxiliary circuit does not work;

In the second stage of working mode, the lower switch _M2 begins to turn off, and the upper switch _M1 is still completely turned off. The capacitor _{C1_L} provides a turn-off negative pressure for the lower switch _M2 . The channel of the lower switch _M2 and its The body diode performs commutation;

In the third stage of working mode, the upper switching tube _M1 and the lower switching tube _M2 are both in the off state, and the bridge arm is in the dead zone state;

In the 4th stage of working mode, the upper switch M ₁ begins to conduct, and the upper switch driving voltage V ₁ charges the gate-source capacitor C _gsH of the upper switch M ₁ . At the same time, the driving current flows through the capacitor C _{1_H} , the resistor R _{1_H} and the resistor The RC voltage dividing circuit composed of R _{2_H} charges the capacitor C _{1_H} ; the crosstalk suppression circuit of the lower switching tube M ₂ starts to work. First, the capacitor C _{1_L} is in a fully charged state after operating mode 1, providing a switch for the lower switching tube M ₂ . Turn off the negative voltage, accelerating the turn-off process of the lower switch _M2 ; secondly, the drain-source voltage V _dsH of the upper switch M ₁ drops rapidly, and the drain-source voltage V dsL of the lower switch M ₂ rises rapidly, and the drain-source voltage V _dsL of the lower switch M 2 rises rapidly. The gate-drain capacitance C _gdL of M ₂ begins to charge, and the charging current C _gdL dV _dsL /dt flows through the resistor R _{3_L} , producing a right positive and left negative voltage drop, causing the transistor Q _{1_L} to conduct, and the capacitor C _{2_L} is connected to the circuit to absorb the charge. current; the two work together to suppress the gate-source forward crosstalk voltage of the lower switch _M2 ; after the transistor Q _{1_L} is turned on, the charging current is absorbed, so that when the voltage across the resistor R _{3_L} is less than 0.7V, the transistor Q _{1_L} does not The conduction condition is met, so that the transistor Q _{1_L} is turned off and the capacitor C _{2_L} is disconnected from the drive circuit;

In the 5th stage of working mode, the upper switching tube _M1 is fully turned on, the lower switching tube _M2 is completely turned off, and the load current flows through the channel of the upper switching tube _M1 ;

In the 6th stage of operating mode, the upper switch M ₁ begins to turn off. At this time, the channel of the upper switch M ₁ commutates with the body diode of the lower switch M ₂ , and the drain-source voltage V _dsH of the upper switch M ₁ rapidly rises, the drain-source voltage V _dsL of the lower switching tube M ₂ drops rapidly, and the gate-drain capacitance C _gdL of the lower switching tube M ₂ begins to discharge. The discharge current passes through the branch composed of the capacitor C _{2_L} and the diode D _{1_L} , and decreases The equivalent impedance of the gate-source drive circuit of the lower switch _M2 suppresses the negative crosstalk voltage of the gate-source of the lower switch _M2 ;

In the 7th stage of working mode, after the commutation is completed, the load current freewheels through the body diode of the lower switching tube _M2 , the upper switching tube _M1 and the lower switching tube _M2 are both in the off state, and the bridge arm is in the dead zone state;

In the 8th stage of the working mode, the lower switching tube _M2 starts to conduct, the upper switching tube _M1 remains in the off state, and the channel of the lower switching tube _M2 commutates with the body diode of the lower switching tube _M2 ; after the commutation is completed, The working mode changes to working mode 1.

Compared with traditional drive circuits, the SiC MOSFET drive circuit and method of the present invention effectively suppress the forward crosstalk voltage and negative crosstalk voltage without increasing the switching time, and the devices used in the drive circuit are all passive devices, and the control is simple. It is easy to implement and has broad application prospects.

Each embodiment in this specification is described in a progressive manner. Each embodiment focuses on its differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other.

This article uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and the core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the present invention There will be changes in the specific implementation methods and application scope of the ideas. In summary, the contents of this description should not be construed as limitations of the present invention.

Claims (6)

1. A SiC MOSFET driving circuit, characterized by comprising: synchronous Buck circuit, RC voltage dividing circuit, grid-source electrode equivalent impedance regulating circuit, output filter circuit, load resistor R, direct current power supply and upper switch tube M on bridge arm of bridge circuit ₁ And lower switch tube M ₂ The method comprises the steps of carrying out a first treatment on the surface of the Upper switch tube M ₁ And lower switch tube M ₂ Are SiC MOSFETs; the RC voltage dividing circuit comprises a resistor R _{1_H} Resistance R _{2_H} Capacitance C _{1_H} Resistance R _{1_L} Resistance R _{2_L} Capacitor C _{1_L} The method comprises the steps of carrying out a first treatment on the surface of the The grid-source equivalent impedance adjusting circuit comprises a resistor R _{3_H} Triode Q _{1_H} Diode D _{1_H} Capacitance C _{2_H} Resistance R _{3_L} Triode Q _{1_L} Diode D _{1_L} Capacitor C _{2_L} The method comprises the steps of carrying out a first treatment on the surface of the The output filter circuit comprises a filter inductor L and a filter capacitor C;

wherein the resistance R _{1_H} And a capacitor C _{1_H} One end of the upper tube synchronous driving signal S is connected with the synchronous Buck circuit ₁ The method comprises the steps of carrying out a first treatment on the surface of the Triode Q _{1_H} The base electrodes of (a) are respectively connected with the resistor R _{1_H} The other end of (C) and the capacitance C _{1_H} The other end of (C) and the resistor R _{2_H} One end of (2) and resistor R _{3_H} Is a member of the group; resistor R _{3_H} The other ends of (a) are respectively connected with triode Q _{1_H} Emitter, diode D of (2) _{1_H} Is connected with the negative electrode of the upper switch tube M ₁ A gate electrode of (a); triode Q _{1_H} The collector of (a) is connected with diode D _{1_H} Positive electrode of (a) and capacitor C _{2_H} Is a member of the group; upper switch tube M ₁ The source electrodes of the (B) are respectively connected with a synchronous Buck circuit and a resistor R _{2_H} The other end of (C) and the capacitance C _{2_H} The other end of (C) is provided with a lower switch tube M ₂ One end of the filter inductor L; the other end of the filter inductor L is respectively connected with one end of the filter capacitor C and one end of the load resistor R; upper switch tube M ₁ The drain electrode of the (a) is connected with the anode of the direct current power supply;

resistor R _{1_L} And a capacitor C _{1_L} One end of the lower tube synchronous driving signal S2 is connected with a synchronous Buck circuit; triode Q _{1_L} The base electrodes of (a) are respectively connected with the resistor R _{1_L} The other end of (C) and the capacitance C _{1_L} The other end of (C) and the resistor R _{2_L} One end of (2) and resistor R _{3_L} Is a member of the group; resistor R _{3_L} The other ends of (a) are respectively connected with triode Q _{1_L} Emitter, diode D of (2) _{1_L} Is connected with the negative electrode of the lower switch tube M ₂ A gate electrode of (a); triode Q _{1_L} The collectors of (a) are respectively connected with a diode D _{1_L} Positive electrode of (a) and capacitor C _{2_L} Is a member of the group; lower switch tube M ₂ The source electrodes of the (B) are respectively connected with a synchronous Buck circuit and a resistor R _{2_L} The other end of (C) and the capacitance C _{2_L} The other end of the filter capacitor C, the other end of the load resistor R, and the negative electrode of the dc power supply.

2. The SiC MOSFET driving circuit of claim 1, wherein transistor Q _{1_H} And triode Q _{1_L} All are PNP type triode.

3. The SiC MOSFET driving circuit of claim 1, wherein diode D _{1_H} And diode D _{1_L} Are zener diodes.

4. A SiC MOSFET driving method, characterized in that the SiC MOSFET driving method is applied to the SiC MOSFET driving circuit of claim 1; the SiC MOSFET driving method comprises the following steps:

stage 1 of working mode, upper switch tube M ₁ Completely turn off, lower switch tube M ₂ Fully conducting, down tube driving voltage V ₂ Is a lower switch tube M ₂ Gate-source capacitance C of (2) _gsL Charging while driving current through capacitor C _{1_L} Resistance R _{1_L} And resistance R _{2_L} An RC voltage dividing circuit is composed of a capacitor C _{1_L} Charging; charging current flows through resistor R _{3_L} Due to unsatisfied triode Q _1L Is not operated;

working mode 2 stage, lower switch tube M ₂ Start to turn off, upper switch tube M ₁ Still completely turn off, capacitor C _{1_L} Is a lower switch tube M ₂ Providing turn-off negative pressure, lower switch tube M ₂ The channel and its body diode are commutated;

working mode 3 stage, upper switch tube M ₁ And lower switch tube M ₂ All are in an off state, and the bridge arm is in a dead zone state;

working mode 4 stage, upper switch tube M ₁ Start to conduct and drive voltage V of upper tube ₁ For upper switch tube M ₁ Gate-source capacitance C of (2) _gsH Charging while driving current through capacitor C _{1_H} Resistance R _{1_H} And resistance R _{2_H} An RC voltage dividing circuit is composed of a capacitor C _{1_H} Charging; lower switch tube M ₂ The crosstalk suppressing circuit of (1) starts to operate, first, the capacitor C _{1_L} The working mode 1 is in a full charge state and is a lower switch tube M ₂ Providing turn-off negative pressure to accelerate the lower switch tube M ₂ Is a shutdown procedure of (1); next, upper switch tube M ₁ Drain-source voltage V of (2) _dsH Rapidly descend and drop down the switch tube M ₂ Drain-source voltage V of (2) _dsL Rapidly rise and lower switch tube M ₂ Gate-drain capacitance C of (C) _gdL Start charging, charging current C _gdL dV _dsL /dt flow-through resistor R _{3_L} Generates a right positive left negative voltage drop to make the triode Q _{1_L} Conduction and capacitance C _{2_L} The access circuit absorbs charging current; triode Q _{1_L} After conduction, the charging current is absorbed, so that the resistor R _{3_L} Transistor Q when the voltage at both ends is less than 0.7V _{1_L} Does not satisfy the conduction condition, so that triode Q _{1_L} Turn off, capacitance C _{2_L} Disconnecting from the drive circuit;

working mode 5 stage, upper switch tube M ₁ Fully conducting, lower switch tube M ₂ Fully turned off, the load current flows through the upper switch tube M ₁ A channel of (2);

working mode 6 stage, upper switch tube M ₁ Start to turn off, at this time, switch tube M is turned on ₁ Channel of (2) and lower switch tube M ₂ Is commutated by the body diode of (2), upper switch tube M ₁ Drain-source voltage V of (2) _dsH Rapidly rise and lower switch tube M ₂ Drain-source voltage V of (2) _dsL Rapidly descend and drop down the switch tube M ₂ Gate-drain capacitance C of (C) _gdL Start discharging, discharge current passes through capacitor C _{2_L} And diode D _{1_L} A branch circuit formed by the two circuits reduces the lower switch tube M ₂ The equivalent impedance of the gate-source drive loop of (2) suppresses the lower switch tube M ₂ Gate-source negative crosstalk voltage of (a);

in the working mode 7 stage, after the current conversion is finished, the load current passes through the lower switch tube M ₂ Follow current of body diode of (1), upper switch tube M ₁ And lower switch tube M ₂ All are in an off state, and the bridge arm is in a dead zone state;

working mode 8 stage, lower switch tube M ₂ Starting to conduct and feeding the switch tube M ₁ Maintain the off state, lower switch tube M ₂ Channel of (2) and lower switch tube M ₂ Is used for converting the current of the body diode; after the current conversion is finished, the working mode is converted into a working mode 1.

5. The SiC MOSFET driving method of claim 4, wherein transistor Q _{1_H} And triode Q _{1_L} All are PNP type triode.

6. The SiC MOSFET driving method of claim 4, wherein diode D _{1_H} And diode D _{1_L} Are zener diodes.