CN116820193A - Cable connection correctness identification systems, methods, devices, equipment and storage media - Google Patents

Abstract

The application relates to a cable connection correctness recognition system, a method, a device, equipment and a storage medium, wherein the system comprises a main board, a middle backboard and a hard disk backboard; the hard disk backboard comprises at least one high-speed signal connector, and a first identification bit and a second identification bit which are connected with the high-speed signal connector; the main board is connected with the high-speed signal connector through a high-speed signal cable, and is connected with a first complex programmable logic device arranged in the middle backboard through a sideband signal cable. The application can accurately identify the problem of wrong connection of the server cable, thereby avoiding the extra expense and the waste of human resources caused by wrong connection of the cable.

Description

Cable connection correctness identification systems, methods, devices, equipment and storage media

Technical field

The present application relates to the field of server technology, and in particular to a cable connection correctness identification system, method, device, equipment and storage medium.

Background technique

Nowadays, technology is changing and developing rapidly. Servers have more and more functions and become more powerful. They require more and more chips. The amount of data in servers is getting larger and larger. Servers with multi-node designs are also widely used in data centers. However, the resulting problem is that when there are multiple cables, it is easy to plug them incorrectly.

Existing multi-node server system designs have many cables connected to the mid-board and hard disk backplane. However, for the sake of commonality, the pin definitions of the cables are usually made exactly the same. Silly, even if there are process documents detailing the connection method of system cables, there is still the risk of manual insertion errors in factory production. As shown in Figure 1, it is the connection method between the multi-node system and the mid-backplane and hard disk backplane. IMPEL1 connection MCIO1, IMPEL2 is connected to MCIO2 and so on, but there is still the risk of manual error in connecting IMPEL1 to MCIO2, and this error cannot be verified by the test program. If this problem is not discovered until the client, it will cause the company's reputation to decline, huge heavy work and Manpower dispatch costs.

Therefore, it is urgent to propose a cable connection correctness identification system, method, device, equipment and storage medium that can prevent cable connection errors.

Contents of the invention

Based on this, it is necessary to provide a cable connection correctness identification system, method, device, equipment and storage medium that can prevent cable connection errors in view of the above technical problems.

In a first aspect, a cable connection correctness identification system is provided. The system includes a motherboard, a mid-backplane and a hard disk backplane;

The hard disk backplane includes at least one high-speed signal connector, and a first identification bit and a second identification bit connected to the high-speed signal connector;

The mainboard is connected to the high-speed signal connector through a high-speed signal cable, and is connected to the first complex programmable logic device provided in the mid-backplane through a sideband signal cable.

Optionally, the mainboard includes a baseboard management controller, a second complex programmable logic device and at least one high-density connector;

The baseboard management controller is connected to the second complex programmable logic device through a bidirectional two-wire synchronous serial bus;

The second complex programmable logic device is connected to the high-density connector through a bidirectional two-wire synchronous serial bus, and is connected to the first complex programmable logic device through the sideband signal cable;

The high-density connector is connected to the high-speed signal connector through the high-speed signal cable.

In a second aspect, a method for identifying the correctness of cable connection is provided. The method includes:

In response to detecting that the high-speed signal connector is connected to the high-density connector, based on the second complex programmable logic device, read the signal value of the first identification bit and the second identification bit corresponding to the high-speed signal connector;

Based on the first complex programmable logic device, read the presence signal corresponding to the high-density connector and send it to the second complex programmable logic device;

The second complex programmable logic device determines the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit;

Based on the pin number and the presence signal, determine whether the cable between the high-speed signal connector and the high-density connector is connected correctly;

In response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, error information is sent to the baseboard management controller and saved in a log file.

Optionally, determining the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit includes:

Using the second complex programmable logic device to read the first voltage value corresponding to the first identification bit;

Compare the first voltage value with a first preset value;

In response to detecting that the first voltage value is greater than the first preset value, determining that the signal value of the first identification bit is a first standard value;

In response to detecting that the first voltage value is less than or equal to the first preset value, determine that the signal value of the first identification bit is a second standard value;

At the same time, the second complex programmable logic device is used to read the second voltage value corresponding to the second identification bit;

Compare the second voltage value with the first preset value;

In response to detecting that the second voltage value is greater than the first preset value, determining that the signal value of the second identification bit is a first standard value;

In response to detecting that the second voltage value is less than or equal to the first preset value, determine that the signal value of the second identification bit is a second standard value;

The signal value of the first identification bit and the signal value of the second identification bit are combined to generate a third standard value, which is the pin number.

Optionally, the method for obtaining the presence signal of the high-density connector includes:

Based on the connection relationship between the high-density connector and the first complex programmable logic device, determine the presence signal of each high-density connector, and save the presence signal to the first complex programmable logic device. Programming logic devices;

In response to detecting the node return signal of the target high-density connector, extract the in-position signal of the high-density connector corresponding to the node return signal pre-stored in the first complex programmable logic device;

The presence signal of the high density connector is sent to the second complex programmable logic device.

Optionally, determining whether the cable between the high-speed signal connector and the high-density connector is correctly connected based on the pin number and the presence signal includes:

Obtain the mapping set corresponding to the third standard value in the historical database, and extract the first target presence signal in the mapping set;

In response to detecting that the comparison between the first target presence signal and the presence signal is successful, determining that the cable connection between the high-speed signal connector and the high-density connector is correct;

In response to detecting that the comparison between the first target presence signal and the presence signal is unsuccessful, it is determined that the cable connection between the high-speed signal connector and the high-density connector is incorrect.

Optionally, the construction method of the historical database includes:

Obtain the third standard value corresponding to the signal value of the first identification bit and the second identification bit, and the in-position signal of the high-density connector;

Determine the mapping relationship between the third standard value and the second target presence signal, and generate a corresponding mapping set;

The target mapping set is labeled based on the third standard value and saved in a database to form the historical database.

In a third aspect, a cable connection correctness identification device is provided, and the device includes:

A signal value reading module, configured to read the first identification bit and the second identification corresponding to the high-speed signal connector based on the second complex programmable logic device in response to detecting that the high-speed signal connector is connected to the high-density connector. bit signal value;

The in-position signal reading module is used to read the in-position signal corresponding to the high-density connector based on the first complex programmable logic device, and send it to the second complex programmable logic device;

A pin number determination module, configured to use the second complex programmable logic device to determine the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit;

A judgment module configured to determine whether the cable between the high-speed signal connector and the high-density connector is connected correctly based on the pin number and the in-position signal;

An information sending module, configured to send error information to the baseboard management controller in response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, and save it in a log file.

In yet another aspect, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented:

In response to detecting that the high-speed signal connector is connected to the high-density connector, based on the second complex programmable logic device, read the signal values of the first identification bit and the second identification bit corresponding to the high-speed signal connector. ;

Based on the first complex programmable logic device, read the presence signal corresponding to the high-density connector and send it to the second complex programmable logic device;

The second complex programmable logic device determines the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit;

Based on the pin number and the presence signal, determine whether the cable between the high-speed signal connector and the high-density connector is connected correctly;

In response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, error information is sent to the baseboard management controller and saved in a log file.

In another aspect, a computer-readable storage medium is provided, with a computer program stored thereon, and when the computer program is executed by a processor, the following steps are implemented:

In response to detecting that the high-speed signal connector is connected to the high-density connector, based on the second complex programmable logic device, read the signal values of the first identification bit and the second identification bit corresponding to the high-speed signal connector. ;

Based on the first complex programmable logic device, read the presence signal corresponding to the high-density connector and send it to the second complex programmable logic device;

The second complex programmable logic device determines the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit;

Based on the pin number and the presence signal, determine whether the cable between the high-speed signal connector and the high-density connector is connected correctly;

In response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, error information is sent to the baseboard management controller and saved in a log file.

The above-mentioned cable connection correctness identification system, method, device, equipment and storage medium, the system includes a motherboard, a mid-backplane and a hard disk backplane; the hard disk backplane includes at least one high-speed signal connector, and is connected to the high-speed signal connector. The first identification position and the second identification position of the signal connector are connected; the mainboard is connected to the high-speed signal connector through a high-speed signal cable, and is connected to the high-speed signal connector provided in the middle backplane through a sideband signal cable. The first complex programmable logic device is connected. This application can accurately identify the problem of incorrect connection of server cables, thereby avoiding additional expenses and waste of human resources caused by incorrect cable connection.

Description of the drawings

Figure 1 is a schematic diagram of the connection method of existing cables in the background technology;

Figure 2 is an application environment diagram of the cable connection correctness identification method in one embodiment;

Figure 3 is a structural block diagram of a cable connection correctness identification system in one embodiment;

Figure 4 is another structural block diagram of the cable connection correctness identification system in one embodiment.

Figure 5 is a schematic flowchart of a method for identifying the correctness of cable connection in an embodiment;

Figure 6 is a schematic diagram of the signal value of the cable connection correctness identification method in one embodiment;

Figure 7 is a schematic diagram of the in-position signal value of the cable connection correctness identification method in one embodiment;

Figure 8 is a structural block diagram of a cable connection correctness identification device in one embodiment;

Figure 9 is an internal structure diagram of a computer device in one embodiment.

Detailed ways

In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only Some of the embodiments of this application are provided, but not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.

It should be understood that in the description of the present application, unless the context clearly requires it, the words "including", "includes" and other similar words throughout the specification should be interpreted as having an inclusive meaning rather than an exclusive or exhaustive meaning; that is, "Including but not limited to" means.

It should also be understood that the terms "first," "second," etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Furthermore, in the description of the present application, unless otherwise stated, the meaning of “plurality” is two or more.

It should be noted that the terms "S1", "S2", etc. are only used for the purpose of describing the steps, and do not specifically refer to the sequence or order, nor are they used to limit the present application. They are only used to facilitate the description of the method of the present application. , and cannot be understood as indicating the sequence of steps. In addition, the technical solutions in various embodiments can be combined with each other, but it must be based on the realization by those of ordinary skill in the art. When the combination of technical solutions is contradictory or cannot be realized, it should be considered that such a combination of technical solutions does not exist. , nor is it within the scope of protection required by this application.

The cable connection correctness identification method provided by this application can be applied to the application environment as shown in Figure 2. The terminal 102 communicates with a data processing platform provided on the server 104 through the network. The terminal 102 can be, but is not limited to, various personal computers, laptops, smart phones, tablets and portable wearable devices. The server 104 can It is implemented using a stand-alone server or a server cluster composed of multiple servers.

Embodiment 1: In one embodiment, as shown in Figure 3, a cable connection correctness identification system is provided. The system includes a motherboard, a mid-backplane and a hard disk backplane;

The hard disk backplane includes at least one high-speed signal connector, and a first identification bit and a second identification bit connected to the high-speed signal connector;

The mainboard is connected to the high-speed signal connector through a high-speed signal cable, and is connected to the first complex programmable logic device provided in the mid-backplane through a sideband signal cable.

Wherein, the mainboard includes a baseboard management controller, a second complex programmable logic device and at least one high-density connector;

The baseboard management controller is connected to the second complex programmable logic device through a bidirectional two-wire synchronous serial bus;

The second complex programmable logic device is connected to the high-density connector through a bidirectional two-wire synchronous serial bus, and is connected to the first complex programmable logic device through the sideband signal cable;

The high-density connector is connected to the high-speed signal connector through the high-speed signal cable.

Specifically, as shown in Figure 4, the first identification bit and the second identification bit are the IDO and ID1 pins respectively. The IDO and ID1 pins are used to identify the ID identification signal pins such as the front side or the accessory type. Each high-speed The signal connector will be connected to an IDO and an ID1 pin. Based on this, the specific node position of the high-speed signal connector is determined. Each IDO and ID1 pin will be connected to the upper power supply of P3V3_AUX respectively. The high-speed signal connector can be MCIO, high The density connector is IMPEL, the first complex programmable logic device and the second complex programmable logic device are both CPLD, the baseboard management controller is BMC, the bidirectional two-wire synchronous serial bus is I2C, and the sideband signal cable is Sideband. The specific functions of each component in the system and the interactive relationship between them are described in detail in the embodiment of the cable connection correctness identification method, and will not be described again here.

Embodiment 2: In one embodiment, as shown in Figure 5, a method for identifying the correctness of cable connection is provided. This method is explained by taking the method applied to the terminal in Figure 2 as an example, and includes the following steps:

S1: In response to detecting that the high-speed signal connector is connected to the high-density connector, based on the second complex programmable logic device, read the first identification bit and the second identification bit corresponding to the high-speed signal connector. signal value.

It should be noted that when the high-speed signal connector is connected to the high-density connector, the IDO and ID1 pins connected to the high-speed signal connector will automatically send the corresponding signal value to the second complex programmable logic device. The complex programmable logic device reads and analyzes the signal value sent, and the corresponding analysis results can be used to subsequently determine the specific node location of the high-speed signal connector.

In the above embodiment, because the node position corresponding to each high-speed signal connector is fixed, the signal values corresponding to the IDO and ID1 pins connected to the high-speed signal connector are also fixed. Therefore, through the IDO and ID1 pins The corresponding signal value can accurately obtain the specific node position of the high-speed signal connector, improving the accuracy of judgment.

S2: Based on the first complex programmable logic device, read the presence signal corresponding to the high-density connector and send it to the second complex programmable logic device.

It should be noted that the method for obtaining the presence signal of the high-density connector includes:

Based on the connection relationship between the high-density connector and the first complex programmable logic device, determine the presence signal of each high-density connector, and save the presence signal to the first complex programmable logic device. Programming logic devices;

In response to detecting the node return signal of the target high-density connector, extract the in-position signal of the high-density connector corresponding to the node return signal pre-stored in the first complex programmable logic device;

The presence signal of the high density connector is sent to the second complex programmable logic device.

Specifically, as shown in Figure 7, the on-site signal of each node of the mainboard CPLD (the second complex programmable logic device) and the mid-backboard CPLD (the first complex programmable logic device) are communicated through I2C signals. The I2C signal PIN (pin) of each node connected to the mid-backplane CPLD is also fixed. Therefore, the mid-backplane CPLD can read the in-place signal corresponding to the high-density connector node, and then pre-store the in-place signal in the register (memory), when it is detected that the high-speed signal connector is connected to the high-density connector, the mid-backplane CPLD can send the corresponding presence signal to the mainboard CPLD according to the node return signal of the high-density connector. This will facilitate subsequent judgment as to whether the specific node positions of the high-density connector and the node positions of the high-speed signal connector are connected correctly.

In the above embodiment, because the PIN of connecting the in-place signal of the corresponding node of each high-density connector to the mid-backplane CPLD is fixed, when it is necessary to judge the correctness of the cable connection, read the mid-backplane CPLD The presence signals corresponding to medium and high density connectors can ensure the accuracy of judgment.

S3: The second complex programmable logic device determines the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit.

It should be noted that this step specifically includes:

Using the second complex programmable logic device to read the first voltage value corresponding to the first identification bit;

Compare the first voltage value with a first preset value;

In response to detecting that the first voltage value is greater than the first preset value, determining that the signal value of the first identification bit is a first standard value;

In response to detecting that the first voltage value is less than or equal to the first preset value, determine that the signal value of the first identification bit is a second standard value;

At the same time, the second complex programmable logic device is used to read the second voltage value corresponding to the second identification bit;

Compare the second voltage value with the first preset value;

In response to detecting that the second voltage value is greater than the first preset value, determining that the signal value of the second identification bit is a first standard value;

In response to detecting that the second voltage value is less than or equal to the first preset value, determine that the signal value of the second identification bit is a second standard value;

Combine the signal value of the first identification bit and the signal value of the second identification bit to generate a third standard value, which is the pin number;

Among them, the first preset value can be set according to actual needs.

Specifically, CPLD can identify and judge the signal value of the first identification bit and the second identification bit through voltage. As shown in Figure 6, taking ID signal 01 as an example, the first preset value is defined as 3V. The ID0 signal is grounded because it The resistor has an upper part and the signal is connected to "ground", so the CPLD will read that the first voltage value is 0, so it is judged that the signal value of the first identification bit is 0, which is the second standard value. The ID1 signal has a pull-up resistor because The upper part is connected to 3.3_AUX, so the CPLD will read that the second voltage value is 3.3, so it is judged that the signal value of the first flag bit is 1, which is the first standard value. Therefore, the generated third standard value is 01 , which is the pin number of the high-speed signal connector.

In the above embodiment, the standard value corresponding to the first identification bit and the second identification bit is obtained through the voltage value to obtain the accurate pin number, which is used to improve the accuracy of subsequent comparison results.

S4: Based on the pin number and the presence signal, determine whether the cable between the high-speed signal connector and the high-density connector is connected correctly.

It should be noted that this step specifically includes:

Obtain the mapping set corresponding to the third standard value in the historical database, and extract the first target presence signal in the mapping set;

In response to detecting that the comparison between the first target presence signal and the presence signal is successful, determining that the cable connection between the high-speed signal connector and the high-density connector is correct;

In response to detecting that the comparison between the first target presence signal and the presence signal is unsuccessful, it is determined that the cable connection between the high-speed signal connector and the high-density connector is incorrect.

In some specific implementations, the mapping set corresponding to the in-position signal in the historical database can also be obtained, and the target third standard value in the mapping set can be extracted;

In response to detecting that the target third standard value is successfully compared with the third standard value corresponding to the pin number, it is determined that the cable connection between the high-speed signal connector and the high-density connector is correct;

In response to detecting that the comparison between the target third standard value and the third standard value corresponding to the pin number is unsuccessful, it is determined that the cable connection between the high-speed signal connector and the high-density connector is not successful. correct.

Wherein, the construction method of the historical database includes:

Obtain the third standard value corresponding to the signal value of the first identification bit and the second identification bit, and the in-position signal of the high-density connector;

Determine the mapping relationship between the third standard value and the second target in-position signal, and generate a corresponding mapping set. For example, if the third standard value is 01 and its preset corresponding in-position signal is X, then the generated mapping set is {01,X};

Label the target mapping set based on the third standard value. For example, if the third standard value includes 01, 10, 11, etc., the corresponding generated mapping set may be {01, X1}, {10, X2} , {11, X3}, the corresponding labels are 01, 10, and 11, and are saved to the database in order to form the historical database.

In the above embodiment, by comparing the pin number and the in-place signal with the relevant data in the historical database, it is determined whether the high-speed signal connector and the high-density connector are connected accurately, so as to identify the incorrect connection of the server cable. problems, thereby avoiding additional expenses and waste of human resources due to incorrect cable connections.

S5: In response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, send error information to the baseboard management controller and save it in a log file.

It should be noted that the error information can include incorrectly connected cables and the connection ports corresponding to the cables. Sending the error information to the baseboard management controller can allow technicians to promptly learn about high-speed signal connectors and high-density connectors. If the connection is incorrect, adjust the incorrectly connected cable to avoid additional expenses and waste of human resources caused by incorrect cable connection.

In the above cable connection correctness identification method, the method includes: in response to detecting that the high-speed signal connector is connected to a high-density connector, based on the second complex programmable logic device, reading the high-speed signal connector corresponding The signal values of the first identification bit and the second identification bit; based on the first complex programmable logic device, read the in-position signal corresponding to the high-density connector and send it to the second complex programmable logic device device; the second complex programmable logic device determines the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit; based on the pin number and the in-position signal to determine whether the cable connection between the high-speed signal connector and the high-density connector is correct; in response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect , the error message is sent to the baseboard management controller and saved in the log file. This application can accurately identify the problem of incorrect server cable connection, thereby avoiding additional expenses and waste of human resources caused by incorrect cable connection.

It should be understood that although each step in the flowchart of FIG. 5 is shown in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated in this article, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least some of the steps in Figure 5 may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but may be executed at different times. The execution of these sub-steps or stages The sequence is not necessarily sequential, but may be performed in turn or alternately with other steps or sub-steps of other steps or at least part of the stages.

Embodiment 3: In one embodiment, as shown in Figure 8, a cable connection correctness identification device is provided, including: a signal value reading module, an in-position signal reading module, a pin number determination module, and a judgment module. module and information sending module, where:

A signal value reading module, configured to read the first identification bit and the second identification corresponding to the high-speed signal connector based on the second complex programmable logic device in response to detecting that the high-speed signal connector is connected to the high-density connector. bit signal value;

The in-position signal reading module is used to read the in-position signal corresponding to the high-density connector based on the first complex programmable logic device, and send it to the second complex programmable logic device;

A pin number determination module, configured to use the second complex programmable logic device to determine the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit;

A judgment module configured to determine whether the cable between the high-speed signal connector and the high-density connector is connected correctly based on the pin number and the in-position signal;

An information sending module, configured to send error information to the baseboard management controller in response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, and save it in a log file.

As a preferred implementation manner, in the embodiment of the present invention, the pin number determination module is specifically used for:

Using the second complex programmable logic device to read the first voltage value corresponding to the first identification bit;

Compare the first voltage value with a first preset value;

In response to detecting that the first voltage value is greater than the first preset value, determining that the signal value of the first identification bit is a first standard value;

In response to detecting that the first voltage value is less than or equal to the first preset value, determine that the signal value of the first identification bit is a second standard value;

At the same time, the second complex programmable logic device is used to read the second voltage value corresponding to the second identification bit;

Compare the second voltage value with the first preset value;

In response to detecting that the second voltage value is greater than the first preset value, determining that the signal value of the second identification bit is a first standard value;

In response to detecting that the second voltage value is less than or equal to the first preset value, determine that the signal value of the second identification bit is a second standard value;

The signal value of the first identification bit and the signal value of the second identification bit are combined to generate a third standard value, which is the pin number.

As a preferred implementation manner, in the embodiment of the present invention, the in-position signal reading module is specifically used for:

Based on the connection relationship between the high-density connector and the first complex programmable logic device, determine the presence signal of each high-density connector, and save the presence signal to the first complex programmable logic device. Programming logic devices;

In response to detecting the node return signal of the target high-density connector, extract the in-position signal of the high-density connector corresponding to the node return signal pre-stored in the first complex programmable logic device;

The presence signal of the high density connector is sent to the second complex programmable logic device.

As a preferred implementation manner, in the embodiment of the present invention, the judgment module is specifically used for:

Obtain the mapping set corresponding to the third standard value in the historical database, and extract the first target presence signal in the mapping set;

In response to detecting that the comparison between the first target presence signal and the presence signal is successful, determining that the cable connection between the high-speed signal connector and the high-density connector is correct;

In response to detecting that the comparison between the first target presence signal and the presence signal is unsuccessful, it is determined that the cable connection between the high-speed signal connector and the high-density connector is incorrect.

As a preferred implementation manner, in the embodiment of the present invention, the judgment module is also specifically used for:

Obtain the third standard value corresponding to the signal value of the first identification bit and the second identification bit, and the in-position signal of the high-density connector;

Determine the mapping relationship between the third standard value and the second target presence signal, and generate a corresponding mapping set;

The target mapping set is labeled based on the third standard value and saved in a database to form the historical database.

For specific limitations on the cable connection correctness identification device, please refer to the limitations on the cable connection correctness identification method mentioned above, which will not be described again here. Each module in the above-mentioned cable connection correctness identification device can be implemented in whole or in part by software, hardware and combinations thereof. Each of the above modules may be embedded in or independent of the processor of the computer device in the form of hardware, or may be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

Embodiment 4: In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as shown in Figure 9. The computer equipment includes a processor, memory, network interface, display screen and input device connected by a system bus. Wherein, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes non-volatile storage media and internal memory. The non-volatile storage medium stores operating systems and computer programs. This internal memory provides an environment for the execution of operating systems and computer programs in non-volatile storage media. The network interface of the computer device is used to communicate with external terminals through a network connection. The computer program implements a cable connection correctness identification method when executed by a processor. The display screen of the computer device may be a liquid crystal display or an electronic ink display. The input device of the computer device may be a touch layer covered on the display screen, or may be a button, trackball or touch pad provided on the computer device shell. , it can also be an external keyboard, trackpad or mouse, etc.

Those skilled in the art can understand that the structure shown in Figure 9 is only a block diagram of a partial structure related to the solution of the present application, and does not constitute a limitation on the computer equipment to which the solution of the present application is applied. Specific computer equipment can May include more or fewer parts than shown, or combine certain parts, or have a different arrangement of parts.

In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented:

S1: In response to detecting that the high-speed signal connector is connected to the high-density connector, based on the second complex programmable logic device, read the first identification bit and the second identification bit corresponding to the high-speed signal connector. signal value;

S2: Based on the first complex programmable logic device, read the presence signal corresponding to the high-density connector and send it to the second complex programmable logic device;

S3: The second complex programmable logic device determines the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit;

S4: Based on the pin number and the presence signal, determine whether the cable between the high-speed signal connector and the high-density connector is connected correctly;

S5: In response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, send error information to the baseboard management controller and save it in a log file.

In one embodiment, the processor also implements the following steps when executing the computer program:

Using the second complex programmable logic device to read the first voltage value corresponding to the first identification bit;

Compare the first voltage value with a first preset value;

In response to detecting that the first voltage value is greater than the first preset value, determining that the signal value of the first identification bit is a first standard value;

In response to detecting that the first voltage value is less than or equal to the first preset value, determine that the signal value of the first identification bit is a second standard value;

At the same time, the second complex programmable logic device is used to read the second voltage value corresponding to the second identification bit;

Compare the second voltage value with the first preset value;

In response to detecting that the second voltage value is greater than the first preset value, determining that the signal value of the second identification bit is a first standard value;

In response to detecting that the second voltage value is less than or equal to the first preset value, determine that the signal value of the second identification bit is a second standard value;

The signal value of the first identification bit and the signal value of the second identification bit are combined to generate a third standard value, which is the pin number.

In one embodiment, the processor also implements the following steps when executing the computer program:

Based on the connection relationship between the high-density connector and the first complex programmable logic device, determine the presence signal of each high-density connector, and save the presence signal to the first complex programmable logic device. Programming logic devices;

In response to detecting the node return signal of the target high-density connector, extract the in-position signal of the high-density connector corresponding to the node return signal pre-stored in the first complex programmable logic device;

The presence signal of the high density connector is sent to the second complex programmable logic device.

In one embodiment, the processor also implements the following steps when executing the computer program:

Obtain the mapping set corresponding to the third standard value in the historical database, and extract the first target presence signal in the mapping set;

In response to detecting that the comparison between the first target presence signal and the presence signal is successful, determining that the cable connection between the high-speed signal connector and the high-density connector is correct;

In response to detecting that the comparison between the first target presence signal and the presence signal is unsuccessful, it is determined that the cable connection between the high-speed signal connector and the high-density connector is incorrect.

In one embodiment, the processor also implements the following steps when executing the computer program:

Obtain the third standard value corresponding to the signal value of the first identification bit and the second identification bit, and the in-position signal of the high-density connector;

Determine the mapping relationship between the third standard value and the second target presence signal, and generate a corresponding mapping set;

The target mapping set is labeled based on the third standard value and saved in a database to form the historical database.

Embodiment 5: In one embodiment, a computer-readable storage medium is provided, with a computer program stored thereon. When the computer program is executed by a processor, the following steps are implemented:

S1: In response to detecting that the high-speed signal connector is connected to the high-density connector, based on the second complex programmable logic device, read the first identification bit and the second identification bit corresponding to the high-speed signal connector. signal value;

S2: Based on the first complex programmable logic device, read the presence signal corresponding to the high-density connector and send it to the second complex programmable logic device;

S3: The second complex programmable logic device determines the pin number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit;

S4: Based on the pin number and the presence signal, determine whether the cable between the high-speed signal connector and the high-density connector is connected correctly;

S5: In response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, send error information to the baseboard management controller and save it in a log file.

In one embodiment, the computer program, when executed by the processor, also implements the following steps:

Using the second complex programmable logic device to read the first voltage value corresponding to the first identification bit;

Compare the first voltage value with a first preset value;

In response to detecting that the first voltage value is greater than the first preset value, determining that the signal value of the first identification bit is a first standard value;

In response to detecting that the first voltage value is less than or equal to the first preset value, determine that the signal value of the first identification bit is a second standard value;

At the same time, the second complex programmable logic device is used to read the second voltage value corresponding to the second identification bit;

Compare the second voltage value with the first preset value;

In response to detecting that the second voltage value is greater than the first preset value, determining that the signal value of the second identification bit is a first standard value;

In response to detecting that the second voltage value is less than or equal to the first preset value, determine that the signal value of the second identification bit is a second standard value;

The signal value of the first identification bit and the signal value of the second identification bit are combined to generate a third standard value, which is the pin number.

In one embodiment, the computer program, when executed by the processor, also implements the following steps:

Based on the connection relationship between the high-density connector and the first complex programmable logic device, determine the presence signal of each high-density connector, and save the presence signal to the first complex programmable logic device. Programming logic devices;

In response to detecting the node return signal of the target high-density connector, extract the in-position signal of the high-density connector corresponding to the node return signal pre-stored in the first complex programmable logic device;

The presence signal of the high density connector is sent to the second complex programmable logic device.

In one embodiment, the computer program, when executed by the processor, also implements the following steps:

Obtain the mapping set corresponding to the third standard value in the historical database, and extract the first target presence signal in the mapping set;

In response to detecting that the comparison between the first target presence signal and the presence signal is successful, determining that the cable connection between the high-speed signal connector and the high-density connector is correct;

In response to detecting that the comparison between the first target presence signal and the presence signal is unsuccessful, it is determined that the cable connection between the high-speed signal connector and the high-density connector is incorrect.

In one embodiment, the computer program, when executed by the processor, also implements the following steps:

Obtain the third standard value corresponding to the signal value of the first identification bit and the second identification bit, and the in-position signal of the high-density connector;

Determine the mapping relationship between the third standard value and the second target presence signal, and generate a corresponding mapping set;

The target mapping set is labeled based on the third standard value and saved in a database to form the historical database.

Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage. In the media, when executed, the computer program may include the processes of the above method embodiments. Any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and/or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous chain Synchlink DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

The technical features of the above embodiments can be combined in any way. To simplify the description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, all possible combinations should be used. It is considered to be within the scope of this manual.

The above-described embodiments only express several implementation modes of the present application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all fall within the protection scope of the present application.

Claims (10)

1. The cable connection correctness recognition system is characterized by comprising a main board, a middle backboard and a hard disk backboard;

the hard disk backboard comprises at least one high-speed signal connector, and a first identification bit and a second identification bit which are connected with the high-speed signal connector;

the main board is connected with the high-speed signal connector through a high-speed signal cable, and is connected with a first complex programmable logic device arranged in the middle backboard through a sideband signal cable.

2. The system of claim 1, wherein the motherboard includes a baseboard management controller, a second complex programmable logic device, and at least one high-density connector;

the baseboard management controller is connected with the second complex programmable logic device through a bidirectional two-wire synchronous serial bus;

the second complex programmable logic device is connected with the high-density connector through a bidirectional two-wire synchronous serial bus and is connected with the first complex programmable logic device through the sideband signal cable;

the high-density connector is connected with the high-speed signal connector through the high-speed signal cable.

3. A cable connection correctness recognition method applied to the cable connection correctness recognition system of claim 1 or 2, the method comprising:

reading signal values of a first identification bit and a second identification bit corresponding to the high-speed signal connector based on the second complex programmable logic device in response to detecting that the high-speed signal connector is connected with the high-density connector;

based on the first complex programmable logic device, reading an in-place signal corresponding to the high-density connector and sending the in-place signal to the second complex programmable logic device;

The second complex programmable logic device determines the pin sequence number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit;

determining whether a cable between the high-speed signal connector and the high-density connector is properly connected based on the pin sequence number and the in-place signal;

in response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect, an error message is sent to a baseboard management controller and saved in a log file.

4. The method of claim 3, wherein determining the pin sequence number of the high-speed signal connector based on the signal values of the first identification bit and the second identification bit comprises:

reading a first voltage value corresponding to the first identification bit by using the second complex programmable logic device;

comparing the first voltage value with a first preset value;

determining that the signal value of the first identification bit is a first standard value in response to detecting that the first voltage value is larger than the first preset value;

determining that the signal value of the first identification bit is a second standard value in response to detecting that the first voltage value is smaller than or equal to the first preset value;

Simultaneously, a second voltage value corresponding to the second identification bit is read by using the second complex programmable logic device;

comparing the second voltage value with the first preset value;

determining that the signal value of the second identification bit is a first standard value in response to detecting that the second voltage value is larger than the first preset value;

determining that the signal value of the second identification bit is a second standard value in response to detecting that the second voltage value is smaller than or equal to a first preset value;

and combining the signal value of the first identification bit and the signal value of the second identification bit to generate a third standard value, namely the pin serial number.

5. The method for identifying correctness of cable connection according to claim 3, wherein the method for acquiring the in-place signal of the high-density connector comprises:

determining an in-place signal of each high-density connector based on the connection relation between the high-density connector and the first complex programmable logic device, and storing the in-place signal into the first complex programmable logic device;

extracting an in-place signal of the high-density connector corresponding to the node return signal pre-stored in the first complex programmable logic device in response to the detection of the node return signal of the target high-density connector;

And sending the bit signals of the high-density connector to the second complex programmable logic device.

6. The method of claim 4, wherein determining whether the cable between the high-speed signal connector and the high-density connector is properly connected based on the pin sequence number and the in-place signal comprises:

acquiring a mapping set corresponding to the third standard value in the historical database, and extracting a first target in-place signal in the mapping set;

determining that a cable connection between the high-speed signal connector and the high-density connector is correct in response to detecting that the first target incumbent signal is successfully compared with the incumbent signal;

in response to detecting that the first target incumbent signal is unsuccessful in comparison with the incumbent signal, determining that a cable connection between the high-speed signal connector and the high-density connector is incorrect.

7. The method for identifying correctness of cable connection according to claim 6, wherein the method for constructing the history database comprises:

acquiring a third standard value corresponding to the signal values of the first identification bit and the second identification bit and an in-place signal of the high-density connector;

Determining a mapping relation between the third standard value and the second target in-place signal, and generating a corresponding mapping set;

and marking the target mapping set based on the third standard value, and storing the target mapping set in a database to form the history database.

8. A cable connection correctness recognition device, the device comprising:

the signal value reading module is used for reading signal values of a first identification bit and a second identification bit corresponding to the high-speed signal connector based on the second complex programmable logic device when the high-speed signal connector is connected with the high-density connector;

the on-site signal reading module is used for reading on-site signals corresponding to the high-density connector based on the first complex programmable logic device and sending the on-site signals to the second complex programmable logic device;

the pin sequence number determining module is used for determining the pin sequence number of the high-speed signal connector by utilizing the second complex programmable logic device based on the signal values of the first identification bit and the second identification bit;

the judging module is used for determining whether the cable between the high-speed signal connector and the high-density connector is connected correctly or not based on the pin serial number and the in-place signal;

And the information sending module is used for sending error information to the baseboard management controller and storing the error information in a log file in response to detecting that the cable connection between the high-speed signal connector and the high-density connector is incorrect.

9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 3 to 7 when the computer program is executed by the processor.

10. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 3 to 7.