CN116724400A - Image sensor, method for producing an image sensor and particle detector - Google Patents
Image sensor, method for producing an image sensor and particle detector Download PDFInfo
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Abstract
本公开的实施例提供了一种图像传感器、制备图像传感器的方法和粒子探测器。该图像传感器包括衬底；感光层，包括感光阵列单元，感光阵列单元用于接收由感光层的第一面入射的高能粒子并将高能粒子转换成电信号；布线层，布置在感光层与衬底之间，其与感光层中与第一面相对的第二面贴合；以及负电荷介质层，沉积在感光层的第一面之上。根据本公开实施例的图像传感器能够有效抑制暗电流。同时，由于只采用负电荷介质层与感光层的背面直接接触，从而能够实现优异的抗辐照性能，使得图像传感器能够应用于高能粒子探测等领域。
Embodiments of the present disclosure provide an image sensor, a method of preparing an image sensor, and a particle detector. The image sensor includes a substrate; a photosensitive layer, including a photosensitive array unit, which is used to receive high-energy particles incident from the first surface of the photosensitive layer and convert the high-energy particles into electrical signals; a wiring layer, arranged between the photosensitive layer and the lining between the bottom and the second surface of the photosensitive layer that is opposite to the first surface; and a negatively charged dielectric layer deposited on the first surface of the photosensitive layer. The image sensor according to the embodiment of the present disclosure can effectively suppress dark current. At the same time, because only the negatively charged dielectric layer is in direct contact with the back of the photosensitive layer, excellent radiation resistance can be achieved, allowing the image sensor to be used in fields such as high-energy particle detection.
Description
The present disclosure relates to the field of image sensors, and in particular to an image sensor, a method of manufacturing and a particle detector using an image sensor.
An image sensor is a device that converts an optical image into an electronic signal, and is widely used in digital cameras and other electronic optical devices. In contrast to light sensitive elements of "point" light sources such as photodiodes, phototriodes, etc., an image sensor is a functional device that divides the light image on its light-receiving surface into a number of small cells that are converted into a usable electrical signal.
Image sensors are generally classified into Charge-coupled Device (CCD) image sensors and Complementary Metal Oxide Semiconductor (CMOS) image sensors. CMOS image sensors are typically composed of a photosensitive array element and wiring layers such as row drivers, column drivers, timing control logic, etc., all typically integrated on the same silicon die.
The image sensor is classified into a front-illuminated image sensor and a back-illuminated image sensor according to the difference of the incident directions of light rays. Front-lit image sensors are more traditional image sensors. In both of these conventional image sensors, a general wiring layer is disposed or formed on the front surface of the photosensitive array unit. In the front-illuminated image sensor, incident light is incident on the front surface of the photosensitive array unit after passing through the micro lens, the optical filter and the wiring layer during detection, so that the photosensitive array unit converts the light into an electrical signal. Since the wiring layer generally includes a plurality of layers of metal lines, and the metal is opaque and also reflective, incident light reaching the photosensitive array unit of the front-illuminated image sensor is only 7 or less of the original incident light due to blocking and reflection of the wiring layer, thereby degrading the performance of the image sensor.
In order to improve various problems of the front-illuminated image sensor, the back-illuminated image sensor has been developed. In contrast to front-illuminated image sensors, light is incident from the back of the photosensitive array element. That is, light is not blocked and reflected by the wiring layer before being incident on the photosensitive array unit. In this way, the imaging quality and performance of the back-illuminated sensor can be improved. However, dark current problems exist in the back-illuminated image sensor, which affect the imaging quality. In particular, in the back-illuminated image sensor used in the field of high-energy particle radiation detection, the high-energy particle radiation may further induce interface states, thereby further causing dark current problems, and may eventually lead to degradation and eventual failure of the device.
Disclosure of Invention
The present disclosure relates to a technical solution related to an image sensor, and in particular provides an image sensor, a preparation method, and a particle detector using the image sensor.
In a first aspect of the present disclosure, an image sensor is provided. The image sensor includes a substrate; the photosensitive layer comprises a photosensitive array unit, and the photosensitive array unit is used for receiving high-energy particles incident from a first surface of the photosensitive layer and converting the high-energy particles into electric signals; a wiring layer disposed between the photosensitive layer and the substrate and bonded to a second face of the photosensitive layer opposite to the first face; and a negatively charged dielectric layer deposited over the first side of the photosensitive layer. As can be seen from the above description, the image sensor according to the embodiment of the present disclosure is a back-illuminated image sensor. The image sensor according to the embodiment of the present disclosure is characterized in that only a negative charge dielectric layer grown on the back surface of a photosensitive layer by deposition is used unlike a conventional backside illuminated image sensor, which means that the negative charge dielectric layer is in direct contact with the back surface of the photosensitive layer, and there is no other dielectric material layer except for the negative charge dielectric layer on the back surface of the photosensitive layer. On the one hand, this enables the negative charge density at the interface to be above a predetermined threshold. Since the negative fixed charges in the negative charge dielectric layer and the positive charges in the other insulating layers and the dielectric interface have a counteracting effect in the conventional scheme using the multi-dielectric stack, the image sensor according to the embodiments of the present disclosure has a higher effective negative fixed charge density at the interface in the negative charge dielectric layer compared to the conventional scheme. The interface energy band is bent upwards, the fermi energy level moves towards the valence band, so that hole enrichment is generated, the probability of filling interface states and trap energy levels in the forbidden band is reduced, a larger electron barrier is formed, a repulsive field for electrons is generated, free electrons are prevented from moving towards the interface, and the purpose of effectively inhibiting dark current is achieved. On the other hand, the method is more important, because only the negative charge dielectric layer is in direct contact with the back surface of the photosensitive layer, the number of dielectric interfaces in the scheme of the traditional multi-dielectric lamination is effectively reduced, charge accumulation near the dielectric interfaces and in the dielectric is weakened, which is caused by high-energy particle irradiation, and therefore excellent radiation resistance can be achieved, and the image sensor can be applied to the fields of high-energy particle detection and the like.
In some implementations, the negatively charged dielectric layer is a single dielectric layer. In this way, it is possible to effectively improve the irradiation resistance and to improve the effective negative fixed charge density at the interface, thereby effectively suppressing the dark current.
In one implementation, the negatively charged dielectric layer comprises a high dielectric constant material. In this way, the negatively charged dielectric layer can be realized in a simple and efficient manner.
In one implementation, the density of negative fixed charges in the negative charge dielectric layer at the interface with the photosensitive layer is above a predetermined threshold.
In some implementations, the predetermined threshold is selected to suppress the generation of dark current at the interface. In this way, it is further ensured that the image sensor according to the embodiment of the present disclosure can effectively suppress dark current.
In one implementation, a negatively charged dielectric layer is used to cause the fermi level in the photosensitive layer at the interface with the negatively charged dielectric layer to be approximately below the valence band. In this way, by shifting the fermi level toward and substantially below the valence band, it is possible to generate enrichment of holes and form a strong built-in electric field, thereby reducing the electron concentration at the interface to achieve the effect of field effect passivation and thereby effectively reducing dark current.
In some implementations, the density of the negative fixed charge in the negative charge dielectric layer at the interface with the photosensitive layer is at 10 12 /cm 2 ～10 13 /cm 2 Between them. In this way, a large built-in electric field and electron barrier can be generated at the interface, thereby effectively suppressing dark current.
In some implementations, the negatively charged dielectric layer includes a metal oxide or nitride. In this way, the negatively charged dielectric layer can be realized in a cost-effective manner.
In one implementation, the negatively charged dielectric layer comprises a material capable of providing a negative charge of a predetermined density at least at the interface with the photosensitive layer.
In some implementations, the negatively charged dielectric layer includes one of: aluminum oxide, hafnium oxide, gallium oxide, tantalum oxide, lanthanum oxide, oxide, zirconium oxide, or silicon nitride. In this way, the choice of negatively charged dielectric layers is made more flexible.
In some implementations, the negatively charged dielectric layer has a thickness between 2nm and 8 nm. By using a negatively charged dielectric layer with a thinner thickness, the transport and release of undesired accumulated charges in the dielectric layer under high energy particle radiation is facilitated even more, thereby further improving the radiation resistance.
In some implementations, a negatively charged dielectric layer is formed on the first side of the photosensitive layer by atomic layer deposition. In this way, the interface quality can be improved, thereby more stably and reliably realizing the fixed negative charge density at the interface with the photosensitive layer in the negative charge medium layer, and further ensuring the dark current inhibition performance and the irradiation resistance performance of the image sensor.
In some implementations, at least a first face portion of the photosensitive layer is doped p-type silicon.
In some implementations, the first side of the photosensitive layer is treated such that there is no or only a native oxide layer of the photosensitive layer having a thickness of less than 1nm at the interface. By avoiding as much as possible a natural oxide layer or any other oxide layer between the negative charge dielectric layer and the photosensitive layer, dark current suppressing performance and irradiation resistance performance of the image sensor can be further ensured.
In some implementations, the negative charge is generated by any one of the following: the growth process of the negative charge medium layer and the lattice matching of the interface of the negative charge medium layer and the photosensitive layer. The negative fixed charge may be formed in various ways, thereby enabling the image sensor to be manufactured in various ways without affecting the radiation resistance and suppressing the dark current performance.
According to a second aspect of the present disclosure, a method of manufacturing an image sensor is provided. The method includes providing a substrate; forming a photosensitive layer including a photosensitive array unit for receiving energetic particles incident from a first side of the photosensitive layer and converting the energetic particles into an electrical signal, and forming a wiring layer on a second side of the photosensitive layer, the first side being opposite to the second side; coupling the photosensitive layer to the substrate via the wiring layer; and depositing a negatively charged dielectric layer over the first side of the photosensitive layer. The image sensor manufactured in this way adopts a mode that the negative charge medium layer is in direct contact with the back surface of the photosensitive layer, so that the irradiation resistance can be effectively improved while dark current is effectively restrained.
In some implementations, the method further includes processing the first side of the photosensitive layer to thin a thickness of the photosensitive layer before coupling the photosensitive layer to the substrate via the wiring layer; and processing the first surface of the thinned photosensitive layer to remove the natural oxide layer, so that no natural oxide layer or only a natural oxide layer with the thickness less than 1nm exists at the interface of the high dielectric constant material layer and the photosensitive layer. By avoiding as much as possible a natural oxide layer or any other oxide layer between the negative charge dielectric layer and the photosensitive layer, dark current suppressing performance and irradiation resistance performance of the image sensor can be further ensured.
There is also provided in accordance with a third aspect of the present disclosure a particle detector. The particle detector comprises the image sensor mentioned in the first aspect above, said image sensor detecting energetic particles and providing data based on electrical signals converted by the incidence of energetic particles; and a memory for storing data provided by the image sensor.
It should be understood that the description in this summary is not intended to limit the critical or essential features of the disclosure, nor is it intended to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following description.
The above, as well as additional purposes, features, and advantages of embodiments of the present disclosure will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. In the accompanying drawings, several embodiments of the present disclosure are shown by way of example and not by way of limitation.
FIG. 1 shows a partially simplified cross-sectional schematic diagram of an image sensor in a conventional approach;
FIG. 2 shows a partially simplified cross-sectional schematic diagram of another image sensor in a conventional approach;
FIG. 3 shows a simplified side view schematic of an image sensor according to an embodiment of the present disclosure;
FIG. 4 illustrates a comparison of a built-in electric field at an interface of a conventional image sensor and a built-in electric field formed at an interface of an image sensor according to an embodiment of the present disclosure;
FIG. 5 illustrates a comparison of capacitance-voltage curves for a dielectric stack structure and a single dielectric layer structure according to an embodiment of the present disclosure;
FIG. 6 shows a flowchart of the main steps of a method of making an image sensor according to an embodiment of the present disclosure; and
fig. 7 shows a simplified cross-sectional schematic diagram of an image sensor during the process of preparing the image sensor according to an embodiment of the present disclosure.
The same or similar reference numbers will be used throughout the drawings to refer to the same or like components.
The principles and spirit of the present disclosure will be described below with reference to several exemplary embodiments shown in the drawings. It should be understood that these specific embodiments are described merely to enable those skilled in the art to better understand and practice the present disclosure and are not intended to limit the scope of the present disclosure in any way. In the following description and claims, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art.
As used herein, the term "comprising" and the like should be understood to be open-ended, i.e., including, but not limited to. The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first," "second," and the like, may refer to different or the same object and are used solely to distinguish one from another without implying a particular spatial order, temporal order, order of importance, etc. of the referenced objects.
The term "circuit" as used herein refers to one or more of the following: (a) Hardware-only circuit implementations (such as analog-only and/or digital-circuit implementations); and (b) a combination of hardware circuitry and software, such as (if applicable): (i) A combination of analog and/or digital hardware circuitry and software/firmware, and (ii) any portion of a hardware processor and software (including digital signal processors, software, and memory that work together to cause an apparatus, such as a communication device or other electronic device, to perform various functions); and (c) hardware circuitry and/or a processor, such as a microprocessor or a portion of a microprocessor, that requires software (e.g., firmware) for operation, but may not have software when software is not required for operation. Definition of circuitry applies to all scenarios in which this term is used in this application (including in the claims). As another example, the term "circuitry" as used herein also covers an implementation of only a hardware circuit or processor (or multiple processors), or a portion of a hardware circuit or processor, or accompanying software or firmware. For example, if applicable to particular claim elements, the term "circuitry" also covers a baseband integrated circuit or processor integrated circuit, a network device, a terminal device, or a similar integrated circuit in another device.
The back-illuminated image sensor mentioned in the foregoing places the wiring layer on the back surface (hereinafter also referred to as the first surface) of the photosensitive array unit, so that light can directly strike the photodiode, and the light can be incident on the photosensitive array unit with little blocking and interference, thereby making the back-illuminated image sensor extremely high in light utilization. Therefore, the back-illuminated image sensor can better utilize the irradiated light, and the imaging quality is better in a low-illumination environment.
The back-illuminated image sensor can have higher light utilization efficiency, and thus, has higher sensitivity in a low-illumination environment. Meanwhile, the wiring layer does not influence the light received by the photosensitive array unit, so the wiring layer can be made thicker, more processing circuits can be placed, and the processing speed of signals can be improved.
It is widely used in various fields of life and work due to advantages such as excellent imaging quality and processing speed of the back-illuminated image sensor. For example, in life, a back-illuminated image sensor is commonly used where a mobile phone, a camera, etc. are used. Moreover, the back-illuminated image sensor is widely applied to the fields of space imaging, high-energy particle radiation detection and the like.
However, physical devices such as semiconductors may not be entirely ideal without any drawbacks. One of the unavoidable problems of back-illuminated image sensors, particularly those used in the field of high-energy particle radiation detection, is the radiation resistance. When the energetic particles pass through the layers of material, particularly dielectric material, that make up the device, the energetic particles lose a substantial portion of their energy by generating electron-hole pairs. Such excess charge carriers generated under high energy particle irradiation can interfere with or damage semiconductor devices, particularly photosensitive array cells, by inducing a total ionization dose (Total Ionizing Dose, TID) effect. The TID effect is a phenomenon in which a large number of radiation particles enter the interior of the material of a semiconductor device and ionize with out-of-atomic electrons of the material to generate additional charges, which accumulate in the device, especially in a dielectric layer, or induce interface states at the interface, resulting in gradual degradation, or even eventual loss, of device performance. The constant accumulation of excess charge from irradiation induces dark current. Dark current is very difficult to distinguish from the charge generated by illumination at the readout circuit. The dark current is not exactly the same throughout the photosensitive array cell, which can lead to fixed pattern noise. For a pixel cell that includes an integration function, the fixed pattern noise caused by dark current is proportional to the integration time. The presence of dark current adversely affects imaging of the photosensitive array element. The dark current caused by TID also increases with increasing total dose of radiation, thereby affecting the lifetime of the image sensor.
The dark current is generated due to the interface state of the incident surface of the back of the photosensitive array unit. Interface states refer to some discrete or continuous electron levels or energy bands in the semiconductor forbidden bands at the interface of different materials due to lattice mismatch in the heterostructure. Therefore, the conventional scheme for suppressing dark current is mostly developed around the idea of how to realize a more ideal interface and thus reduce the interface state. These include improving the quality of the interfacial film growth to reduce interfacial defects, achieving dark current suppression using oxide layer/high dielectric constant material layer/oxide stack layer structures, and the like.
For example, one of the conventional solutions has proposed a method of reducing dark current of a back-illuminated image sensor in order to suppress dark current. The method mainly comprises the following steps: a first step of forming an insulating layer 503 on a first surface of a wafer 501 by using the wafer 501 as a substrate; a second step of growing a high dielectric constant material layer 502 on the insulating layer 503 as a passivation layer on the back surface of the back-illuminated image sensor; and thirdly, irradiating the passivation layer on the back surface of the back-illuminated image sensor by ultraviolet rays.
A schematic cross-sectional view of an image sensor formed by this conventional solution is shown in fig. 1. As can be seen from fig. 1, it is made of at least two layers of material arranged on the back of the photosensitive array element, i.e. in the form of a multi-dielectric stack, comprising an insulating layer 503, such as silicon dioxide, formed on the back and a layer 502 of high dielectric constant material formed on top of the insulating layer 503. The scheme achieves interface improvement of the back surface of the photosensitive array unit by adopting the multi-medium lamination, and thus dark current is restrained by reducing the surface state of the interface and interface field passivation.
There is also a method of enhancing the contrast of dark current by a back-illuminated image sensor in the conventional solution. The method mainly comprises the following steps: providing a substrate 508, wherein the upper surface of the substrate 508 is provided with a natural oxide layer; removing the native oxide layer on the substrate 508; growing a thin film oxide layer 504 on the upper surface of the substrate 508 by using a decoupled plasma oxidation method; the temperature of the decoupling plasma oxidation method in the oxidation process is 200-500 ℃; the decoupling plasma oxidation method utilizes a continuous pulse mode and takes oxygen as dissociation gas; growing an alumina film 505 on the film oxide layer 504; growing a tantalum oxide film 506 on the aluminum oxide film 505; an oxide layer 507 is grown over the tantalum oxide film 506.
The backside illuminated image sensor formed with this solution also forms a multi-dielectric stack comprising, from bottom to top, a thin film oxide layer 504, an aluminum oxide film 505, a tantalum oxide film 506, and an oxide layer 507 at the back of the photosensitive array element (i.e., substrate 508), as shown in fig. 2. According to the scheme, interface states of the back incident surface of the photosensitive array unit are reduced and interface fields are passivated by adopting a four-layer dielectric lamination mode, so that dark current is suppressed.
However, in the conventional scheme, although the dark current can be suppressed to some extent by the synergistic effect of the chemical passivation and the field passivation, the irradiation resistance of the formed back-illuminated image sensor is poor due to the introduction of the multi-dielectric stack. Radiation resistance refers to the ability of a device to maintain stable performance of the device under irradiation, such as high energy particles. As mentioned previously, irradiation of energetic particles can lead to total ionization dose effects, resulting in an increase in dark current and damage and destruction of dielectric materials and interfaces in the sensor. The total ionization dose effect refers to the phenomenon that a large amount of radiation particles enter the material of the semiconductor device and generate ionization with electrons outside the atomic nucleus of the material to generate additional charges, and the charges are accumulated in an oxide layer in the device or induce interface states at the interface between the semiconductor and the insulating layer, so that the performance of the device is gradually degraded or even finally lost.
The energetic particles 200 mentioned herein include energetic electrons, X-rays, cosmic rays, alpha particles, energetic ions, etc., with energies in the order of keV to MeV. The impact of the energetic particle 200 on a conventional backside illuminated image sensor mainly includes: charge builds up continuously with the total radiation dose, dark current increases with the total radiation dose, detection sensitivity decreases, white pixels are generated, and the like, which can lead to reduced performance or even functional failure of the device.
Therefore, the conventional technical solution for optimizing the interface state by adopting the multi-medium stack introduces a plurality of medium interfaces, so that charge enrichment generated by irradiation in the medium stack is difficult to release. When these sensors are applied in fields where secondary and back-scattered electron detectors of scanning electron microscopes, X-ray detectors, radiation-resistant image sensors for aerospace, particle-collided radiation detectors, etc. are exposed to high-energy particles 200, the use of multi-dielectric stacks can lead to devices that are more susceptible to the effect of the total ionization dose under irradiation, leading to deterioration of the interface states on the one hand, and charge enrichment in the dielectric stack, leading to additional undesired field effects, changing the potential distribution at the original interface, which would lead to an increase in dark current and even device failure on the other hand. In addition, with the scheme shown in fig. 1, since there is a fixed negative charge in the negative charge dielectric layer near its interface with the insulating layer, positive charges are induced in the insulating layer, so that the field passivation effect of the negative charge dielectric layer is weakened, and thus the suppression of dark current is adversely affected. In addition, the design and fabrication of the multi-media stack also increases the difficulty of fabrication and implementation costs of the image sensor.
It follows that the optimization of the radiation resistance performance is critical to improve the detection accuracy and lifetime of the image sensor for the detection of the energetic particles 200. In order to improve the anti-irradiation performance of the back-illuminated image sensor while suppressing dark current, so that it can be applied to the fields of space imaging, high-energy particle 200 radiation detection and the like, for secondary electron and back-scattered electron detectors of a scanning electron microscope, X-ray detectors, anti-irradiation image sensors for aerospace, particle collision radiation detectors and the like, embodiments of the present disclosure provide a manufacturing method for an image sensor, particularly a back-illuminated image sensor, and the manufactured image sensor.
In a first aspect of embodiments of the present disclosure, an image sensor is provided. Fig. 3 shows a schematic side view of the image sensor. As shown in fig. 3, an image sensor according to an embodiment of the present disclosure includes a substrate 102, a photosensitive layer 101, a wiring layer 103, and a negative charge dielectric layer 104. The substrate 102 may comprise any suitable substrate, and may comprise, for example, an active chip unit and/or a passive substrate, etc.
The wiring layer 103 is located between the substrate 102 and the photosensitive layer 101, in which a first face facing away from the wiring layer 103 is a back face and a second face adjacent to the wiring layer 103 is a front face. The photosensitive layer 101 is a semiconductor layer including a photosensitive array unit. The photosensitive array unit is used for receiving the high-energy particles 200 incident on the first surface of the photosensitive layer 101 and converting the high-energy particles 200 into corresponding electrical signals. It can be seen that the image sensor according to the embodiments of the present disclosure can be applied to various devices such as secondary electron and back-scattered electron detectors of a scanning electron microscope, X-ray detectors, radiation-resistant image sensors for aerospace, particle-collisional radiation detectors, and the like to detect various high-energy particles.
The wiring layer 103 is arranged on the front surface (hereinafter also referred to as a second surface) of the photosensitive layer 101. That is, the wiring layer 103 is located between the substrate 102 and the photosensitive layer 101 in the formed image sensor. The wiring layer 103 generally includes a plurality of layers of metal lines therein, and includes an amplifying circuit, an analog-to-digital conversion circuit, other related processing circuits, and the like for processing the electric signals generated by the photosensitive array cells. The electrical signals generated by the photosensitive array unit by the high-energy particles incident on the first surface of the photosensitive layer 101 are processed by the circuits in the wiring layer 103 to form data for other electronic devices to use. The photosensitive layer 101 is coupled to the substrate 102 via the wiring layer 103. Thus, the image sensor formed is a back-illuminated image sensor.
In some embodiments, the photosensitive layer 101 and the wiring layer 103 may be manufactured from a sheet of semiconductor material via a preceding process and a subsequent process, respectively. In particular, integrated circuits are manufactured layer by means of a so-called planar process. For logic devices, simply stated, the source and drain of each transistor are completed by first dividing the area on the silicon substrate where the transistor is fabricated, then ion implantation to achieve the N-type and P-type regions, then gate electrode, and then ion implantation. This portion of the process flow is to implement field effect transistors on the silicon substrate 102 to form a photosensitive array element, also referred to as a front end of line (front end of line, FEOL) process or procedure. Corresponding to this is a back end of line (BEOL) process or procedure, which in effect creates several layers of conductive metal lines, with the different layers of metal lines being connected by a pillar of metal, thereby forming the wiring layer 103. The wiring layer 103 is currently mostly copper as the conductive metal, and thus the subsequent process is also called copper interconnection. These copper lines are responsible for connecting the transistors as required by the design, performing specific functions, and being able to couple the photosensitive array element to the substrate 102.
Of course, in some embodiments, the photosensitive layer 101 and the wiring layer 103 may also be made of different silicon wafers and assembled together in a stacked structure. The stacked structure enables more transistors to be integrated in the wiring layer 103, thereby achieving faster processing speed and more functions.
In some embodiments, at least a first side of the photosensitive layer 101 or a portion adjacent to the first side is doped p-type silicon. p-type silicon is a hole-type semiconductor that is typically formed by incorporating a trivalent element (e.g., boron) into a pure silicon crystal to replace the position of the silicon atom in the crystal lattice. In a p-type semiconductor, holes are multiple electrons and free electrons are fewer electrons. Since the amount of positive charge and the amount of negative charge in the p-type semiconductor are equal, the p-type semiconductor is electrically neutral. Holes are mainly provided by impurity atoms, and free electrons are formed by thermal excitation.
Unlike conventional solutions, the negative charge dielectric layer 104 according to embodiments of the present disclosure includes a material capable of providing a negative charge of a predetermined density at least at the interface with the photosensitive layer, the layer being a single layer of negative charge dielectric, and the single layer of negative charge dielectric layer 104 being in direct contact with the first side of the photosensitive layer. The single layer negatively charged dielectric layer 104 is deposited on a first side of the photosensitive layer, i.e., the back side. A single layer herein refers to a stack of only one dielectric material layer rather than multiple dielectric materials. This means that the negative charge dielectric layer 104 is disposed on and in direct contact with the first side of the photosensitive layer 101 such that the negative charge density at the interface with the photosensitive layer 101 in the negative charge dielectric layer 104 is above a predetermined threshold, e.g., in some embodiments, the negative charge density is at 10 12 /cm 2 ～10 13 /cm 2 Between them. The negative fixed charge is the negative charge fixedly existing in the dielectric material, and when the dielectric material is contacted with the semiconductor material, the distribution of the negative fixed charge is mainly concentrated near the interface between the dielectric material and the semiconductor. The "negative fixed charge density" herein mainly means the negative fixed charge areal density of a region in the dielectric material in a predetermined range (for example, a range from the interface to 1/3 or 1/2 of the thickness of the dielectric material) near the interface. For example, the fixed negative charge density in the negative charge dielectric layer 104 at the interface with the photosensitive layer 101 represents the fixed negative charge density in the negative charge dielectric layer 104 at 1/3 of the thickness from the interface to the negative charge dielectric layer 104. Of course, it should be understood that references herein to 1/3 or 1/2 of the thickness of the dielectric material are intended to represent only one range of the dielectric material layer near the interface and are not intended to limit the scope of the present disclosure. Other ratio values from 0 to 1, ranging from the interface to the thickness of the dielectric material, near the interface, are also possible.
The present disclosure contemplates that the negative fixed charge areal density of the region within a predetermined range proximate the interface is primarily due to the following: firstly, the fixed negative charge near the interface has a larger influence on the surface potential of the semiconductor side (namely, the photosensitive layer side), and the contribution to dark current inhibition and improvement of the irradiation resistance is more prominent; secondly, the distribution of the fixed negative charges in the dielectric material is also uneven, and the fixed negative charges near the interface with the semiconductor material are distributed more. Thus, the negative fixed charge density discussed herein primarily refers to the negative fixed charge areal density of a region of the dielectric material proximate to its interface with the semiconductor material within a predetermined range.
Direct contact of the negatively charged dielectric layer 104 with the back side of the photosensitive layer 101 means that the back side of the photosensitive layer 101 is treated such that there is no or only an unavoidable natural oxide layer of the photosensitive layer 101 having a thickness of less than 1nm at the interface, and does not have any other oxide layer or dielectric layer. The absence of a native oxide layer may refer to the complete absence of a native oxide layer, which may be accomplished, for example, by operating in an oxygen-free environment or any other suitable manner. The absence of a native oxide layer as referred to herein may also mean that a native oxide layer having a thickness of less than 1nm may be considered to be absent. This is because in a conventional operation, the photosensitive layer 101 made of a semiconductor material inevitably forms a natural oxide layer.
In order to eliminate the influence of the natural oxide layer on the direct contact of the negative charge dielectric layer 104 with the back surface of the photosensitive layer 101, the back surface of the photosensitive layer 101 may be appropriately treated before the negative charge dielectric layer 104 is formed. The treatment may include wet etching by dilute hydrofluoric acid or by plasma treatment. These treatments may be performed after the photosensitive layer 101 is thinned. The two processing modes can remove the natural oxide layer on one hand, so as to ensure that the negative charge medium layer 104 is in direct contact with the back surface of the photosensitive layer 101. On the other hand, the surface quality of the back surface of the photosensitive layer can be improved, so that the effect of chemical passivation is realized.
The image sensor according to the embodiment of the present disclosure, due to the introduction of the negative charge dielectric layer 104 in direct contact with the first surface of the photosensitive layer 101, can form a fixed negative charge having a density higher than a predetermined threshold at the interface with the semiconductor layer (i.e., the photosensitive layer 101) in the single-layer negative charge dielectric layer 104, thereby bending the energy band at the interface upward, the fermi level moving toward the valence band, generating enrichment of holes and forming a strong built-in electric field, to thereby reduce the electron concentration at the interface to thereby achieve the effect of field effect passivation, and thereby effectively reduce dark current. In some embodiments, the fermi level at the interface is approximately below the valence band Ev.
Specifically, as shown in fig. 4, wherein part (a) shows a schematic diagram of a built-in electric field and an electron barrier at an interface of a single dielectric layer without negative fixed charges and a semiconductor material; (b) A schematic diagram of the built-in electric field and electron barrier at the interface of the multi-dielectric stack and the semiconductor material is shown, and (c) a schematic diagram of the built-in electric field and electron barrier at the interface of the single negative charge dielectric layer 104 and the semiconductor material is shown, with the single negative charge dielectric layer 104 in direct contact with the semiconductor material layer (i.e., the photosensitive layer 101). In fig. 4, ψ bi For the built-in potential, ec and Ev correspond to the conduction and valence bands, respectively, in the semiconductor energy band. Conduction band is the energy space formed by free electrons, i.e., the energy range that electrons free to move within a solid structure have. The valence band, also known as the valence band, is generally the highest energy band in a semiconductor or insulator that can be occupied by electrons at 0K. The bottom energy level of the conduction band is denoted Ec, the top energy level of the valence band is denoted Ev, and the energy interval between Ec and Ev is referred to as the forbidden band Eg. EF in fig. 4 represents the fermi level. As is apparent from fig. 4, the presence of the fixed negative charge in the negative charge dielectric layer 104 creates a large built-in electric field and electron barrier at the dielectric layer/semiconductor interface, which is represented by a positive increase in flatband Voltage VFB (Flat-Band Voltage) on the Capacitance-Voltage (C-V) curve, by the strong electric dipole action between the negative charge dielectric layer 104 and the semiconductor material (i.e., the photosensitive layer 101), as shown in fig. 5.
Flatband voltage refers to the voltage applied to a metal-oxide-semiconductor (Metal Oxide Semiconductor, MOS) system to flatten (bring into a flatband state) the semiconductor surface energy band. The flat band state generally refers to a state in which the energy bands of the regions in an ideal MOS system are all leveled. For a practical MOS system, due to the metal-semiconductor work function difference Φms and the influence of the fixed charges near the interface between the semiconductor and the oxide and inside the oxide, when the applied gate voltage is 0, the energy band on the semiconductor surface is bent, so that a certain voltage needs to be additionally applied to level the energy band, and the additional applied voltage is called flat band voltage.
The increase in flat band voltage at the interface of the single layer negatively charged dielectric layer 104 and the semiconductor layer (i.e., the photosensitive layer 101) on the one hand illustrates that the energy band at the interface is bent upward, the fermi level shifts toward the valence band, and hole enrichment occurs, so that the probability that the interface state and trap level in the forbidden band can be filled becomes smaller. On the other hand, the band bending near the interface can form a repulsive field to electrons, thereby preventing free electrons from moving to the interface, and achieving the purpose of inhibiting dark current. In addition, the large flatband voltage indicates that there is a sufficiently large negative fixed charge in the negative charge dielectric layer near the interface, so that the electron barrier on the surface of the semiconductor layer is increased, thereby being able to more effectively suppress the movement of electrons and the influence of the interface state on the dark current, and thus effectively suppress the dark current. The generation of a negative fixed charge at the interface of the negatively charged dielectric layer may result from a variety of factors including, but not limited to: from the growth process or processing of the dielectric layer, or from the matching of the interface lattice of the dielectric layer and the semiconductor, or a combination of both. In this way, in some embodiments, the amount of negative charge fixed in the negative charge dielectric layer 104, and in particular the negative charge fixed density at the interface, can be optimized and adjusted by modulating process conditions, etc., to achieve adjustment of flatband voltage. Of course, it should be understood that the two factors described above for generating negative static charge are merely exemplary, and any suitable generation is possible as long as the desired negative static charge density is achieved.
Meanwhile, the foregoing mentions that the conventional means for suppressing dark current adopts multi-dielectric stack layers, so that the total ionization dose effect is easy to generate charge enrichment and induce interface states between each dielectric layer and between the dielectric layer and the semiconductor layer, and the problem of poor radiation resistance exists. In contrast, the image sensor according to the embodiment of the present disclosure uses only a single negative charge dielectric layer 104 in direct contact with the photosensitive layer 101, and can effectively reduce or avoid the problem of poor radiation resistance of the multi-dielectric stack due to the total ionization dose effect under irradiation of the high-energy particles 200, compared with the conventional scheme using the multi-dielectric stack, thereby effectively improving the radiation resistance of the image sensor.
In some embodiments, negatively charged dielectric layer 104 is a single dielectric layer. The single layer negatively charged dielectric layer 104 is capable of providing a higher effective negative fixed charge density than a multi-dielectric stack. For multi-media stacks, the negative fixed charges in the negatively charged dielectric layer will counteract the positive charges in the other dielectric layers and in the dielectric interface, resulting in a reduction in the effective negative fixed charge density. The effective fixed negative charge density is defined as the total charge density of the dielectric stack structure after taking into account the charge cancellation effect between the multi-dielectric stacks. The single negative charge dielectric layer structure can provide, on the one hand, a stronger electric dipole action and field passivation effect than the multi-dielectric stack structure, and thus can provide a stronger resistance to irradiation by the high energy particles 200. On the other hand, the interface of the negatively charged dielectric layer 104, which is a single dielectric layer, with the semiconductor can provide a faster dielectric relaxation process. Dielectric relaxation, also known as dielectric relaxation, refers to the process by which a dielectric reaches a new polarization equilibrium state from a transiently established polarization state after the action (or removal) of an external electric field. The faster dielectric relaxation process allows the polarity of the electric dipole layer at the interface to be quickly recovered even when irradiated by the energetic particle 200, and allows the extra charge generated by the irradiation of the energetic particle to be quickly transported and released to keep the original potential distribution unchanged, thereby better resisting the irradiation of the energetic particle 200. It can be seen that, compared with the conventional scheme of multi-dielectric lamination, the single-layer negative charge dielectric layer 104 adopted according to the embodiment of the disclosure not only can effectively improve the irradiation resistance, but also can provide a stronger built-in electric field and a larger electron barrier for more effective negative fixed charges, thereby effectively inhibiting the generation of dark current.
In some embodiments, negatively charged dielectric layer 104 may comprise a high dielectric constant material. For example, in some embodiments, negatively charged dielectric layer 104 may comprise a metal oxide or nitride. The metal oxide may include, for example, one of the following: aluminum oxide, hafnium oxide, gallium oxide, tantalum oxide, lanthanum oxide, oxide, zirconium oxide, or silicon nitride. Of course, it should be understood that these materials are merely examples of negatively charged dielectric layer 104 and are not intended to limit the scope of the present disclosure. Provided that the density at the interface with the semiconductor material is higher than a predetermined threshold, for example at 10 12 /cm 2 ～10 13 /cm 2 Any suitable material is possible, with a negative fixed charge in the range. For example, in some embodiments, the material of negatively charged dielectric layer 104 may be silicon nitride.
To further enhance the effect of suppressing dark current, in some embodiments, the negatively charged dielectric layer 104 is of a thinner thickness, e.g., only between 2nm and 8 nm. By using a thin layer of single medium, the transport and release of accumulated charge under irradiation of the energetic particles 200 can be further facilitated. For example, with conventional multi-dielectric stack schemes, particularly those that include an insulating layer between the negatively charged dielectric layer 104 and the semiconductor layer, charge accumulated at the interface of the dielectric layers due to the radiation of the energetic particles 200 is more difficult to transfer, which may lead to an increase in dark current and hence device failure. In contrast, by adopting a single dielectric thin layer according to the technical solution of the embodiment of the present disclosure, even if there is charge accumulation under the irradiation of the high-energy particles 200, the accumulated charge can be transferred through the interface due to the thinner thickness of the negative charge dielectric layer 104, so as to achieve the purpose of releasing the accumulated charge to maintain the interface potential. In this way, dark current can be further suppressed while improving the irradiation resistance.
In some embodiments, the negatively charged dielectric layer 104 may be formed directly on the backside of the photosensitive layer 101 by atomic layer deposition (Atomic Layer Deposition, ALD), which may be at a temperature between 150 ℃ and 300 ℃. Atomic layer deposition is a process by which substances can be plated onto a substrate surface layer by layer in the form of monoatomic films. Atomic layer deposition is similar to common chemical deposition. However, during atomic layer deposition, the chemical reaction of a new atomic layer is directly related to the previous layer in such a way that only one atomic layer is deposited per reaction. The negatively charged dielectric layer 104 formed in this way can have a better dielectric layer quality and a higher fixed negative charge density.
Of course, it should be understood that the above-mentioned embodiments with respect to forming negatively charged dielectric layer 104 by atomic layer deposition are merely illustrative and are not intended to limit the scope of the present disclosure. Any other suitable deposition is possible. For example, in some alternative embodiments, the negatively charged dielectric layer 104 may also be formed by sputtering of plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD), cyclical chemical vapor deposition (Cycle Chemical Vapor Deposition, cycle-CVD), sol-Gel, or physical vapor deposition (Physical Vapor Deposition, PVD).
There is also provided a method of manufacturing an image sensor according to another aspect of the present disclosure. Fig. 6 shows a flow chart of the method. As shown in fig. 6, in block 410, a substrate 102 is provided. At block 420, a photosensitive layer 101 is formed on a silicon wafer and a wiring layer 103 is formed on the front side of the photosensitive layer 101. The photosensitive array unit in the photosensitive layer is capable of receiving the high-energy particles 200 incident from the back side and converting the high-energy particles 200 into an electrical signal. At block 430, the photosensitive layer 101 is coupled to the substrate 102 via the wiring layer 103.
In some embodiments, the method further comprises the step of thinning the thickness of the photosensitive layer 101 before the negatively charged dielectric layer 104 is disposed or grown on the backside of the photosensitive layer 101. The reduced thickness can facilitate incidence and efficient collection of the energetic particles 200 from the backside. After the thickness of the photosensitive layer 101 is thinned, the back surface is further processed to eliminate the natural oxide layer on the surface of the photosensitive layer 101. As mentioned before, the treatment may include wet etching by dilute hydrofluoric acid or by plasma treatment or the like. These treatments may be performed after the photosensitive layer 101 is thinned. The two processing modes can remove the natural oxide layer on one hand, so as to ensure that the negative charge medium layer 104 is in direct contact with the back surface of the photosensitive layer 101. On the other hand, the surface quality of the back surface can be improved, so that the effect of chemical passivation is realized.
After thickness reduction and surface treatment, at block 440, a negative charge dielectric layer 104 is disposed on the back side of the photosensitive layer 101 and the negative charge dielectric layer 104 is brought into direct contact to finally make the fixed negative charge density at the interface between the negative charge dielectric layer 104 and the back side of the photosensitive layer 101 at 10 12 /cm 2 ～10 13 /cm 2 Between them. The electronic device for an image sensor formed in this way, as mentioned above, can effectively suppress dark current while also having excellent anti-irradiation performance, thereby enabling the manufactured image sensor to be applied to secondary electrons and back-scattered electron detectors of a scanning electron microscope, X-ray detectors, anti-irradiation image sensors for aerospace, particle-collided radiation detectors, and the like.
In addition, while the steps described above are depicted in a particular order, this should not be construed as requiring that such steps be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In some cases, multitasking or parallel processing may be beneficial. Likewise, while the foregoing discussion contains certain specific implementation details, this should not be construed as limiting the scope of any invention or claims, but rather as describing particular embodiments that may be directed to particular inventions. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
The embodiment of the disclosure also provides a particle detector. The particle detector uses the image sensor mentioned in the foregoing and a memory for storing data acquired by the image sensor. Thanks to the excellent anti-irradiation performance and dark current suppression performance of the image sensor, the particle detector can be used as a secondary electron and back scattering electron detector for a scanning electron microscope, an X-ray detector, an anti-irradiation image sensor for aerospace, a particle collision radiation detector, etc. reliably and accurately.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
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| CN103378117B (en) * | 2012-04-25 | 2016-08-03 | 台湾积体电路制造股份有限公司 | There is the back side illumination image sensor of negatively charged layers |
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