CN116609564A - Receiver detection system and receiver detection device - Google Patents

Abstract

A receiver detection device and a receiver detection system, the receiver detection system includes a media access control circuit, a common mode voltage detector and a receiver detector. The common-mode voltage detector is used to detect whether a common-mode voltage satisfies a voltage condition, and sends a ready signal to the receiver detector after the common-mode voltage satisfies the voltage condition. The receiver detector is used for starting a detection procedure according to the preparation completion signal and a detection start signal of the MAC circuit. In the detection procedure, the receiver detector sends out a detection signal for judging whether a receiver exists, and then outputs a detection result to the MAC circuit, wherein the detection result indicates whether the receiver exists. The receiver detection system can prevent the receiver detector from starting the detection procedure before the common-mode voltage satisfies the voltage condition.

Description

Receiver detection system and receiver detection device

technical field

The invention relates to a detection system and a device, in particular to a detection system and a device capable of detecting whether a receiver exists.

Background technique

According to Peripheral Component Interconnect Express (PCIe) protocol or Universal Serial Bus (Universal Serial Bus; USB) protocol, when a transmitter is inactive, the transmitter enters a suspend state to save power. power, the common-mode voltage of the transmitter (ie: the sum of a pair of differential output signals of the transmitter) will drop to zero volts (0V); and when the transmitter is awakened, the transmitter will be from The shelving state enters a resume state (resume state), at which time the common-mode voltage of the transmitter will gradually climb from 0V to After the common-mode voltage starts to rise, the transmitter sends a detection signal to determine whether a receiver is present.

In practice, the common-mode voltage ramps from 0V to The ramp-up time is affected by an external printed circuit board impedance (such as resistance and capacitance) and the length of a transmission line. Depending on the impedance and length, the ramp-up time may range from tens of nanoseconds to milliseconds, where the difference between the minimum ramp-up time and the maximum ramp-up time is quite large. If the common mode voltage climbs to /> Before the transmitter sends the detection signal, the transmitter may get a wrong detection result.

In order to cope with the uncertain ramp-up time, the current technology makes the media access control (media access control; MAC) circuit of the transmitter try to delay the time when the transmitter sends the detection signal as much as possible, so that the common-mode voltage has enough time to rise to However, if the MAC circuit uniformly delays the time for the transmitter to send the detection signal, it will cause the time for the transmitter to enter the resume state from the suspend state to increase uniformly, thereby degrading the performance of the transmitter.

Contents of the invention

One of the objectives of the present disclosure is to provide a receiver detection system and a receiver detection device, so as to avoid the aforementioned problems of the prior art.

An embodiment of the disclosed receiver detection system includes a media access control circuit, a common mode voltage detector and a receiver detector. The common-mode voltage detector is used to detect whether a common-mode voltage satisfies a voltage condition, and sends a ready signal to the receiver detector after the common-mode voltage satisfies the voltage condition. The receiver detector is used for starting a detection procedure according to the preparation completion signal and a detection start signal of the MAC circuit. In the detection procedure, the receiver detector sends out a detection signal for judging whether a receiver exists, and then outputs a detection result to the MAC circuit, wherein the detection result indicates whether the receiver exists.

In the above embodiment, the voltage condition includes: the common mode voltage is not less than 70% of a standard common mode voltage; and the common mode voltage is not greater than 130% of the standard common mode voltage, wherein the standard common mode voltage is a 50% of supply voltage.

An embodiment of the receiver detection device of the present disclosure includes the aforementioned common-mode voltage detector and receiver detector.

Regarding the characteristics, implementation and technical effects of the present invention, preferred embodiments are described in detail below in conjunction with the accompanying drawings.

Description of drawings

Figure 1 shows an embodiment of the receiver detection system of the present disclosure; and

FIG. 2 shows an embodiment of the receiver detection device of the present disclosure.

Symbol Description

100: Receiver detection system

110: Media access control circuit

120: Common mode voltage detector

130: Receiver detector

RCV_DETECT: detection start signal

VCM_READY: ready to complete signal

DET_SIGNAL: detection signal

RXDET: detection result

ENDDET: detection end signal

200: receiver detection device

210: Common Mode Voltage Detector

220: Receiver detector

Detailed ways

This specification discloses a receiver detection system and a receiver detection device. The system and device can prevent a receiver detector from prematurely starting to detect whether a receiver exists, thereby avoiding false detection results.

FIG. 1 shows an embodiment of the receiver detection system of the present disclosure. The receiver detection system 100 of FIG. 1 includes a media access control (MAC) circuit 110 , a common-mode voltage detector 120 and a receiver detector 130 .

See Figure 1. The MAC circuit 110 is used to send a detection start signal (RCV_DETECT) to the receiver detector 130 . In an example implementation, the receiver detection system 100 is applied to a transmitter (not shown in the figure) and the transmitter complies with the Peripheral Component Interconnect Express (PCIe) protocol or the Universal Serial Bus (Universal Serial Bus) ; USB) protocol. When the transmitter enters a resume state from a suspend state, the MAC circuit 110 accordingly sends out the detection start signal. It should be noted that the receiver detection system 100 can be applied to devices conforming to other protocols as long as the implementation is feasible.

See Figure 1. The common-mode voltage detector 120 is used to detect whether a common-mode voltage satisfies a voltage condition, and sends a ready signal (VCM_READY) to the receiver detector 130 after the common-mode voltage satisfies the voltage condition. In an implementation example, the common-mode voltage detector 120 includes a known/self-developed comparator; the comparator is used to compare the common-mode voltage with at least one voltage threshold, so that the common-mode voltage detector 120 can determine the Whether the common mode voltage satisfies the voltage condition. In an example implementation, the common-mode voltage detector 120 includes a known/self-developed analog-to-digital converter; the analog-to-digital converter is used to convert the common-mode voltage to a digital value so that the common-mode The voltage detector 120 obtains the magnitude of the common-mode voltage according to the digital value, so as to determine whether the common-mode voltage satisfies the voltage condition.

As mentioned above, in an implementation example, the voltage condition includes "the common-mode voltage reaches a standard common-mode voltage". In an implementation example, the voltage condition includes "the common-mode voltage is not less than 70% of a standard common-mode voltage". In an implementation example, the voltage condition includes "the common-mode voltage is not greater than 130% of the standard common-mode voltage". In an implementation example, the standard common-mode voltage is 50% of a power supply voltage (VDD). In an implementation example, the standard common-mode voltage is the sum of a pair of differential output signals of the aforementioned transmitter (for example, a high-speed output positive signal (HSOP) and a high-speed output negative signal (HSON) conforming to the PCIe/USB protocol). It should be noted that the aforementioned voltage conditions and standard common-mode voltage may be determined according to implementation requirements. It is also worth noting that the media access control circuit 110 sends out the detection start signal at a first time point, and the common-mode voltage detector 120 detects that the common-mode voltage satisfies the voltage condition at a second time point, and the first The point in time will usually be earlier than the second point in time.

See Figure 1. The receiver detector 130 is used to start a detection procedure according to the detection start signal (RCV_DETECT) and the ready completion signal (VCM_READY). In the detection procedure, the receiver detector 130 sends out a detection signal (DET_SIGNAL) for judging whether a receiver exists, and then outputs a detection result (RXDET) to the MAC circuit 110 accordingly, wherein the detection result indicates Whether the receiver exists. For example, when the receiver exists, the detection result is a voltage of a first level (for example: high level), and when the receiver does not exist, the detection result is a voltage of a second level (such as : low level) voltage. It is worth noting that the receiver detector 130 itself can be used to determine whether a receiver exists, or a device including the receiver detector 130 (for example: the aforementioned transmitter) can be used to determine whether a receiver exists, and then report a judgment result to receiver detector 130. Since the present invention focuses on when to start the detection process rather than how to determine whether a receiver exists, the technical details of determining whether a receiver exists is omitted here.

Based on the above, in an implementation example, the detection program conforms to the PCIe/USB protocol; however, this is not a limitation of the present invention. In an implementation example, the receiver detector 130 itself is used to determine whether a receiver exists, and the detection signal is a pulse signal; a middle voltage of the signal range of the pulse signal is substantially equal to the common mode Voltage. In an implementation example, the detection signal is a notification signal; the notification signal is used to request the device including the receiver detector 130 to determine whether a receiver exists. In an implementation example, the receiver detector 130 is further configured to send a detection end signal (ENDDET) to the MAC circuit 130 when the detection sequence ends; however, this is not a limitation of the present invention.

FIG. 2 shows an embodiment of the receiver detection device of the present disclosure. The receiver detection device 200 in FIG. 2 includes a common-mode voltage detector 210 and a receiver detector 220 . One embodiment of the common-mode voltage detector 210 is the common-mode voltage detector 120 of FIG. 1 . One embodiment of the receiver detector 220 is the receiver detector 130 of FIG. 1 . The detection start signal (RCV_DETECT) is sent by the MAC circuit 110 of FIG. 1 or its equivalent circuit. Since those skilled in the art can understand the details and variations of the receiver detection device 200 with reference to the embodiment of FIG. 1 , repeated and redundant descriptions are omitted here.

It is worth noting that, on the premise that the implementation is possible, those skilled in the art can selectively implement some or all of the technical features in any of the foregoing embodiments, or selectively implement some or all of the technologies in the foregoing multiple embodiments The combination of features, to realize the implementation flexibility of the present invention.

To sum up, the receiver detection system and device of the present disclosure can prevent a receiver detector from prematurely starting to detect whether a receiver exists, thereby avoiding false detection results.

Although the embodiments of the present invention are as described above, these embodiments are not intended to limit the present invention, and those skilled in the art can make changes to the technical characteristics of the present invention according to the explicit or implicit contents of the present invention, all of which Changes may all belong to the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention must be defined by the claims in this specification.

Claims (10)

1. A receiver detection system comprising a medium access control circuit, a common mode voltage detector, and a receiver detector, wherein:

the common-mode voltage detector is used for detecting whether a common-mode voltage meets a voltage condition or not and sending a preparation completion signal to the receiver detector after the common-mode voltage meets the voltage condition;

the receiver detector is used for starting a detection procedure according to the preparation completion signal and a detection start signal of the media access control circuit; and

in the detection procedure, the receiver detector sends a detection signal for judging whether a receiver exists or not, and then outputs a detection result to the media access control circuit, wherein the detection result indicates whether the receiver exists or not.

2. The receiver inspection system of claim 1, wherein the receiver inspection device is further configured to send an inspection end signal to the media access control circuit at the end of the inspection sequence.

3. The receiver detection system of claim 1, wherein the voltage condition comprises: the common mode voltage is not less than 70% of a standard common mode voltage.

4. The receiver detection system of claim 1, wherein the medium access control circuit issues the detection start signal at a first time point, the common mode voltage detector detects that the common mode voltage satisfies the voltage condition at a second time point, the first time point being earlier than the second time point.

5. The receiver detection system of claim 1, wherein the receiver detection system is applied to a transmitter; when the transmitter enters a recovery state from a rest state, the medium access control circuit sends out the detection start signal.

6. A receiver detection device comprising a common mode voltage detector and a receiver detector, wherein:

the common-mode voltage detector is used for detecting whether a common-mode voltage meets a voltage condition or not and sending a preparation completion signal to the receiver detector after the common-mode voltage meets the voltage condition;

the receiver detector is used for starting a detection procedure according to the preparation completion signal and a detection start signal of a media access control circuit; and

in the detection procedure, the receiver detector sends a detection signal for judging whether a receiver exists or not, and then outputs a detection result to the media access control circuit, wherein the detection result indicates whether the receiver exists or not.

7. The receiver inspection device of claim 6, wherein the receiver inspection device is further configured to send an inspection end signal to the media access control circuit at the end of the inspection sequence.

8. The receiver detection apparatus of claim 6, wherein the voltage condition comprises: the common mode voltage is not less than 70% of a standard common mode voltage.

9. The receiver detecting apparatus according to claim 6, wherein the common-mode voltage detector receives the detection start signal at a first time point, the common-mode voltage detector detects that the common-mode voltage satisfies the voltage condition at a second time point, the first time point being earlier than the second time point.

10. The receiver inspection device of claim 6, wherein the receiver inspection system is applied to a transmitter; when the transmitter enters a recovery state from a rest state, the common mode voltage detector receives the detection start signal.