CN116594465A - Circuit structure with current linearly changing along with temperature at high temperature - Google Patents
Circuit structure with current linearly changing along with temperature at high temperature Download PDFInfo
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- CN116594465A CN116594465A CN202310869987.XA CN202310869987A CN116594465A CN 116594465 A CN116594465 A CN 116594465A CN 202310869987 A CN202310869987 A CN 202310869987A CN 116594465 A CN116594465 A CN 116594465A
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- 230000009286 beneficial effect Effects 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is DC
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
- G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The application relates to the technical field of battery power supply, in particular to a circuit structure with current changing linearly with temperature at high temperature, wherein in a reference voltage generating circuit of the circuit structure, a power supply voltage vdd sequentially passes through a first current mirror structure, a first switch tube and a first resistor to be grounded; the control end of the first switching tube is connected with the output end of the first operational amplifier; the power supply voltage vdd is also grounded through the first current mirror structure and the second resistor ry; the power supply voltage vdd is also grounded through the second branch of the first current mirror structure and the second current mirror structure; the power supply voltage vdd is also grounded through the fourth branch of the first current mirror structure and the second branch of the third current mirror structure; the supply voltage vdd is also coupled to ground through the PTAT current source and the second leg of the fourth current mirror structure. The circuit structure in the scheme can greatly increase the reliability and the service life of the battery charging circuit and the battery load.
Description
Technical Field
The application relates to the technical field of battery power supply, in particular to a circuit structure with current linearly changing along with temperature at high temperature.
Background
Battery charging circuits are used in various fields of life, and in the prior art, batteries are generally charged by using a constant current type battery charging circuit, a circuit block diagram of which is generally shown in fig. 1, which includes a temperature protection sub-circuit, a power sub-circuit, and a battery load.
In the constant current type battery charging circuit, when the battery charging circuit is at a normal working temperature, the power sub-circuit outputs constant charging current to charge the battery load, when the working temperature of the battery charging circuit exceeds a normal value, the temperature protection sub-circuit turns off the power sub-circuit, at the moment, the charging current instantaneously becomes 0, and when the working temperature of the battery charging circuit is restored to the normal value, the power sub-circuit outputs constant charging current again to charge the battery load.
Therefore, in the above scheme, when the working temperature of the battery charging circuit abnormally fluctuates, the battery charging current output by the power sub-circuit can jump between zero and a constant value in a large range, so that the reliability and the service life of the battery charging circuit and the battery load are greatly reduced.
Disclosure of Invention
The application provides a circuit structure with current changing linearly with temperature at high temperature, which leads the output current of a battery charging circuit to decrease linearly with the rise of the working temperature after the working temperature of the battery charging circuit exceeds a normal value, thereby greatly increasing the reliability and the service life of the battery charging circuit and the battery load.
In one aspect, a reference voltage generating circuit is provided, in which a power supply voltage vdd sequentially passes through a first branch of a first current mirror structure, and a first switch tube M1 and a first resistor rx are grounded;
the control end of the first switching tube M1 is connected with the output end of the first operational amplifier A1; the non-inverting input end of the first operational amplifier A1 is connected with a reference voltage vref; the inverting input end of the first operational amplifier A1 is grounded through the first resistor rx;
the power supply voltage vdd is also connected to the first node y through a second branch of the first current mirror structure; the first node y is grounded through a second resistor ry; the first node y is also grounded through a first branch of the second current mirror structure;
the supply voltage vdd is also connected to the second node w through a third branch of the first current mirror structure; the second node w is grounded through a second branch of the second current mirror structure; the second node w is also grounded through a first branch of the third current mirror structure;
the supply voltage vdd is also connected to a third node z through a fourth branch of the first current mirror structure; the third node z is grounded through a second branch of the third current mirror structure; the third node z is grounded through a first branch of the fourth current mirror structure;
The supply voltage vdd is also connected to a fourth node a through a PTAT current source, which is grounded through a second leg of a fourth current mirror structure.
In one possible embodiment, the PTAT current source is used to generate a current ia, which is a PTAT current that increases with increasing temperature.
In one possible implementation manner, in the PTAT current source, the power supply voltage vdd is grounded through a first current source switch tube Mp1 and a first triode Q1 in sequence;
the power supply voltage vdd is further grounded through a second current source switching tube Mp2, a third resistor rp and a second triode Q2 in sequence;
the power supply voltage vdd is also connected to a fourth node a in the reference voltage generating circuit through a third current source switching tube Mp 3;
the control end of the first current source switch tube Mp1 is respectively connected with the output end of the second operational amplifier A2, the control end of the second current source switch tube Mp2 and the control end of the third current source switch tube Mp 3;
the inverting input end of the second operational amplifier A2 is grounded through the first triode Q1; the non-inverting input end of the second operational amplifier A2 is grounded through the third resistor rp and the second triode Q2 in sequence.
In a possible implementation manner, the power supply voltage vdd is further connected to the control terminal of the first triode Q1 through a first current source switching tube Mp 1;
the power supply voltage vdd is further connected to the control end of the second triode Q2 through a second current source switching tube Mp2 and a third resistor rp in sequence.
In one possible embodiment, the aspect ratio of the first transistor Q1 to the second transistor Q2 is 1: n.
In one possible embodiment, the resistances of the first resistor rx and the second resistor ry are the same.
In one possible embodiment, the first branch of the first current mirror structure comprises a second switching tube M2, the second branch of the first current mirror structure comprises a third switching tube M3, the third branch of the first current mirror structure comprises a fourth switching tube M4, and the fourth branch of the first current mirror structure comprises a fifth switching tube M5; the control end of the second switching tube M2 is respectively connected with the control end of the third switching tube M3, the control end of the fourth switching tube M4 and the control end of the fifth switching tube M5;
the power supply voltage vdd is grounded through the second switching tube M2, the first switching tube M1 and the first resistor rx in sequence;
The power supply voltage vdd is also connected to a first node y through the third switching tube M3;
the power supply voltage vdd is also connected to a second node w through the fourth switching tube M4;
the supply voltage vdd is also connected to a third node z through the fifth switching tube M5.
In one possible embodiment, the aspect ratio of the second switching tube M2, the third switching tube M3, the fourth switching tube M4, and the fifth switching tube M5 is 1:1: a: b, and A is less than or equal to 1.
In one possible embodiment, the first branch of the second current mirror structure comprises a sixth switching tube M6 and the second branch of the second current mirror structure comprises a seventh switching tube M7; the control end of the sixth switching tube M6 is respectively connected with the second node w and the control end of the seventh switching tube M7;
the first node y is grounded through the sixth switching tube M6;
the second node w is grounded through the seventh switching tube M7.
In one possible embodiment, the first branch of the third current mirror structure comprises an eighth switching tube M8 and the second branch of the third current mirror structure comprises a ninth switching tube M9; the control end of the eighth switching tube M8 is respectively connected with the third node z and the control end of the ninth switching tube M9;
The second node w is grounded through the eighth switching tube M8;
the third node z is grounded through the ninth switching tube M9.
In one possible embodiment, the first branch of the fourth current mirror structure comprises a tenth switching tube M10, and the second branch of the fourth current mirror structure comprises an eleventh switching tube M11; the control end of the tenth switching tube M10 is respectively connected with the control ends of the fourth node a and the eleventh switching tube M11;
the third node z is also grounded through a tenth switching tube M10;
the fourth node a is grounded through the eleventh switching tube M11.
In yet another aspect, a circuit structure is provided in which current varies linearly with temperature at high temperature, the circuit structure including a control sub-circuit, a power sub-circuit, a battery load, and a reference voltage generating circuit as described above; the reference voltage generation circuit, the control sub-circuit, the power sub-circuit and the battery load are sequentially connected;
the reference voltage generation circuit is used for outputting a reference voltage vy to the control sub-circuit;
the control sub-circuit is used for controlling the power sub-circuit to regulate and charge the battery load according to the reference voltage vy.
In a possible implementation, the control sub-circuit is further configured to:
when the working temperature of the battery charging circuit is in a target temperature range, controlling the power sub-circuit to output constant battery charging current to the battery load according to the reference voltage vy;
when the operating temperature of the battery charging circuit exceeds the target temperature range, the power sub-circuit is controlled to output a battery charging current which linearly decreases with the increase of temperature to the battery load according to the reference voltage vy.
In still another aspect, there is provided a battery charging circuit constituted by a circuit structure in which a current linearly varies with temperature at a high temperature as described above;
in a power sub-circuit of the battery charging circuit, a power supply voltage vdd is connected to a fifth node d through a second power resistor r2, and the fifth node d is grounded through a first power switching tube Ma and a first power resistor r1 in sequence;
the power supply voltage vdd is connected to a sixth node s through a third power resistor r3, and the sixth node s is connected to an output terminal vout through a second power switch tube Mp; the output terminal vout is grounded through a battery load;
the fifth node d is connected to the non-inverting input terminal of the fourth operational amplifier A4; the sixth node s is connected to the inverting input of the fourth operational amplifier A4; the output end of the fourth operational amplifier A4 is connected with the control end of the second power switch tube Mp;
In a control sub-circuit of the battery charging circuit, the output end of a third operational amplifier A3 is connected to the control end of a first power switching tube Ma in a power sub-circuit of the battery charging circuit; the non-inverting input end of the third operational amplifier A3 is connected to a first node y in a reference voltage generation circuit of the battery charging circuit; the inverting input terminal of the third operational amplifier A3 is grounded through a first power resistor r1 in the power subcircuit of the battery charging circuit.
The technical scheme provided by the application can comprise the following beneficial effects:
according to the reference voltage generating circuit provided by the application, after the reference voltage generating circuit is overtemperature, the reference voltage vy output by the reference voltage generating circuit is linearly reduced along with the increase of the temperature T, so that the reliability and the service life of the reference voltage generating circuit are greatly improved;
the battery charging circuit provided by the application is composed of a circuit structure with the current linearly changing along with the temperature at high temperature, so that when the working temperature of the battery charging circuit is in a target temperature range, the battery charging circuit outputs constant battery charging current, and when the working temperature of the battery charging circuit exceeds the target temperature range, the battery charging current output by the battery charging circuit linearly decreases along with the rise of the working temperature, thereby greatly increasing the reliability and the service life of the battery charging circuit and a battery load.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present application, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
Fig. 1 is a circuit block diagram of a conventional constant current type battery charging circuit.
Fig. 2 is a schematic diagram showing a circuit structure in which a current varies linearly with temperature at high temperature according to an exemplary embodiment.
Fig. 3 is a schematic diagram showing the structure of a seed reference voltage generating circuit according to an exemplary embodiment.
Fig. 4 is a schematic diagram illustrating an internal structure of a PTAT current source according to an exemplary embodiment.
Fig. 5 is a graph showing a variation trend of the reference voltage vy with temperature T according to an exemplary embodiment.
Fig. 6 is a schematic diagram illustrating a structure of a battery charging circuit according to an exemplary embodiment.
Fig. 7 is a schematic diagram showing a variation of the battery charging current iout output by the battery charging circuit with the temperature T according to an exemplary embodiment.
Detailed Description
The following description of the embodiments of the present application will be made apparent and fully in view of the accompanying drawings, in which some, but not all embodiments of the application are shown. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Fig. 2 is a schematic diagram showing a circuit structure in which a current varies linearly with temperature at high temperature according to an exemplary embodiment. By designing the battery charging circuit into the circuit structure, the output current of the battery charging circuit is linearly reduced along with the rise of the working temperature after the working temperature of the battery charging circuit exceeds a normal value, so that the reliability and the service life of the battery charging circuit and a battery load are greatly improved.
In one possible implementation, the circuit structure includes a control sub-circuit, a power sub-circuit, a battery load, and a reference voltage generation circuit; the reference voltage generating circuit, the control sub-circuit, the power sub-circuit and the battery load are sequentially connected;
the reference voltage generating circuit is used for outputting a reference voltage vy to the control sub-circuit;
The control sub-circuit is used for controlling the power sub-circuit to regulate and charge the battery load according to the reference voltage vy.
In a possible implementation, the control sub-circuit is further configured to:
when the working temperature of the battery charging circuit is in a target temperature range, controlling the power sub-circuit to output constant battery charging current to the battery load according to the reference voltage vy;
when the operating temperature of the battery charging circuit exceeds the target temperature range, the power sub-circuit is controlled to output a battery charging current which linearly decreases with the temperature rise to the battery load according to the reference voltage vy.
Further, the target temperature range may be a normal operating temperature range of the battery charging circuit.
That is, in this circuit configuration, the reference voltage generation circuit outputs the reference voltage vy to the control sub-circuit, which controls the power sub-circuit in accordance with the reference voltage vy, wherein the control sub-circuit controls the power sub-circuit to output a constant current to charge the battery load when the battery charging circuit is at a normal operating temperature, and controls the power sub-circuit to linearly decrease the output battery charging current as the temperature increases when the operating temperature of the battery charging circuit exceeds the normal value.
In summary, the circuit structure with the current linearly changing with the temperature at the high temperature provided by the application can ensure that when the working temperature of the battery charging circuit is at a normal value, the constant battery charging current is output, and when the working temperature of the battery charging circuit exceeds the normal value, the output battery charging current linearly decreases with the rise of the working temperature, thereby greatly increasing the reliability and the service life of the battery charging circuit and the battery load.
The present application specifically provides a reference voltage generating circuit to further explain the reference voltage generating circuit shown in fig. 2, and fig. 3 is a schematic diagram of a reference voltage generating circuit according to an exemplary embodiment, the reference voltage generating circuit is the reference voltage generating circuit shown in fig. 2; the reference voltage generating circuit comprises a PTAT current source, a first operational amplifier A1, a first resistor rx, a second resistor ry, a first switch tube M1, a first current mirror structure, a second current mirror structure, a third current mirror structure and a fourth current mirror structure;
in the reference voltage generating circuit, a power supply voltage vdd sequentially passes through a first branch of a first current mirror structure, and a first switching tube M1 and a first resistor rx are grounded;
The control end of the first switching tube M1 is connected with the output end of the first operational amplifier A1; the non-inverting input end of the first operational amplifier A1 is connected with the reference voltage vref; the inverting input end of the first operational amplifier A1 is grounded through the first resistor rx;
the supply voltage vdd is also connected to the first node y via a second branch of the first current mirror structure; the first node y is grounded through a second resistor ry; the first node y is also grounded through a first branch of the second current mirror structure;
the supply voltage vdd is also connected to the second node w through a third branch of the first current mirror structure; the second node w is grounded through a second branch of the second current mirror structure; the second node w is also grounded through the first branch of the third current mirror structure;
the supply voltage vdd is also connected to the third node z via a fourth branch of the first current mirror structure; the third node z is grounded through a second branch of the third current mirror structure; the third node z is also grounded through the first branch of the fourth current mirror structure;
the supply voltage vdd is also connected to a fourth node a through a PTAT current source, which is grounded through a second leg of the fourth current mirror structure.
Further, the first switching tube M1 is an NPN triode or an NMOS tube; when the first switching tube M1 is an NPN triode, the control end of the first switching tube M1 is a base electrode thereof; when the first switching tube M1 is an NMOS tube, the control end of the first switching tube M1 is a gate thereof.
In one possible embodiment, the PTAT current source is used to generate a current ia, which is a PTAT current that increases with increasing temperature.
In one possible embodiment, please refer to the schematic diagram of the internal structure of the PTAT current source shown in fig. 4, which includes a fifth current mirror structure, a second operational amplifier A2, a first transistor Q1, a second transistor Q2, and a third resistor rp;
the fifth current mirror structure consists of a first current source switch tube Mp1, a second current source switch tube Mp2 and a third current source switch tube Mp 3;
in the PTAT current source, the power supply voltage vdd is grounded through the first current source switching tube Mp1 and the first triode Q1 in sequence;
the power supply voltage vdd is also grounded through a second current source switch tube Mp2, a third resistor rp and a second triode Q2 in sequence;
the power supply voltage vdd is also connected to a fourth node a in the reference voltage generating circuit through a third current source switching tube Mp 3;
the control end of the first current source switch tube Mp1 is respectively connected with the output end of the second operational amplifier A2, the control end of the second current source switch tube Mp2 and the control end of the third current source switch tube Mp 3;
the inverting input end of the second operational amplifier A2 is grounded through the first triode Q1; the non-inverting input terminal of the second operational amplifier A2 is grounded through the third resistor rp and the second triode Q2 in sequence.
Further, the first current source switching tube Mp1, the second current source switching tube Mp2 and the third current source switching tube Mp3 may be PNP transistors; or, the first current source switching tube Mp1, the second current source switching tube Mp2 and the third current source switching tube Mp3 may be PMOS transistors, and when the first current source switching tube Mp1, the second current source switching tube Mp2 and the third current source switching tube Mp3 are PNP transistors, their control ends are their respective bases; when the first current source switching tube Mp1, the second current source switching tube Mp2 and the third current source switching tube Mp3 are PMOS tubes, their control ends are respective gates.
In a possible embodiment, the supply voltage vdd is also connected to the control terminal of the first transistor Q1 through a first current source switching tube Mp 1;
the power supply voltage vdd is further connected to the control terminal of the second triode Q2 through the second current source switching tube Mp2 and the third resistor rp in sequence.
In one possible embodiment, the aspect ratio of the first transistor Q1 to the second transistor Q2 is 1: n, namely the second triode Q2 is formed by connecting N first triodes Q1 in parallel.
Further, the first triode Q1 and the second triode Q2 are NPN triodes, and their control terminals are respective bases.
In one possible embodiment, the first resistor rx and the second resistor ry have the same resistance.
In one possible embodiment, the first branch of the first current mirror structure comprises a second switching tube M2, the second branch of the first current mirror structure comprises a third switching tube M3, the third branch of the first current mirror structure comprises a fourth switching tube M4, and the fourth branch of the first current mirror structure comprises a fifth switching tube M5; the control end of the second switching tube M2 is respectively connected with the control end of the third switching tube M3, the control end of the fourth switching tube M4 and the control end of the fifth switching tube M5;
the power supply voltage vdd is grounded through the second switching tube M2, the first switching tube M1 and the first resistor rx in sequence;
the power supply voltage vdd is also connected to the first node y through the third switching tube M3;
the power supply voltage vdd is also connected to the second node w through the fourth switching tube M4;
the supply voltage vdd is also connected to the third node z through the fifth switching tube M5.
Further, the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 may be PNP transistors; or, the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 may be PMOS tubes; when the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 are PNP transistors, their control ends are their respective bases; when the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 are PMOS tubes, their control ends are respective gates.
In one possible embodiment, the aspect ratio of the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 is 1:1: a: b, and A is less than or equal to 1.
In one possible embodiment, the first branch of the second current mirror structure comprises a sixth switching tube M6 and the second branch of the second current mirror structure comprises a seventh switching tube M7; the control end of the sixth switching tube M6 is respectively connected with the second node w and the control end of the seventh switching tube M7;
the first node y is grounded through the sixth switching tube M6;
the second node w is grounded through the seventh switching tube M7.
Further, the sixth switching tube M6 and the seventh switching tube M7 may be NPN transistors; alternatively, the sixth switching tube M6 and the seventh switching tube M7 may be NMOS tubes; when the sixth switching tube M6 and the seventh switching tube M7 are NPN triodes, the control ends are respective bases; when the sixth switching tube M6 and the seventh switching tube M7 are NMOS tubes, their control ends are respective gates.
In one possible embodiment, the first branch of the third current mirror structure comprises an eighth switching tube M8 and the second branch of the third current mirror structure comprises a ninth switching tube M9; the control end of the eighth switching tube M8 is respectively connected with the third node z and the control end of the ninth switching tube M9;
The second node w is grounded through the eighth switching tube M8;
the third node z is grounded through the ninth switching transistor M9.
Further, the eighth switching tube M8 and the ninth switching tube M9 may be NPN transistors; alternatively, the eighth switching transistor M8 and the ninth switching transistor M9 may be NMOS transistors; when the eighth switching tube M8 and the ninth switching tube M9 are NPN triodes, the control ends are respective bases; when the eighth switching transistor M8 and the ninth switching transistor M9 are NMOS transistors, their control ends are respective gates.
In one possible embodiment, the first branch of the fourth current mirror structure comprises a tenth switching tube M10 and the second branch of the fourth current mirror structure comprises an eleventh switching tube M11; the control end of the tenth switching tube M10 is respectively connected with the control ends of the fourth node a and the eleventh switching tube M11;
the third node z is also grounded through a tenth switching tube M10;
the fourth node a is grounded through the eleventh switching transistor M11.
Further, the tenth switching tube M10 and the eleventh switching tube M11 may be NPN transistors; alternatively, the tenth switching tube M10 and the eleventh switching tube M11 may be NMOS tubes; when the tenth switching tube M10 and the eleventh switching tube M11 are NPN triodes, the control ends are respective bases; when the tenth switching tube M10 and the eleventh switching tube M11 are NMOS tubes, their control ends are respective gates.
Based on the internal structure of the PTAT current source of fig. 4, the working principle thereof can be as follows:
immediately after the circuit is powered on, the grid electrodes of the first current source switching tube Mp1, the second current source switching tube Mp2 and the third current source switching tube Mp3 are in extremely low level relative to the source, the first current source switching tube Mp1, the second current source switching tube Mp2 and the third current source switching tube Mp3 are conducted, at this time, the base electrodes of the first triode Q1 and the second triode Q2 are pulled to high level through the first current source switching tube Mp1 and the second current source switching tube Mp2, the first triode Q1 and the second triode Q2 are conducted, at this time, a first current ip1 is generated in the first current source switching tube Mp1, a second current ip2 is generated in the second current source switching tube Mp2, a PTAT current ia is generated in the third current source switching tube Mp3, and as the first current source switching tube Mp1, the second current source switching tube Mp2 and the third current source switching tube Mp3 form a fifth current mirror structure, therefore ip1=ip2=ia;
meanwhile, as can be seen from fig. 4, the voltage vp1 is the voltage difference vbe1 between the base and the emitter of the first transistor Q1, so that vbe 1=vbe 1= (kT/Q) ×ln (ip 1/is 1), where k is boltzmann constant, Q is unit charge amount, T is absolute temperature, is1 is the reverse saturation current of the first transistor Q1, which is proportional to the parallel number of transistors, so that the reverse saturation current is2=n×is1 of the second transistor Q2, and the voltage vp2=ip2×rp+ (kT/Q) ×ln (ip 2/is 2) is obtained at this time;
Also, the voltage vp2 at the non-inverting input terminal of the second operational amplifier A2 is regulated to be equal to the voltage vp1 at the inverting input terminal thereof by the second operational amplifier A2, and thus, (kT/q) xn (ip 1/is 1) =ip1×rp+ (kT/q) xn [ ip 1/(n×is 1) ], whereby ia=ip1= (kT/q) × (lnN/rp) = [ (k×lnn)/(q×rp) ]×t, which is obtained by the above equation, is a PTAT current that increases as the absolute temperature T increases.
At this time, referring to fig. 3, the reference voltage generating circuit operates as follows:
when the circuit is just electrified, the voltage of the non-inverting input end of the first operational amplifier A1 is larger than the voltage of the inverting input end, the first operational amplifier A1 outputs a high level, the first switching tube M1 is conducted, at the moment, the voltages of the control ends of the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 are pulled down, and the second switching tube M2, the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 are all conducted; then, the fourth switching tube M4 pulls up the control end voltages of the sixth switching tube M6 and the seventh switching tube M7, the fifth switching tube M5 pulls up the control end voltages of the eighth switching tube M8 and the ninth switching tube M9, and the third current source switching tube Mp3 in the PTAT current source pulls up the control end voltages of the tenth switching tube M10 and the eleventh switching tube M11, so that at this time, the sixth switching tube M6, the seventh switching tube M7, the eighth switching tube M8, the ninth switching tube M9, the tenth switching tube M10 and the eleventh switching tube M11 are all turned on;
Therefore, the current ix flows in the first switching tube M1, the second switching tube M2 and the first resistor rx, and due to the second switching tube M2. The width-to-length ratio of the third switching tube M3, the fourth switching tube M4 and the fifth switching tube M5 is 1:1: a: b, therefore, the currents flowing through the third switching tube M3, the fourth switching tube M4, and the fifth switching tube M5 are ix, a×ix, and b×ix, respectively; meanwhile, under the action of the first operational amplifier A1, the voltage vx at the inverting input terminal of the first operational amplifier A1 is regulated to be equal to the reference voltage vref at the non-inverting input terminal thereof, so that it is available at this time,current flowing through the fourth switching tube M4Current +.>；
At this time, the current flowing into the eleventh switching tube M11 is made ia by the PTAT current source, and since the tenth switching tube M10 and the eleventh switching tube M11 constitute the fourth current mirror structure, the current flowing into the tenth switching tube M10 has id 10=ia;
when the temperature is low, the PTAT current ia is small and is set to a suitable parameter B such that ia<Az, so that at this time the voltage vz is high, the current id9=iz-id10=iz-ia flowing into the ninth switching tube M9, at which time the current flowing into the ninth switching tube M9 is mirrored into the eighth switching tube M8, i.e. the current id8=id9=iz-ia flowing into the eighth switching tube M8; and at this time, by setting an appropriate parameter a such that when the temperature is low, iw=a×ix <iz-ia=bx ix-ia, and therefore, the voltage vw is pulled down by the current id8 flowing into the eighth switching tube M8, the voltage vw is at a low level, that is, the control terminal voltages of the sixth switching tube M6 and the seventh switching tube M7 are pulled down, the sixth switching tube M6 and the seventh switching tube M7 are turned off, the current iw in the fourth switching tube M4 flows into the eighth switching tube M8 all, the current ix in the third switching tube M3 flows into the second resistor ry all, and since the resistances of the first resistor rx and the second resistor ry are the same, the reference voltage；
When the temperature gradually increases, the PTAT current ia gradually increases, and since the current iz flowing through the fifth switching tube M5 is unchanged, the current id9 (id9=iz-ia) flowing through the ninth switching tube M9 gradually decreases, that is, the current id8 flowing through the eighth switching tube M8 also gradually decreases; at this time, since the current iw flowing through the fourth switching tube M4 is unchanged, when the current id8 flowing into the eighth switching tube M8 gradually decreases to be smaller than the current iw flowing through the fourth switching tube M4, the voltage vw gradually increases, the control terminal voltages of the sixth switching tube M6 and the seventh switching tube M7 are gradually pulled up, the sixth switching tube M6 and the seventh switching tube M7 are turned on, the current id6 flowing into the sixth switching tube M6 and the current id7 flowing into the seventh switching tube M7 gradually become larger, and id6=id7=iw-id 9; at this time, therefore, the current iy flowing into the second resistor ry (iy=ix-id 6) gradually decreases, and the reference voltage vy also gradually decreases;
When the temperature increases to the set value, the PTAT current ia increases to be equal to the current iz flowing through the fifth switching tube M5, at this time, the tenth switching tube M10 is fully turned on, the voltage vz is pulled down to a low level, the control terminal voltages of the eighth switching tube M8 and the ninth switching tube M9 are pulled down, the eighth switching tube M8 and the ninth switching tube M9 are turned off, and the current iw flowing through the fourth switching tube M4 all flows into the seventh switching tube M7, and therefore, id6=id7=iw=a×ix, so at this time, the current iy=ix-id6=ix-a×ix= (1-a) ×ix, that is, at this time, the reference voltage is: vy=iy×ry= (1-a) ×ix×ry= (1-a) × (vref/rx) ×ry= (1-a) ×vref; after that, when the temperature continues to increase, since the tenth switching tube M10 is always in the fully on state, the reference voltage vy no longer changes, which is maintained at a constant value (1-a) ×vref.
From the above analysis, the reference voltage vy is divided into three phases with temperature, wherein, assuming that id8=iw, the corresponding temperature is T1, and assuming that ia=iz, the corresponding temperature is T2, and T1< T2;
when T < T1, the sixth switching tube M6 and the seventh switching tube M7 are turned off, the reference voltage vy=vref;
when t=t1, iw=id8=iz-iase:Sub>A, that is, axix=bx- [ (kxn)/(q×rp) ]×t1, thereby obtaining t1= (B-ase:Sub>A) ×ix× [ (qxrp)/(kxn) ], and since ix=vref/rx, t1= (B-ase:Sub>A) × (vref/rx) × [ (q×rp)/(kxn) ];
When T1< T2, iy=ix-id6=ix-iw+id9=ix-iw+iz+ia=ix-a×ix+b×ix- [ (k×lnn)/(q×rp) ]×t= (1-a+b) × (vref/rx) - [ (k×lnn)/(q×rp) ]×t, and thus, it is found that the reference voltage vy=iy×ry= { (1-a+b) × (vref/rx) - [ (k×lnn)/(q×rp) ]×t } ×ry is linearly decreased with an increase in temperature T when T1< T2;
when t=t2, iz=ia, i.e., bx ix= [ (k×lnn)/(q×rp)]X T2, thus, t2= (B x q x rp)/(k x lnN), and since ix=vref/rx, t2=b x (vref/rx) × (q x rp)/(k x lnN) is obtained,at this time, the reference voltage vy is reduced to be equal to iyxry= (1-a) ×ix×ry= (1-a) × (vref/rx) ×ry= (1-a) ×vref;
when T > T2, since the tenth switching tube M10 is always in the fully on state, the reference voltage vy no longer changes, which remains at a constant value (1-a) ×vref.
From the above description, it is possible to obtain a trend chart of the reference voltage vy with the temperature T shown in fig. 5, and at this time, it is clear from fig. 5 that when the parameter a is designed to be 1, the reference voltage vy can be reduced to 0V after the temperature T is increased to T2; also, when the temperature T is at a high temperature of T1 to T2, the reference voltage vy linearly decreases with an increase in the temperature T.
In summary, according to the reference voltage generating circuit provided by the application, after the reference voltage generating circuit is over-heated, the reference voltage vy output by the reference voltage generating circuit is linearly reduced along with the increase of the temperature T, so that the reliability and the service life of the reference voltage generating circuit are greatly improved.
Fig. 6 is a schematic diagram showing a structure of a battery charging circuit according to an exemplary embodiment, which is a specific embodiment of a circuit structure in which a current linearly varies with temperature at a high temperature shown in fig. 2; that is, the battery charging circuit is constructed in a circuit structure in which current linearly varies with temperature at high temperature as shown in fig. 2; the control sub-circuit in the battery charging circuit includes a third operational amplifier A3; the power sub-circuit in the battery charging circuit comprises a first power switch tube Ma, a second power switch tube Mp, a first power resistor r1, a second power resistor r2, a third power resistor r3 and a fourth operational amplifier A4; the reference voltage generating circuit in the battery charging circuit is the reference voltage generating circuit in fig. 3;
as shown in fig. 6, in the power sub-circuit of the battery charging circuit, a power supply voltage vdd is connected to a fifth node d through a second power resistor r2, and the fifth node d is grounded through a first power switching tube Ma and a first power resistor r1 in sequence;
the power supply voltage vdd is connected to a sixth node s through a third power resistor r3, and the sixth node s is connected to the output terminal vout through a second power switch tube Mp; the output terminal vout is grounded through a battery load;
The fifth node d is connected to the non-inverting input terminal of the fourth operational amplifier A4; the sixth node s is connected to the inverting input of the fourth operational amplifier A4; the output end of the fourth operational amplifier A4 is connected with the control end of the second power switch tube Mp;
in the control sub-circuit of the battery charging circuit, the output end of the third operational amplifier A3 is connected to the control end of the first power switching tube Ma in the power sub-circuit of the battery charging circuit; the non-inverting input end of the third operational amplifier A3 is connected to a first node y in the reference voltage generation circuit of the battery charging circuit; the inverting input of the third operational amplifier A3 is grounded through a first power resistor r1 in the power subcircuit of the battery charging circuit.
The battery charging circuit based on fig. 6 may operate as follows:
after the reference voltage vy output by the reference voltage generating circuit is input into the non-inverting input end of the third operational amplifier A3, the first power switching tube Ma is conducted, and a current i1 is formed in a branch circuit formed by the second power resistor r2, the first power switching tube Ma and the first power resistor r 1; meanwhile, since the voltage at the inverting input terminal of the fourth operational amplifier A4 is the power supply voltage vdd, the fourth operational amplifier A4 outputs a low level, the second power switching tube Mp is turned on, and the battery charging current iout is generated in the third power resistor r3 and the second power switching tube Mp;
At this time, the third operational amplifier A3 adjusts the source voltage va of the first power switching tube Ma to be equal to the reference voltage vy, so that at this time, the current i1=va/r1=vy/r 1 flowing through the first power switching tube Ma;
meanwhile, the fourth operational amplifier A4 adjusts the drain voltage vad of the first power switching tube Ma to be equal to the source voltage vps of the second power switching tube Mp, so that at this time, the voltage difference between the two ends of the second power resistor r2 and the third power resistor r3 is equal, and since no current flows into the input end of the operational amplifier, the ratio of the battery charging current iout flowing through the third power resistor r3 to the current i1 flowing through the second power resistor r2 is r2/r3, so that at this time, the battery charging current iout= (r 2/r 3) ×i1= [ r 2/(r3×r1) ]×vy;
therefore, when the temperature T is smaller than T1, the reference voltage vy=vref outputted by the reference voltage generating circuit, and at this time, the battery charging currentAlways equal to [ r 2/(r3×r1)]×vref；
When the temperature rises to be greater than T1, the reference voltage vy output by the reference voltage generating circuit starts to linearly decrease, so that the battery charging current iout also starts to linearly decrease at this time;
when the temperature rises to T2 or more, the reference voltage vy outputted from the reference voltage generating circuit is reduced to a constant value (1-A) ×vref, so that the battery charging current is at this time Reduce to a constant value (1-A) x [ r 2/(r3×r1)]×vref；
According to the above analysis, the change curve of the battery charging current iout output by the battery charging circuit in fig. 6 with the temperature T can be obtained; the schematic diagram of the change curve of the battery charging current iout with the temperature T is shown in fig. 7, at this time, as can be seen from fig. 7, when the parameter a is designed to be 1, the battery charging current iout can be reduced to 0A after the temperature T is increased to T2;
also, when the temperature T is at a high temperature of T1 to T2, the battery charging current iout linearly decreases with an increase in the temperature T.
In summary, the battery charging circuit in the application is composed of a circuit structure in which the current linearly changes with the temperature at high temperature, so that when the working temperature of the battery charging circuit is at a normal value, the battery charging circuit outputs constant battery charging current, and when the working temperature of the battery charging circuit exceeds the normal value, the battery charging current output by the battery charging circuit linearly decreases with the rise of the working temperature, thereby greatly increasing the reliability and service life of the battery charging circuit and the battery load.
Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (14)
1. In the reference voltage generation circuit, a power supply voltage vdd sequentially passes through a first branch of a first current mirror structure, and a first switch tube M1 and a first resistor rx are grounded;
the control end of the first switching tube M1 is connected with the output end of the first operational amplifier A1; the non-inverting input end of the first operational amplifier A1 is connected with a reference voltage vref; the inverting input end of the first operational amplifier A1 is grounded through the first resistor rx;
the power supply voltage vdd is also connected to the first node y through a second branch of the first current mirror structure; the first node y is grounded through a second resistor ry; the first node y is also grounded through a first branch of the second current mirror structure;
the supply voltage vdd is also connected to the second node w through a third branch of the first current mirror structure; the second node w is grounded through a second branch of the second current mirror structure; the second node w is also grounded through a first branch of the third current mirror structure;
The supply voltage vdd is also connected to a third node z through a fourth branch of the first current mirror structure; the third node z is grounded through a second branch of the third current mirror structure; the third node z is grounded through a first branch of the fourth current mirror structure;
the supply voltage vdd is also connected to a fourth node a through a PTAT current source, which is grounded through a second leg of a fourth current mirror structure.
2. The reference voltage generating circuit according to claim 1, wherein the PTAT current source is configured to generate a current ia, which is a PTAT current that increases with an increase in temperature.
3. The reference voltage generating circuit according to claim 2, wherein in the PTAT current source, the power supply voltage vdd is grounded through a first current source switching tube Mp1 and a first triode Q1 in this order;
the power supply voltage vdd is further grounded through a second current source switching tube Mp2, a third resistor rp and a second triode Q2 in sequence;
the power supply voltage vdd is also connected to a fourth node a in the reference voltage generating circuit through a third current source switching tube Mp 3;
the control end of the first current source switch tube Mp1 is respectively connected with the output end of the second operational amplifier A2, the control end of the second current source switch tube Mp2 and the control end of the third current source switch tube Mp 3;
The inverting input end of the second operational amplifier A2 is grounded through the first triode Q1; the non-inverting input end of the second operational amplifier A2 is grounded through the third resistor rp and the second triode Q2 in sequence.
4. A reference voltage generating circuit according to claim 3, wherein the power supply voltage vdd is further connected to the control terminal of the first transistor Q1 through a first current source switching tube Mp 1;
the power supply voltage vdd is further connected to the control end of the second triode Q2 through a second current source switching tube Mp2 and a third resistor rp in sequence.
5. The reference voltage generating circuit according to claim 4, wherein the first transistor Q1 and the second transistor Q2 have a width to length ratio of 1: n.
6. The reference voltage generating circuit according to any one of claims 1 to 5, wherein the resistance values of the first resistor rx and the second resistor ry are the same.
7. The reference voltage generating circuit according to any one of claims 1 to 5, wherein the first branch of the first current mirror structure includes a second switching tube M2, the second branch of the first current mirror structure includes a third switching tube M3, the third branch of the first current mirror structure includes a fourth switching tube M4, and the fourth branch of the first current mirror structure includes a fifth switching tube M5; the control end of the second switching tube M2 is respectively connected with the control end of the third switching tube M3, the control end of the fourth switching tube M4 and the control end of the fifth switching tube M5;
The power supply voltage vdd is grounded through the second switching tube M2, the first switching tube M1 and the first resistor rx in sequence;
the power supply voltage vdd is also connected to a first node y through the third switching tube M3;
the power supply voltage vdd is also connected to a second node w through the fourth switching tube M4;
the supply voltage vdd is also connected to a third node z through the fifth switching tube M5.
8. The reference voltage generating circuit according to claim 7, wherein the aspect ratio of the second switching transistor M2, the third switching transistor M3, the fourth switching transistor M4, and the fifth switching transistor M5 is 1:1: a: b, and A is less than or equal to 1.
9. The reference voltage generating circuit according to any one of claims 1 to 5, wherein the first branch of the second current mirror structure includes a sixth switching tube M6, and the second branch of the second current mirror structure includes a seventh switching tube M7; the control end of the sixth switching tube M6 is respectively connected with the second node w and the control end of the seventh switching tube M7;
the first node y is grounded through the sixth switching tube M6;
the second node w is grounded through the seventh switching tube M7.
10. The reference voltage generating circuit according to any one of claims 1 to 5, wherein the first branch of the third current mirror structure includes an eighth switching transistor M8, and the second branch of the third current mirror structure includes a ninth switching transistor M9; the control end of the eighth switching tube M8 is respectively connected with the third node z and the control end of the ninth switching tube M9;
The second node w is grounded through the eighth switching tube M8;
the third node z is grounded through the ninth switching tube M9.
11. The reference voltage generating circuit according to any one of claims 1 to 5, wherein the first branch of the fourth current mirror structure includes a tenth switching transistor M10, and the second branch of the fourth current mirror structure includes an eleventh switching transistor M11; the control end of the tenth switching tube M10 is respectively connected with the control ends of the fourth node a and the eleventh switching tube M11;
the third node z is also grounded through a tenth switching tube M10;
the fourth node a is grounded through the eleventh switching tube M11.
12. A circuit structure in which a current linearly varies with temperature at a high temperature, characterized in that the circuit structure comprises a control sub-circuit, a power sub-circuit, a battery load, and the reference voltage generating circuit according to any one of claims 1 to 11; the reference voltage generation circuit, the control sub-circuit, the power sub-circuit and the battery load are sequentially connected;
the reference voltage generation circuit is used for outputting a reference voltage vy to the control sub-circuit;
the control sub-circuit is used for controlling the power sub-circuit to regulate and charge the battery load according to the reference voltage vy.
13. The circuit arrangement of claim 12, wherein the control sub-circuit is further configured to:
when the working temperature of the battery charging circuit is in a target temperature range, controlling the power sub-circuit to output constant battery charging current to the battery load according to the reference voltage vy;
when the operating temperature of the battery charging circuit exceeds the target temperature range, the power sub-circuit is controlled to output a battery charging current which linearly decreases with the increase of temperature to the battery load according to the reference voltage vy.
14. A battery charging circuit, characterized in that the battery charging circuit is constituted by a circuit structure in which a current at a high temperature linearly varies with temperature as claimed in any one of claims 12 to 13;
in a power sub-circuit of the battery charging circuit, a power supply voltage vdd is connected to a fifth node d through a second power resistor r2, and the fifth node d is grounded through a first power switching tube Ma and a first power resistor r1 in sequence;
the power supply voltage vdd is connected to a sixth node s through a third power resistor r3, and the sixth node s is connected to an output terminal vout through a second power switch tube Mp; the output terminal vout is grounded through a battery load;
The fifth node d is connected to the non-inverting input terminal of the fourth operational amplifier A4; the sixth node s is connected to the inverting input of the fourth operational amplifier A4; the output end of the fourth operational amplifier A4 is connected with the control end of the second power switch tube Mp;
in a control sub-circuit of the battery charging circuit, the output end of a third operational amplifier A3 is connected to the control end of a first power switching tube Ma in a power sub-circuit of the battery charging circuit; the non-inverting input end of the third operational amplifier A3 is connected to a first node y in a reference voltage generation circuit of the battery charging circuit; the inverting input terminal of the third operational amplifier A3 is grounded through a first power resistor r1 in the power subcircuit of the battery charging circuit.
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