CN116581961B - Three-phase inverter current sampling method and motor device - Google Patents
Three-phase inverter current sampling method and motor device Download PDFInfo
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- CN116581961B CN116581961B CN202310704283.7A CN202310704283A CN116581961B CN 116581961 B CN116581961 B CN 116581961B CN 202310704283 A CN202310704283 A CN 202310704283A CN 116581961 B CN116581961 B CN 116581961B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0009—Devices or circuits for detecting current in a converter
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/38—Means for preventing simultaneous conduction of switches
- H02M1/385—Means for preventing simultaneous conduction of switches with means for correcting output voltage deviations introduced by the dead time
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
- H02M7/53875—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters with pulse width modulation
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Abstract
The invention discloses a three-phase inverter current sampling method and a motor device, wherein the method adopts three-resistance sampling of a lower bridge arm and adjusts SVPWM output waveforms, and comprises the following steps: when the minimum value of the three-phase lower bridge arm conduction time is greater than or equal to the minimum lower bridge arm conduction time required by normal sampling, the waveform does not need to be adjusted; when the minimum value is smaller than the time required by sampling, the three phases synchronously adjust pulse width, so that the minimum value of the conduction time of the three-phase lower bridge arm is larger than or equal to the time required by sampling, or equal to 0, the maximum value does not exceed the PWM period, and the intermediate value is larger than or equal to the time required by sampling. The motor device comprises a three-phase motor and a three-phase inverter adopting the current sampling method. The method and the device disclosed by the invention are simple in hardware realization and low in cost, and the sampling current is not distorted by adjusting the mode of SVPWM output waveform and selecting the sampling phase mode of the lower bridge arm with enough on time, so that the accuracy of sampling is guaranteed, and the practicability is good.
Description
Technical Field
The invention relates to a three-phase inverter current sampling method and a motor device.
Background
In the process of controlling a three-phase inverter by adopting a Space Vector Pulse Width Modulation (SVPWM) strategy, one key technical link is sampling of three-phase currents. Three-phase current sampling schemes are various, wherein the lower bridge arm three-resistance sampling is a common sampling method, and the hardware is simple to realize and low in cost.
In the lower bridge arm three-resistor sampling, phase current can be sampled only in the time when the lower bridge arm switch tube is conducted, and the switching of the switch tube of each phase can bring noise to the three-phase current sampling.
To solve the noise problem, current sampling methods currently in common use include: (1) sampling at fixed time in the PWM period, reducing the modulation ratio, and ensuring that the lower bridge arm has enough conduction time; (2) in seven-segment or five-segment SVPWM modulation, each period is judged, and a segment with enough conduction time of a lower bridge arm is selected for sampling; (3) and the conduction time of the lower bridge arm is forcibly prolonged. The voltage utilization rate of the method (1) is low, and only about 88% is usually adopted, so that the motor polar speed is reduced; the voltage utilization rate of the method (2) can not reach 100%, usually about 94%, and when the method is applied to a small-inductance motor, sampling current distortion can be caused by sampling at different moments due to quicker rise and decay of phase current; method (3) causes the output motor phase voltage to deviate from the target voltage as disclosed in patent publication CN115800865 a.
Therefore, how to overcome the above-mentioned drawbacks has become an important issue to be solved by the person skilled in the art.
Disclosure of Invention
The invention overcomes the defects of the technology and provides a three-phase inverter current sampling method and a motor device.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
a three-phase inverter current sampling method adopts three-resistance sampling of a lower bridge arm, adjusts SVPWM output waveforms according to requirements, and adopts Tdie to represent minimum lower bridge arm conduction time required by normal sampling, tsample to represent sample hold time, tdie to be bridge arm switching noise time, tdie=Tsample+Tdie, tmax to represent maximum value of three-phase lower bridge arm conduction time, tmid to represent intermediate value of three-phase lower bridge arm conduction time, tmin to represent minimum value of three-phase lower bridge arm conduction time, tmax to be greater than or equal to Tmid to Tmin, tpwm period to be set, A value to represent difference between Twwm and Tmax, and B value to represent difference between Tdie and Tmin, specifically comprises the following steps:
judging whether Tmin is not less than Tspeed, if not, processing separately, and if so, regulating SVPWM output waveform, sampling phase is three-phase or any two phases, and sampling time for current sampling is the central time point of lower bridge arm conduction, and then Tspeed/2 is shifted forward by sample holding time Tsample.
Preferably, when the Tmin is not less than Tneed, if it is judged that the Tmin is not less than Tneed, it is further judged that the value a is greater than or equal to the value B, if it is judged that the Tmin is not less than Tneed, then the processing is carried out separately, if it is judged that the Tmin is not less than Tneed, then the three-phase lower bridge arm of the SVPWM output waveform is conducted, and a common mode value C is added at the same time, wherein the value range of the common mode value C is between the value B and the value a, the sampling phase is three-phase or any two phases, and the sampling time for current sampling is the sampling time point of the conduction of the lower bridge arm and is shifted backward by Tneed/2 and then forward by the sampling hold time Tsample.
As described above, the common mode value C is preferably the difference between Tneeed minus Tmin.
As described above, it is preferable that when the determination as to whether Tmin is not less than Tneed and whether a is greater than or equal to B is no, by adjusting such that Tneed is less than or equal to 9.18% of Tpwm, then determining whether Tmin is not less than Tneed and a is greater than or equal to B, if both are not, then continuing to execute downward, if both are not, otherwise processing is performed, the three-phase lower bridge arm conduction pulse width of the SVPWM output waveform is subtracted by Tmin at the same time, the sampling phase is other than the phase having the minimum lower bridge arm conduction time, and the sampling time at which current sampling is performed is shifted back by Tneed/2 by the sample hold time Tsample at the center point of lower bridge arm conduction.
As mentioned above, it is preferable that this is achieved by adjusting such that Tneed is less than or equal to 9.18% of Tpwm, in particular by adjusting PWM dead time and/or adjusting switching rate of the switching tube and/or adjusting operational amplifier bandwidth and/or adjusting sample and hold time Tsample.
A three-phase inverter current sampling method adopts three-resistance sampling of a lower bridge arm, adjusts SVPWM output waveforms according to requirements, and adopts Tdie to represent minimum lower bridge arm conduction time required by normal sampling, tsample to represent sample hold time, tdie to be bridge arm switching noise time, tdie=Tsample+Tdie, tmax to represent maximum value of three-phase lower bridge arm conduction time, tmid to represent intermediate value of three-phase lower bridge arm conduction time, tmin to represent minimum value of three-phase lower bridge arm conduction time, tmax to be greater than or equal to Tmid to Tmin, tpwm period to be set, A value to represent difference between Twwm and Tmax, and B value to represent difference between Tdie and Tmin, specifically comprises the following steps:
and judging whether the A value is larger than or equal to the B value under the condition that Tmin is smaller than Tneeed, otherwise processing the B value, if the A value is not larger than the B value, then conducting the pulse width of the three-phase lower bridge arm of the SVPWM output waveform while adding a common mode value C when the B value is judged to be larger than the B value, wherein the value range of the common mode value C is between the B value and the A value, the sampling phase is three-phase or any two phases, and the sampling time for current sampling is the central time point of conducting the lower bridge arm and is shifted back by Tneeed/2 and then shifted forward by the sample holding time Tsample.
As described above, the common mode value C is preferably the difference between Tneeed minus Tmin.
A three-phase inverter current sampling method adopts three-resistance sampling of a lower bridge arm, adjusts SVPWM output waveforms according to requirements, and adopts Tdie to represent minimum lower bridge arm conduction time required by normal sampling, tsample to represent sample hold time, tdie to be bridge arm switching noise time, tdie=Tsample+Tdie, tmax to represent maximum value of three-phase lower bridge arm conduction time, tmid to represent intermediate value of three-phase lower bridge arm conduction time, tmin to represent minimum value of three-phase lower bridge arm conduction time, tmax to be greater than or equal to Tmid to Tmin, tpwm period to be set, A value to represent difference between Twwm and Tmax, and B value to represent difference between Tdie and Tmin, specifically comprises the following steps:
if Tm is smaller than Tnet, judging whether A value is smaller than B value, otherwise processing if judging that Tnet is smaller than or equal to 9.18% of Twm, if judging that Tnet is smaller than or equal to Twm, then judging whether Tnet is not smaller than Tnet and A value is larger than or equal to B, if not, continuing to execute downwards, otherwise processing if not, subtracting Tnet from the conducting pulse width of the three-phase lower bridge arm of the SVPWM output waveform, sampling other two phases except the phase with the smallest conducting time of the lower bridge arm, and moving the sampling time of current sampling back by Tnet/2 for a sampling holding time Tsample when the central time point of conducting of the lower bridge arm.
As mentioned above, it is preferable that this is achieved by adjusting such that Tneed is less than or equal to 9.18% of Tpwm, in particular by adjusting PWM dead time and/or adjusting switching rate of the switching tube and/or adjusting operational amplifier bandwidth and/or adjusting sample and hold time Tsample.
A motor device comprises a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor to work, wherein the three-phase inverter adopts any one of the current sampling methods.
Compared with the prior art, the invention has the beneficial effects that:
1. when the current sampling method in the first embodiment meets the condition that Tmin is not less than Tneeed, each phase has enough conduction time to facilitate normal sampling, so that SVPWM output waveform does not need to be adjusted; in addition, the sampling time for current sampling is the requirement that the central time point of the conduction of the lower bridge arm is shifted backward by Tfeed/2 and then shifted forward by the sampling and holding time Tsample, so that the section of Tfeed is aligned with the right center, the Tfeed has the widest value range, the practicability is good, and if the section of Tfeed is aligned with the non-center, the smaller Tfeed is needed to ensure that at least two phases can be sampled.
2. In the current sampling method in the second embodiment, when the Tmin is smaller than Tneed, the Tmin has insufficient conduction time to facilitate normal sampling, and when the A value is larger than or equal to the B value, tmax, tmid, tmin synchronously adds a common mode value C with a value range between the B value and the A value, so that the adjusted Tmax, tmid, tmin has sufficient conduction time to facilitate normal sampling, and the adjusted Tmax does not exceed Tpwm, so that the current sampling method has good practicability; in addition, the sampling time for current sampling is the requirement that the central time point of the conduction of the lower bridge arm is shifted backward by Tfeed/2 and then shifted forward by the sampling and holding time Tsample, so that the section of Tfeed is aligned with the right center, the Tfeed has the widest value range, the practicability is good, and if the section of Tfeed is aligned with the non-center, the smaller Tfeed is needed to ensure that at least two phases can be sampled. The method ensures that the sampling current is not distorted by adjusting the mode of SVPWM output waveform and selecting the sampling phase mode of the lower bridge arm with enough on time, thereby being beneficial to ensuring the accuracy of sampling and having good practicability.
3. In the current sampling method in the third embodiment, when Tmin is smaller than Tneed, tmin has insufficient conduction time to facilitate normal sampling, and when a value is smaller than a value B, if Tmax, tmid, tmin is synchronously added with a common mode value C with a value range between the value B and the value a, tmax exceeds Tpwm after adjustment, the current sampling method does not conform to the actual situation, if the conduction pulse width of a three-phase lower bridge arm of an SVPWM output waveform is subtracted by Tmin, the adjusted Tmax is O, and the adjusted Tmax and Tmid still have sufficient conduction time to facilitate normal sampling, namely, the adjusted Tmax and Tmid are subjected to current sampling without distortion, thereby being beneficial to ensuring the accuracy of sampling, and three-phase current can be obtained through current reconstruction, and the current sampling method is good in practicability; in addition, the sampling time for current sampling is the requirement that the central time point of the conduction of the lower bridge arm is shifted backward by Tfeed/2 and then shifted forward by the sampling and holding time Tsample, so that the section of Tfeed is aligned with the right center, the Tfeed has the widest value range, the practicability is good, and if the section of Tfeed is aligned with the non-center, the smaller Tfeed is needed to ensure that at least two phases can be sampled. The method ensures that the sampling current is not distorted by adjusting the mode of SVPWM output waveform and selecting the sampling phase mode of the lower bridge arm with enough on time, thereby being beneficial to ensuring the accuracy of sampling and having good practicability.
Drawings
Fig. 1 is a three-resistance circuit diagram of a lower bridge arm of a three-phase inverter.
Fig. 2 is a waveform diagram of the on time of the lower arm.
Fig. 3 is a second waveform diagram of the on time of the lower arm.
Fig. 4 is a lower leg on-time waveform diagram three.
Fig. 5 is a waveform diagram of the on time of the lower arm at full voltage.
Detailed Description
The following features of the invention and other related features are described in further detail with respect to the following embodiments to facilitate understanding by those skilled in the art:
in a first embodiment, as shown in fig. 1 and 2, a three-phase inverter current sampling method is provided, in which three resistors of a lower bridge arm are adopted, and an SVPWM output waveform is adjusted as required, tmin represents a minimum value of a three-phase lower bridge arm on time, tneed represents a minimum lower bridge arm on time required for normal sampling, tsamp represents a sample-hold time, tnoise represents a bridge arm switching noise time, tneed=tsamp+tnoise, tmax represents a maximum value of a three-phase lower bridge arm on time, tmid represents a middle value of a three-phase lower bridge arm on time, tmin represents a minimum value of a three-phase lower bridge arm on time, tmax is equal to or greater than Tmin, tpwm represents a PWM period, a value is a difference between Tpwm and Tmax, and a value is a difference between Tneed and Tmin is set as follows: judging whether Tmin is not less than Tspeed, if not, processing separately, and if so, regulating SVPWM output waveform, sampling phase is three-phase or any two phases, and sampling time for current sampling is the central time point of lower bridge arm conduction, and then Tspeed/2 is shifted forward by sample holding time Tsample.
As described above, as shown in fig. 2, when Tmin is not less than Tneed, each phase has enough on time to perform normal sampling, so that the SVPWM output waveform does not need to be adjusted; in addition, the sampling time for current sampling is the requirement that the central time point of the conduction of the lower bridge arm is shifted backward by Tfeed/2 and then shifted forward by the sampling and holding time Tsample, so that the section of Tfeed is aligned with the right center, the Tfeed has the widest value range, the practicability is good, and if the section of Tfeed is aligned with the non-center, the smaller Tfeed is needed to ensure that at least two phases can be sampled.
In a second embodiment, as shown in fig. 1 and 3, a three-phase inverter current sampling method is characterized in that a lower bridge arm three-resistor sampling is adopted, and an SVPWM output waveform is adjusted as required, where Tneed represents a minimum lower bridge arm conduction time required for normal sampling, tsample represents a sample-hold time, tnoise is a bridge arm switching noise time, tneed=tsample+tnoise, tmax represents a maximum value of the three-phase lower bridge arm conduction time, tmid represents an intermediate value of the three-phase lower bridge arm conduction time, tmin represents a minimum value of the three-phase lower bridge arm conduction time, tmax is equal to or greater than Tmin, tpwm represents a PWM period, a value a difference between Tpwm and Tmax, and B represents a difference between Tneed and Tmin, and the method is as follows: and judging whether the A value is larger than or equal to the B value under the condition that Tmin is smaller than Tneeed, otherwise processing the B value, if the A value is not larger than the B value, then conducting the pulse width of the three-phase lower bridge arm of the SVPWM output waveform while adding a common mode value C when the B value is judged to be larger than the B value, wherein the value range of the common mode value C is between the B value and the A value, the sampling phase is three-phase or any two phases, and the sampling time for current sampling is the central time point of conducting the lower bridge arm and is shifted back by Tneeed/2 and then shifted forward by the sample holding time Tsample.
As described above, in the current sampling method according to the second embodiment, when Tmin is smaller than Tneed, tmin does not have enough conduction time to facilitate normal sampling, and when a value is greater than or equal to B value, tmax, tmid, tmin synchronously adds a common mode value C with a value range between B value and a value, so that all adjusted Tmax, tmid, tmin has enough conduction time to facilitate normal sampling, and the adjusted Tmax does not exceed Tpwm, which is good in practicality; in addition, the sampling time for current sampling is the requirement that the central time point of the conduction of the lower bridge arm is shifted backward by Tfeed/2 and then shifted forward by the sampling and holding time Tsample, so that the section of Tfeed is aligned with the right center, the Tfeed has the widest value range, the practicability is good, and if the section of Tfeed is aligned with the non-center, the smaller Tfeed is needed to ensure that at least two phases can be sampled. The method ensures that the sampling current is not distorted by adjusting the mode of SVPWM output waveform and selecting the sampling phase mode of the lower bridge arm with enough on time, thereby being beneficial to ensuring the accuracy of sampling and having good practicability.
In addition, in the second embodiment, the common mode value cfbest is the minimum value between the B value and the a value, that is, the value B, so that the SVPWM waveform adjustment is minimum, and the good characteristics of the SVPWM are maintained to the maximum.
In a third embodiment, as shown in fig. 1 and 4, a three-phase inverter current sampling method is characterized in that a lower bridge arm three-resistor sampling is adopted, and an SVPWM output waveform is adjusted as required, where Tneed represents a minimum lower bridge arm conduction time required for normal sampling, tsample represents a sample-hold time, tnoise is a bridge arm switching noise time, tneed=tsample+tnoise, tmax represents a maximum value of the three-phase lower bridge arm conduction time, tmid represents an intermediate value of the three-phase lower bridge arm conduction time, tmin represents a minimum value of the three-phase lower bridge arm conduction time, tmax is equal to or greater than Tmin, tpwm represents a PWM period, a value a difference between Tpwm and Tmax, and B represents a difference between Tneed and Tmin, and the method is as follows: if Tm is smaller than Tnet, judging whether A value is smaller than B value, otherwise processing if judging that Tnet is smaller than or equal to 9.18% of Twm, if judging that Tnet is smaller than or equal to Twm, then judging whether Tnet is not smaller than Tnet and A value is larger than or equal to B, if not, continuing to execute downwards, otherwise processing if not, subtracting Tnet from the conducting pulse width of the three-phase lower bridge arm of the SVPWM output waveform, sampling other two phases except the phase with the smallest conducting time of the lower bridge arm, and moving the sampling time of current sampling back by Tnet/2 for a sampling holding time Tsample when the central time point of conducting of the lower bridge arm.
As described above, in implementation, the adjustment is performed such that Tneed is less than or equal to 9.18% of Tpwm, specifically, by adjusting PWM dead time and/or adjusting switching rate of a switching tube and/or adjusting operational amplifier bandwidth and/or adjusting sample and hold time Tsample.
In the third embodiment of the present application, the Tneed is adjusted so that the Tneed is less than or equal to 9.18% of Tpwm, and mainly in order to meet that the conduction time of at least two lower bridge arms is greater than or equal to Tneed, and in order to make the sampling phase not less than two phases, tneed < = Tmid must be satisfied, where the maximum value of Tneed is 9.18% of Tpwm, which can be obtained through calculation, and can be estimated by an exhaustive method, or can be obtained through calculation by a nonlinear optimization method.
As described above, the method for calculating the maximum value of Tneed may be to estimate by using an exhaustion method, and the steps of the exhaustion method are as follows:
step 1: let dc side bus voltage udc=1, let modulation ratio be 1 (i.e. voltage utilization rate reaches 100%, if voltage utilization rate is 100%, normal sampling can be achieved if less than 100%, thus only exhaustive calculation is carried out when voltage utilization rate is 100%), at this time SVPWM reference voltageBecause of the modulation ratio
Step 2: let phase angle θ=0, calculate motor three phase voltage:
U a ＝U ref cos(θ)
U b ＝U ref cos(θ-2π/3)
U c ＝U ref cos(θ+2π/3)
step 3: by using a carrier-based SVPWM modulation method (equivalent to a space vector-based SVPWM modulation method), the output three-phase terminal voltages Uu, uv and Uw of the inverter are obtained by modulation as follows:
U u ＝U a +(U dc -U max -U min )/2
U v ＝U b +(U dc -U max -U min )/2
U w ＝U c +(U dc -U max -U min )/2
U max ＝max(U a ,U b ,U c )
U min ＝min(U a ,U b ,U c )
step 4: let PWM period tpwm=1, calculate three-phase lower leg conduction times Tu, tv, and Tw as:
T u ＝T pwm (1-U u /U dc )
T v ＝T pwm (1-U v /U dc )
T w ＝T pwm (1-U w /U dc )
step 5: finding out the minimum value Tmin, the intermediate value Tmid and the maximum value Tmax of the three-phase lower bridge arm conduction time:
T max ＝max(T u ,T v ,T w )
T mid ＝median(T u ,T v ,T w )
T min ＝min(T u ,T v ,T w )
step 6: let A denote the difference between Tpwm and Tmax, two adjustments are made to the three-phase waveform:
(1) and adding a common mode value to the three-phase lower bridge arm conduction time, wherein the common mode value is A, and the minimum value of the three-phase lower bridge arm conduction time after adjustment is adjusted to be:
T 1 ＝T min +(T pwm -T max )
(2) the three-phase lower bridge arm conduction time is subtracted by a common mode value, the common mode value is Tmin, the minimum value of the three-phase lower bridge arm conduction time after adjustment is adjusted to be 0, and the intermediate value is adjusted to be:
T 2 ＝T mid -T min
at least one of the two adjustment methods is required to satisfy no less than two phases of normal sampling, and the conduction time of the lower bridge arm required by normal sampling is no more than that required by normal sampling:
T need_max_i ＝max(T 1 ,T 2 )
recording the Tfeed_max_i to an array Tfeed_max [0];
step 7: uniformly taking 10000 values from 0 to 2 pi, enabling theta in the step 2 to take the values, repeating the steps 2 to 6, calculating Tfeed_max_i, and recording the Tfeed_max [ i ] into an array;
step 8: and finding out the minimum value Tnet_max_all in the array Tnet_max [ ], so that the conduction time of the lower bridge arm required by normal sampling is not more than Tnet_max_all, and the normal sampling of not less than two phases in any phase angle can be ensured.
The calculation in the above steps shows that tneed_max_all= 0.0918, that is, waveform adjustment is performed by using the adjustment method of the present invention, so that it is necessary to ensure that Tneed is less than or equal to 9.18% of Tpwm in order to ensure that no less than two phases can be sampled normally.
As described above, the method for calculating the maximum value of Tneed may be a method for calculating the maximum value by using a nonlinear optimization method, where the nonlinear optimization problem is as follows:
min R(θ，K m )＝T need_max /T pwm
s.t.U a ＝U ref cos(θ)
U b ＝U ref cos(θ-2π/3)
U c ＝U ref cos(θ+2π/3)
U max ＝max(U a ,U b ,U c )
U min ＝min(U a ,U b ,U c )
U u ＝U a +(U dc -U max -U min )/2
U v ＝U b +(U dc -U max -U min )/2
U w ＝U c +(U dc -U max -U min )/2
T u ＝T pwm (1-U u /U dc )
T v ＝T pwm (1-U v /U dc )
T w ＝T pwm (1-U w /U dc )
T max ＝max(T u ,T v ,T w )
T mid ＝median(T u ,T v ,T w )
T min ＝min(T u ,T v ,T w )
T 1 ＝T min +(T pwm -T max )
T 2 ＝T mid -T min
T need_max ＝max(T 1 ,T 2 )
U dc ＞0，T pwm ＞0，K m ∈[0,1]，θ∈[0,2π)
in the calculation method, km represents the modulation ratio of the SVPWM, uref represents the reference voltage of the SVPWM modulation, and Udc represents the dc-side bus voltage; uu, uv and Uw respectively correspond to three-phase terminal voltages modulated by SVPWM and are saddle wave waveforms; tu, tv and Tw are respectively the conduction time of the SVPWM modulated three-phase lower bridge arm, and the pre-waveform is adjusted as shown in FIG. 5. Solving the optimization problem can obtain the minimum value of R about theta and Km asI.e. 9.18%.
The exhaustive method and the nonlinear optimization method are more rigorous in calculation, any direct current side bus voltage, any PWM period and any modulation ratio are considered, but in practice, the ratio of Tspeed to Twm is irrelevant to the direct current side bus voltage, the ratio is irrelevant to the PWM period, and it is easy to know that the larger the modulation ratio is, the more strict the lower bridge arm conduction time is needed for sampling, so the exhaustion method is simplified and proper.
As described above, in the current sampling method according to the third embodiment, when Tmin is smaller than Tneed, tmin has insufficient conduction time to facilitate normal sampling, and when a value is smaller than B, if Tmax, tmid, tmin is synchronously added with a common mode value C with a value range between B and a, tmax exceeds Tpwm after adjustment, so that the current sampling method does not conform to the actual situation, if Tmin is subtracted from the conduction pulse width of the three-phase lower bridge arm of the SVPWM output waveform, the adjusted Tmin is O, and the adjusted Tmax and Tmid still have sufficient conduction time to facilitate normal sampling, that is, the adjusted Tmax and Tmid are sampled with current without distortion, which is favorable for ensuring the accuracy of sampling, and three-phase current can be obtained through current reconstruction, so that the current sampling method has good practicability; in addition, the sampling time for current sampling is the requirement that the central time point of the conduction of the lower bridge arm is shifted backward by Tfeed/2 and then shifted forward by the sampling and holding time Tsample, so that the section of Tfeed is aligned with the right center, the Tfeed has the widest value range, the practicability is good, and if the section of Tfeed is aligned with the non-center, the smaller Tfeed is needed to ensure that at least two phases can be sampled. The method ensures that the sampling current is not distorted by adjusting the mode of SVPWM output waveform and selecting the sampling phase mode of the lower bridge arm with enough on time, thereby being beneficial to ensuring the accuracy of sampling and having good practicability.
As described above, the first, second, and third embodiments of the present invention are directed to different cases, and there is no collision or intersection between them, and therefore any two of the first, second, and third embodiments can be used in combination. In addition, the current sampling method is suitable for small-inductance motors, and is beneficial to achieving the voltage utilization rate reaching 100% on the premise of not influencing the phase voltage of an output motor.
As shown in fig. 1 to 5, a specific embodiment of the first, second and third embodiments after being combined is as follows:
assuming that the frequency of the SVPWM output waveform is 20kHz, then Tpwm is 50us. The 9.18% of Tpwm is equal to 4.6us, i.e. Tneeed should be less than or equal to 4.6us. When the bridge arm switching noise time Tnode is 2us through an oscilloscope, the sample and hold time Tsample should not be greater than 4.6us-2 us=2.6 us; the sampling circuit parameters and PWM dead time can be properly adjusted, so that the bridge arm switching noise time Tnoise is adjusted to a smaller value, and the settable range of the sampling and holding time Tsample is larger. The sample-hold time in this embodiment is set to 0.5us, so that the minimum lower bridge arm conduction time Tneed required for normal sampling is 2.5us, and the condition of less than or equal to 4.6us is satisfied.
The three-phase inverter employs field oriented vector control (FOC) and the PWM employs seven-segment space vector modulation (SVPWM).
SVPWM outputs three-phase PWM pulse width, PWM period subtracts three-phase PWM pulse width to obtain three-phase lower bridge arm conduction time, expressed as Tu, tv and Tw, and find out the minimum value in Tu, tv and Tw, namely Tmin. Let A denote the difference between Tpwm and Tmax, and let B denote the difference between Tneeed and Tmin.
As shown in the three-phase waveform diagram of fig. 2, when Tmin is greater than or equal to Tneed (i.e., 2.5 us), the pulse width of the three phases is not adjusted, the three phases can be sampled, and the PWM output waveform is the same as the conventional SVPWM.
As shown in the three-phase waveform diagram in FIG. 3, when Tmin is smaller than Tfeed, i.e. Tmin is smaller than 2.5us, and A value is larger than or equal to B value, the conducting pulse width of the three-phase lower bridge arm is simultaneously added with a common mode value C, the value of the common mode value C is in the range between B value and A value, and the sampling phase is three phases or any two phases. In this embodiment, the common mode value C is the minimum value between the B value and the a value, that is, the value B, and three phases can be sampled at this time, and the PWM output waveform is different from the conventional SVPWM, but has a smaller variation.
As shown in the three-phase waveform diagram in fig. 4, when Tmin is smaller than Tneed, that is, tmin is smaller than 2.5us, and the value a is smaller than the value B, then the conduction pulse width of the lower bridge arm of the three phases is subtracted by Tmin simultaneously, the phase with the minimum conduction time of the lower bridge arm can not be sampled, the other two phases can be sampled, and then three-phase current is obtained through current reconstruction, so that the PWM output waveform has larger difference with the traditional SVPWM.
And if the Tspeed is less than or equal to the requirement of 9.18% of Tpwm, if the Tspeed is not met, for example, the bridge arm switching noise time Tnoise is 4us, the sample hold time Tsample is set to 1us, and the minimum lower bridge arm conduction time Tspeed required by normal sampling is 5us and is greater than 9.18% of Tpwm. When the fundamental frequency of the motor phase voltage is 1kHz and the amplitude of the motor phase voltage reaches 100%, the waveform of the conduction time of the lower bridge arm of the front three phases is adjusted as shown in fig. 5; at the time t=350 us, tu is 2.2us, tv is 48.0us, tw is 6.8us, tmax is 48us, tmid is 6.8us, tmin is 2.2us, a value is 2us, B value is 2.8us, tmin is less than Tneed, and a value is less than B, which is the condition 3, tu, tv and Tw are subtracted simultaneously, so that the adjusted three-phase lower bridge arm on time is 0us, 45.8us and 4.6us, tneed is 5us, and only the V-phase lower bridge arm on time is enough to complete sampling, which cannot meet the requirement of at least two-phase sampling. To make at least two phases sampable, tneed needs to be adjusted to below 4.6us so that both V and W phases can be sampled, there are three adjustment methods: (1) adjusting PWM dead time or switching rate of a switching tube or operational amplifier bandwidth, and reducing Tneose to enable the Tneose to be not more than 3.6us; (2) adjusting the sample and hold time Tsample to make Tsample not more than 0.6us; (3) while Tnoise and Tsample are reduced so that their sum is no greater than 4.6us.
As described above, the sampling time is the time point of the center of the conduction of the lower bridge arm, which is shifted back by Tfeed/2 and then shifted forward by the sample hold time. In this embodiment, since the lower arm PWM is aligned with the PWM as the center, the sampling time is Tpwm/2+tneed/2-tsample=25.75 us after the start of the PWM period.
As shown in fig. 5, when the motor phase voltage amplitude reaches 100%, the three-phase lower bridge arm conduction time changes with time to form waveforms before and after adjustment.
As shown in fig. 1, the present disclosure also discloses a motor device, which includes a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor to work, where the three-phase inverter adopts the current sampling method described above.
As described above, the present disclosure protects a three-phase inverter current sampling method and a motor device, and all technical schemes identical or similar to the present disclosure should be shown as falling within the protection scope of the present disclosure.
Claims (8)
1. A three-phase inverter current sampling method is characterized in that three-resistance sampling of a lower bridge arm is adopted, SVPWM output waveforms are adjusted according to requirements, tdie represents the minimum lower bridge arm conduction time required by normal sampling, tsample represents sample-hold time, tneoise is bridge arm switching noise time, tdie=Tsample+Tneoise, tmax represents the maximum value of the three-phase lower bridge arm conduction time, tmid represents the intermediate value of the three-phase lower bridge arm conduction time, tmin represents the minimum value of the three-phase lower bridge arm conduction time, tmax is larger than or equal to Tmid, twm represents the period of PWM, A represents the difference between Twwm and Tmax, B represents the difference between Tdie and Tmin, and the method is as follows:
judging whether Tmin is not less than Tspeed, if not, processing separately, and if so, regulating SVPWM output waveform, sampling phase is three-phase or any two phases, and sampling time for current sampling is the central time point of lower bridge arm conduction, and then Tspeed/2 is shifted back and then the sampling holding time Tsample is shifted forward;
when the Tmin is not less than Tfeed, judging whether the A value is greater than or equal to the B value, otherwise processing the B value, and when the Tmin is not less than the Tfeed, simultaneously adding a common mode value C to the conducting pulse width of the three-phase lower bridge arm of the SVPWM output waveform, wherein the value range of the common mode value C is between the B value and the A value, the sampling phase is three-phase or any two phases, and the sampling time for current sampling is the back shift Tfeed/2 of the central time point of the conducting lower bridge arm and the forward shift of the sampling hold time Tsample;
when judging whether Tmin is not less than Tspeed and whether A value is greater than or equal to B value is no, adjusting to enable Tspeed to be less than or equal to 9.18% of Tpwm, then judging whether Tmin is not less than Tspeed and whether A value is greater than or equal to B, if both are no, continuing to execute downwards, and if both are different, otherwise processing, wherein the continuing to execute downwards comprises the following steps: the Tmin is subtracted from the conduction pulse width of the three-phase lower bridge arm of the SVPWM output waveform, the sampling phases are other two phases except the phase with the minimum conduction time of the lower bridge arm, and the sampling time for current sampling is the center time point of conduction of the lower bridge arm, and the sampling time is shifted back by Tfeed/2 and then shifted forward by the sampling hold time Tsample.
2. A method of sampling a three-phase inverter current according to claim 1, wherein the common mode value C is the difference of Tneed minus Tmin.
3. A three-phase inverter current sampling method according to claim 1, characterized in that it is obtained by adjusting such that Tneed is less than or equal to 9.18% of Tpwm, in particular by adjusting PWM dead time and/or adjusting switching tube switching rate and/or adjusting op-amp bandwidth and/or adjusting sample-hold time tsamp.
4. A three-phase inverter current sampling method is characterized in that three-resistance sampling of a lower bridge arm is adopted, SVPWM output waveforms are adjusted according to requirements, tdie represents the minimum lower bridge arm conduction time required by normal sampling, tsample represents sample-hold time, tneoise is bridge arm switching noise time, tdie=Tsample+Tneoise, tmax represents the maximum value of the three-phase lower bridge arm conduction time, tmid represents the intermediate value of the three-phase lower bridge arm conduction time, tmin represents the minimum value of the three-phase lower bridge arm conduction time, tmax is larger than or equal to Tmid, twm represents the period of PWM, A represents the difference between Twwm and Tmax, B represents the difference between Tdie and Tmin, and the method is as follows:
and judging whether the A value is larger than or equal to the B value under the condition that Tmin is smaller than Tneeed, otherwise processing the B value, if the A value is not larger than the B value, then conducting the pulse width of the three-phase lower bridge arm of the SVPWM output waveform while adding a common mode value C when the B value is judged to be larger than the B value, wherein the value range of the common mode value C is between the B value and the A value, the sampling phase is three-phase or any two phases, and the sampling time for current sampling is the central time point of conducting the lower bridge arm and is shifted back by Tneeed/2 and then shifted forward by the sample holding time Tsample.
5. The method of claim 4, wherein the common mode value C is a difference of Tspeed minus Tmin.
6. A three-phase inverter current sampling method is characterized in that three-resistance sampling of a lower bridge arm is adopted, SVPWM output waveforms are adjusted according to requirements, tdie represents the minimum lower bridge arm conduction time required by normal sampling, tsample represents sample-hold time, tneoise is bridge arm switching noise time, tdie=Tsample+Tneoise, tmax represents the maximum value of the three-phase lower bridge arm conduction time, tmid represents the intermediate value of the three-phase lower bridge arm conduction time, tmin represents the minimum value of the three-phase lower bridge arm conduction time, tmax is larger than or equal to Tmid, twm represents the period of PWM, A represents the difference between Twwm and Tmax, B represents the difference between Tdie and Tmin, and the method is as follows:
if Tmin is less than Tspeed, judging whether A value is less than B value, if not, otherwise processing, if yes, adjusting Tspeed to be less than or equal to 9.18% of Tpwm, then judging whether Tspeed is not less than Tspeed, and if A value is greater than or equal to B, if both are not, continuing downward execution, if not, otherwise processing, wherein if not, continuing downward execution comprises: the Tmin is subtracted from the conduction pulse width of the three-phase lower bridge arm of the SVPWM output waveform, the sampling phases are other two phases except the phase with the minimum conduction time of the lower bridge arm, and the sampling time for current sampling is the center time point of conduction of the lower bridge arm, and the sampling time is shifted back by Tfeed/2 and then shifted forward by the sampling hold time Tsample.
7. A method of sampling a three-phase inverter current according to claim 6, characterized in that it is obtained by adjusting such that Tneed is less than or equal to 9.18% of Tpwm, in particular by adjusting PWM dead time and/or adjusting switching transistor switching rate and/or adjusting op-amp bandwidth and/or adjusting sample-hold time tsamp.
8. A motor apparatus comprising a three-phase motor and a three-phase inverter for outputting SVPWM to drive the three-phase motor, the three-phase inverter employing the current sampling method according to any one of claims 1 to 7.
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| DE102018210391A1 (en) * | 2018-06-26 | 2020-01-02 | Schmidhauser Ag | Method for operating an inverter and inverter |
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| CN102088271A (en) * | 2010-12-20 | 2011-06-08 | 广东美的电器股份有限公司 | Sensor-less sine DC (direct current) variable frequency current sampling method |
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