CN116581106A - Method for detecting integrity of crystal grain - Google Patents
Method for detecting integrity of crystal grain Download PDFInfo
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- CN116581106A CN116581106A CN202310609391.6A CN202310609391A CN116581106A CN 116581106 A CN116581106 A CN 116581106A CN 202310609391 A CN202310609391 A CN 202310609391A CN 116581106 A CN116581106 A CN 116581106A
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- 238000000034 method Methods 0.000 title claims abstract description 69
- 239000013078 crystal Substances 0.000 title claims abstract description 37
- 238000001514 detection method Methods 0.000 claims abstract description 70
- 230000002159 abnormal effect Effects 0.000 claims description 34
- 238000009826 distribution Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 13
- 238000003698 laser cutting Methods 0.000 description 11
- 238000005520 cutting process Methods 0.000 description 8
- 238000007689 inspection Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
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Abstract
The invention provides a method for detecting the integrity of a crystal grain, wherein a detection structure is arranged on each vertex angle of each crystal grain of a wafer, after a scribing process and a ring removing process are carried out on the wafer, the crystal grain at the edge of the wafer can be partially cut off and is not complete any more, as the crystal grain is rectangular, the vertex angle of the crystal grain is usually cut when the crystal grain is removed, the wafer is scanned to obtain a plurality of crystal grain images, and according to the crystal grain images, whether all detection structures of each crystal grain are complete can be judged, so that whether each crystal grain is complete or not can be judged.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for detecting the integrity of a crystal grain.
Background
Wafer dicing is an important process in the semiconductor chip manufacturing process, and is used for dividing the finished whole wafer into single crystal grains, and is currently divided into two dicing modes, namely mechanical dicing and laser dicing.
In dicing a Wafer, a Wafer mount (Wafer mount) is required, i.e., a flexible and adhesive blue film is attached to the back of the Wafer and fixed to a slightly larger diameter metal frame (Wafer mount ring). After the dicing process is completed, a ring-removing process (ring-cut) is required, i.e., a laser cutting process is used to cut the wafer to remove the wafer-fixing tension ring. After the ring removal process, the die near the edge of the wafer is usually cut off to form incomplete dies (which can be predicted), and the incomplete dies may also be generated under the influence of the fluctuation of the laser cutting process (which are difficult to predict), and these incomplete dies must be selected and cannot flow to the client.
At present, incomplete grains are selected by adopting a manual visual inspection mode, specifically, a wafer is scanned to obtain a plurality of grain images, and workers check the grain images one by one to manually judge and select the incomplete grains. The accuracy of the detection mode is greatly influenced by image quality and detection personnel, the efficiency is low, incomplete grains are difficult to pick out online, timely and accurately, the incomplete grains are caused to flow to a client, and the overall quality and shipment efficiency of products are seriously influenced.
Disclosure of Invention
The invention aims to provide a method for detecting the integrity of a crystal grain, which is used for solving the problem that incomplete crystal grains cannot be quickly and accurately picked out in the prior art.
In order to achieve the above object, the present invention provides a method for detecting the integrity of a wafer, comprising:
providing a wafer, wherein the wafer is provided with a plurality of crystal grains, and each vertex angle of each crystal grain is provided with a detection structure;
dicing and ring removing processes are carried out on the wafer; the method comprises the steps of,
and scanning the wafer to obtain a plurality of grain images, and judging whether all the detection structures of each grain are complete according to the grain images so as to judge whether each grain is complete.
Optionally, the detection structure is located in a nonfunctional area of the die.
Optionally, each of the detection structures of the die has the same shape.
Optionally, the shapes of the detecting structures are polygonal, and the setting directions of the detecting structures of the crystal grains are different.
Optionally, each of the detection structures of the die has a different shape.
Optionally, the detection structure is a protrusion or a recess disposed on the die.
Optionally, the step of determining whether all the inspection structures of each die are complete according to the die image includes:
providing an ideal grain image, wherein the number and distribution of grain patterns in the ideal grain image are the same as those in the grain image, and each grain pattern in the ideal grain image is provided with a detection pattern corresponding to the detection structure of the grain one by one; the method comprises the steps of,
and comparing each grain image with the ideal grain image, and judging whether all the detection structures of each grain are complete or not according to the comparison result.
Optionally, the step of determining whether all the inspection structures of each die are complete according to the die image includes:
providing a template image of the detection structure; the method comprises the steps of,
and automatically identifying the detection structures in each grain image by using the template image, and judging whether all the detection structures of each grain are complete or not according to the identification result.
Optionally, after determining whether each die is complete, the detection method further includes:
comparing whether the integrity of each grain is the same as the pre-designed integrity of the grain, and judging that the grain with different pre-designed integrity is an abnormal grain; the method comprises the steps of,
and classifying the abnormal grains according to the positions of the abnormal grains on the wafer and the corresponding grain images.
Optionally, the step of comparing whether the integrity of each die is the same as its pre-designed integrity, and determining that the die having different pre-designed integrity is the abnormal die includes:
marking the complete crystal grain as a first logic value, marking the incomplete crystal grain as a second logic value, and generating map data;
marking the grains which are designed to be complete in advance as the first logic value, marking the grains which are designed to be incomplete in advance as the second logic value, and generating ideal map data;
and comparing the map data with the ideal map data, and judging that the grains with different logic values in the map data and the ideal map data are abnormal grains.
In the method for detecting the integrity of the crystal grains, the detection structure is arranged on each vertex angle of each crystal grain of the wafer, after the dicing process and the ring removing process are carried out on the wafer, the crystal grains at the edge of the wafer can be partially cut off and are not complete, as the crystal grains are rectangular, the vertex angles of the crystal grains are usually cut off during ring removing, the wafer is scanned to obtain a plurality of crystal grain images, and whether all the detection structures of each crystal grain are complete can be judged according to the crystal grain images, so that whether each crystal grain is complete or not can be judged.
Drawings
FIG. 1 is a flow chart of a method for detecting die integrity according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a wafer 100 according to an embodiment of the present invention;
FIG. 3 is an enlarged schematic view of a die 101 according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a wafer image according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of 4 template images provided by an embodiment of the present invention;
FIG. 6 is a diagram of map data according to an embodiment of the present invention;
FIG. 7 is a diagram of ideal map data provided by an embodiment of the present invention;
FIG. 8 is a diagram of a map data comparison between map data and ideal map data and output according to an embodiment of the present invention;
wherein, the reference numerals are as follows:
100-wafer; 101-grains; 111-functional region; 112-nonfunctional area; 113-a detection structure; a. b, c, d-template images.
Detailed Description
Specific embodiments of the present invention will be described in more detail below with reference to the drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
Fig. 1 is a flowchart of a method for detecting die integrity according to the present embodiment. As shown in fig. 1, the method for detecting the integrity of the crystal grains includes:
step S100: providing a wafer, wherein the wafer is provided with a plurality of crystal grains, and each vertex angle of each crystal grain is provided with a detection structure;
step S200: dicing and ring removing processes are carried out on the wafer; the method comprises the steps of,
step S300: and scanning the wafer to obtain a plurality of grain images, and judging whether all the detection structures of each grain are complete according to the grain images so as to judge whether each grain is complete.
Fig. 2 to 8 are auxiliary diagrams corresponding to the steps of the method for detecting the die integrity according to the present embodiment, and the method for detecting the die integrity according to the present embodiment will be described in detail with reference to fig. 2 to 8.
Fig. 2 is a schematic diagram of a wafer 100 according to the present embodiment. As shown in fig. 2, first, step S100 is performed to provide a wafer 100, where the wafer 100 has a plurality of dies 101 (Die), and the dies 101 are distributed in an array on the wafer 100, and adjacent dies 101 are separated by scribe lanes (not shown in fig. 2).
Fig. 3 is an enlarged schematic view of the die 101 according to the present embodiment. As shown in fig. 3, the die 101 has a rectangular shape and has a functional region 111 and a nonfunctional region 112 (dummy region), the functional region 111 is used to form a core device structure, which is located in a central region of the die 101, and the nonfunctional region 112 is disposed around the functional region 111.
With continued reference to fig. 3, in this embodiment, since the die 101 is rectangular, the die 101 has 4 vertex angles, each vertex angle is provided with a detection structure 113, each detection structure 113 has the same shape and is L-shaped, and the setting directions of each detection structure 113 are different (different by 90 ° in sequence), so that the 4 detection structures 113 are distributed in a central symmetry.
It is understood that the detecting structure 113 may be a bump or a recess formed on the die 101 by photolithography, etching, or the like.
As an alternative embodiment, the shape of each detection structure 113 may be different, for example, the shape of the 4 detection structures 113 may be circular, rectangular, in-line, and triangular, respectively; alternatively, only part of the detection structures 113 may be different in shape, for example, the 4 detection structures 113 may be circular, rectangular, and L-shaped, respectively. When the shapes of each of the detection structures 113 are different or the shapes of each of the detection structures 113 are the same polygon but the arrangement directions are different, the single detection structure 113 can realize a positioning function, which will be described later.
As an alternative embodiment, the shape of the detecting structure 113 is not limited to an L shape, but may be a regular shape such as a rectangle, a circle, a triangle, or a line, or may be other irregular shape, which will not be explained here.
Further, in the present embodiment, each of the detection structures 113 is located in the non-functional area 112, so as to avoid occupying the space of the functional area 111 and not adversely affecting the device structure in the functional area 111, and since the non-functional area 112 is closer to the edge of the die 101, the detection accuracy can be improved by disposing the detection structures 113 in the non-functional area 112.
Of course, as an alternative embodiment, the detection structure 113 may also be arranged within the functional area 111.
Next, step S200 is performed to perform a dicing process on the wafer 100. Specifically, the wafer 100 is first stretched, i.e., a layer of elastic and adhesive blue film is attached to the back surface of the wafer 100, and is fixed on the stretching ring. In this manner, the wafer 100 is held by the clamp ring, and dicing may then begin along the scribe lanes using, for example, a laser or a knife wheel, to separate the dies 101.
After the dicing process is performed, a de-looping process is performed, i.e., the edge of the wafer 100 is cut along the desired cutting trajectory using a laser cutting process to remove the wafer-stretching ring. The ideal cutting trajectory is pre-designed, and ideally, after the ring removal process is performed, the die 101 that is cut on the ideal cutting trajectory can be known in advance as long as the die 101 is cut on the ideal cutting trajectory and is not complete. However, under the influence of the fluctuation of the laser cutting process, the actual cutting track may deviate from the ideal cutting track when the ring removing process is performed, so that the known incomplete die and the actually generated incomplete die are not uniform, and therefore, the die integrity of the wafer 100 needs to be detected to find out the actual incomplete die.
It will be appreciated that, when the laser cutting process is performed, the die 101 cut is necessarily missing the top corners, and each top corner of the die 101 is provided with the detecting structure 113, and the missing of the top corner also results in the missing of the corresponding detecting structure 113, so as long as the die 101 is complete, all detecting structures 113 thereof should be complete, otherwise, if only one detecting structure 113 of the die 101 is missing, the die 101 is necessarily incomplete.
The absence of the detection structure 113 includes both the loss of the entire detection structure 113 and the loss of a portion of the detection structure 113.
Based on this, step S300 is performed to scan the wafer 100 to obtain a plurality of die images. When the wafer 100 is scanned, the dies 101 can be photographed one by one along the row direction or the column direction, so as to obtain a die image corresponding to each die 101; alternatively, a plurality of dies 101 may be photographed at a time along a row direction or a column direction, to obtain die images corresponding to the plurality of dies 101; alternatively, the grains 101 may be photographed row by row or column by column, so as to obtain a grain image corresponding to each row or column of grains 101; fig. 4 is a schematic diagram of a die image provided in this embodiment, as shown in fig. 4, more often, only a partial area of one or more dies 101 (at least two top corners of the dies 101 need to be photographed) can be photographed at a time along a row direction or a column direction due to the limitation of the field of view of the lens, so that each die 101 may correspond to a plurality of die images.
Further, it can be determined whether all the inspection structures 113 of each die 101 are complete according to the die image, if all the inspection structures 113 of the die 101 are complete, the die 101 is determined to be complete, and if any inspection structure 113 of the die 101 is missing, the die 101 is determined to be incomplete.
In this embodiment, an image processing method is adopted to determine whether all the detection structures 113 of each die 101 are complete according to the die image, so as to eliminate manual participation and improve efficiency and accuracy, and the specific steps are as follows:
firstly, providing an ideal grain image, wherein the ideal grain image is an image of a grain image under an ideal condition (the laser cutting process does not generate fluctuation, and an ideal cutting track is overlapped with an actual ideal cutting track), so that the number and distribution of the grain images in the ideal grain image are the same as those in the grain image, and each grain image in the ideal grain image is provided with a detection pattern corresponding to the detection structure of the grain one by one. For example, the die images are obtained by photographing the dies 101 one by one, so that each die 101 has a corresponding die image, and the ideal die image may be an image obtained by photographing a complete die 101 at the same lens magnification.
Next, each die image is compared with the ideal die image, for example, the die image may be image-matched with the ideal die image (specifically, each test structure 113 in the die image is matched with a corresponding test pattern in the ideal die image), so as to determine whether each test structure 113 in the die image is complete, and whether all test structures 113 of each die 101 are complete can be determined according to the comparison result.
As an alternative embodiment, the following steps may be used to determine from the die image whether all the inspection structures 113 of each die 101 are complete:
first, the template image of the detection structures 113 is provided, and in this embodiment, since the arrangement direction of each detection structure 113 is different, it is necessary to provide a different template image. Fig. 5 is a schematic diagram of 4 template images provided in this embodiment, and as shown in fig. 5, the template images a, b, c, d are template images corresponding to the detection structures 113 on 4 corresponding top corners of the die 101.
If the shape and the installation direction of each detection structure 113 are the same, only one template image may be required.
Next, the detection structures 113 in each die image are automatically identified by using the template images to determine whether the detection structures 113 can be identified in the die image, and since there are 4 template images in this embodiment, each template image needs to be template-matched with the die image, so as to determine whether each detection structure 113 in the die image is complete, and according to the identification result, whether all the detection structures 113 of each die 101 are complete can be determined.
Further, after determining whether each die 101 is complete, comparing whether the integrity of each die 101 is the same as the pre-designed integrity thereof, and determining that the die having the different integrity is an abnormal die. Specifically, after determining whether each grain 101 is complete, the complete grain 101 may be marked as a first logical value (e.g., logical value "1"), and the incomplete grain 101 may be marked as a second logical value (e.g., logical value "0"), to generate map data; then, the grains 101 that were designed to be complete in advance are written as a first logical value (for example, logical value "1"), and the grains 101 that were designed to be incomplete in advance are written as a second logical value (for example, logical value "0"), so that ideal map data is generated. Then, the map data is compared with ideal map data, and grains 101 having different logic values in the map data and the ideal map data are abnormal grains.
Fig. 6 is a schematic diagram of map data provided in the present embodiment, fig. 7 is a schematic diagram of ideal map data provided in the present embodiment, and fig. 8 is a schematic diagram of map data output after map data is compared with ideal map data provided in the present embodiment. As can be seen from comparing fig. 6 and fig. 7, the map data is different from the ideal map data in the logic value of only the last grain 101 in the first row, so that this grain 101 is an abnormal grain, and the abnormal grain is represented by a third logic value (e.g., logic value "2") in the proof map data to alert the relevant personnel.
It should be noted that these abnormal grains are most likely due to laser dicing process fluctuations, and after all abnormal grains are found, the laser dicing process can be corrected accordingly (as much as possible, the true dicing trajectory coincides with the ideal dicing trajectory). However, some abnormal dies may not be generated by the laser cutting process, but by other processes (such as dicing process), so after the abnormal dies are found, the abnormal dies may be classified according to the positions of the abnormal dies on the wafer and the corresponding die images, and only the abnormal dies generated by the laser cutting process fluctuation are used to correct the laser cutting process.
Specifically, after finding the abnormal die, the related personnel can call out a die image corresponding to the abnormal die, taking the abnormal die in fig. 8 as an example, it can be known that, according to the position of the abnormal die on the wafer 100 (located in the first quadrant of the wafer), the abnormal die should most likely miss the detection structure of the upper right corner (or miss the detection structures 113 of the upper right corner and the lower right corner) if the abnormal die is generated due to the laser cutting process fluctuation, and if the die image shows that the abnormal die is missing the detection structures 113 of the upper left corner and/or the lower left corner, it indicates that the laser cutting process is not the cause of the abnormal die.
In this embodiment, the single detection structure 113 may implement the positioning function. Specifically, since the field of view of the lens is generally rectangular with a large aspect ratio, the width in the scanning direction is small, and the die image may include only a partial region of one or more dies 101, limited by the field of view of the lens. For example, when scanning along the column direction, the width of the field of view of the lens in the column direction is smaller (smaller than the width of one die 101 in the column direction), only one row or the upper half of one die 101 may be shot during each shot, so that the die 101 on the die image has only two detection structures 113, and the abnormal die is usually at the edge of the wafer 100, if one complete detection structure 113 is missing from the abnormal die, the remaining one detection structure 113 can immediately determine which corner detection structure 113 is missing from the abnormal die (if the shape of each detection structure 113 of the die 101 is the same), and the abnormal die can be accurately classified by combining the positions of the abnormal die on the wafer. For example, referring to fig. 4, it can be determined that fig. 4 is the lower half of the die 101 photographed by the only one detection structure 113, and that the detection structure 113 in the lower right corner of the die 101 is missing.
In summary, in the method for detecting the integrity of a die provided in the embodiment of the present invention, a detecting structure is disposed on each vertex angle of each die of a wafer, after a dicing process and a ring removing process are performed on the wafer, a portion of the die at the edge of the wafer may be cut off and not complete, and since the die is rectangular, the wafer is usually cut to the vertex angle of the die during ring removing, so that a plurality of die images are obtained by scanning the wafer, and according to the die images, whether all detecting structures of each die are complete can be determined, thereby determining whether each die is complete.
It should be noted that, in the present description, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different manner from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the system disclosed in the embodiment, the description is relatively simple because of corresponding to the method disclosed in the embodiment, and the relevant points refer to the description of the method section.
It should be further noted that although the present invention has been disclosed in the preferred embodiments, the above embodiments are not intended to limit the present invention. Many possible variations and modifications of the disclosed technology can be made by anyone skilled in the art without departing from the scope of the technology, or the technology can be modified to be equivalent. Therefore, any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present invention still fall within the scope of the technical solution of the present invention.
It should be further understood that the terms "first," "second," "third," and the like in this specification are used merely for distinguishing between various components, elements, steps, etc. in the specification and not for indicating a logical or sequential relationship between the various components, elements, steps, etc., unless otherwise indicated.
It should also be understood that the terminology described herein is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. It must be noted that, as used herein and in the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. For example, reference to "a step" or "an apparatus" means a reference to one or more steps or apparatuses, and may include sub-steps as well as sub-apparatuses. All conjunctions used should be understood in the broadest sense. And, the word "or" should be understood as having the definition of a logical "or" rather than a logical "exclusive or" unless the context clearly indicates the contrary. Furthermore, implementation of the methods and/or apparatus in embodiments of the invention may include performing selected tasks manually, automatically, or in combination.
Claims (10)
1. A method for detecting integrity of a wafer, comprising:
providing a wafer, wherein the wafer is provided with a plurality of crystal grains, and each vertex angle of each crystal grain is provided with a detection structure;
dicing and ring removing processes are carried out on the wafer; the method comprises the steps of,
and scanning the wafer to obtain a plurality of grain images, and judging whether all the detection structures of each grain are complete according to the grain images so as to judge whether each grain is complete.
2. The method of claim 1, wherein the test structure is located in a nonfunctional area of the die.
3. The method of claim 1, wherein each of the test structures of the die has the same shape.
4. The method of claim 3, wherein the test structures are polygonal in shape and the orientation of each test structure is different.
5. The method of claim 1, wherein each of the test structures of the die has a different shape.
6. The method of claim 1, wherein the test structure is a bump or a depression provided on the die.
7. The method of inspecting die integrity according to any one of claims 1 to 6, wherein the step of determining whether all of the inspected structures of each die are complete based on the die image comprises:
providing an ideal grain image, wherein the number and distribution of grain patterns in the ideal grain image are the same as those in the grain image, and each grain pattern in the ideal grain image is provided with a detection pattern corresponding to the detection structure of the grain one by one; the method comprises the steps of,
and comparing each grain image with the ideal grain image, and judging whether all the detection structures of each grain are complete or not according to the comparison result.
8. The method of inspecting die integrity according to any one of claims 1 to 6, wherein the step of determining whether all of the inspected structures of each die are complete based on the die image comprises:
providing a template image of the detection structure; the method comprises the steps of,
and automatically identifying the detection structures in each grain image by using the template image, and judging whether all the detection structures of each grain are complete or not according to the identification result.
9. The method of claim 1, wherein after determining whether each of the dies is complete, the method further comprises:
comparing whether the integrity of each grain is the same as the pre-designed integrity of the grain, and judging that the grain with different pre-designed integrity is an abnormal grain; the method comprises the steps of,
and classifying the abnormal grains according to the positions of the abnormal grains on the wafer and the corresponding grain images.
10. The method of claim 9, wherein comparing whether the integrity of each die is the same as its pre-designed integrity, and determining that the die having a different pre-designed integrity is the abnormal die comprises:
marking the complete crystal grain as a first logic value, marking the incomplete crystal grain as a second logic value, and generating map data;
marking the grains which are designed to be complete in advance as the first logic value, marking the grains which are designed to be incomplete in advance as the second logic value, and generating ideal map data;
and comparing the map data with the ideal map data, and judging that the grains with different logic values in the map data and the ideal map data are abnormal grains.
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CN117132603B (en) * | 2023-10-28 | 2024-02-02 | 武汉罗博半导体科技有限公司 | Wafer map generation method, device, equipment and storage medium |
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