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CN116558548A - Stable amplitude control system of high-Q MEMS resonator - Google Patents

Stable amplitude control system of high-Q MEMS resonator Download PDF

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CN116558548A
CN116558548A CN202310445786.7A CN202310445786A CN116558548A CN 116558548 A CN116558548 A CN 116558548A CN 202310445786 A CN202310445786 A CN 202310445786A CN 116558548 A CN116558548 A CN 116558548A
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unit
phase
amplitude
control
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姜波
郑雄斌
周怡
苏岩
周同
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Nanjing University of Science and Technology
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • GPHYSICS
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

The invention discloses a stable amplitude control system of a high-Q MEMS resonator, which is a digital closed-loop driving system taking a field programmable gate array as a control platform and adopting a DDS-PLL technology as a control scheme. The system realizes tracking of the vibration resonance frequency and the phase of the gyroscope by utilizing a digital phase-locked loop based on frequency synthesis of a DDS algorithm, the structure can provide a high-resolution frequency signal by utilizing the DDS algorithm to ensure small enough frequency stepping, and meanwhile, the bandpass characteristic of the PLL can well inhibit partial spurious in a DDS output frequency spectrum, so that the advantage complementation of the DDS and the PLL is realized, the dynamic performance of a high-Q MEMS resonator control system is improved, the stable precision of the amplitude and the frequency of the MEMS gyroscope is optimized, and the zero-bias output and the anti-interference capability of the MEMS gyroscope are further improved.

Description

一种高Q值MEMS谐振器的稳定幅度控制系统A Stable Amplitude Control System for High-Q MEMS Resonators

技术领域technical field

本发明属于误差信号处理技术领域,特别是一种高Q值MEMS谐振器的稳定幅度控制系统。The invention belongs to the technical field of error signal processing, in particular to a stable amplitude control system of a high-Q value MEMS resonator.

背景技术Background technique

随着微机械加工工艺的发展,MEMS硅微机械陀螺仪在工业自动化、惯性导航和汽车电子等领域得到了广泛的应用。相比于光纤陀螺、激光陀螺,MEMS硅微机械陀螺仪具有体积小、可靠性高、成本低、可批量生产等优点。但是由于加工误差和微弱信号容易受到干扰的原因,目前MEMS硅微机械陀螺的精度仍然处于较低的水平,因此如何提高MEMS陀螺仪的精度是目前需要研究的主要方向。MEMS陀螺仪是基于科氏力原理工作的,根据科氏力公式得知驱动振动幅度和频率直接影响MEMS陀螺仪的标度因子和零偏性能,保持陀螺驱动模态的稳定是实现高精度陀螺的关键前提。With the development of micromachining technology, MEMS silicon micromachined gyroscopes have been widely used in the fields of industrial automation, inertial navigation and automotive electronics. Compared with fiber optic gyroscopes and laser gyroscopes, MEMS silicon micromachined gyroscopes have the advantages of small size, high reliability, low cost, and mass production. However, due to processing errors and weak signals being easily disturbed, the accuracy of MEMS silicon micromachined gyroscopes is still at a relatively low level. Therefore, how to improve the accuracy of MEMS gyroscopes is the main direction of research. The MEMS gyroscope works on the basis of the Coriolis force principle. According to the Coriolis force formula, it is known that the driving vibration amplitude and frequency directly affect the scale factor and zero bias performance of the MEMS gyroscope. Maintaining the stability of the gyro drive mode is the key to achieving high-precision gyroscopes. key premise.

目前硅微机械陀螺仪的驱动电路均采用闭环驱动方式,其中基于AGC技术实现驱动稳幅,基于PLL技术实现频率控制的方案已经比较成熟,但由于现有的MEMS陀螺仪都采用真空封装技术,极大提高了MEMS陀螺仪的Q值并降低了陀螺仪的机械热噪声,其中品质因子在10000-1000000之间的高Q值MEMS谐振器驱动模态的谐振峰很高,波形的带宽很窄,因此微小的频率漂移都会导致输出幅度的大幅变化,给驱动模态的幅度和频率控制增加了难度,原有的控制方案已经不能满足控制精度的要求,导致系统对于驱动模态控制的稳定性降低,因此需要进一步提高系统的控制精度,才能满足陀螺仪驱动模态稳定性的要求。由于当陀螺驱动力增加到足够大时,MEMS陀螺仪的驱动电容对驱动位移的变化量呈现出非线性,因此会导致AGC回路的相角条件和增益条件相互耦合,使得系统的控制效果变差,而传统的PLL回路采用CORDIC算法进行频率控制,由于该算法属于数值线性计算逼近算法,其控制精度受到迭代次数的限制,频率分辨率不高,而且PLL技术具有频率转换时间较长、输出步长小时相位噪声差的缺点。因此,有必要提供一种新型高Q值MEMS谐振器的稳定幅度控制方法。At present, the drive circuits of silicon micromachined gyroscopes all adopt closed-loop drive mode, among which AGC technology is used to realize driving stability, and PLL technology is used to realize frequency control. It greatly improves the Q value of the MEMS gyroscope and reduces the mechanical and thermal noise of the gyroscope. The high-Q value MEMS resonator with a quality factor between 10,000-1,000,000 has a high resonant peak and a narrow waveform bandwidth. , so a small frequency drift will lead to a large change in the output amplitude, which increases the difficulty of controlling the amplitude and frequency of the driving mode. Therefore, it is necessary to further improve the control accuracy of the system to meet the requirements of gyroscope driving modal stability. When the driving force of the gyroscope is increased enough, the driving capacitance of the MEMS gyroscope shows nonlinearity to the variation of the driving displacement, which will lead to mutual coupling between the phase angle condition and the gain condition of the AGC loop, making the control effect of the system worse , while the traditional PLL loop uses the CORDIC algorithm for frequency control. Since this algorithm is a numerical linear calculation approximation algorithm, its control accuracy is limited by the number of iterations, and the frequency resolution is not high. Disadvantages of poor phase noise for long hours. Therefore, it is necessary to provide a stable amplitude control method for a novel high-Q MEMS resonator.

发明内容Contents of the invention

本发明的目的在于提供一种高Q值MEMS谐振器的稳定幅度控制方法,解决现有MEMS陀螺仪闭环驱动控制回路对于高Q值MEMS谐振器控制精度不足的问题。本发明在现有MEMS陀螺仪驱动闭环系统的基础上,通过DDS-PLL混合频率合成技术获得更高的频率分辨率,实现对陀螺仪驱动模态高精度的控制,从而提高陀螺整体的稳定性和抗干扰能力。The purpose of the present invention is to provide a stable amplitude control method of a high-Q MEMS resonator to solve the problem of insufficient control accuracy of the existing MEMS gyroscope closed-loop drive control loop for the high-Q MEMS resonator. On the basis of the existing MEMS gyroscope drive closed-loop system, the present invention obtains higher frequency resolution through DDS-PLL hybrid frequency synthesis technology, realizes high-precision control of the gyroscope drive mode, thereby improving the overall stability of the gyroscope and anti-interference ability.

实现本发明目的的技术解决方案为:一种高Q值MEMS谐振器的稳定幅度控制系统,所述系统包括AGC回路和数字锁相环;The technical solution to realize the object of the present invention is: a stable amplitude control system of a high-Q MEMS resonator, said system comprising an AGC loop and a digital phase-locked loop;

所述AGC回路,用于进行驱动幅度控制;The AGC loop is used to control the driving range;

所述数字锁相环,用于对谐振频率进行控制;The digital phase-locked loop is used to control the resonant frequency;

所述AGC回路包括顺次连接的第一乘法解调单元、第一低通滤波单元和第一PI控制单元;MEMS谐振器驱动模态对应的数字信号通过第一乘法解调单元进行幅值解调,解调输出的信号通过第一低通滤波单元获得MEMS谐振器工作时的幅值信息,该幅值与系统设定的参考值进行比较得到幅值偏差信号,第一PI控制单元根据所述幅值偏差信号输出一个幅值控制量即为此时系统的幅值增益,形成交流驱动力反馈给驱动电极,实现幅值闭环控制;The AGC loop includes a sequentially connected first multiplication demodulation unit, a first low-pass filter unit and a first PI control unit; the digital signal corresponding to the MEMS resonator drive mode is subjected to amplitude resolution through the first multiplication demodulation unit The signal output by demodulation and demodulation obtains the amplitude information when the MEMS resonator is working through the first low-pass filter unit, which is compared with the reference value set by the system to obtain the amplitude deviation signal, and the first PI control unit according to the set An amplitude control amount output by the amplitude deviation signal is the amplitude gain of the system at this time, forming an AC driving force to feed back to the driving electrode, and realizing the closed-loop control of the amplitude;

所述数字锁相环包括顺次连接的第二乘法解调单元、第二低通滤波单元、第二PI控制单元、直接数字合成DDS算法频率合成单元和压控振荡器DCO单元,所述第二乘法解调单元、第二低通滤波单元构成鉴相器;所述MEMS谐振器驱动模态对应的数字信号通过第二乘法解调单元、第二低通滤波单元得相位偏差信号,之后经过第二PI控制单元产生频率控制信号Δω输出至直接数字合成DDS算法频率合成单元;所述直接数字合成DDS算法频率合成单元输出的频率控制信号Δω0作为压控振荡器DCO单元的输入信号,所述压控振荡器DCO单元产生频率为谐振频率的正余弦信号,再将经过压控振荡器DCO单元得到的相位误差信号反馈至鉴相器输出端,从而形成闭环回路控制,最终输出的频率信号与AGC回路的幅值控制量生成驱动反馈力,实现MEMS陀螺仪的驱动稳幅。The digital phase-locked loop includes a second multiplication demodulation unit, a second low-pass filter unit, a second PI control unit, a direct digital synthesis DDS algorithm frequency synthesis unit and a voltage-controlled oscillator DCO unit connected in sequence. The second multiplication demodulation unit and the second low-pass filter unit form a phase detector; the digital signal corresponding to the MEMS resonator drive mode passes through the second multiplication demodulation unit and the second low-pass filter unit to obtain a phase deviation signal, and then passes through The second PI control unit generates a frequency control signal Δω and outputs it to the direct digital synthesis DDS algorithm frequency synthesis unit; the frequency control signal Δω 0 output by the direct digital synthesis DDS algorithm frequency synthesis unit is used as the input signal of the voltage-controlled oscillator DCO unit, so The DCO unit of the voltage-controlled oscillator generates a sine-cosine signal whose frequency is the resonant frequency, and then the phase error signal obtained by the DCO unit of the voltage-controlled oscillator Feedback to the output terminal of the phase detector to form a closed-loop control. The final output frequency signal and the amplitude control value of the AGC loop generate a driving feedback force to realize the driving stability of the MEMS gyroscope.

进一步地,所述直接数字合成DDS算法频率合成单元包括FPGA频率控制字转换单元、相位累加器、波形存储器ROM、数字低通滤波器和系统时钟;FPGA频率控制字转换单元将第二PI控制单元输出的频率控制信号Δω转换为对应的频率控制字M,其中转换系数为Kf;在系统时钟的驱动下,相位累加器对频率控制字M进行线性累加,同时对2N取模运算,得到的和作为相位值,其中N为相位累加器的字长;将相位累加器输出的二进制相位寻址码送入波形存储器ROM中进行寻址,使之输出对应的离散幅度序列,之后再通过数字低通滤波器对离散幅度序列波形进行平滑处理得到所需的频率波形。Further, the direct digital synthesis DDS algorithm frequency synthesis unit includes FPGA frequency control word conversion unit, phase accumulator, waveform memory ROM, digital low-pass filter and system clock; FPGA frequency control word conversion unit converts the second PI control unit The output frequency control signal Δω is converted into the corresponding frequency control word M, where the conversion coefficient is K f ; driven by the system clock, the phase accumulator linearly accumulates the frequency control word M, and at the same time takes a modulo operation on 2 N to obtain and as the phase value, where N is the word length of the phase accumulator; the binary phase addressing code output by the phase accumulator is sent to the waveform memory ROM for addressing, so that it outputs the corresponding discrete amplitude sequence, and then through the digital The low-pass filter smoothes the discrete amplitude sequence waveform to obtain the desired frequency waveform.

进一步地,所述直接数字合成DDS算法频率合成单元输出的频率分辨率取决于相位累加器的位数N,N越大,频率分辨率越高。Further, the frequency resolution output by the direct digital synthesis DDS algorithm frequency synthesis unit depends on the number of bits N of the phase accumulator, and the larger N is, the higher the frequency resolution is.

进一步地,所述直接数字合成DDS算法频率合成单元输出的最小频率分辨率Δfmin与相位累加器位数N满足:Further, the minimum frequency resolution Δf min output by the direct digital synthesis DDS algorithm frequency synthesis unit and the number of bits N of the phase accumulator satisfy:

其中,fc表示系统时钟频率,P表示锁相环的分频比,R表示参考分频比。Among them, fc represents the system clock frequency, P represents the frequency division ratio of the phase-locked loop, and R represents the reference frequency division ratio.

进一步地,所述相位累加器平均每2N/M个时钟周期溢出一次,通过此时系统中M的值能得到直接数字合成DDS算法频率合成单元输出的频率值Δf0,它们之间的关系满足:Further, the phase accumulator overflows once every 2 N /M clock cycles on average, and the frequency value Δf 0 output by the direct digital synthesis DDS algorithm frequency synthesis unit can be obtained through the value of M in the system at this time, and the relationship between them satisfy:

进一步地,所述第一低通滤波单元和第二低通滤波单元采用通过Kaiser窗函数设计法设计的FIR数字低通滤波器。Further, the first low-pass filtering unit and the second low-pass filtering unit adopt FIR digital low-pass filters designed by Kaiser window function design method.

进一步地,所述FIR数字低通滤波器的参数包括:中心频率设置为500kHz,通带频率设置为500Hz,阻带频率设置为14kHz,阻带衰减大于50dB,最终的阶数为109;Kaiser窗函数的总长度D满足:Further, the parameters of the FIR digital low-pass filter include: the center frequency is set to 500kHz, the passband frequency is set to 500Hz, the stopband frequency is set to 14kHz, the stopband attenuation is greater than 50dB, and the final order is 109; Kaiser window The total length D of the function satisfies:

其中,As表示阻带衰减,Δf表示归一化的过渡带宽。Among them, A s represents the stopband attenuation, and Δf represents the normalized transition bandwidth.

进一步地,所述数字锁相环输出频率信号的相位噪声Lo满足如下公式:Further, the phase noise L of the digital phase-locked loop output frequency signal satisfies the following formula:

Lo=LDDS+20logP'L o =L DDS +20logP'

式中,LDDS表示直接数字合成DDS算法频率合成单元输出的相位噪声,P'表示倍频次数。In the formula, L DDS represents the phase noise output by the frequency synthesis unit of the direct digital synthesis DDS algorithm, and P' represents the number of frequency multiplications.

本发明与现有技术相比,其显著优点为:Compared with the prior art, the present invention has the remarkable advantages of:

在现有的控制方法的基础上,一方面通过DDS电路产生频率控制信号提高原有数字锁相环路频率控制信号的电压分辨率,使得陀螺仪驱动模态的幅值和频率都获得更高的控制精度,从而提高陀螺整体的稳定性和抗干扰能力。另一方面DDS-PLL混合技术相比原有的PLL技术综合了两种技术各自的优点,具有高精度、低相位噪声、对杂散噪声抑制效果好、宽带和频谱质量好的特征,改善了高Q值MEMS谐振器幅度稳定系统的动态和稳态特性。具体地:On the basis of the existing control method, on the one hand, the frequency control signal is generated by the DDS circuit to improve the voltage resolution of the original digital phase-locked loop frequency control signal, so that the amplitude and frequency of the gyro drive mode are higher Control accuracy, thereby improving the overall stability and anti-interference ability of the gyroscope. On the other hand, compared with the original PLL technology, the DDS-PLL hybrid technology combines the advantages of the two technologies. It has the characteristics of high precision, low phase noise, good suppression effect on spurious noise, good broadband and spectrum quality, and improves the Dynamic and steady-state characteristics of a high-Q MEMS resonator amplitude stabilization system. specifically:

(1)所述数字锁相环采用了直接数字频率合成技术DDS产生频率控制信号,DDS电路为锁相环的压控振荡器提供一个高精度的电压信号输入,DDS电路具有输出步长小和较低相位噪声的优点,但杂散噪声较多,而PLL在输出步长小时,相位噪声差,但对杂散噪声的抑制效果好,采用DDS与PLL混合技术实现频率合成的方案综合了两种技术的优点,使得系统设计满足宽带、快频率转换速度的要求,适用于对高Q值MEMS谐振器的控制,实现更佳的控制效果。(1) The digital phase-locked loop adopts the direct digital frequency synthesis technology DDS to generate the frequency control signal, and the DDS circuit provides a high-precision voltage signal input for the voltage-controlled oscillator of the phase-locked loop, and the DDS circuit has a small output step size and The advantage of lower phase noise, but more spurious noise, and PLL has a small output step size, the phase noise is poor, but the suppression effect on spurious noise is good, the solution of frequency synthesis using DDS and PLL hybrid technology combines the two The advantages of this technology enable the system design to meet the requirements of broadband and fast frequency conversion speed, and are suitable for the control of high-Q MEMS resonators to achieve better control effects.

(2)本发明采用的DDS算法频率合成单元输出的频率分辨率取决于相位累加器的位数N,当N足够大时,可以获得传统方法难以实现的分辨精度,最高可达到微Hz级。(2) The frequency resolution output by the DDS algorithm frequency synthesis unit used in the present invention depends on the number of digits N of the phase accumulator. When N is large enough, the resolution accuracy that is difficult to achieve by traditional methods can be obtained, and the highest can reach the micro Hz level.

(3)低通滤波单元采用了自主设计的FIR数字低通滤波器,易于实现线性相位,适用于处理相位要求较高的信号,本发明选择的是Kaiser窗函数设计法,通过参数估算和优化处理达到良好的高频抑制效果并且不衰减低频分量,具有良好的滤波特性。(3) The low-pass filtering unit has adopted the FIR digital low-pass filter of independent design, is easy to realize linear phase, is applicable to the signal that processing phase requirement is higher, what the present invention selects is the Kaiser window function design method, by parameter estimation and optimization The processing achieves good high-frequency suppression effect and does not attenuate low-frequency components, and has good filtering characteristics.

(4)所述闭环控制系统反馈通道中将DDS激励PLL输出的频率信号与AGC回路形成的幅值增益Ax作为反馈交流驱动信号,使得陀螺仪驱动模态获得更高精度的谐振频率信号,进而提高高Q值MEMS谐振器驱动模态的幅值稳定性和频率稳定性。(4) In the feedback channel of the closed-loop control system, the frequency signal output by the DDS excitation PLL and the amplitude gain A x formed by the AGC loop are used as the feedback AC drive signal, so that the gyroscope drive mode obtains a higher-precision resonant frequency signal, Furthermore, the amplitude stability and frequency stability of the driving mode of the high-Q MEMS resonator are improved.

下面结合附图对本发明作进一步详细描述。The present invention will be described in further detail below in conjunction with the accompanying drawings.

附图说明Description of drawings

图1为一个实施例中MEMS陀螺仪闭环驱动控制原理图。FIG. 1 is a schematic diagram of a MEMS gyroscope closed-loop drive control in an embodiment.

图2为一个实施例中采用的DDS系统原理图。Figure 2 is a schematic diagram of the DDS system used in one embodiment.

图3为一个实施例中采用的DDS系统仿真图。Fig. 3 is a simulation diagram of the DDS system adopted in one embodiment.

图4为一个实施例中采用的DDS系统仿真波形图,其中图(a)为DDS系统合成所需频率的波形图,图(b)为合成波形的功率谱密度示意图。Fig. 4 is the DDS system emulation waveform chart that adopts in an embodiment, and wherein figure (a) is the waveform figure of DDS system synthesis required frequency, figure (b) is the power spectral density schematic diagram of synthesis waveform.

图5为一个实施例中数字锁相环系统仿真图。Fig. 5 is a simulation diagram of a digital phase-locked loop system in an embodiment.

图6为一个实施例中FIR数字低通滤波器前后信号仿真图。Fig. 6 is a simulation diagram of signals before and after the FIR digital low-pass filter in one embodiment.

图7为一个实施例中DDS-PLL技术原理图。Fig. 7 is a schematic diagram of DDS-PLL technology in an embodiment.

图8为一个实施例中MEMS陀螺仪闭环驱动系统频率特性图。FIG. 8 is a frequency characteristic diagram of the MEMS gyroscope closed-loop driving system in one embodiment.

图9为一个实施例中MEMS陀螺仪闭环驱动系统的相轨迹图。FIG. 9 is a phase locus diagram of a MEMS gyroscope closed-loop drive system in one embodiment.

具体实施方式Detailed ways

为了使本申请的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本申请进行进一步详细说明。应当理解,此处描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

需要说明,若本发明实施例中有涉及方向性指示(诸如上、下、左、右、前、后……),则该方向性指示仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。It should be noted that if there is a directional indication (such as up, down, left, right, front, back...) in the embodiment of the present invention, the directional indication is only used to explain the position in a certain posture (as shown in the accompanying drawing). If the specific posture changes, the directional indication will also change accordingly.

另外,若本发明实施例中有涉及“第一”、“第二”等的描述,则该“第一”、“第二”等的描述仅用于描述目的,而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。另外,各个实施例之间的技术方案可以相互结合,但是必须是以本领域普通技术人员能够实现为基础,当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在,也不在本发明要求的保护范围之内。In addition, if there are descriptions involving "first", "second" and so on in the embodiments of the present invention, the descriptions of "first", "second" and so on are only for descriptive purposes, and should not be interpreted as indicating or implying Its relative importance or implicitly indicates the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include at least one of these features. In addition, the technical solutions of the various embodiments can be combined with each other, but it must be based on the realization of those skilled in the art. When the combination of technical solutions is contradictory or cannot be realized, it should be considered that the combination of technical solutions does not exist , nor within the scope of protection required by the present invention.

在一个实施例中,结合图1,提供了一种高Q值MEMS谐振器的稳定幅度控制方法,为基于AGC技术和DDS-PLL频率合成技术的数字双闭环驱动控制系统。MEMS陀螺仪驱动模态经位移电压转换电路成为反映位移x大小的电压信号V,经过ADC芯片转换将模拟信号转换为数字信号,再分别输入sin(ωt)与cos(ωt)信号经过乘法器进行幅值解调和相位解调,解调输出的信号通过FIR数字低通滤波器后,获得MEMS谐振器工作时的幅值信息和相位差信息。振动幅值与系统所设定的参考值A进行比较得到偏差信号,PI控制器根据偏差信号输出一个幅值控制量,即为此时系统的幅值增益Ax,形成交流驱动力反馈给驱动电极,实现幅值闭环控制。通过解调和数字滤波得到相位偏差信号,经过PI控制产生频率控制信号Δω,采用FPGA控制DDS算法输出具有更高精度的频率控制信号Δω0作为压控振荡器(DCO)的输入信号,再通过压控振荡器(DCO)电路产生频率为谐振频率的余弦信号cos(ωdt),得到的相位误差通过P分频反馈至鉴相器输出端,形成闭环控制回路。最终输出的频率信号与AGC回路形成的幅值增益Ax作为反馈交流驱动信号,经过DAC和电压-静电力转换系数Kvf的转换实现MEMS陀螺仪的驱动稳幅。In one embodiment, referring to FIG. 1 , a stable amplitude control method of a high-Q MEMS resonator is provided, which is a digital double closed-loop drive control system based on AGC technology and DDS-PLL frequency synthesis technology. The driving mode of MEMS gyroscope becomes the voltage signal V reflecting the magnitude of the displacement x through the displacement voltage conversion circuit, and the analog signal is converted into a digital signal through ADC chip conversion, and then the sin(ωt) and cos(ωt) signals are respectively input and processed by the multiplier Amplitude demodulation and phase demodulation, after the demodulated output signal passes through the FIR digital low-pass filter, the amplitude information and phase difference information when the MEMS resonator is working are obtained. The vibration amplitude is compared with the reference value A set by the system to obtain a deviation signal, and the PI controller outputs an amplitude control value according to the deviation signal, which is the amplitude gain A x of the system at this time, forming an AC driving force feedback to the drive electrode to realize amplitude closed-loop control. The phase deviation signal is obtained through demodulation and digital filtering, the frequency control signal Δω is generated through PI control, and the frequency control signal Δω 0 with higher precision is output by FPGA control DDS algorithm as the input signal of the voltage controlled oscillator (DCO), and then passed The voltage-controlled oscillator (DCO) circuit generates a cosine signal cos(ω d t) whose frequency is the resonant frequency, and the obtained phase error Feedback to the output terminal of the phase detector through P frequency division to form a closed-loop control loop. The final output frequency signal and the amplitude gain A x formed by the AGC loop are used as the feedback AC drive signal, and the driving amplitude of the MEMS gyroscope is realized through the conversion of the DAC and the voltage-electrostatic force conversion coefficient K vf .

由于MEMS陀螺具有微型化的特点,工作时输出的信号非常微弱,容易受到寄生效应以及驱动电极与敏感电极的耦合作用的干扰,另外高Q值的谐振器具有灵敏度高、机械带宽小的特点。因此控制系统需要满足控制精度高,动态特性好的特点。本发明采用DDS-PLL混合技术以提高输出信号的频率分辨率,除了提高系统的控制精度外,还具有快速频率转换速度、低相位噪声和频率漂移、全数字化结构易于集成和功能扩展、宽带和频谱质量好的优点。其中采用的DDS技术的实现原理如图2所示,包括频率控制字转换单元、频率字寄存器、相位累加器、正弦查询表ROM、数字低通滤波器和系统时钟六个部分,其中M为频率控制字,N为相位累加器的字长,m为ROM地址线位数。PI控制器输出的频率控制信号Δω通过FPGA控制单元转换为对应的频率控制字M,其中转换系数为Kf。在100MHz的系统时钟fc的驱动下,相位累加器对频率控制字M进行线性累加,同时对2N取模运算,得到的和作为相位值,以二进制代码的形式去查询正弦函数表ROM,将相位信息转变成相应的数字量化正弦幅度值,再使用数字低通滤波器对波形进行平滑处理得到所需的频率波形,最后将经过DDS算法处理后的频率值作为压控振荡器的输入控制信号。其中相位累加器平均每2N/M个时钟周期溢出一次,因此频率控制字M和时钟频率fc反应了DDS输出信号的频率值,读取此时系统中M的值就能得到输出的频率值Δf0,它们之间的关系满足:Due to the miniaturization of the MEMS gyroscope, the output signal is very weak during operation, which is easily disturbed by parasitic effects and the coupling effect between the driving electrode and the sensitive electrode. In addition, the resonator with high Q value has the characteristics of high sensitivity and small mechanical bandwidth. Therefore, the control system needs to meet the characteristics of high control precision and good dynamic characteristics. The invention adopts the DDS-PLL hybrid technology to improve the frequency resolution of the output signal. In addition to improving the control accuracy of the system, it also has fast frequency conversion speed, low phase noise and frequency drift, and the full digital structure is easy to integrate and expand functions. Broadband and Advantages of good spectral quality. The implementation principle of the DDS technology used is shown in Figure 2, including six parts: frequency control word conversion unit, frequency word register, phase accumulator, sine lookup table ROM, digital low-pass filter and system clock, where M is the frequency Control word, N is the word length of the phase accumulator, m is the number of ROM address lines. The frequency control signal Δω output by the PI controller is converted into a corresponding frequency control word M by the FPGA control unit, where the conversion coefficient is K f . Driven by the 100MHz system clock f c , the phase accumulator linearly accumulates the frequency control word M, and at the same time performs a modulo operation on 2 N , and the obtained sum is used as the phase value, and the sine function table ROM is queried in the form of binary code. Convert the phase information into the corresponding digital quantized sine amplitude value, and then use the digital low-pass filter to smooth the waveform to obtain the required frequency waveform, and finally use the frequency value processed by the DDS algorithm as the input control of the voltage-controlled oscillator Signal. Among them, the phase accumulator overflows every 2 N /M clock cycles on average, so the frequency control word M and the clock frequency f c reflect the frequency value of the DDS output signal, and the output frequency can be obtained by reading the value of M in the system at this time value Δf 0 , the relationship between them satisfies:

所述DDS的最小频率分辨率与相位累加器的字长相关,通过选取合适的字长N,可以实现极高的频率分辨率,最高可达到微Hz级。通过对DDS系统模型进行仿真分析,如图3所示,可以看出输出信号的频谱质量很高,杂散分量很小。The minimum frequency resolution of the DDS is related to the word length of the phase accumulator. By selecting an appropriate word length N, a very high frequency resolution can be achieved, up to micro Hz level. Through the simulation analysis of the DDS system model, as shown in Figure 3, it can be seen that the spectral quality of the output signal is very high, and the spurious components are very small.

本发明系统实现频率控制功能的模块是数字锁相环环节,通过检测信号的相位差控制输出信号的频率,保持输入信号与输出信号具有相同的频率与相位信息。数字PLL的主要模块包括鉴相器、PI控制器与压控振荡器(DCO)三个部分组成,其中鉴相器由乘法器和FIR数字低通滤波器组成,具体的仿真模型如图4所示。The module realizing the frequency control function of the system of the present invention is a digital phase-locked loop link, controls the frequency of the output signal by detecting the phase difference of the signal, and keeps the input signal and the output signal having the same frequency and phase information. The main module of the digital PLL consists of three parts: a phase detector, a PI controller and a voltage-controlled oscillator (DCO). The phase detector is composed of a multiplier and a FIR digital low-pass filter. The specific simulation model is shown in Figure 4 Show.

其中,低通滤波模块采用了自主设计的FIR数字低通滤波器,易于实现线性相位,适用于处理相位要求较高的信号,本方案选择的是Kaiser窗函数设计法,通过参数估算和优化处理达到良好的高频抑制效果并且不衰减低频分量,从图5可以看出低通滤波后波形幅值与滤波前的波形幅值满足二倍关系且输出曲线平滑,所以该滤波器具有良好的滤波特性。Among them, the low-pass filter module adopts the self-designed FIR digital low-pass filter, which is easy to realize the linear phase and is suitable for processing signals with high phase requirements. The Kaiser window function design method is selected in this scheme, and the parameters are estimated and optimized. A good high-frequency suppression effect is achieved without attenuating low-frequency components. From Figure 5, it can be seen that the waveform amplitude after low-pass filtering and the waveform amplitude before filtering satisfy the double relationship and the output curve is smooth, so the filter has good filtering characteristic.

本发明采用的DDS-PLL混合技术提高了控制系统的频率分辨率,改善了系统的动态和稳态特性。对高Q值MEMS谐振器的振动幅值有很好的控制效果,提高了驱动检测输出信号的幅值和频率稳定性。图6是基于DDS-PLL混合技术实现高精度频率控制的原理图,驱动模态位移信号为其中Ax(t)是振动幅值,ω0是DCO的初始频率,Δω是PI控制器输出的频率调制量,/>是驱动模态的相移。驱动位移信号与cos(ω0+Δω)t信号相乘进行相位解调和数字低通滤波后得到的相位差信号/>为/>通过设置PI控制器的参考值为0来调节Δω的大小,再利用FPGA控制DDS算法合成更高精度频率控制信号Δω0,作为DCO电路的输入信号,经过压控振荡器得到的相位误差信号/>反馈至鉴相器输出端,若输入信号的相位或频率发生变化,通过压控振荡器模块的反馈控制,环路的输出信号也即压控振荡器频率和相位,就会跟踪输入信号的变化。其中压控振荡器输出相位/>与输入控制电压vc(t)满足:The DDS-PLL hybrid technology adopted in the invention improves the frequency resolution of the control system and improves the dynamic and steady-state characteristics of the system. The vibration amplitude of the high-Q MEMS resonator has a good control effect, and the amplitude and frequency stability of the driving detection output signal are improved. Figure 6 is a schematic diagram of high-precision frequency control based on DDS-PLL hybrid technology, and the driving mode displacement signal is where A x (t) is the vibration amplitude, ω 0 is the initial frequency of the DCO, Δω is the frequency modulation output of the PI controller, /> is the phase shift of the driving mode. The phase difference signal obtained by multiplying the driving displacement signal with the cos(ω 0 +Δω)t signal for phase demodulation and digital low-pass filtering/> for /> Adjust the size of Δω by setting the reference value of the PI controller to 0, and then use the FPGA to control the DDS algorithm to synthesize a higher-precision frequency control signal Δω 0 , which is used as the input signal of the DCO circuit, and the phase error signal obtained by the voltage-controlled oscillator / > Feedback to the output terminal of the phase detector, if the phase or frequency of the input signal changes, through the feedback control of the voltage-controlled oscillator module, the output signal of the loop, that is, the frequency and phase of the voltage-controlled oscillator, will track the change of the input signal . Where the VCO output phase /> and the input control voltage v c (t) satisfy:

其中D0表示压控振荡器的压控灵敏度。Among them, D 0 represents the voltage control sensitivity of the voltage controlled oscillator.

为了进一步说明本发明的幅度控制系统具有良好的动态和稳态特性,对该驱动闭环系统进行频率特性分析和相轨迹图分析,如图7和图8所示。从伯德图可以看出幅频响应为-3dB的频率点为145Hz,因此闭环系统的带宽大小即为145Hz,满足高Q值MEMS谐振器的带宽需求,使得系统具有较高的鲁棒性。从图8可以得知系统的根轨迹曲线都位于虚轴的左半部分,两条由极点指向无穷远,一条由极点指向零点,改变环路增益大小不会破坏系统的稳定性。在环路增益较小时,远离虚轴的极点对系统的影响可以忽略,系统特性由虚轴附近的共轭极点决定。在环路增益较大时,靠近虚轴的极点会与零点产生零极点相消,系统特性由远离虚轴的共轭极点决定。显然,当环路增益越大,环路越稳定。In order to further illustrate that the amplitude control system of the present invention has good dynamic and steady-state characteristics, frequency characteristic analysis and phase locus diagram analysis of the drive closed-loop system are performed, as shown in Fig. 7 and Fig. 8 . It can be seen from the Bode diagram that the frequency point with an amplitude-frequency response of -3dB is 145Hz, so the bandwidth of the closed-loop system is 145Hz, which meets the bandwidth requirements of high-Q MEMS resonators and makes the system more robust. It can be seen from Figure 8 that the root locus curves of the system are all located on the left half of the imaginary axis, two point to infinity from the pole, and one point to zero from the pole. Changing the loop gain will not destroy the stability of the system. When the loop gain is small, the influence of poles away from the imaginary axis on the system can be ignored, and the system characteristics are determined by the conjugate poles near the imaginary axis. When the loop gain is large, the pole close to the imaginary axis will produce zero-pole cancellation with the zero point, and the system characteristics are determined by the conjugate pole far away from the imaginary axis. Obviously, when the loop gain is larger, the loop is more stable.

本发明提出的系统利用基于DDS算法进行频率合成的数字锁相环实现陀螺振动谐振频率和相位的跟踪,这种结构可利用DDS算法提供高分辨率的频率信号保证足够小的频率步进,同时PLL的带通特性还可以很好的抑制DDS输出频谱中的部分杂散,实现了DDS和PLL的优势互补,提高了高Q值MEMS谐振器控制系统的动态性能,优化了MEMS陀螺仪幅值和频率的稳定精度,进而改善了MEMS陀螺仪的零偏输出和抗干扰能力。The system proposed by the present invention utilizes a digital phase-locked loop for frequency synthesis based on the DDS algorithm to track the resonant frequency and phase of the gyro vibration. This structure can utilize the DDS algorithm to provide a high-resolution frequency signal to ensure a sufficiently small frequency step, and at the same time The band-pass characteristic of PLL can also suppress some spurs in the DDS output spectrum very well, realize the complementary advantages of DDS and PLL, improve the dynamic performance of the high-Q MEMS resonator control system, and optimize the amplitude of the MEMS gyroscope And the stable accuracy of the frequency, thereby improving the zero bias output and anti-interference ability of the MEMS gyroscope.

以上显示和描述了本发明的基本原理、主要特征及优点。本行业的技术人员应该了解,本发明不受上述实施例的限制,上述实施例和说明书中描述的只是说明本发明的原理,在不脱离本发明精神和范围的前提下,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The basic principles, main features and advantages of the present invention have been shown and described above. Those skilled in the art should understand that the present invention is not limited by the above-mentioned embodiments. The above-mentioned embodiments and descriptions only illustrate the principles of the present invention. Within the spirit and principles, any modifications, equivalent replacements, improvements, etc., shall be included in the protection scope of the present invention.

Claims (8)

1. A stable amplitude control system of a high Q MEMS resonator, the system comprising an AGC loop and a digital phase locked loop;
the AGC loop is used for controlling driving amplitude;
the digital phase-locked loop is used for controlling the resonant frequency;
the AGC loop comprises a first multiplication demodulation unit, a first low-pass filtering unit and a first PI control unit which are connected in sequence; the method comprises the steps that digital signals corresponding to a driving mode of the MEMS resonator are subjected to amplitude demodulation through a first multiplication demodulation unit, amplitude information of the MEMS resonator when the demodulated output signals work is obtained through a first low-pass filtering unit, the amplitude is compared with a reference value set by a system to obtain an amplitude deviation signal, a first PI control unit outputs an amplitude control quantity according to the amplitude deviation signal, namely, the amplitude gain of the system is achieved, an alternating current driving force is formed and fed back to a driving electrode, and amplitude closed-loop control is achieved;
the digital phase-locked loop comprises a second multiplication demodulation unit, a second low-pass filtering unit, a second PI control unit, a direct digital synthesis DDS algorithm frequency synthesis unit and a voltage-controlled oscillator DCO unit which are connected in sequence, wherein the second multiplication demodulation unit and the second low-pass filtering unit form a phase discriminator; the digital signals corresponding to the MEMS resonator driving modes are subjected to phase deviation signals through a second multiplication demodulation unit and a second low-pass filtering unit, and then frequency control signals delta omega are generated through a second PI control unit and are output to a direct digital synthesis DDS algorithm frequency synthesis unit; the direct digital synthesis DDS algorithm frequency synthesis unit outputs a frequency control signal delta omega 0 As an input signal of a voltage-controlled oscillator (DCO) unit, the DCO unit generates sine and cosine signals with resonant frequency, and then the phase error signals obtained by the DCO unitAnd the feedback is fed back to the output end of the phase discriminator so as to form closed loop control, and finally, the output frequency signal and the amplitude control quantity of the AGC loop generate driving feedback force to realize the driving amplitude stabilization of the MEMS gyroscope.
2. The stable amplitude control system of high Q MEMS resonator according to claim 1, wherein the direct digital synthesis DDS algorithm frequency synthesis unit comprises an FPGA frequency control word conversion unit, a phase accumulatorA waveform memory ROM, a digital low pass filter and a system clock; the FPGA frequency control word conversion unit converts the frequency control signal delta omega output by the second PI control unit into a corresponding frequency control word M, wherein the conversion coefficient is K f The method comprises the steps of carrying out a first treatment on the surface of the Driven by the system clock, the phase accumulator linearly accumulates the frequency control word M while accumulating the frequency control word M for 2 N Taking the modulus operation, and taking the obtained sum as a phase value, wherein N is the word length of the phase accumulator; the binary phase addressing code output by the phase accumulator is sent to a waveform memory ROM for addressing, so that the binary phase addressing code outputs a corresponding discrete amplitude sequence, and then the discrete amplitude sequence waveform is smoothed by a digital low-pass filter to obtain a required frequency waveform.
3. The stable amplitude control system of a high Q MEMS resonator according to claim 2, wherein the frequency resolution of the direct digital synthesis DDS algorithm frequency synthesis unit output depends on the number of bits N, N of the phase accumulator, the greater the frequency resolution.
4. A stable amplitude control system for high Q MEMS resonator according to claim 3, wherein the direct digital synthesis DDS algorithm frequency synthesis unit outputs a minimum frequency resolution Δf min The sum phase accumulator bit number N satisfies:
wherein f c Representing the system clock frequency, P representing the frequency division ratio of the phase locked loop, and R representing the reference frequency division ratio.
5. The stable amplitude control system of high Q MEMS resonator of claim 2, wherein the phase accumulator averages every 2 N The M clock cycles overflow once, and the frequency value delta f output by the direct digital synthesis DDS algorithm frequency synthesis unit can be obtained through the value of M in the system at the moment 0 The relationship between them is fullFoot:
6. the stable amplitude control system of a high Q MEMS resonator according to claim 1, wherein the first low pass filter unit and the second low pass filter unit employ FIR digital low pass filters designed by a Kaiser window function design method.
7. The stable amplitude control system of a high Q MEMS resonator of claim 6, wherein the parameters of the FIR digital low pass filter comprise: the center frequency is set to be 500kHz, the passband frequency is set to be 500Hz, the stopband frequency is set to be 14kHz, the stopband attenuation is greater than 50dB, and the final order is 109; the total length D of the Kaiser window function satisfies:
wherein A is s Representing the stop band attenuation, Δf represents the normalized transition bandwidth.
8. The stable amplitude control system of a high Q MEMS resonator of claim 1, wherein the digital phase locked loop outputs phase noise L of a frequency signal o The following formula is satisfied:
L o =L DDS +20logP'
wherein L is DDS The phase noise output by the direct digital synthesis DDS algorithm frequency synthesis unit is represented, and P' represents the frequency multiplication times.
CN202310445786.7A 2023-04-24 2023-04-24 Stable amplitude control system of high-Q MEMS resonator Pending CN116558548A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117804502A (en) * 2024-01-05 2024-04-02 中国科学院力学研究所 Coupling suppression calibration test method based on inertial sensor capacitive sensing circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117804502A (en) * 2024-01-05 2024-04-02 中国科学院力学研究所 Coupling suppression calibration test method based on inertial sensor capacitive sensing circuit

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