[go: up one dir, main page]

CN116555723A - A method for preparing gallium nitride thin film and Micro-LED device based on patterned graphene mask - Google Patents

A method for preparing gallium nitride thin film and Micro-LED device based on patterned graphene mask Download PDF

Info

Publication number
CN116555723A
CN116555723A CN202310435656.5A CN202310435656A CN116555723A CN 116555723 A CN116555723 A CN 116555723A CN 202310435656 A CN202310435656 A CN 202310435656A CN 116555723 A CN116555723 A CN 116555723A
Authority
CN
China
Prior art keywords
gan
graphene
growth
mask
flux
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310435656.5A
Other languages
Chinese (zh)
Inventor
曹冰
李建洁
蔡鑫
陶佳豪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou University
Original Assignee
Suzhou University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suzhou University filed Critical Suzhou University
Priority to CN202310435656.5A priority Critical patent/CN116555723A/en
Publication of CN116555723A publication Critical patent/CN116555723A/en
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/04Coating on selected surface areas, e.g. using masks
    • C23C16/042Coating on selected surface areas, e.g. using masks using masks
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/26Deposition of carbon only
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/301AIII BV compounds, where A is Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C23C16/303Nitrides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56After-treatment
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/04Pattern deposit, e.g. by using masks
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
    • C30B29/406Gallium nitride
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/08Etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/822Materials of the light-emitting regions
    • H10H20/824Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • H10H20/825Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/10Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
    • H10H29/14Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a method for preparing a gallium nitride film and a Micro-LED device based on a patterned graphene mask. PECVD deposition reaction is carried out on a gallium nitride substrate to obtain a graphene layer, and an etching process is adopted to obtain graphene mask structure patterns which are arranged in a long strip shape or in a square shape and are arranged in a matrix shape; the MOCVD epitaxial process is adopted, and conditions such as temperature, pressure, V/III and the like are changed in the MOCVD growth process, so that step nucleation of gallium nitride along the boundary of a window and a mask is effectively regulated and controlled; and (3) obtaining a gallium nitride film with lower dislocation density and a Micro-LED device with excellent performance through lateral epitaxial growth at different times.

Description

一种基于图案化石墨烯掩膜制备氮化镓薄膜及Micro-LED器 件的方法A GaN thin film and Micro-LED device based on a patterned graphene mask method of

技术领域technical field

本发明涉及一种基于图案化石墨烯掩膜制备氮化镓薄膜、Micro-LED器件的方法,属于半导体技术领域。The invention relates to a method for preparing a gallium nitride film and a Micro-LED device based on a patterned graphene mask, and belongs to the technical field of semiconductors.

背景技术Background technique

氮化镓(GaN)作为代表性的III族氮化物材料之一,以其较大的禁带宽度、较高的载流子饱和迁移速率和击穿场强、较好的导热性能等优点,在新一代照明显示、移动通信和能源互联网等领域有着广阔的前景。由于自然界中缺乏单晶GaN,目前商用的GaN大多都是利用蓝宝石、碳化硅等衬底异质外延得到,但不同材料之间的热膨胀系数、晶格常数的不同,直接导致GaN外延层的晶体质量变差,出现较多的晶体缺陷,如位错、层错等;还会出现明显的翘曲导致外延层开裂,这些缺陷的存在极大地降低了器件的性能,严重的限制了GaN的应用与发展。侧向外延生长(ELOG)是目前降低晶体内部位错密度的有效手段之一,常见的掩膜材料主要为非晶化的二氧化硅、氮化硅等,但这些材料在生长之后会被包裹在材料内部,由于其较差的导热、导电等材料属性,也直接影响器件的性能;利用石墨烯等二维材料作为掩膜可以很好的解决这些问题,目前多以湿法转移的方式获取石墨烯薄膜,但得到的石墨烯薄膜会存在很多污染和材料中的褶皱等缺陷,这会影响GaN的成核行为,从而不能通过侧向外延得到高质量的氮化镓薄膜。Gallium nitride (GaN), as one of the representative III-nitride materials, has the advantages of large band gap, high carrier saturation migration rate, breakdown field strength, and good thermal conductivity. It has broad prospects in the fields of new generation lighting display, mobile communication and energy Internet. Due to the lack of single crystal GaN in nature, most of the current commercial GaN is obtained by heterogeneous epitaxy of substrates such as sapphire and silicon carbide. The quality deteriorates, and there are more crystal defects, such as dislocations, stacking faults, etc.; there will also be obvious warpage leading to cracking of the epitaxial layer. The existence of these defects greatly reduces the performance of the device and seriously limits the application of GaN and development. Epitaxial lateral growth (ELOG) is currently one of the effective means to reduce the dislocation density inside the crystal. Common mask materials are mainly amorphous silicon dioxide, silicon nitride, etc., but these materials will be wrapped after growth Inside the material, due to its poor thermal conductivity, electrical conductivity and other material properties, it also directly affects the performance of the device; using two-dimensional materials such as graphene as a mask can solve these problems very well, and most of them are currently obtained by wet transfer. Graphene film, but the obtained graphene film will have many defects such as pollution and wrinkles in the material, which will affect the nucleation behavior of GaN, so that high-quality GaN film cannot be obtained by lateral epitaxy.

对于GaN的显示照明应用方面,Micro-LED以高亮度、能耗低、宽色域等优点具备了十分广阔的应用前景,目前主要通过干法刻蚀的方式获得不同尺寸的Micro-LED芯片,但是在器件制备过程中会不可避免的对芯片的侧壁造成损伤,破坏晶体结构,导致芯片表面非辐射复合比例上升,辐射复合下降,从而使得内量子效率下降,外量子效率也下降。其中辐射复合效率主要受材料内部的位错密度等影响,材料内部的位错会形成非辐射复合中心,降低LED的辐射复合效率。For GaN display lighting applications, Micro-LED has a very broad application prospect due to its advantages of high brightness, low energy consumption, and wide color gamut. At present, Micro-LED chips of different sizes are mainly obtained by dry etching. However, in the process of device fabrication, it will inevitably cause damage to the sidewall of the chip and destroy the crystal structure, resulting in an increase in the proportion of non-radiative recombination on the chip surface and a decrease in radiative recombination, resulting in a decrease in internal quantum efficiency and external quantum efficiency. The radiation recombination efficiency is mainly affected by the dislocation density inside the material, and the dislocations inside the material will form a non-radiative recombination center, reducing the radiation recombination efficiency of the LED.

因此,需要提供一种利用图案化石墨烯掩膜调控GaN成核,从而得到选择性生长低位错密度的GaN芯片以及Micro-LED芯片,以解决上述问题。Therefore, it is necessary to provide a method for controlling the nucleation of GaN by using a patterned graphene mask, so as to obtain GaN chips and Micro-LED chips with selectively grown low dislocation density, so as to solve the above problems.

发明内容Contents of the invention

本发明针对现有技术存在的不足,提供一种获得高质量GaN外延层的基于图案化石墨烯掩膜制备氮化镓薄膜的方法,及能有效降低Micro-LED不同层内的位错密度,提高器件性能的Micro-LED器件的制备方法。The present invention aims at the deficiencies in the prior art, and provides a method for preparing GaN thin films based on a patterned graphene mask to obtain high-quality GaN epitaxial layers, and can effectively reduce the dislocation density in different layers of Micro-LEDs. A method for preparing a Micro-LED device that improves device performance.

实现本发明目的的技术方案是提供一种基于图案化石墨烯掩膜制备氮化镓薄膜的方法,包括如下步骤:The technical solution for realizing the purpose of the present invention is to provide a method for preparing a gallium nitride film based on a patterned graphene mask, comprising the following steps:

(1)在氮化镓衬底上进行PECVD沉积反应得到石墨烯层,采用刻蚀工艺得到长条状排列或方块形呈矩阵排列的石墨烯掩膜结构图案;(1) Perform PECVD deposition reaction on the gallium nitride substrate to obtain a graphene layer, and use an etching process to obtain a strip-shaped or square-shaped graphene mask structure pattern arranged in a matrix;

(2)采用MOCVD外延工艺,在TMGa通量约16.1sccm,NH3通量为24~32slm,V/III为6000~8000,压强为500Torr,温度为950~970℃的条件下,控制GaN沿方块形、或长条状石墨烯边界成核生长GaN岛;(2) Using MOCVD epitaxy process, under the conditions of TMGa flux of about 16.1sccm, NH 3 flux of 24-32slm, V/III of 6000-8000, pressure of 500Torr, and temperature of 950-970℃, the GaN edge is controlled. Cube-shaped or strip-shaped graphene boundary nucleation and growth of GaN islands;

(3)在TMGa通量为40sccm,NH3通量为80~100slm,V/III为8000~10000,压强为100~200Torr,温度为1050~1070℃的条件下,控制生长在石墨烯边界的GaN岛横向生长至合并,得到氮化镓薄膜。(3) Under the conditions of TMGa flux of 40sccm, NH 3 flux of 80-100slm, V/III of 8000-10000, pressure of 100-200Torr, and temperature of 1050-1070°C, the growth on the graphene boundary is controlled. The GaN islands are grown laterally until they merge, resulting in GaN thin films.

本发明技术方案还包括一种基于图案化石墨烯掩膜制备Micro-LED器件的方法,包括如下步骤:The technical solution of the present invention also includes a method for preparing a Micro-LED device based on a patterned graphene mask, comprising the following steps:

(1)在氮化镓衬底上进行PECVD沉积反应得到石墨烯层,采用刻蚀工艺得到方块形呈矩阵排列的石墨烯掩膜结构图案;(1) Perform PECVD deposition reaction on the gallium nitride substrate to obtain a graphene layer, and use an etching process to obtain a square-shaped graphene mask structure pattern arranged in a matrix;

(2)采用MOCVD外延工艺,在TMGa通量约16.1sccm,NH3通量为24~32slm,V/III为6000~8000,压强为500Torr,温度为950~970℃的条件下,控制GaN沿各方块形石墨烯边界成核生长GaN岛;(2) Using MOCVD epitaxy process, under the conditions of TMGa flux of about 16.1sccm, NH 3 flux of 24-32slm, V/III of 6000-8000, pressure of 500Torr, and temperature of 950-970℃, the GaN edge is controlled. The nucleation and growth of GaN islands on the boundaries of each block-shaped graphene;

(3)在TMGa通量为20sccm,NH3通量为40~50slm,V/III为8000~10000,压强为100~200Torr,温度为1050~1070℃,生长时间为30~50min的条件下,控制生长石墨烯边界的GaN岛横向生长至合并,将石墨烯掩盖在u-GaN下方,得到厚度为3~5微米的u-GaN层;(3) Under the conditions of TMGa flux of 20sccm, NH 3 flux of 40-50slm, V/III of 8000-10000, pressure of 100-200Torr, temperature of 1050-1070°C and growth time of 30-50min, Control the lateral growth of the GaN islands at the growth graphene boundary until they merge, cover the graphene under the u-GaN, and obtain a u-GaN layer with a thickness of 3-5 microns;

(4)改变生长气体源,依次沉积n-GaN层、量子阱层、AlGaN层、P-GaN层,得到Micro-LED器件。(4) Change the growth gas source, deposit n-GaN layer, quantum well layer, AlGaN layer, and P-GaN layer in sequence to obtain Micro-LED devices.

本发明制备Micro-LED器件技术方案所述石墨烯掩膜结构图案中的方块形掩膜,其边长为1~5μm,相邻方块形掩膜的间隔为5~30μm。The square-shaped mask in the graphene mask structure pattern described in the technical solution for preparing Micro-LED devices according to the present invention has a side length of 1-5 μm, and the interval between adjacent square-shaped masks is 5-30 μm.

本发明依据的原理是:石墨烯掩膜结构为垂直于GaN的m面的方形结构,通过改变V/III比,调控GaN的选择性成核,较高的V/III(约7000)比可以使得GaN沿着石墨烯条带与窗口两侧的台阶处(凹槽两侧)成核,较低的V/III(约2000)比促使GaN在窗口区域(凹槽)成核;两种成核方式结合能够很好地完成选择性生长,并进一步合并为一个整体的GaN条带。The principle of the present invention is that the graphene mask structure is a square structure perpendicular to the m-plane of GaN, and the selective nucleation of GaN can be regulated by changing the V/III ratio. A higher V/III (about 7000) ratio can Make GaN nucleate along the graphene strip and the steps on both sides of the window (both sides of the groove), and the lower V/III (about 2000) ratio promotes the nucleation of GaN in the window area (groove); the two kinds of formation The combination of nuclei can well complete the selective growth and further merge into a whole GaN strip.

与现有技术相比,本发明的有益效果在于:Compared with prior art, the beneficial effect of the present invention is:

1.本发明基于图案化石墨烯掩膜,采用二步不同的外延工艺,有效调控GaN的成核行为,有助于侧向外延高质量的GaN薄膜,直接外延Micro-LED器件结构,避免了工艺过程中造成的污染、晶体缺陷。1. The invention is based on a patterned graphene mask, adopts two different epitaxy processes, effectively regulates the nucleation behavior of GaN, contributes to the lateral epitaxy of high-quality GaN films, and directly epitaxes the Micro-LED device structure, avoiding the process Pollution and crystal defects caused by

2,本发明提供的技术方案,GaN在窗口两侧的石墨烯掩膜的台阶处成核,相比于直接成核在窗口的凹槽中,成核方式可更有力的降低外延层中的位错密度。2. In the technical solution provided by the present invention, GaN nucleates at the steps of the graphene mask on both sides of the window. Compared with direct nucleation in the groove of the window, the nucleation method can more effectively reduce the dislocation density.

3.本发明利用GaN在图案化石墨烯四周成核的特性,可以控制GaN生长独立的器件结构,器件结构是通过侧向外延得到,其中位错密度较低,晶体质量较好。3. The present invention utilizes the nucleation characteristics of GaN around the patterned graphene to control GaN to grow an independent device structure. The device structure is obtained through lateral epitaxy, wherein the dislocation density is low and the crystal quality is good.

附图说明Description of drawings

图1为本发明实施例1提供的垂直于GaN的m面的条带状石墨烯掩膜图案的结构示意图;FIG. 1 is a schematic structural diagram of a striped graphene mask pattern perpendicular to the m-plane of GaN provided by Embodiment 1 of the present invention;

图2为采用传统工艺GaN沿着条带状石墨烯掩膜的窗口(凹槽)成核的MOCVD生长原理示意图;Figure 2 is a schematic diagram of the MOCVD growth principle of GaN nucleation along the window (groove) of the striped graphene mask using the traditional process;

图3为采用传统工艺GaN沿着条带状石墨烯掩膜的窗口区域成核生长为独立条带结构实物的SEM图;Fig. 3 is a SEM image of the nucleation and growth of GaN along the window region of the striped graphene mask into an independent strip structure using the traditional process;

图4为采用本发明实施例1提供的工艺GaN沿着条带状石墨烯掩膜的台阶成核的MOCVD生长原理示意图;4 is a schematic diagram of the MOCVD growth principle of GaN nucleation along the steps of a striped graphene mask using the process provided by Embodiment 1 of the present invention;

图5、6、7分别为采用本发明实施例1提供的工艺GaN沿着条带状石墨烯掩膜两侧的台阶成核生长为独立条带结构、进一步生长及生长为三角形条带实物的SEM图;Figures 5, 6, and 7 respectively show the nucleation and growth of GaN along the steps on both sides of the strip-shaped graphene mask as an independent strip structure, further growth and growth into a triangular strip by using the process provided by Embodiment 1 of the present invention. SEM image;

图8为采用本发明实施例1提供的工艺制备的GaN薄膜实物的SEM图。FIG. 8 is an SEM image of a real GaN thin film prepared by using the process provided in Example 1 of the present invention.

图9为本发明实施例2提供的方块形石墨烯掩膜图案的结构示意图;9 is a schematic structural diagram of a square graphene mask pattern provided by Embodiment 2 of the present invention;

图10为采用本发明实施例2提供的工艺GaN沿着方块形石墨烯掩膜的MOCVD生长原理示意图;10 is a schematic diagram of the MOCVD growth principle of GaN along a square graphene mask using the process provided by Embodiment 2 of the present invention;

图11为采用本发明实施例2提供的工艺GaN沿着方块形石墨烯掩膜的台阶成核生长为独立台面结构实物的SEM图。Fig. 11 is a SEM image of GaN nucleated and grown into an independent mesa structure along the steps of a square graphene mask using the process provided by Embodiment 2 of the present invention.

其中:1为石墨烯掩膜,2为氮化镓模板(衬底),3为窗口(凹槽),4为GaN在窗口区域成核,5为GaN在窗口区域成核的基础上进一步三维生长,6为三维生长的基础上进一步二维生长,7为最终合并的GaN薄膜,8为GaN沿着石墨烯掩膜台阶成核,9为Micro-LED其余的层结构。Among them: 1 is the graphene mask, 2 is the gallium nitride template (substrate), 3 is the window (groove), 4 is the nucleation of GaN in the window area, and 5 is the further three-dimensional process based on the nucleation of GaN in the window area. Growth, 6 is further two-dimensional growth on the basis of three-dimensional growth, 7 is the final merged GaN film, 8 is the nucleation of GaN along the steps of the graphene mask, and 9 is the rest of the Micro-LED layer structure.

具体实施方式Detailed ways

下面结合附图和实施例对本发明技术方案作进一步的阐述。The technical solutions of the present invention will be further described below in conjunction with the accompanying drawings and embodiments.

实施例一Embodiment one

本实施例提供一种采用石墨烯掩膜为条带状图案的掩膜结构的GaN薄膜的制备方法,步骤如下:This embodiment provides a method for preparing a GaN thin film using a graphene mask as a strip pattern mask structure, the steps are as follows:

(1)PECVD生长石墨烯(1) PECVD growth graphene

在氮化镓模板(衬底)上进行PECVD沉积反应得到石墨烯层;Perform PECVD deposition reaction on the gallium nitride template (substrate) to obtain a graphene layer;

(2)图案化石墨烯(2) Patterned graphene

采用刻蚀工艺得到长条状排列的石墨烯掩膜衬底结构图案,再经有机、无机清洗后去除光刻胶残胶、衬底表面氧化层及氧化物污染;参见附图1,为本实施例提供的呈长条状排列的石墨烯掩膜衬底的结构示意图,包括石墨烯掩膜1、氮化镓模板2、窗口3,其中,石墨烯掩膜为条带状图案的掩膜结构,条带方向垂直于衬底GaN的m面,周期为10μm,其中窗口宽度为3μm,掩膜宽度为7μm。The graphene mask substrate structure pattern arranged in strips is obtained by etching process, and then the photoresist residue, the oxide layer on the substrate surface and the oxide pollution are removed after organic and inorganic cleaning; see attached drawing 1 for basic The schematic diagram of the structure of the graphene mask substrate arranged in strips provided in the embodiment, including a graphene mask 1, a gallium nitride template 2, and a window 3, wherein the graphene mask is a strip pattern mask structure, the stripe direction is perpendicular to the m-plane of the substrate GaN, the period is 10 μm, the window width is 3 μm, and the mask width is 7 μm.

(3)MOCVD生长GaN成核、GaN薄膜(3) GaN nucleation and GaN thin films grown by MOCVD

以采用MOCVD传统的侧向外延工艺为对比例,参见附图2,为采用MOCVD传统的侧向外延工艺GaN沿着条带状石墨烯掩膜的窗口(凹槽)成核的MOCVD生长原理示意图,采用TMGa通量为55sccm,NH3通量为28slm,V/III=2000,压强为500Torr,温度为970℃的条件下生长氮化镓薄膜,可控制GaN优先在窗口区域成核4,GaN沿着条带状石墨烯掩膜的窗口区域成核生长为独立条带结构,其实物的SEM图参见附图3所示;在该条件下持续三维生长60min,直至形成稳定的具有{11-22}晶面的三角形条带结构5,改变生长条件,TMGa通量为40sccm,NH3通量为80slm,V/III=8000,压强为200Torr,温度为1080℃,使得三角形条带进一步二维生长6,生长90min后相遇合并为GaN薄膜7。Taking the traditional lateral epitaxy process of MOCVD as a comparison example, see Figure 2, which is a schematic diagram of the MOCVD growth principle of GaN nucleation along the window (groove) of the striped graphene mask using the traditional lateral epitaxy process of MOCVD , using TMGa flux of 55sccm, NH 3 flux of 28slm, V/III=2000, pressure of 500Torr, and temperature of 970°C to grow gallium nitride thin films, which can control the nucleation of GaN preferentially in the window area4, GaN Nucleation and growth along the window region of the strip-shaped graphene mask is an independent strip structure, and the SEM image of the object is shown in Figure 3; under this condition, the three-dimensional growth is continued for 60min until a stable structure with {11- 22} The triangular strip structure of the crystal plane 5, changing the growth conditions, the TMGa flux is 40sccm, the NH 3 flux is 80slm, V/III=8000, the pressure is 200Torr, and the temperature is 1080℃, making the triangular strips further two-dimensional grow 6, meet and merge into GaN thin film 7 after growing for 90 minutes.

参见附图4,为采用本实施例提供的MOCVD侧向外延工艺,GaN沿着条带状石墨烯掩膜的台阶成核的MOCVD生长原理示意图;在TMGa通量为16.1sccm,NH3通量为30slm,V/III=7500,压强为500Torr,温度为970℃的条件下生长,控制GaN优先在石墨烯掩膜两侧的台阶处成核8,其实物的SEM图参见附图5所示;然后在该条件下进一步生长,在窗口区域形成两条GaN条带并发生合并,其实物的SEM图参见附图6所示;生长60min后得到具有{11-22}晶面的三角形条带结构5,其实物的SEM图参见附图7所示;改变生长条件,TMGa通量为40sccm,NH3通量为80slm,V/III=8000,压强为100Torr,温度为1080℃,使得三角形条带进一步二维生长6,生长80min后相遇合并为GaN薄膜7,最终得到的GaN薄膜相较于对比例利用传统侧向外延工艺得到的薄膜,其位错密度更低,可达到106 cm-2数量级,其实物的SEM图参见附图8所示。Referring to accompanying drawing 4, in order to adopt the MOCVD lateral epitaxial process provided by this embodiment, the schematic diagram of the MOCVD growth principle of GaN nucleation along the steps of the striped graphene mask; when the TMGa flux is 16.1 sccm, the NH flux 30slm, V/III=7500, pressure 500Torr, temperature 970°C, GaN is controlled to nucleate preferentially at the steps on both sides of the graphene mask 8, the actual SEM image is shown in Figure 5 ; Then grow further under this condition, forming two GaN strips in the window area and merging, the SEM image of the actual object is shown in Figure 6; after growing for 60 minutes, a triangular strip with {11-22} crystal plane is obtained Structure 5, its actual SEM image is shown in Figure 7; change the growth conditions, the flux of TMGa is 40sccm, the flux of NH3 is 80slm, V/III=8000, the pressure is 100Torr, and the temperature is 1080°C, so that the triangular bars The strips were further two-dimensionally grown 6, and after 80 minutes of growth, they met and merged into a GaN film 7. Compared with the film obtained by the traditional lateral epitaxy process in the comparative example, the dislocation density of the finally obtained GaN film was lower, reaching 10 6 cm - 2 order of magnitude, its actual SEM image is shown in Figure 8.

采用本实施例提供的方法,可通过控制生长时间得到厚度不同的GaN薄膜。Using the method provided in this embodiment, GaN thin films with different thicknesses can be obtained by controlling the growth time.

本实施例采用MOCVD在970℃、500Torr的条件下进行第一步GaN的成核生长,此时掩膜下方的位错完全被阻挡,仅有窗口区域的位错穿透至外延层中;改变生长参数;在1070℃、100Torr的条件下进行第二步GaN的二维生长,促使GaN条带横向生长直至合并为平滑的GaN薄膜。由于低V/III比生长的样品,GaN成核在凹槽中,其中从窗口穿透的位错在这个过程中发生90℃的弯曲,由垂直式位错变为水平式位错,且在合并的过程中相遇发生湮灭,以此来降低外延层的位错密度,通过本发明提供的方法可将位错密度由衬底的5x108cm-2降低至1x107cm-2,接近1.5个数量级的降低。同时,由于采用了高V/III比生长的样品,GaN成核在窗口两侧的石墨烯台阶处,由于GaN成核岛与衬底接触面积较小,所以从衬底穿透至外延层的位错密度也较少,此外,这些GaN岛进一步生长为GaN条带,窗口两侧的细窄条带会马上相遇合并,晶体中的部分位错会在这个过程中弯曲并相遇,从而发生反应;在侧向生长过程中位错发生90℃的弯曲,由垂直式位错变为水平式位错,且在合并的过程中相遇发生湮灭,再次降低外延层的位错密度。In this embodiment, MOCVD is used to perform the first step of GaN nucleation growth under the conditions of 970°C and 500 Torr. At this time, the dislocations under the mask are completely blocked, and only the dislocations in the window region penetrate into the epitaxial layer; change Growth parameters: The second two-dimensional growth of GaN is carried out under the conditions of 1070°C and 100 Torr to promote the lateral growth of GaN strips until they merge into a smooth GaN film. Due to the low V/III ratio growth sample, GaN nucleates in the groove, and the dislocation penetrating from the window undergoes a 90°C bending during the process, changing from a vertical dislocation to a horizontal dislocation, and in In the process of merging, annihilation occurs when encountering, so as to reduce the dislocation density of the epitaxial layer. Through the method provided by the present invention, the dislocation density can be reduced from 5x10 8 cm -2 of the substrate to 1x10 7 cm -2 , close to 1.5 order of magnitude reduction. At the same time, due to the use of samples grown with a high V/III ratio, the GaN nucleation is at the graphene steps on both sides of the window, and the GaN nucleation islands have a small contact area with the substrate, so the penetration from the substrate to the epitaxial layer There is also less dislocation density. In addition, these GaN islands grow further into GaN strips, and the narrow strips on both sides of the window will meet and merge immediately. Part of the dislocations in the crystal will bend and meet in the process, thereby reacting ; During the lateral growth process, dislocations bend at 90°C, changing from vertical dislocations to horizontal dislocations, and meet and annihilate in the process of merging, reducing the dislocation density of the epitaxial layer again.

本实施例通过改变V/III比调控GaN的选择性成核,较高的V/III(约7000)比可使GaN沿着石墨烯条带与窗口两侧的台阶处(凹槽两侧)成核,较低的V/III(约2000)比促使GaN在窗口区域(凹槽)成核;两种成核方式结合能够很好地完成选择性生长(两种成核方式都可以降低外延层的位错密度,第一种方式的降低能力更强),并进一步合并为一个整体的GaN条带,最终得到GaN薄膜。In this example, the selective nucleation of GaN is regulated by changing the V/III ratio. A higher V/III (about 7000) ratio can make GaN move along the graphene strip and the steps on both sides of the window (both sides of the groove) Nucleation, the lower V/III (about 2000) ratio promotes the nucleation of GaN in the window region (groove); the combination of the two nucleation methods can well complete the selective growth (both nucleation methods can reduce the epitaxy The dislocation density of the layer, the reduction ability of the first method is stronger), and further merged into a whole GaN strip, and finally a GaN film is obtained.

实施例二Embodiment two

本实施例提供一种基于方块形石墨烯掩膜图案的氮化镓薄膜及Micro-LED芯片的制备方法。This embodiment provides a method for preparing a gallium nitride film and a Micro-LED chip based on a square graphene mask pattern.

在氮化镓模板(衬底)上进行PECVD沉积反应得到石墨烯层;采用刻蚀工艺得到石墨烯掩膜衬底结构图案,参见附图9,为本实施例提供的方块形石墨烯掩膜结构示意图,包括石墨烯掩膜1、氮化镓模板2、窗口3,其中石墨烯掩膜为呈阵列的方块形掩膜结构,方向选择垂直于GaN的m面,平行于a面,周期为10μm,其中窗口和掩膜的尺寸可根据实际芯片的尺寸要求选择,本实施例中,窗口宽度7μm,掩膜宽度3μm。Perform PECVD deposition reaction on the gallium nitride template (substrate) to obtain a graphene layer; use an etching process to obtain a graphene mask substrate structure pattern, see accompanying drawing 9, for the square graphene mask provided in this embodiment Schematic diagram of the structure, including graphene mask 1, gallium nitride template 2, and window 3, wherein the graphene mask is a square mask structure in an array, and the direction is chosen to be perpendicular to the m-plane of GaN and parallel to the a-plane, with a period of The size of the window and the mask can be selected according to the size requirements of the actual chip. In this embodiment, the width of the window is 7 μm, and the width of the mask is 3 μm.

再经有机、无机清洗后去除光刻胶残胶、衬底表面氧化层及氧化物污染;参见附图10,为采用本实施例提供的方块形石墨烯结构,GaN沿着方块形石墨烯边界成核的MOCVD生长的示意图;在TMGa通量为16.1sccm,NH3通量为30slm,V/III=7500,压强为500Torr,温度为970℃的条件下生长5min,控制GaN优先在方块形石墨烯掩膜四周的台阶处成核8;然后改变生长参数TMGa通量为20sccm,NH3通量为40slm,V/III=8000,压强为200Torr,温度为1080℃,使得三角形条带进一步二维生长,生长30min后,GaN外延层完全覆盖整个掩膜并形成侧壁光滑的GaN周期性台面结构,外延生成氮化镓薄膜7,即为u-GaN,其实物的SEM图参见附图11所示。After organic and inorganic cleaning, photoresist residue, substrate surface oxide layer and oxide pollution are removed; referring to accompanying drawing 10, in order to adopt the square graphene structure provided by this embodiment, GaN is along the border of square graphene Schematic diagram of nucleated MOCVD growth; under the conditions of TMGa flux of 16.1sccm, NH 3 flux of 30slm, V/III=7500, pressure of 500Torr, and temperature of 970℃ for 5min, GaN is preferentially grown on square graphite Nucleation 8 is formed at the steps around the ene mask; then change the growth parameters TMGa flux to 20sccm, NH 3 flux to 40slm, V/III=8000, pressure to 200Torr, and temperature to 1080°C to make the triangular strips further two-dimensional After growing for 30 minutes, the GaN epitaxial layer completely covers the entire mask and forms a GaN periodic mesa structure with smooth sidewalls, and epitaxially generates gallium nitride thin film 7, which is u-GaN. The actual SEM image is shown in Figure 11. Show.

在970℃、7500较高的V/III等条件下生长u-GaN层,可使Ga原子获得极强的迁移能力,从而迫使Ga原子迁移至方块形石墨烯的四个边界的台阶处进行反应成核,得到了沿边界生长的GaN岛,再改变生长参数,促使GaN岛横向二维生长,直接将石墨烯覆盖,得到完整的u-GaN层。Growing the u-GaN layer under the conditions of 970°C and 7500 higher V/III can make Ga atoms obtain extremely strong mobility, thus forcing Ga atoms to migrate to the steps of the four boundaries of the square graphene for reaction Nucleation, GaN islands grown along the boundaries are obtained, and then the growth parameters are changed to promote the lateral two-dimensional growth of GaN islands, directly covering graphene, and obtaining a complete u-GaN layer.

本发明技术方案中,石墨烯掩膜结构为垂直于GaN的m面的方形结构,在第一步成核生长的过程中,使用较高的V/III比(约7000)促使GaN沿着石墨烯掩膜与窗口四周的台阶处成核,进一步侧向生长后形成方形GaN的台面结构,该方法更适应于掩膜面积较小的衬底,掩膜宽度越小,更有利于生长在四周台阶的GaN岛进一步相遇合并,若掩膜宽度较宽,由于Ga原子在石墨烯掩膜上的迁移能力强,那生长在掩膜边界台阶处的GaN只会进一步填满窗口区域;之后改变MOCVD生长气源,采用三甲基镓、三甲基铝、二环戊二烯基镁等作为金属有机化合物,在该GaN图案化衬底上进一步生长n-GaN层、量子阱、AlGaN层、p-GaN层,即可得到micro-LED芯片的基本结构,实现了选择性生长周期性芯片阵列;现有技术利用光刻-刻蚀得到的Micro-LED芯片阵列通常很难做到5*5μm2以下,因为曝光等原因,无法得到符合预期设定的图案结构,而本发明提供的直接外延的方法可以优化这些问题,且直接外延得到的阵列尺寸较小,掩膜宽度可以介于500nm~5μm之间。通过直接外延生长得到的芯片具有光滑的侧壁、良好的晶体结构,有利于提高芯片的发光效率等,提高器件的性能。In the technical solution of the present invention, the graphene mask structure is a square structure perpendicular to the m-plane of GaN. During the first step of nucleation and growth, a higher V/III ratio (about 7000) is used to promote GaN along the graphite The ene mask and the steps around the window are nucleated, and a square GaN mesa structure is formed after further lateral growth. This method is more suitable for substrates with a small mask area. The smaller the mask width, the more conducive to growth around the window. Stepped GaN islands further meet and merge. If the mask width is wider, the GaN grown at the step of the mask boundary will only further fill the window area due to the strong migration ability of Ga atoms on the graphene mask; then change the MOCVD The growth gas source uses trimethylgallium, trimethylaluminum, dicyclopentadienyl magnesium, etc. as metal organic compounds, and further grows n-GaN layer, quantum well, AlGaN layer, p -GaN layer, the basic structure of the micro-LED chip can be obtained, and the selective growth of the periodic chip array is realized; the Micro-LED chip array obtained by photolithography-etching is usually difficult to achieve 5*5μm 2 Below, due to exposure and other reasons, the expected pattern structure cannot be obtained, but the direct epitaxy method provided by the present invention can optimize these problems, and the array size obtained by direct epitaxy is small, and the mask width can be between 500nm and 5μm between. The chip obtained by the direct epitaxial growth has a smooth side wall and a good crystal structure, which is conducive to improving the luminous efficiency of the chip and improving the performance of the device.

Claims (3)

1.一种基于图案化石墨烯掩膜制备氮化镓薄膜的方法,其特征在于包括如下步骤:1. A method for preparing gallium nitride film based on patterned graphene mask, is characterized in that comprising the steps: (1)在氮化镓衬底上进行PECVD沉积反应得到石墨烯层,采用刻蚀工艺得到长条状排列或方块形呈矩阵排列的石墨烯掩膜结构图案;(1) Perform PECVD deposition reaction on the gallium nitride substrate to obtain a graphene layer, and use an etching process to obtain a strip-shaped or square-shaped graphene mask structure pattern arranged in a matrix; (2)采用MOCVD外延工艺,在TMGa通量约16.1sccm,NH3通量为24~32slm,V/III为6000~8000,压强为500Torr,温度为950~970℃的条件下,控制GaN沿方块形、或长条状石墨烯边界成核生长GaN岛;(2) Using MOCVD epitaxy process, under the conditions of TMGa flux of about 16.1sccm, NH 3 flux of 24-32slm, V/III of 6000-8000, pressure of 500Torr, and temperature of 950-970℃, the GaN edge is controlled. Cube-shaped or strip-shaped graphene boundary nucleation and growth of GaN islands; (3)在TMGa通量为40sccm,NH3通量为80~100slm,V/III为8000~10000,压强为100~200Torr,温度为1050~1070℃的条件下,控制生长在石墨烯边界的GaN岛横向生长至合并,得到氮化镓薄膜。(3) Under the conditions of TMGa flux of 40sccm, NH 3 flux of 80-100slm, V/III of 8000-10000, pressure of 100-200Torr, and temperature of 1050-1070°C, the growth on the graphene boundary is controlled. The GaN islands are grown laterally until they merge, resulting in GaN thin films. 2.一种基于图案化石墨烯掩膜制备Micro-LED器件的方法,其特征在于包括如下步骤:2. A method for preparing a Micro-LED device based on a patterned graphene mask, characterized in that it comprises the steps: (1)在氮化镓衬底上进行PECVD沉积反应得到石墨烯层,采用刻蚀工艺得到方块形呈矩阵排列的石墨烯掩膜结构图案;(1) Perform PECVD deposition reaction on the gallium nitride substrate to obtain a graphene layer, and use an etching process to obtain a square-shaped graphene mask structure pattern arranged in a matrix; (2)采用MOCVD外延工艺,在TMGa通量约16.1sccm,NH3通量为24~32slm,V/III为6000~8000,压强为500Torr,温度为950~970℃的条件下,控制GaN沿各方块形石墨烯边界成核生长GaN岛;(2) Using MOCVD epitaxy process, under the conditions of TMGa flux of about 16.1sccm, NH 3 flux of 24-32slm, V/III of 6000-8000, pressure of 500Torr, and temperature of 950-970℃, the GaN edge is controlled. The nucleation and growth of GaN islands on the boundaries of each block-shaped graphene; (3)在TMGa通量为20sccm,NH3通量为40~50slm,V/III为8000~10000,压强为100~200Torr,温度为1050~1070℃,生长时间为30~50min的条件下,控制生长石墨烯边界的GaN岛横向生长至合并,将石墨烯掩盖在u-GaN下方,得到厚度为3~5微米的u-GaN层;(3) Under the conditions of TMGa flux of 20sccm, NH 3 flux of 40-50slm, V/III of 8000-10000, pressure of 100-200Torr, temperature of 1050-1070°C and growth time of 30-50min, Control the lateral growth of the GaN islands at the growth graphene boundary until they merge, cover the graphene under the u-GaN, and obtain a u-GaN layer with a thickness of 3-5 microns; (4)改变生长气体源,依次沉积n-GaN层、量子阱层、AlGaN层、P-GaN层,得到Micro-LED器件。(4) Change the growth gas source, deposit n-GaN layer, quantum well layer, AlGaN layer, and P-GaN layer in sequence to obtain Micro-LED devices. 3.根据权利要求2所述的一种基于图案化石墨烯掩膜制备Micro-LED器件的方法,其特征在于:所述石墨烯掩膜结构图案中的方块形掩膜,其边长为1~5μm,相邻方块形掩膜的间隔为5~30μm。3. A method for preparing a Micro-LED device based on a patterned graphene mask according to claim 2, characterized in that: the square mask in the graphene mask structure pattern has a side length of 1 ~5 μm, and the interval between adjacent square masks is 5~30 μm.
CN202310435656.5A 2023-04-21 2023-04-21 A method for preparing gallium nitride thin film and Micro-LED device based on patterned graphene mask Pending CN116555723A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310435656.5A CN116555723A (en) 2023-04-21 2023-04-21 A method for preparing gallium nitride thin film and Micro-LED device based on patterned graphene mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310435656.5A CN116555723A (en) 2023-04-21 2023-04-21 A method for preparing gallium nitride thin film and Micro-LED device based on patterned graphene mask

Publications (1)

Publication Number Publication Date
CN116555723A true CN116555723A (en) 2023-08-08

Family

ID=87493822

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310435656.5A Pending CN116555723A (en) 2023-04-21 2023-04-21 A method for preparing gallium nitride thin film and Micro-LED device based on patterned graphene mask

Country Status (1)

Country Link
CN (1) CN116555723A (en)

Similar Documents

Publication Publication Date Title
CN110783167B (en) Preparation method of semiconductor material patterned substrate, material film and device
CN111261759B (en) A kind of aluminum nitride epitaxial structure and growth method thereof
CN105489714B (en) A kind of nitride porous aluminium compound substrate and its application in epitaxial growth high-quality gallium nitride film
JP4055304B2 (en) Method for producing gallium nitride compound semiconductor
CN106374023B (en) The nonpolar nano-pillar LED and preparation method thereof being grown on lithium gallium oxide substrate
CN101847578B (en) Method for growing semi-polar GaN based on Al2O3 substrate with m sides
JP2001210598A (en) Substrate for epitaxial growth and manufacturing method
KR20080102028A (en) Method for growing BaN single crystals on silicon substrate, manufacturing method of BaN-based light emitting devices and BaN-based light emitting devices
CN104576847B (en) The growing method and LED epitaxial slice of a kind of LED epitaxial slice
CN103952683A (en) Preparation method of semi-polar m-plane GaN-based semiconductor device containing SiNx insertion layer
CN109545933B (en) A kind of non-polar patterned AlN/sapphire composite substrate and preparation method thereof
CN102492986B (en) Selective area hetero-epitaxial substrate structure, preparation thereof and epitaxial layer growing method
CN1294650C (en) Method for preparing high quality GaN base material on specific saphire pattern substrate
CN113782651B (en) Patterned deep ultraviolet LED epitaxial structure and preparation method thereof
CN109411579B (en) Semiconductor device with graphene structure and preparation method thereof
CN1697134A (en) A method for in-situ preparation of graphic substrate using SiN film
CN1738000A (en) Heteroepitaxial method of GaN semiconductor material
CN108538977B (en) A kind of high-quality GaN thin film and preparation method thereof
CN116555723A (en) A method for preparing gallium nitride thin film and Micro-LED device based on patterned graphene mask
CN206225392U (en) It is grown in the InGaN/GaN nano-pillar MQWs on strontium aluminate tantalum lanthanum substrate
US12106959B2 (en) Nonpolar or semipolar group III-nitride substrates
CN212750917U (en) LED epitaxial wafer
CN219998246U (en) Micro-LED device structure
CN103320764B (en) Based on the preparation method of InN semiconducter device on a face GaN buffer layer on the 6H-SiC substrate of a face
CN107170666A (en) A kind of nonpolar III group-III nitride epitaxial film

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination