CN116544217A - Electromagnetic interference shielding structure and manufacturing method thereof - Google Patents
Electromagnetic interference shielding structure and manufacturing method thereof Download PDFInfo
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- CN116544217A CN116544217A CN202310584470.6A CN202310584470A CN116544217A CN 116544217 A CN116544217 A CN 116544217A CN 202310584470 A CN202310584470 A CN 202310584470A CN 116544217 A CN116544217 A CN 116544217A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
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- Condensed Matter Physics & Semiconductors (AREA)
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- Electromagnetism (AREA)
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- Manufacturing & Machinery (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
The invention discloses an electromagnetic interference shielding structure and a manufacturing method thereof, wherein the method comprises the following steps: providing a substrate; mounting copper columns on the first surface of the substrate; mounting chips on the first surface of the substrate, wherein the chips are respectively arranged on two sides of the copper column; injection molding is carried out to form an encapsulation layer, and the encapsulation layer covers the substrate, the copper column and the chip; thinning the packaging layer and exposing the copper column; coating a film to form a shielding layer, wherein the shielding layer covers the packaging layer in a first direction and a second direction; covering the copper pillars in a first direction and covering the substrate in a second direction; the first direction is parallel to the first surface and the second direction is perpendicular to the first surface. The invention adopts the copper column to manufacture the electromagnetic interference shielding structure, reduces the production cost, and can enhance the electromagnetic interference shielding effect through the high conductivity of the copper column.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a semiconductor shielding structure and a manufacturing method thereof.
Background
In recent years, as the complexity of electronic systems or devices has grown, electromagnetic interference (EMI) has become an unavoidable primary problem for electronic engineers, facing various EMI modes and various EMI problems. When the electronic equipment works, the electronic equipment is not expected to be interfered by external electromagnetic waves, and the electronic equipment is not expected to radiate electromagnetic waves to interfere with the external equipment, so that the propagation path of the electromagnetic waves is required to be blocked through electromagnetic shielding.
Disclosure of Invention
The invention aims to provide an electromagnetic interference shielding structure and a manufacturing method thereof, which are used for better realizing the electromagnetic interference shielding effect.
In order to achieve the above-described effects, the present invention provides an electromagnetic interference shielding structure including:
a substrate having a first surface.
And the copper column is arranged on the first surface of the substrate.
And the chips are arranged on the first surface of the substrate and are distributed on two sides of the copper column.
And the packaging layer is arranged on the first surface, the packaging layer covers the chip, and the thickness of the packaging layer is smaller than or equal to the height of the copper column.
A shielding layer covering the encapsulation layer in a first direction and a second direction; covering the copper pillars in a first direction and covering the substrate in a second direction; the first direction is parallel to the first surface and the second direction is perpendicular to the first surface.
Further, the encapsulation layer is resin.
Further, the solder balls are disposed on a second surface of the substrate, and the second surface is opposite to the first surface.
Further, the copper column and the shielding layer form a shielding space.
Specifically, the invention also provides a manufacturing method of the electromagnetic interference shielding structure, which is characterized by comprising the following steps:
a substrate is provided.
And mounting copper columns on the first surface of the substrate.
And mounting chips on the first surface of the substrate, wherein the chips are respectively arranged on two sides of the copper column.
And performing injection molding to form an encapsulation layer, wherein the encapsulation layer covers the substrate, the copper column and the chip.
And thinning the packaging layer and exposing the copper column.
Coating a film to form a shielding layer, wherein the shielding layer covers the packaging layer in a first direction and a second direction; covering the copper pillars in a first direction and covering the substrate in a second direction; the first direction is parallel to the first surface and the second direction is perpendicular to the first surface.
Further, the copper pillar is attached to the first surface of the substrate by a surface mount technology.
Further, the chip is communicated with the substrate in a flip-chip bonding mode.
Further, after the packaging layer is thinned, before the coating film is performed, the method further comprises: and arranging solder balls on a second surface of the substrate, wherein the second surface is opposite to the first surface.
Further, after the solder balls are arranged, cutting is performed before plating.
Further, the coating adopts a sputtering coating mode.
Compared with the prior art, the invention has at least the following beneficial effects:
the invention adopts the copper column to manufacture the electromagnetic interference shielding structure, reduces the production cost, and can enhance the electromagnetic shielding effect through the high conductivity of the copper column.
Meanwhile, the shielding function of the invention not only realizes the prevention of the interference of the outside on the chip or the interference of the chip itself on other elements, but also reduces the influence of the electromagnetic interference received during the working of the semiconductor structure as much as possible. Meanwhile, mutual shielding among chips is realized, so that the shielding function is more accurate.
Drawings
FIG. 1 is a flowchart of a method for manufacturing an EMI shield according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a sputtering shielding layer and a final effect of an emi shielding structure according to an embodiment of the present invention.
FIG. 3 is a schematic view of a substrate according to an embodiment of the present invention;
FIG. 4 is a schematic view of a copper pillar installed in an embodiment of the present invention;
FIG. 5 is a schematic diagram of a mounting chip according to an embodiment of the present invention;
FIG. 6 is a schematic illustration of an injection molded package in accordance with an embodiment of the present invention;
FIG. 7 is a schematic diagram of a thinned package layer according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a solder ball mounting process according to an embodiment of the invention;
wherein, 11-substrate; 21-copper pillars; 31-chip; 41-an encapsulation layer; 51-tin balls; 61-shielding layer.
Detailed Description
An electromagnetic interference shielding structure and a method of making the same will be described in more detail below with reference to the drawings, in which preferred embodiments of the invention are shown, it being understood that one skilled in the art may modify the invention herein described while still achieving the beneficial effects of the invention. Accordingly, the following description is to be construed as broadly known to those skilled in the art and not as limiting the invention.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
The invention is more particularly described by way of example in the following paragraphs with reference to the drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
Referring to fig. 2, in the present embodiment, an electromagnetic interference shielding structure is provided, which includes:
a substrate 11, said substrate 11 having a first surface. For example, the substrate 11 may be a semiconductor substrate, such as a silicon substrate, or may be a PCB board.
Copper pillars 21, the copper pillars 21 being disposed on the first surface of the substrate 11.
Chips 31, the chips 31 are arranged on both sides of the copper pillar 21.
And the packaging layer 41 is arranged on the first surface, the packaging layer 41 covers the chip 31, and the thickness of the packaging layer 41 is smaller than or equal to the height of the copper column 21.
Specifically, after injection molding, the first encapsulation layer 41 is formed, and the encapsulation layer 41 mainly plays a role in protection. In general, the material of the encapsulation layer 41 may be a polymer, an epoxy, or a resin, but is not limited thereto. The encapsulation layer 41 in this embodiment is made of resin.
Further, the solder balls 51 are disposed on a second surface of the substrate, and the second surface is opposite to the first surface. The solder balls 51 draw out the internal circuit in the form of ball pins, so that the signal of the chip 31 is drawn out or input through the internal circuit of the substrate 11.
A shielding layer 61 covering the encapsulation layer 41 in the first direction and the second direction; covering the copper pillars 21 in a first direction and the substrate 11 in a second direction; the first direction is parallel to the first surface and the second direction is perpendicular to the first surface. The shielding layer 61 may be made of a metal material, such as copper or aluminum.
Further, the copper pillar 21 and the shielding layer 61 form a shielding space. As shown in fig. 2, a case of including two shielding spaces is schematically illustrated, so that signal interference between two adjacent chips 31 can be effectively avoided.
In addition, the invention also provides a manufacturing method of the electromagnetic interference shielding structure, which comprises the following steps:
s1, providing a substrate 11.
S2, mounting copper columns on the first surface of the substrate.
S3, mounting chips on the first surface of the substrate, wherein the chips are respectively arranged on two sides of the copper column.
S4, injection molding is carried out to form an encapsulation layer, and the encapsulation layer covers the substrate, the copper column and the chip.
S5, thinning the packaging layer and exposing the copper column.
S6, coating a film to form a shielding layer, wherein the shielding layer covers the packaging layer in a first direction and a second direction; covering the copper pillars in a first direction and covering the substrate in a second direction; the first direction is parallel to the first surface and the second direction is perpendicular to the first surface.
For step S1, in a specific embodiment, referring to fig. 3, the substrate 11 may be a monocrystalline silicon substrate, a polycrystalline silicon substrate or an SOI substrate, and in addition, a conductive layer may be further disposed in the substrate 11, and a buried layer, an ion implantation layer, and the like may be further disposed according to actual needs. According to different actual requirements, a PCB (printed Circuit Board) and the like can be selected.
For step S2, please refer to fig. 4, copper pillars 21 are mounted on the first surface of the substrate 11. Specifically, the copper pillar 21 is attached to the first surface of the substrate 11 by SMT (surface mount technology). Those skilled in the art can also select other suitable processes to mount the copper pillars according to practical situations.
For step S3, chips 31 are mounted on the first surface of the substrate 11, and as shown in fig. 5, the chips 31 are arranged on both sides of the copper pillar 21.
In a specific embodiment, with continued reference to fig. 5, the chip 31 is connected to the substrate 11 by bonding, which may be chip attach, wire bonding or flip chip bonding. In this embodiment, the chip 31 is connected by flip-chip bonding.
For step S4, please refer to fig. 6, an encapsulation layer 41 is formed by injection molding, and the encapsulation layer 41 covers the substrate 11, the copper pillars 21 and the chip 31.
For step S5, the encapsulation layer 41 is thinned, and the copper pillars 21 are exposed.
Specifically, referring to fig. 7, the encapsulation layer 41 is thinned, and the thinning may be cutting or grinding. In this embodiment, polishing is used, and the copper pillar 21 may be exposed on a surface parallel to the first surface of the substrate 11 by polishing. Alternatively, after thinning, the thickness of the encapsulation layer 41 may be less than or equal to the height of the copper pillar 21.
Thereafter, step S51 may be performed, referring to fig. 8, where solder balls 51 are disposed on a second surface of the substrate 11, where the second surface is opposite to the first surface. Further, the solder balls 51 are soldered to the second surface of the substrate 11.
Thereafter, step S52 may be performed to perform dicing (not shown); this step can be performed using prior art techniques, mainly cutting the mass-produced product into individual modules.
Then, step S6 is performed, and after cutting, a coating film is formed to form a shielding layer 61, wherein the shielding layer 61 covers the encapsulation layer 41 in the first direction and the second direction; covering the copper pillars 21 in a first direction and the substrate 11 in a second direction; the first direction is parallel to the first surface and the second direction is perpendicular to the first surface.
Specifically, the plating mode may be an evaporation type or a sputtering type. The encapsulation layer 61 is formed by sputtering in this embodiment. In this embodiment, the plating film adopts a sputtering plating method.
The final electromagnetic interference shielding structure formed by the above method is shown in fig. 1, and the specific structure is described above, and will not be repeated here.
In summary, in the electromagnetic interference shielding structure and the manufacturing method provided in the embodiment, the copper pillar is used to realize shielding of electromagnetic interference, so that not only is the budget reduced in cost, but also the electromagnetic interference shielding effect is more perfect in performance due to the high conductivity of the copper pillar.
Meanwhile, the two shielding spaces formed by the copper columns and the shielding layers not only realize the blocking of external electromagnetic interference and the prevention of interference of chips on other elements, but also realize the electromagnetic shielding between the two chips. Plays a role in realizing functions of the whole semiconductor to a certain extent.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (10)
1. An electromagnetic interference shielding structure, comprising:
a substrate having a first surface;
the copper column is arranged on the first surface of the substrate;
the chips are arranged on the first surface of the substrate and are respectively arranged on two sides of the copper column;
the packaging layer is arranged on the first surface of the substrate, the packaging layer covers the chip, and the thickness of the packaging layer is larger than or equal to the height of the copper column;
a shielding layer covering the encapsulation layer in a first direction and a second direction; covering the copper pillars in a first direction and covering the substrate in a second direction; the first direction is parallel to the first surface and the second direction is perpendicular to the first surface.
2. The electromagnetic interference shielding structure of claim 1, wherein the encapsulation layer is a resin.
3. The electromagnetic interference shielding structure of claim 1, further comprising solder balls disposed on a second surface of the substrate, the second surface being opposite the first surface.
4. The electromagnetic interference shielding structure of claim 1, wherein the copper pillar and the shielding layer form a shielding space.
5. The manufacturing method of the electromagnetic interference shielding structure is characterized by comprising the following steps:
providing a substrate;
mounting copper columns on the first surface of the substrate;
mounting chips on the first surface of the substrate, wherein the chips are respectively arranged on two sides of the copper column;
injection molding is carried out to form an encapsulation layer, and the encapsulation layer covers the substrate, the copper column and the chip;
thinning the packaging layer and exposing the copper column;
coating a film to form a shielding layer, wherein the shielding layer covers the packaging layer in a first direction and a second direction; covering the copper pillars in a first direction and covering the substrate in a second direction; the first direction is parallel to the first surface and the second direction is perpendicular to the first surface.
6. The method of claim 5, wherein the copper pillar is attached to the first surface of the substrate using a surface mount technology.
7. The method of claim 5, wherein the chip is connected to the substrate by flip-chip bonding.
8. The method of claim 5, further comprising, after thinning the encapsulation layer and before coating: and arranging solder balls on a second surface of the substrate, wherein the second surface is opposite to the first surface.
9. The method of claim 8, wherein after the solder balls are disposed, dicing is performed before plating.
10. The method of claim 5, wherein the plating film is a sputter plating film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310584470.6A CN116544217A (en) | 2023-05-22 | 2023-05-22 | Electromagnetic interference shielding structure and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310584470.6A CN116544217A (en) | 2023-05-22 | 2023-05-22 | Electromagnetic interference shielding structure and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116544217A true CN116544217A (en) | 2023-08-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310584470.6A Pending CN116544217A (en) | 2023-05-22 | 2023-05-22 | Electromagnetic interference shielding structure and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116544217A (en) |
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2023
- 2023-05-22 CN CN202310584470.6A patent/CN116544217A/en active Pending
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