CN116504743A - Packaging substrate and its manufacturing method - Google Patents

Abstract

A packaging substrate and its manufacturing method, including embedding the circuit layer and the alignment part in an insulating layer, and then forming a blind hole in the insulating layer corresponding to the alignment part, so as to form a conductor in the blind hole , so the blind hole can be formed at a predetermined position through the design of the alignment portion.

Description

Packaging substrate and its manufacturing method

technical field

The invention relates to a semiconductor packaging technology, in particular to a packaging substrate with embedded traces and a manufacturing method thereof.

Background technique

With the vigorous development of the electronic industry, electronic products tend to be thinner and smaller in form, and are developing toward high-performance, high-function, and high-speed research and development in terms of function. Therefore, in order to meet the requirements of high integration and miniaturization of semiconductor devices, packaging substrates with high-density and fine-pitch circuits are often used in the packaging process.

As shown in FIG. 1 , an existing packaging substrate 1 includes a core layer 10 having a plurality of conductive pillars 100, a plurality of dielectric layers 11 respectively disposed on opposite sides of the core layer 10, and a plurality of dielectric layers 11 disposed on each of the dielectric layers. 11, so as to electrically connect the circuit layers 12 on opposite sides of the core layer 10 through the plurality of conductive pillars 100, wherein the circuit layer 12 is electrically connected to the core layer 12 through the conductor 120. Conductive column 100.

However, in the existing packaging substrate 1, the electrical conductor 120 is formed prior to forming a blind hole on the dielectric layer 11 by means of laser, machine drilling or etching, and then fills the blind hole with conductive material, so the formation During the process of the blind hole, the position is often misaligned due to working errors, resulting in that the blind hole cannot be aligned with the conductive pillar 100, so that the conductor 120 cannot be effectively connected to the conductive pillar 100, resulting in poor electrical connection of the packaging substrate 1 The problem.

Therefore, how to overcome the various problems of the above-mentioned prior art has become an urgent problem to be solved at present.

Contents of the invention

In view of the various deficiencies in the above-mentioned prior art, the present invention provides a packaging substrate and a manufacturing method thereof, which can at least partly solve the above-mentioned various problems in the prior art.

The packaging substrate of the present invention includes: an insulating layer having opposite two sides, and a blind hole is formed in at least one side of the insulating layer; a circuit layer embedded in the insulating layer and exposed on the opposite side of the insulating layer the surface of at least one of the two sides; the counter part, which is embedded in the insulating layer and exposed to the surface of at least one of the opposite sides of the insulating layer, so as to correspond to the blind hole in the insulating layer; and A conductor is formed in the blind hole.

The present invention also provides a method for manufacturing a packaging substrate, including: providing an insulating layer with opposite two sides; pressing the circuit layer and the alignment part into at least one of the opposite two sides of the insulating layer, so that the circuit layer and the The alignment portion is embedded in the insulating layer; a blind hole is formed at least one of opposite sides of the insulating layer corresponding to the alignment portion; and a conductor is formed in the blind hole.

In the aforementioned packaging substrate and its manufacturing method, the alignment portion is a ring body.

In the aforementioned packaging substrate and its manufacturing method, the insulating layer is formed on two opposite surfaces of a core layer, so that the conductors are formed on both opposite surfaces of the core layer, and the core layer has conductive pillars, so as to The conductors on the opposite surfaces of the core layer are electrically connected to the conductive pillars.

In the aforementioned packaging substrate and its manufacturing method, the alignment portions are respectively formed on opposite sides of the insulating layer, so that the blind holes are formed at positions corresponding to the alignment portions, so that the opposite sides of the insulating layer The blind holes communicate with each other. For example, interconnected conductive columns are formed in the blind holes on opposite sides of the insulating layer as the conductors.

In the aforementioned packaging substrate and its manufacturing method, it also includes providing a core layer with conductive pillars and a build-up structure combined on opposite sides of the core layer, so that the insulating layer is formed on at least one of the build-up structures, so that The conductor is disposed on the build-up structure, and the build-up structure has a wiring layer electrically connecting the conductive column and the conductor

It can be seen from the above that in the packaging substrate and its manufacturing method of the present invention, the design of the alignment part is mainly used, so that in the process of forming the blind hole, only the alignment part is needed to perform the hole forming operation to avoid Therefore, compared with the prior art, the blind vias of the present invention can effectively align the conductive pillars in the core layer, so that the conductors can be effectively connected to the conductive pillars, thus avoiding the electric shock of the package substrate. Problems with poor sexual connection.

Description of drawings

FIG. 1 is a schematic cross-sectional view of a conventional packaging substrate.

2A to 2F are schematic cross-sectional views of the first embodiment of the manufacturing method of the packaging substrate of the present invention.

3A to 3D are schematic cross-sectional views of a second embodiment of the manufacturing method of the packaging substrate of the present invention.

4A to 4F are schematic cross-sectional views of a third embodiment of the manufacturing method of the packaging substrate of the present invention.

Wherein, the reference signs are explained as follows:

1, 2, 3, 4: Package substrate

10, 23: core layer

100, 230: conductive column

11: Dielectric layer

12, 21: Line layer

120, 25, 35, 45: Conductor

20: Carrier

200: metal layer

21a, 22a, 23a, 23b, 24a, 34a: surface

22: Counterpoint

231: insulating filler

232: inner line

24, 34: insulating layer

240, 440: blind hole

25a: metal material

340: Through hole

341: First blind hole

342: Second blind hole

35a: the first conductive column

35b: the second conductive column

4a: Substrate body

40: Build-up structure

400: Dielectric

401: wiring layer

41: hard layer

45a: Seed layer

S: interface.

Detailed ways

The implementation of the present invention will be described below with reference to specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

It should be noted that the structures, proportions, sizes, etc. shown in the drawings attached to this specification are only used to match the content disclosed in the specification, for the understanding and reading of those familiar with this technology, and are not used to limit the implementation of the present invention Therefore, it has no technical substantive meaning. Any modification of structure, change of proportional relationship or adjustment of size shall still fall within the scope of this invention without affecting the effect and purpose of the present invention. The technical content disclosed by the invention must be within the scope covered. At the same time, terms such as "above", "first", "second" and "one" quoted in this specification are only for the convenience of description and are not used to limit the scope of the present invention. The change or adjustment of the relative relationship shall also be regarded as the implementable scope of the present invention without substantive change of the technical content.

2A to 2F are schematic cross-sectional views of the first embodiment of the manufacturing method of the packaging substrate 2 of the present invention. In this embodiment, the package substrate 2 has a core layer.

As shown in FIG. 2A , a circuit layer 21 and an alignment portion 22 are formed on a carrier 20 .

In this embodiment, the carrier 20 has a metal layer 200 to form a carrier structure such as a copper foil substrate. For example, the circuit layer 21 and the alignment portion 22 can be formed by electroplating copper through the metal layer 200 , and the alignment portion 22 is a metal ring.

As shown in FIG. 2B, an insulating layer 24 with opposite two sides is respectively formed on the opposite two surfaces 23a, 23b of an insulating core layer 23, so that one side of the insulating layer 24 is bonded to the core layer. 23 on. Then, the carrier 20 , the circuit layer 21 thereon and the alignment portion 22 are combined on the other side of the insulating layer 24 .

In this embodiment, at least one conductive pillar 230 is formed in the core layer 23 , and an inner circuit 232 electrically connected to the conductive pillar 230 can be formed on the core layer 23 as required. For example, the conductive column 230 can be a hollow copper column filled with an insulating filling material 231 . It should be understood that the conductive pillar 230 can also be a solid copper pillar without filling the insulating filling material 231 .

Furthermore, the insulating layer 24 is made of a dielectric material such as prepreg (PP for short) or other suitable materials.

In addition, the two supporting parts 20 press the circuit layer 21 and the alignment portion 22 into the other side of the insulating layer 24 by pressing, so that the circuit layer 21 and the alignment portion 22 are embedded in the insulating layer 24. Insulation layer 24.

As shown in FIG. 2C , the carrier 20 is removed by stripping or etching, while the metal layer 200 remains.

As shown in FIG. 2D , a blind hole 240 is formed at the position of the insulating layer 24 corresponding to the alignment portion 22 , so that the conductive post 230 is exposed to the blind hole 240 .

In this embodiment, the blind hole 240 is formed by laser. For example, the laser is aimed at the center of the ring of the aligning portion 22 to burn the insulating layer 24 in the ring until the end surface of the conductive post 230 is exposed.

As shown in FIG. 2E , a metal material 25 a is formed on the insulating layer 24 , and the metal material 25 a is filled into the blind hole 240 to contact the conductive pillar 230 .

In this embodiment, the metal material 25 a can be formed by electroplating copper material through the metal layer 200 .

As shown in FIG. 2F , the metal material 25 a on the insulating layer 24 and the metal layer 200 are removed, and only the metal material 25 a in the blind hole 240 is reserved as the conductor 25 .

In this embodiment, the wiring layer 21 and the alignment portion 22 are exposed on the surface 24 a of the insulating layer 24 . For example, the surface 21 a of the circuit layer 21 is flush with (or slightly lower than) the surface 24 a of the insulating layer 24 with the surface 22 a of the alignment portion 22 .

Furthermore, the conductive body 25 is tapered and connected to the conductive post 230 with a narrower end surface, and the conductive body 25 is exposed on the surface 24 a of the insulating layer 24 . For example, the wider end surface of the conductor 25 is flush with (or slightly lower than) the surface 24 a of the insulating layer 24 .

Therefore, in the package substrate 2 of the present invention, by pressing the alignment portion 22 into the insulating layer 24, in the process of forming the blind hole 240, only the laser is aimed at the alignment portion 22 to accurately The blind hole 240 is formed at a predetermined position, thereby avoiding the misalignment problem caused by working errors. Therefore, compared with the prior art, the blind hole 240 of the present invention can effectively align the conductive pillar 230, so that each conductor 25 can effectively connect the conductive pillars 230 , thus avoiding the problem of poor electrical connection of the package substrate 2 .

3A to 3D are schematic cross-sectional views of a second embodiment of the manufacturing method of the packaging substrate 3 of the present invention. The difference between this embodiment and the first embodiment lies in that the packaging substrate 3 is coreless, so the similarities will not be repeated below.

As shown in FIG. 3A, an insulating layer 34 is provided having opposite sides. Then, the two carriers 20 , the circuit layer 21 thereon and the alignment portion 22 are combined on opposite sides of the insulating layer 34 .

In this embodiment, the insulating layer 34 is made of prepreg (PP) or other suitable dielectric materials.

Moreover, these bearing members 20 all press the circuit layer 21 and the alignment portion 22 into the opposite sides of the insulating layer 34 by pressing, so that the circuit layer 21 and the alignment portion 22 are embedded in In the insulating layer 34 .

As shown in FIG. 3B , after the carrier 20 is removed and the metal layer 200 remains, a first blind hole 341 and a second blind hole 342 are formed at the position of the insulating layer 34 corresponding to the alignment portion 22, so that the The first blind hole 341 communicates with the second blind hole 342 to form a through hole 340 penetrating through the insulating layer 34 .

In this embodiment, the first blind hole 341 and the second blind hole 342 are formed by laser. For example, the laser is aimed at the ring of the aligning portion 22 to burn the insulating layer 34 in the ring until the first blind hole 341 communicates with the second blind hole 342 .

As shown in FIG. 3C, a metal material 25a is formed on the insulating layer 34, and the metal material 25a is filled in the first blind hole 341 and the second blind hole 342 to serve as the first conductive column 35a and the second conductive column. Column 35b.

In this embodiment, the metal material 25 a can be formed by electroplating copper material through the metal layer 200 , and the first conductive pillar 35 a is connected to the second conductive pillar 35 b.

As shown in FIG. 3D, the metal material 25a and the metal layer 200 on the insulating layer 34 are removed, and only the metal material 25a in the through hole 340 (ie, the first conductive pillar 35a and the second conductive pillar 35b) remains, Provided as the columnar conductor 35 .

In this embodiment, both the first conductive pillar 35 a and the second conductive pillar 35 b are tapered, and the two are connected by their narrower end surfaces, as shown in the interface S shown in FIG. 3D .

Furthermore, the first conductive pillar 35 a and the second conductive pillar 35 b are exposed on the surface 34 a of the insulating layer 34 . For example, the wider end surface of the first conductive pillar 35 a is flush with (or slightly lower than) the surface 34 a of the insulating layer 34 with the wider end surface of the second conductive pillar 35 b.

In addition, the circuit layer 21 and the alignment portion 22 are exposed on the surface 34 a of the insulating layer 34 . For example, the surface 21 a of the wiring layer 21 is flush with (or slightly lower than) the surface 34 a of the insulating layer 34 with the surface 22 a of the alignment portion 22 .

In other embodiments, a circuit build-up structure (not shown) may be formed on the insulating layer 34 so that the circuit build-up structure is electrically connected to the conductor 35 and the circuit layer 21 .

Therefore, the packaging substrate 3 of the present invention only needs to align the laser light during the process of forming the first blind hole 341 and the second blind hole 342 by pressing the alignment portion 22 into the insulating layer 34. The alignment part 22 can accurately form the first blind hole 341 and the second blind hole 342 at predetermined positions, thereby avoiding the problem of misalignment caused by working errors. Therefore, the packaging substrate 3 of the present invention is applied to When there is no core layer (coreless), the first blind hole 341 and the second blind hole 342 can also be effectively aligned with each other, so that the first conductive pillar 35a and the second conductive pillar 35b can still be effectively butted, thus avoiding The electrical connection of the packaging substrate 3 is poor.

4A to 4F are schematic cross-sectional views of a third embodiment of the manufacturing method of the packaging substrate 4 of the present invention. In this embodiment, the packaging substrate 4 has a core layer (core) and a build-up layer structure.

As shown in FIG. 4A , a substrate body 4 a is provided, which has the core layer 23 and build-up structures 40 disposed on opposite sides of the core layer 23 .

In this embodiment, a plurality of conductive pillars 230 are formed in the core layer 23 , and an inner circuit 232 electrically connected to the conductive pillars 230 can be formed on the core layer 23 as required. For example, the conductive column 230 can be a hollow copper column filled with an insulating filling material 231 . It should be understood that the conductive pillar 230 can also be a solid copper pillar without filling the insulating filling material 231 .

Furthermore, the build-up structure 40 has a dielectric body 400 composed of a plurality of dielectric layers and a wiring layer 401 formed on each of the dielectric layers.

As shown in FIG. 4B , the carrier 20 is provided, on which the circuit layer 21 and the alignment portion 22 are formed.

In this embodiment, the carrier 20 has a metal layer 200 to form a carrier structure such as a copper foil substrate.

As shown in FIG. 4C, the carrier 20 is combined on one of the build-up structures 40 of the core layer 23 through the insulating layer 24, so that the circuit layer 21 on the carrier 20 and the alignment part 22 embedded in the insulating layer 24 . Then, the carrier 20 is removed by stripping or etching, while the metal layer 200 remains.

In this embodiment, the carrier 20 is bonded to the core layer 23 by pressing. For example, another build-up structure 40 of the core layer 23 is combined with another insulating layer 24 through a hard layer 41 such as a metal material. It should be understood that another carrier 20 having a circuit layer 21 and the alignment portion 22 may also be combined with another build-up structure 40 of the core layer 23 .

As shown in FIG. 4D , a blind hole 240 is formed at the position of the insulating layers 24 corresponding to the alignment portion 22 , so that part of the surface of the wiring layer 401 of the build-up structure 40 is exposed to the blind hole 240 . Afterwards, the carrier 20 is removed.

In this embodiment, the blind hole 240 is formed by laser. For example, the laser is aimed at the ring of the aligning portion 22 to burn the insulating layer 24 inside the ring until a part of the surface of the wiring layer 401 is exposed.

Furthermore, a blind hole 440 may also be formed on the hard layer 41 and another build-up structure 40 of the core layer 23 by means of a laser, so that part of the surface of the wiring layer 401 of the build-up structure 40 is exposed to the Blind hole 440 .

As shown in FIG. 4E, a patterning process is performed to form a seed layer 45a on the metal layer 200 and the hard layer 41 on the insulating layer 24 and in the blind hole 240, and then form a seed layer 45a by electroplating. The metal material 25a is filled into the blind hole 240 . Next, the metal material 25a and the seed layer 45a on the metal layer 200 and the hard layer 41 are removed, and only the metal material 25a and the seed layer 45a at the blind hole 240 remain. Afterwards, the exposed metal layer 200 and the hard layer 41 are removed by etching to form a patterned circuit for serving as the conductor 45 .

In this embodiment, more circuit layers 21 can be formed on the build-up structure 40 by lamination, as shown in FIG. 4F .

Therefore, in the package substrate 4 of the present invention, by pressing the alignment portion 22 into the insulating layer 24, in the process of forming the blind hole 240, only the laser is aimed at the alignment portion 22 to accurately The blind hole 240 is formed at a predetermined position, thereby avoiding the misalignment problem caused by working errors, so the blind hole 240 of the present invention can be effectively formed at a predetermined position, so that each conductor 25 can be effectively connected to the wiring layer 401 , thus avoiding the problem of poor electrical connection of the packaging substrate 4 .

The present invention provides a package substrate 2, 3, 4, comprising: an insulating layer 24, 34 with opposite sides, a circuit layer 21 embedded in the insulating layer 24, 34, at least one layer embedded in the insulating layer The alignment portion 22 in the layer 24, 34, and at least one pair of conductors 25, 35, 45 embedded in the insulating layer 24, 34 corresponding to the alignment portion 22.

The circuit layer 21 is exposed on at least one surface 24a, 34a of the two opposite sides of the insulation layer 24, 34.

The alignment portion 22 is exposed on at least one surface 24a, 34a of the opposite sides of the insulating layer 24, 34, so as to form a blind hole 240 ( The first blind hole 341 and the second blind hole 342).

The conductors 25, 35, 45 are formed in the blind hole 240 (the first blind hole 341 and the second blind hole 342).

In one embodiment, the package substrate 2 further includes a core layer 23, so that the insulating layer 24 is formed on the two opposite surfaces 23a, 23b of the core layer 23, so that the two opposite surfaces 23a of the core layer 23 , 23b are equipped with the conductor 25, and the core layer 23 has a conductive pillar 230, so that the conductor 25 on the opposite surfaces 23a, 23b of the core layer 23 is electrically connected to the conductive pillar 230.

In one embodiment, the alignment portions 22 are respectively formed on opposite sides of the insulating layer 34, so that the first blind hole 341 and the second blind hole 342 are formed at positions corresponding to the alignment portions 22, so that The first blind hole 341 and the second blind hole 342 on opposite sides of the insulating layer 34 communicate with each other. For example, a first conductive post 35 a and a second conductive post 35 b connected to each other are formed in the first blind hole 341 and the second blind hole 342 on opposite sides of the insulating layer 34 as the conductor 35 .

In one embodiment, the packaging substrate 4 further includes a core layer 23 and build-up structures 40 bonded to opposite sides of the core layer 23, so that the insulating layer 24 is formed on at least one of the build-up structures 40 , so that the conductor 45 is disposed on the build-up structure 40 , and the core layer 23 has a conductive column 230 , and the build-up structure 40 has a wiring layer 401 electrically connecting the conductive column 230 and the conductor 45 .

To sum up, the packaging substrate and its manufacturing method of the present invention, by virtue of the design of the alignment part, in the process of forming the blind hole, only need to align the alignment part to perform the hole forming operation, which can avoid work Therefore, the packaging substrate of the present invention can ensure normal electrical connection.

The above-mentioned embodiments are only used to illustrate the principles and effects of the present invention, but not to limit the present invention. Anyone skilled in the art can modify the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be listed in the claims.

Claims (12)

1. A package substrate, comprising:

an insulating layer having opposite sides, and having blind holes formed in at least one side thereof;

the circuit layer is embedded in the insulating layer and is exposed on the surface of at least one of the two opposite sides of the insulating layer;

the alignment part is embedded in the insulating layer and exposed out of the surface of at least one of the two opposite sides of the insulating layer so as to correspond to the blind hole in the insulating layer; and

and an electrical conductor formed in the blind hole.

2. The package substrate of claim 1, wherein the alignment portion is a ring.

3. The package substrate of claim 1, further comprising a core layer formed on opposite surfaces of the core layer such that the conductors are disposed on opposite surfaces of the core layer, and wherein the core layer has conductive pillars therein such that the conductors on opposite surfaces of the core layer are electrically connected to the conductive pillars.

4. The package substrate of claim 1, wherein the alignment portion and the blind hole corresponding to the alignment portion are formed on opposite sides of the insulating layer, respectively, so that the blind holes on opposite sides of the insulating layer are in communication with each other.

5. The package substrate of claim 4, wherein conductive pillars are formed in the blind via holes on opposite sides of the insulating layer to serve as the conductors.

6. The package substrate of claim 1, further comprising a core layer having conductive pillars and build-up structures bonded to opposite sides of the core layer, such that the insulating layer is formed on at least one of the build-up structures, the build-up structures having the conductive body disposed thereon, and the build-up structures having wiring layers electrically connecting the conductive pillars and the conductive body.

7. A method of fabricating a package substrate, comprising:

providing an insulating layer with two opposite sides;

pressing the circuit layer and the alignment part into at least one of two opposite sides of the insulating layer, so that the circuit layer and the alignment part are embedded in the insulating layer;

forming a blind hole on at least one of two opposite sides of the insulating layer corresponding to the alignment part; and

and forming a conductor in the blind hole.

8. The method of claim 7, wherein the alignment portion is a ring.

9. The method of claim 7, wherein the insulating layer is formed on two opposite surfaces of a core layer to form the conductive body on two opposite surfaces of the core layer, and the core layer has conductive posts therein to electrically connect the conductive bodies on two opposite surfaces of the core layer to the conductive posts.

10. The method of claim 7, wherein the alignment portions are formed on opposite sides of the insulating layer, respectively, so that the blind holes are formed at positions corresponding to the alignment portions, so that the blind holes on opposite sides of the insulating layer are communicated with each other.

11. The method of claim 10, wherein conductive pillars are formed in the blind holes on opposite sides of the insulating layer to serve as the conductors.

12. The method of claim 7 further comprising providing a core layer having conductive pillars and build-up structures bonded to opposite sides of the core layer such that the insulating layer is formed on at least one of the build-up structures with the conductive body disposed thereon, and the build-up structure has a wiring layer electrically connecting the conductive pillars and the conductive body.