CN116454848A - High-voltage switch power tube current-limiting protection circuit, PCB and controller thereof - Google Patents

Abstract

The invention discloses a high-voltage switching power tube current-limiting protection circuit, a PCB and a controller thereof, wherein the current-limiting protection circuit comprises a target switching power tube NM0, an external input power supply, an enabling input end, a sampling unit, a first switching unit, a second switching unit, a voltage comparison unit and a reference voltage generation unit. According to the invention, the sampling unit, the first switch unit and the second switch unit are matched for use, so that the current-limiting protection circuit is switched between a function off state and a function on state; the whole circuit structure does not need to additionally increase a reference voltage module, can realize voltage comparison even under a high-voltage condition, and can directly convert a comparison result into a low-voltage logic signal; the source current comparator has the characteristics of high bandwidth and high response speed.

Description

A high-voltage switching power tube current limiting protection circuit, PCB board and its controller

technical field

The invention relates to the field of electronic circuits, in particular to a high-voltage switching power tube current limiting protection circuit, a PCB board and a controller thereof.

Background technique

The overcurrent detection structure of the existing high-voltage switching power tube needs to be detected by the high-voltage reference voltage module, which is used to generate logic high and low signals through the high-voltage reference voltage module, and is used to compare with the reference voltage through an additional level conversion module to determine whether an overcurrent has occurred.

The existing detection structure has defects such as low bandwidth and slow response speed, and requires a large power consumption to reduce the response time.

Contents of the invention

Purpose of the invention: In view of the above problems, the purpose of the present invention is to provide a high-voltage switching power tube current-limiting protection circuit, a PCB board and a controller thereof, based on a source current comparator to compare the drain-source voltage of the high-voltage switching power tube, even in Voltage comparison can also be realized under high-voltage application conditions, and the comparison result can be directly converted into a level logic signal, which has the characteristics of high bandwidth and fast response speed.

Technical solution: One aspect of the present invention provides a high-voltage switching power tube current-limiting protection circuit, including a target switching power tube NM0, an external input power supply, an enabling input terminal, a sampling unit, a first switching unit, a second switching unit, a voltage comparison unit and a reference voltage generation unit;

The external input power supply is respectively connected to the drain of the target switching power transistor NM0, the sampling unit, the first switching unit, the second switching unit and the reference voltage generating unit, and the target switching power The source of the transistor NM0 is connected to the sampling unit, the enable input terminal is respectively connected to the sampling unit, the first switch unit and the second switch unit, and the voltage comparison unit includes a first voltage input terminal, a second voltage input terminal and an enable terminal, the first switch unit is connected to the sampling unit and the first voltage input terminal respectively, the second switch unit is connected to the enable terminal, and the The reference voltage generating unit is connected to the second voltage input terminal;

The enabling input terminal is used to send switching signals to the sampling unit, the first switching unit and the second switching unit; the sampling unit is used to collect the drain-source voltage of the target switching power transistor NM0; The first switch unit is used to send a first comparison voltage to the first voltage input terminal according to the drain-source voltage of the target switching power transistor NM0; the second switch unit is used to send a switch voltage to the voltage comparison unit. signal; the reference voltage generation unit is used to send a second comparison voltage to the second voltage input terminal; the voltage comparison unit is used to output high and low logic level signals according to the comparison result between the first comparison voltage and the second comparison voltage .

Further, the sampling unit includes a first P-type field effect transistor PM1 and a first resistor R1, the gate of the first P-type field effect transistor PM1 is connected to the enabling input end, and the first P-type field effect transistor PM1 The drain of the field effect transistor PM1 is connected to the source of the target switching power transistor NM0, the source of the first P-type field effect transistor PM1 is connected to one end of the first resistor R1, and the first resistor R1 The other end is connected to the external input power supply.

Further, the first switch unit includes a first N-type field effect transistor NM1 and a second resistor R2, the gate of the first N-type field effect transistor NM1 is connected to the enable input terminal, and the first The drain of the N-type field effect transistor NM1 is connected to the external input power supply, the source of the first N-type field effect transistor NM1 is respectively connected to one end of the second resistor R2 and the first voltage input end, The other end of the second resistor R2 is connected to the source of the first P-type field effect transistor PM1.

Further, the second switch unit includes a second N-type field effect transistor NM2, the gate of the second N-type field effect transistor NM2 is connected to the enable input terminal, and the second N-type field effect transistor The drain of NM2 is connected to the external input power supply, and the source of the second N-type field effect transistor NM2 is connected to the enabling terminal.

Further, the voltage comparison unit includes a differential comparison part, a bias current generation circuit, a third resistor R3 and a fourth resistor R4, and the differential comparison part is respectively connected to the source of the first N-type field effect transistor NM1, The source of the second N-type field effect transistor NM2, the bias current generating circuit is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is respectively connected to the reference voltage generating unit and One end of the third resistor R3 is connected, and the other end of the third resistor R3 is connected to the external input power supply.

Further, the differential comparison part includes a second P-type field effect transistor PM2, a third P-type field effect transistor PM3, a fourth P-type field effect transistor PM4, and a fifth P-type field effect transistor PM5, and the second P-type field effect transistor PM5 The source of the first N-type field effect transistor PM2 is connected to the source of the first N-type field effect transistor NM1, and the source of the fourth P-type field effect transistor PM4 is connected to one end of the fourth resistor R4. The gate of the second P-type field effect transistor PM2 and the gate of the fourth P-type field effect transistor PM4 are respectively connected to the source of the second N-type field effect transistor NM2. The drain of the tube PM2 is respectively connected to the gate of the second P-type field effect transistor PM2 and the source of the third P-type field effect transistor PM3, and the source of the fifth P-type field effect transistor PM5 is connected to the source of the fifth P-type field effect transistor PM5. The drain of the fourth P-type field effect transistor PM4 is connected, and the gate of the third P-type field effect transistor PM3 is connected to the drain of the third P-type field effect transistor PM3 and the fifth P-type field effect transistor PM3 respectively. The gate connection of the field effect transistor PM5;

The bias current generating circuit includes a current source and a first current mirror circuit, and the current source is respectively connected to the drain of the third P-type field effect transistor PM3 and the fifth P-type field effect transistor through the first current mirror circuit. The drain of the effect transistor PM5 is connected; the drain of the fifth P-type field effect transistor PM5 is used to output high and low logic level signals according to the comparison result of the first comparison voltage and the second comparison voltage.

Further, the reference voltage generation unit includes a voltage-controlled current source and a second current mirror loop, the voltage-controlled current source is connected to the external input power supply, and the voltage-controlled current source is connected to the second current mirror loop through the second current mirror loop. The connection between the third resistor R3 and the fourth resistor R4 is connected.

Further, the second current mirror loop includes a ninth N-type field effect transistor NM9, a tenth N-type field effect transistor NM10, an eleventh N-type field effect transistor NM11, and a twelfth N-type field effect transistor NM12, so The drain of the ninth N-type field effect transistor NM9 is connected to the connection between the third resistor R3 and the fourth resistor R4, and the source of the ninth N-type field effect transistor NM9 is connected to the first The drain of the tenth N-type field effect transistor NM10 is connected, and the drain of the eleventh N-type field effect transistor NM11 is respectively connected to the gate of the voltage-controlled current source, the eleventh N-type field effect transistor NM11 and The gate of the ninth N-type field effect transistor NM9 is connected, the source of the eleventh N-type field effect transistor NM11 is respectively connected to the drain of the twelfth N-type field effect transistor NM12, the tenth The gate of the second N-type field effect transistor NM12 is connected to the gate of the tenth N-type field effect transistor NM10, and the source of the tenth N-type field effect transistor NM10 is connected to the twelfth N-type field effect transistor The source of NM12 is grounded.

Another aspect of the present invention provides a PCB board, on which the current-limiting protection circuit of the high-voltage switching power transistor is printed.

Another aspect of the present invention provides a controller, which uses the current-limiting protection circuit of the high-voltage switching power transistor for work control.

Beneficial effect: the present invention compares with prior art, and its remarkable advantage is:

1. The present invention provides a current-limiting protection circuit for high-voltage switching power tubes. The sampling unit, the first switching unit and the second switching unit are used together to make the current-limiting protection circuit between the function-off state and the function-on state. Switching, when entering the detection state of the current limiting protection of the high-voltage switching power tube, the drain-source voltage of the switching power tube NM0 is quickly collected through the sampling unit, and the drain-source voltage is quickly compared with the first switching unit, the voltage comparison unit and the reference voltage generating unit. Comparing, if the drain-source voltage is greater than the preset value, the current limiting protection is triggered, and the voltage comparison unit outputs a logic signal as high, that is, the high-voltage switching power tube enters the current limiting protection state;

2. The entire current-limiting protection circuit does not need to add an additional reference voltage module, and can realize voltage comparison even under high-voltage conditions, and can directly convert the comparison result into a low-voltage logic signal without a level conversion module;

3. The current limiting protection circuit adopts a source-level current comparator, which has the characteristics of high bandwidth and fast response speed.

Description of drawings

Fig. 1 is the circuit block diagram of the current-limiting protection circuit of the high-voltage switch power transistor in embodiment one;

Fig. 2 is a circuit structure diagram of a current-limiting protection circuit for a medium-voltage switching power transistor in Embodiment 1.

Detailed ways

In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments.

Embodiment one

As shown in Figure 1, it is a circuit block diagram of a high-voltage switching power tube current-limiting protection circuit described in this embodiment. The high-voltage switching power tube current-limiting protection circuit includes: a target switching power tube 1, an external input power supply 2, an enabling The input terminal 3 , the sampling unit 4 , the first switch unit 5 , the second switch unit 6 , the voltage comparison unit 7 and the reference voltage generation unit 8 , and the target switching power transistor 1 is the target switching power transistor NM0 . The external input power supply 2 is respectively connected to the drain of the target switching power transistor NM0, the sampling unit 4, the first switching unit 5, the second switching unit 6 and the reference voltage generating unit 8, The source of the target switching power transistor NM0 is connected to the sampling unit 4 , and the enable input terminal 3 is connected to the sampling unit 4 , the first switching unit 5 and the second switching unit 6 respectively. The voltage comparison unit 7 includes a first voltage input terminal, a second voltage input terminal and an enable terminal, the first switch unit 5 is respectively connected to the sampling unit 4 and the first voltage input terminal, and the first The second switch unit 6 is connected to the enabling terminal, and the reference voltage generating unit 8 is connected to the second voltage input terminal. The enabling input terminal 3 is used to send switching signals to the sampling unit 4, the first switching unit 5 and the second switching unit 6; the sampling unit 4 is used to collect the target switching power transistor NM0 the drain-source voltage of the target switching power transistor NM0; the first switch unit 5 is used to send the first comparison voltage to the first voltage input terminal according to the drain-source voltage of the target switching power transistor NM0; the second switch unit 6 is used to Send a switching signal to the voltage comparison unit 7; the reference voltage generation unit 8 is used to send a second comparison voltage to the first voltage input terminal according to an external reference voltage; the voltage comparison unit 7 is used to send a second comparison voltage to the first voltage input terminal according to the first comparison The comparison result of the voltage and the second comparison voltage outputs high and low logic level signals.

In this embodiment, the current-limiting protection circuit of the high-voltage switching power tube is divided into a function-off state and a function-on state when in use, and the specific working principle is as follows:

(1) When entering the function-off state, the sampling unit 4 is turned off by enabling the input terminal 3 to send a low-level signal to the sampling unit 4, the first switching unit 5 and the second switching unit 6, and the first switching unit 5 And the second switch unit 6 is turned on, that is, the sampling unit 4 does not collect the drain-source voltage of the target switching power transistor NM0, and in addition, the enable input terminal 3 sends a closing signal to the voltage comparison unit 7 at the same time, so that the voltage comparison unit 7 outputs an OCP logic signal is low, that is, the current limiting protection function of the high voltage switching power tube is turned off.

(2) When entering the function-on state, the sampling unit 4 is turned on by enabling the input terminal 3 to send a high-level signal to the sampling unit 4, the first switching unit 5 and the second switching unit 6, and the first switching unit 5 and the second switch unit 6 are closed, the second switch unit 6 sends a start signal to the voltage comparison unit 7, and enters the high-voltage switching power tube current-limiting protection detection state; the sampling unit 4 collects the source voltage VCSH of the target switching power tube NM0, and according to The source voltage VCSH and the voltage VCC of the external input power supply 2 obtain the threshold value of the drain-source voltage Vds, and the first switch unit 5 inputs the first comparison voltage to the first voltage input terminal of the voltage comparison unit 7 according to the drain-source voltage Vds, and The reference voltage generating unit 8 generates a second comparison voltage according to the external reference voltage VREF, and inputs the second comparison voltage to the second voltage input terminal of the voltage comparison unit 7. When the second comparison voltage is greater than the first comparison voltage, then The current limiting protection of the drain-source voltage Vds of the target switching power transistor NM0 is triggered, and the voltage comparison unit 7 outputs the OCP logic signal as high, that is, the high voltage switching power transistor enters the current limiting protection state. Through the above circuit structure, it can quickly detect whether the drain-source voltage Vds of the target switching power transistor NM0 is overcurrent. The result is converted into a low-voltage logic signal without a level conversion module; in addition, the current limiting protection circuit in this embodiment uses a source-level current comparator, which has the characteristics of high bandwidth and fast response.

FIG. 2 is a circuit structure diagram of the current-limiting protection circuit of the high-voltage switching power transistor in this embodiment, wherein the enable input terminal 3 is the OCP_EN terminal in FIG. 2 . Specifically, the sampling unit 4 includes a first P-type field effect transistor PM1 and a first resistor R1, the gate of the first P-type field effect transistor PM1 is connected to the enable input terminal 3, and the first P-type field effect transistor PM1 A first inverter INV1 may also be provided between the gate of the field effect transistor PM1 and the enabling input terminal 3 to reverse the level of the enabling input terminal, and the drain of the first P-type field effect transistor PM1 It is connected to the source of the target switching power transistor NM0, the source of the first P-type field effect transistor PM1 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the The external input power supply 2 is connected. In operation, when the enable input terminal 3 inputs a high-level signal to the gate of the first P-type field effect transistor PM1, the first P-type field effect transistor PM1 is in an open state, and the target switch is collected through the first resistor R1 The source voltage VCSH of the power transistor NM0, wherein, the source voltage VCSH=external input power supply 2 voltage VCC-drain-source voltage Vds, thereby obtaining the drain-source voltage Vds; the first P-type field effect transistor PM1 is adjusted by enabling the input terminal 3 The purpose of collecting the source voltage VCSH of the target switching power transistor NM0 in real time in real time is the switching state of the switch.

In this implementation manner, the drain of the first P-type field effect transistor PM1 and the source of the target switching power transistor NM0 are also connected to an external load; in an example, the external load may be ground.

In this embodiment, the gate of the target switching power transistor NM0 is connected to an external high-side gate driving module, and the working state of the target switching power transistor NM0 is controlled by the external high-side gate driving module.

Specifically, the first switch unit 5 includes a first N-type field effect transistor NM1 and a second resistor R2, and the gate of the first N-type field effect transistor NM1 is connected to the enable The input terminal 3 is connected, the drain of the first N-type field effect transistor NM1 is connected to the external input power supply 2, and the source of the first N-type field effect transistor NM1 is respectively connected to one end of the second resistor R2 It is connected to the first voltage input end, and the other end of the second resistor R2 is connected to the source of the first P-type field effect transistor PM1. When working, when the enable input terminal 3 inputs a high-level signal to the gate of the first N-type field effect transistor NM1, the first N-type field effect transistor NM1 is in a closed state, so that the first N-type field effect transistor NM1 The connection on NM1 forms an open circuit. At this time, the branch of the second resistor R2 generates a current I1 under the action of the voltage comparison unit 7, and generates a first comparison voltage according to the source voltage VCSH on the first resistor R1. The first Comparison voltage = source voltage VCSH-voltage of the second resistor R2, that is, the first comparison voltage = VCC-Vds-R2 I1 , according to the first comparison voltage, it is convenient to perform overcurrent detection on the drain-source voltage Vds.

Specifically, the second switch unit 6 includes a second N-type field effect transistor NM2, the gate of the second N-type field effect transistor NM2 is connected to the enable input terminal 3 through the first inverter INV1, The drain of the second N-type field effect transistor NM2 is connected to the external input power supply 2 , and the source of the second N-type field effect transistor NM2 is connected to the enabling terminal. The state control of the voltage comparison unit 7 is realized through the second N-type field effect transistor NM2. When the enable input terminal 3 inputs a low-level signal to the gate of the second N-type field effect transistor NM2, the second N-type field effect transistor NM2 The tube NM2 is in an open state, and the source of the second N-type field effect transistor NM2 sends a high-level signal to the enable terminal, so that the voltage comparison unit 7 is turned off; When the gate of the second N-type field effect transistor NM2 is in a closed state when a high-level signal is input, the source of the second N-type field effect transistor NM2 sends a low-level signal to the enable terminal, so that the voltage comparison unit 7 is turned on .

Specifically, the voltage comparison unit 7 includes a differential comparison part, a bias current generating circuit, a third resistor R3 and a fourth resistor R4, and the differential comparison part is respectively connected to the source of the first N-type field effect transistor NM1 , the source of the second N-type field effect transistor NM2, the bias current generating circuit and one end of the fourth resistor R4 are connected, and the other end of the fourth resistor R4 is respectively connected to the reference voltage generating unit 8 is connected to one end of the third resistor R3, and the other end of the third resistor R3 is connected to the external input power supply 2. Compare the first comparison voltage and the second comparison voltage through the differential comparison part to quickly detect whether the drain-source voltage Vds of the target switching power transistor NM0 has an overcurrent problem; The size makes the second resistor R2 and the fourth resistor R4 generate bias currents of different magnitudes, thereby generating different voltage divisions under the action of different bias currents, so as to facilitate the over-current comparison of the drain-source voltage Vds. During operation, under the action of the bias current generating circuit, the branches of the second resistor R2 and the fourth resistor R4 generate current I1 and current I2 respectively, and the reference voltage generating unit 8 generates a corresponding current VREF according to the external reference voltage VREF n , where n is a proportional coefficient, it can be obtained that the first comparison voltage and the second comparison voltage are: VCC-Vds-I1 R2 and VCC-R3 (I2+VREF n)-R4 I2, when the second comparison voltage is greater than the first comparison voltage, that is, VCC-R3 (I2+VREF n)-R4 I2>VCC-Vds-R2 I1, it can be deduced that when Vds>R3 (I2+VREF n)+R4 I2-R2 When I1, the OCP logic signal output by the differential comparison part is high, that is, the high voltage switching power transistor enters the current limiting protection state. Preferably, the OCP signal output from the differential comparison is passed through the serial inverter INV2 and the inverter INV3 to rectify the output OCP signal.

Specifically, the differential comparison unit includes a second P-type field effect transistor PM2, a third P-type field effect transistor PM3, a fourth P-type field effect transistor PM4, and a fifth P-type field effect transistor PM5. The source of the first N-type field effect transistor PM2 is connected to the source of the first N-type field effect transistor NM1, and the source of the fourth P-type field effect transistor PM4 is connected to one end of the fourth resistor R4. The gate of the second P-type field effect transistor PM2 and the gate of the fourth P-type field effect transistor PM4 are respectively connected to the source of the second N-type field effect transistor NM2. The drain of the tube PM2 is respectively connected to the gate of the second P-type field effect transistor PM2 and the source of the third P-type field effect transistor PM3, and the source of the fifth P-type field effect transistor PM5 is connected to the source of the fifth P-type field effect transistor PM5. The drain of the fourth P-type field effect transistor PM4 is connected, and the gate of the third P-type field effect transistor PM3 is connected to the drain of the third P-type field effect transistor PM3 and the fifth P-type field effect transistor PM3 respectively. Gate connection of FET PM5. The bias current generating circuit includes a current source and a first current mirror circuit, and the current source is respectively connected to the drain of the third P-type field effect transistor PM3 and the fifth P-type field effect transistor through the first current mirror circuit. The drain of the effect transistor PM5 is connected; the drain of the fifth P-type field effect transistor PM5 is used to output high and low logic level signals according to the comparison result of the first comparison voltage and the second comparison voltage; through the second P-type field effect The transistor PM2, the third P-type field effect transistor PM3, the fourth P-type field effect transistor PM4 and the fifth P-type field effect transistor PM5 form a two-stage differential comparator, which can generate different differential comparators according to different bias currents. The threshold value of the drain-source voltage Vds can be judged, and the comparison result can be directly converted into a low-voltage logic signal, and there is no need to connect a level conversion module to convert the comparison result.

In this embodiment, the first current mirror circuit includes a third N-type field effect transistor NM3, a fourth N-type field effect transistor NM4, a fifth N-type field effect transistor NM5, a sixth N-type field effect transistor NM6, The seventh N-type field effect transistor NM7 and the eighth N-type field effect transistor NM8, the current source is respectively connected to the drain and gate of the third N-type field effect transistor NM3, the fifth N-type field effect transistor The gate of NM5 is connected to the gate of the seventh N-type field effect transistor NM7, and the drain of the fifth N-type field effect transistor NM5 is connected to the drain of the third P-type field effect transistor PM3. The drain of the seventh N-type field effect transistor NM7 is connected to the drain of the fifth P-type field effect transistor PM5, and the source of the fifth N-type field effect transistor NM5 is connected to the sixth N-type field effect transistor NM5. The drain of the transistor NM6 is connected, the source of the seventh N-type field effect transistor NM7 is connected to the drain of the eighth N-type field effect transistor NM8, and the source of the third N-type field effect transistor NM3 is respectively Connected to the drain and gate of the fourth N-type field effect transistor NM4, the gate of the sixth N-type field effect transistor NM6 and the gate of the eighth N-type field effect transistor NM8, the first The sources of the fourth N-type field effect transistor NM4, the source of the sixth N-type field effect transistor NM6 and the eighth N-type field effect transistor NM8 are grounded. Through the third N-type field effect transistor NM3, the fourth N-type field effect transistor NM4, the fifth N-type field effect transistor NM5, the sixth N-type field effect transistor NM6, the seventh N-type field effect transistor NM7 and the eighth N-type field effect transistor The field effect transistor NM8 forms a current mirror circuit, so that the current of the current source can be shunted to the branches of the second resistor R2 and the fourth resistor R4 to generate different divided voltages, which is convenient for judging the threshold of the drain-source voltage Vds.

Specifically, the reference voltage generation unit 8 includes a voltage-controlled current source and a second current mirror circuit, the voltage-controlled current source is connected to the external input power supply 2, and the voltage-controlled current source passes through the second current mirror The loop is connected to the connection between the third resistor R3 and the fourth resistor R4. When working, the voltage-controlled current source generates a corresponding output current according to the external reference voltage VREF, and its output current is VREF n, where n is a proportionality coefficient, has the same unit as the transconductance, and then the current is input into the branch of the fourth resistor R4 through the second current mirror circuit, and under the action of the bias current generating circuit, it generates The second comparison voltage is VCC-R3 (I2+VREF n)-R4 I2, so as to quickly judge the overcurrent of the threshold of the drain-source voltage Vds according to the second comparison voltage, wherein the triggering condition of the current-limiting protection of the drain-source voltage Vds is only related to the selected external reference voltage VREF, and in this way can The adjustment of the overcurrent threshold of the drain-source voltage Vds can be realized only by adjusting the input value of the external reference voltage VREF.

Specifically, the second current mirror circuit includes a ninth N-type field effect transistor NM9, a tenth N-type field effect transistor NM10, an eleventh N-type field effect transistor NM11, and a twelfth N-type field effect transistor NM12, so The drain of the ninth N-type field effect transistor NM9 is connected to the connection between the third resistor R3 and the fourth resistor R4, and the source of the ninth N-type field effect transistor NM9 is connected to the first The drain of the tenth N-type field effect transistor NM10 is connected, and the drain of the eleventh N-type field effect transistor NM11 is respectively connected to the gate of the voltage-controlled current source, the eleventh N-type field effect transistor NM11 and The gate of the ninth N-type field effect transistor NM9 is connected, the source of the eleventh N-type field effect transistor NM11 is respectively connected to the drain of the twelfth N-type field effect transistor NM11, the tenth The gate of the second N-type field effect transistor NM12 is connected to the gate of the tenth N-type field effect transistor NM10, and the source of the tenth N-type field effect transistor NM10 is connected to the twelfth N-type field effect transistor. The source of NM12 is grounded. Under the action of the current mirror composed of the ninth N-type field effect transistor NM9, the tenth N-type field effect transistor NM10, the eleventh N-type field effect transistor NM11 and the twelfth N-type field effect transistor NM12, the ninth N-type field effect transistor The branch circuit of the N-type field effect transistor NM9 and the tenth N-type field effect transistor NM10 generates an output current VREF n, so that the output current VREF n is sent to the branch of the fourth resistor R4 to generate a bias current.

It should be noted that the N-type field effect transistor and the P-type field effect transistor used in this embodiment can be substrateless field effect transistors, and at the same time, they can also be replaced by substrate-mounted field effect transistors according to requirements. .

To sum up, in this embodiment, the sampling unit 4, the first switch unit 5 and the second switch unit 6 are used together to make the current limiting protection circuit switch between the function off state and the function on state, when entering the high voltage switch When the power tube current limiting protection is in the detection state, the drain-source voltage of the switching power tube NM0 is quickly collected through the sampling unit 4, and the drain-source voltage is quickly compared with the first switch unit 5, the voltage comparison unit 7 and the reference voltage generation unit 8 , if the drain-source voltage is greater than the preset value, the current-limiting protection is triggered, and the voltage comparison unit 7 outputs a logic signal high, that is, the high-voltage switching power tube enters the current-limiting protection state. The entire structure of the current limiting protection circuit does not require an additional reference voltage module, and can realize voltage comparison even under high-voltage conditions, and can directly convert the comparison result into a low-voltage logic signal without a level conversion module; in addition, this current limiting protection circuit adopts Source current comparator with high bandwidth and fast response.

Embodiment two

In this embodiment, a PCB board is provided, on which the current-limiting protection circuit of the high-voltage switching power transistor as described in the first embodiment is printed.

Embodiment three

This embodiment provides a controller, which adopts the current-limiting protection circuit of the high-voltage switching power transistor as described in the first embodiment for operation control.

It can be understood that those skilled in the art can make equivalent replacements or changes according to the technical solutions and inventive concepts of the present invention, and all these changes or replacements should belong to the protection scope of the appended claims of the present invention.

Claims (10)

1. The high-voltage switching power tube current-limiting protection circuit is characterized by comprising a target switching power tube NM0, an external input power supply, an enabling input end, a sampling unit, a first switching unit, a second switching unit, a voltage comparison unit and a reference voltage generation unit;

the external input power supply is respectively connected with the drain electrode of the target switching power tube NM0, the sampling unit, the first switching unit, the second switching unit and the reference voltage generating unit, the source electrode of the target switching power tube NM0 is connected with the sampling unit, the enabling input end is respectively connected with the sampling unit, the first switching unit and the second switching unit, the voltage comparing unit comprises a first voltage input end, a second voltage input end and an enabling end, the first switching unit is respectively connected with the sampling unit and the first voltage input end, the second switching unit is connected with the enabling end, and the reference voltage generating unit is connected with the second voltage input end;

the enabling input end is used for sending switching signals to the sampling unit, the first switching unit and the second switching unit; the sampling unit is used for collecting drain-source voltage of the target switching power tube NM 0; the first switching unit is configured to send a first comparison voltage to the first voltage input terminal according to a drain-source voltage of the target switching power tube NM 0; the second switching unit is used for sending a switching signal to the voltage comparison unit; the reference voltage generating unit is used for sending a second comparison voltage to the second voltage input end; the voltage comparison unit is used for outputting a high-low logic level signal according to the comparison result of the first comparison voltage and the second comparison voltage.

2. The high-voltage switching power tube current-limiting protection circuit according to claim 1, wherein the sampling unit comprises a first P-type field effect tube PM1 and a first resistor R1, the grid electrode of the first P-type field effect tube PM1 is connected with the enabling input end, the drain electrode of the first P-type field effect tube PM1 is connected with the source electrode of the target switching power tube NM0, the source electrode of the first P-type field effect tube PM1 is connected with one end of the first resistor R1, and the other end of the first resistor R1 is connected with the external input power supply.

3. The high-voltage switching power tube current-limiting protection circuit according to claim 2, wherein the first switching unit comprises a first N-type field effect tube NM1 and a second resistor R2, a gate of the first N-type field effect tube NM1 is connected with the enabling input end, a drain of the first N-type field effect tube NM1 is connected with the external input power supply, a source of the first N-type field effect tube NM1 is connected with one end of the second resistor R2 and the first voltage input end respectively, and the other end of the second resistor R2 is connected with a source of the first P-type field effect tube PM 1.

4. The high voltage switching power tube current limiting protection circuit according to claim 3, wherein the second switching unit comprises a second N-type field effect tube NM2, a gate of the second N-type field effect tube NM2 is connected with the enable input terminal, a drain of the second N-type field effect tube NM2 is connected with the external input power supply, and a source of the second N-type field effect tube NM2 is connected with the enable terminal.

5. The high-voltage switching power tube current limiting protection circuit according to claim 4, wherein the voltage comparing unit comprises a differential comparing part, a bias current generating circuit, a third resistor R3 and a fourth resistor R4, the differential comparing part is respectively connected with the source electrode of the first N-type field effect tube NM1, the source electrode of the second N-type field effect tube NM2, the bias current generating circuit and one end of the fourth resistor R4, the other end of the fourth resistor R4 is respectively connected with the reference voltage generating unit and one end of the third resistor R3, and the other end of the third resistor R3 is connected with the external input power supply.

6. The high-voltage switching power tube current limiting protection circuit according to claim 5, wherein the differential comparison part comprises a second P-type field effect tube PM2, a third P-type field effect tube PM3, a fourth P-type field effect tube PM4 and a fifth P-type field effect tube PM5, wherein the source electrode of the second P-type field effect tube PM2 is connected with the source electrode of the first N-type field effect tube NM1, the source electrode of the fourth P-type field effect tube PM4 is connected with one end of the fourth resistor R4, the gate electrode of the second P-type field effect tube PM2 and the gate electrode of the fourth P-type field effect tube PM4 are respectively connected with the source electrode of the second N-type field effect tube PM2, the drain electrode of the second P-type field effect tube PM2 is respectively connected with the gate electrode of the second P-type field effect tube PM2 and the source electrode of the third P-type field effect tube PM3, the source electrode of the fifth P-type field effect tube PM5 is respectively connected with the drain electrode of the third P-type field effect tube PM3 and the drain electrode of the third P-type field effect tube PM 3;

the bias current generating circuit comprises a current source and a first current mirror circuit, wherein the current source is respectively connected with the drain electrode of the third P-type field effect tube PM3 and the drain electrode of the fifth P-type field effect tube PM5 through the first current mirror circuit; the drain electrode of the fifth P-type field effect transistor PM5 is configured to output a high-low logic level signal according to the comparison result of the first comparison voltage and the second comparison voltage.

7. The high voltage switching power tube current limiting protection circuit according to claim 5, wherein the reference voltage generating unit comprises a voltage controlled current source and a second current mirror circuit, the voltage controlled current source is connected with the external input power source, and the voltage controlled current source is connected with the third resistor R3 and the fourth resistor R4 through the second current mirror circuit.

8. The high-voltage switching power tube current limiting protection circuit according to claim 7, wherein the second current mirror circuit comprises a ninth N-type field effect tube NM9, a tenth N-type field effect tube NM10, an eleventh N-type field effect tube NM11 and a twelfth N-type field effect tube NM12, a drain of the ninth N-type field effect tube NM9 is connected with a connection between the third resistor R3 and the fourth resistor R4, a source of the ninth N-type field effect tube NM9 is connected with a drain of the tenth N-type field effect tube NM10, a drain of the eleventh N-type field effect tube NM11 is connected with the voltage-controlled current source, a gate of the eleventh N-type field effect tube NM11 and a gate of the ninth N-type field effect tube NM9, a source of the eleventh N-type field effect tube NM11 is connected with a drain of the twelfth N-type field effect tube NM12, a gate of the twelfth N-type field effect tube NM12 and a drain of the tenth N-type field effect tube NM10, and a source of the tenth N-type field effect tube NM10 are connected with the source of the tenth N-type field effect tube NM 11.

9. A PCB board, wherein the high voltage switch power tube current limiting protection circuit as claimed in any one of claims 1 to 8 is printed on the PCB board.

10. A controller, wherein the controller performs operation control by using the high-voltage switch power tube current-limiting protection circuit as claimed in any one of claims 1 to 8.