CN116319475A - A signal analysis method, device, equipment and storage medium - Google Patents

Abstract

The embodiment of the application relates to the technical field of signal testing, in particular to a signal analysis method, a device, equipment and a storage medium, aiming at improving the speed of PCIE signal consistency analysis. The method comprises the following steps: loading a signal acquisition script into a server to be tested; when a channel information checking instruction aiming at a server to be tested is received, channel information of all PCIE channels corresponding to a CPU in the server to be tested is obtained through a signal acquisition script; determining PCIE channels to be tested from all PCIE channels according to the channel information; when a rate switching instruction aiming at the PCIE channel to be tested is received, switching the signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction through a signal acquisition script; acquiring a signal waveform diagram of a PCIE channel to be tested at a target signal transmission rate; and according to the signal waveform diagram, carrying out signal analysis on the PCIE channel to be tested to obtain a signal analysis result.

Description

A signal analysis method, device, equipment and storage medium

technical field

The embodiments of the present application relate to the technical field of signal testing, and in particular, to a signal analysis method, device, device, and storage medium.

Background technique

PCIE (Peripheral Component Interconnect Express, high-speed serial computer extended alignment standard) is a data transmission method that is widely used today. The CPU of the computer transmits data to the corresponding device through PCIE. The signal consistency analysis of PCIE helps to ensure The security and stability of PCIE data transmission is a very important task. When analyzing the signal consistency of PCIE signals, it is necessary to collect signal waveforms at various rates for corresponding analysis. When performing signal consistency analysis on PCIE in the prior art, it is necessary to use a multi-channel high-speed oscilloscope with a trigger function to connect to the tested device, and the oscilloscope sends a pulse signal of a certain frequency to the tested device to realize the signal transmission rate in the PCIE channel. Switch, and then collect the signal waveform diagram of the PCIE channel at each signal transmission rate, and complete the signal consistency analysis of PCIE.

When performing PCIE signal consistency analysis, if the connected oscilloscope does not have a trigger function, the PCIE signal consistency analysis cannot be performed, thereby affecting the efficiency of signal analysis.

Contents of the invention

Embodiments of the present application provide a signal analysis method, device, device, and storage medium, aiming at improving the speed of PCIE signal consistency analysis.

The first aspect of the embodiment of the present application provides a signal analysis method, the method comprising:

The pre-written signal acquisition script is loaded into the server under test, and the signal acquisition script is used to perform relevant tasks for the PCIE signal acquisition of the server under test according to the received instruction;

When receiving the channel information viewing instruction for the server to be tested, obtain the channel information of all PCIE channels corresponding to the CPU in the server to be tested by the signal acquisition script;

Determine the PCIE channel to be tested from all the PCIE channels according to the channel information;

When receiving the rate switching instruction for the PCIE channel to be tested, the signal transmission rate of the PCIE channel to be tested is switched to the target signal transmission rate corresponding to the rate switching instruction by the signal acquisition script;

Obtain the signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate;

According to the signal waveform diagram, signal analysis is performed on the PCIE channel to be tested, and a signal analysis result is obtained.

Optionally, before obtaining the channel information of all PCIE channels corresponding to the CPU in the server to be tested through the signal acquisition script, the method further includes:

PC equipment is connected to the server to be tested;

The PC device is used to control the server under test to run the signal collection script.

Optionally, when the channel information viewing instruction for the server under test is received, the channel information of all PCIE channels corresponding to the CPU in the server under test is obtained through the signal acquisition script, including:

When receiving the channel information viewing instruction, execute the information viewing instruction through the signal acquisition script, and perform channel scanning on the PCIE channel;

Generate the channel information of the PCIE channel according to the connection status and the current signal transmission rate of the PCIE channel obtained through scanning.

Optionally, according to the channel information, determining the PCIE channel to be tested from all the PCIE channels includes:

According to the channel information, determine the connection status of each PCIE channel in all the PCIE channels;

The PCIE channel whose connection status is valid is used as the PCIE channel to be tested.

Optionally, when the rate switching instruction for the PCIE channel to be tested is received, the signal transmission rate of the PCIE channel to be tested is switched to the target corresponding to the rate switching instruction through the signal acquisition script Signaling rate, including:

According to the rate switching instruction, determine the target signal transmission rate of the PCIE channel;

The PCIE channel rate adjustment module of the CPU is invoked by the signal acquisition script to adjust the signal transmission rate of the PCIE channel to the target signal transmission rate.

Optionally, the acquisition of the signal waveform of the PCIE channel to be tested at the target signal transmission rate includes:

The signal of the PCIE channel to be tested is transmitted to the oscilloscope pre-connected on the server to be tested with the target signal transmission rate;

Through the oscilloscope, according to the signal of the PCIE channel to be tested, a signal waveform diagram corresponding to the signal is generated.

Optionally, according to the signal waveform diagram, the PCIE channel to be tested is subjected to signal analysis to obtain signal analysis results, including:

Comparing the signal waveform diagram with a pre-stored standard signal waveform diagram to obtain a waveform comparison result;

The signal analysis result is obtained according to the preset signal analysis rule and combined with the comparison result of the waveform diagram.

The second aspect of the embodiment of the present application provides a signal analysis device, the device includes:

The file loading module is used to load the pre-written signal acquisition script into the server to be tested, and the signal acquisition script is used to perform relevant tasks for the PCIE signal acquisition of the server to be tested according to the received instruction;

The channel information acquisition module is used to obtain the channel information of all PCIE channels corresponding to the CPU in the server to be tested by the signal acquisition script when receiving the channel information viewing instruction for the server to be tested;

The channel to be tested determination module is used to determine the PCIE channel to be tested from all the PCIE channels according to the channel information;

The rate switch module is used to switch the signal transmission rate of the PCIE channel to be tested to the target corresponding to the rate switch command through the signal acquisition script when receiving the rate switch command for the PCIE channel to be tested Signal transmission rate;

Signal waveform diagram acquisition module, used to obtain the signal waveform diagram of the PCIE channel to be tested under the target signal transmission rate;

The signal analysis result acquisition module is used to perform signal analysis on the PCIE channel to be tested according to the signal waveform diagram to obtain a signal analysis result.

Optionally, the device also includes:

A device connection module, configured to connect a PC device to the server to be tested;

A program running module, configured to control the server under test to run the signal collection script through the PC device.

Optionally, the channel information acquisition module includes:

The channel scanning submodule is used to perform channel scanning on the PCIE channel by executing the information checking command through the signal acquisition script when the channel information checking command is received;

The channel information generation sub-module is used to generate the channel information of the PCIE channel according to the connection state of the PCIE channel obtained through scanning and the current signal transmission rate.

Optionally, the channel to be tested determination module includes:

A connection status determination submodule, configured to determine the connection status of each PCIE channel in all the PCIE channels according to the channel information;

The submodule for determining the channel to be tested is used to use the PCIE channel whose connection status is valid as the PCIE channel to be tested.

Optionally, the rate switching module includes:

The target signal transmission rate determination submodule is used to determine the target signal transmission rate of the PCIE channel according to the rate switching instruction;

The rate switching sub-module is used to call the PCIE channel rate adjustment module of the CPU through the signal acquisition script, and adjust the signal transmission rate of the PCIE channel to the target signal transmission rate.

Optionally, the signal waveform acquisition module includes:

The signal transmission submodule is used to transmit the signal of the PCIE channel to be tested to the oscilloscope pre-connected on the server to be tested at the target signal transmission rate;

The signal waveform diagram generation submodule is used to generate a signal waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested through the oscilloscope.

Optionally, the signal analysis result acquisition module includes:

The waveform comparison result acquisition sub-module is used to compare the signal waveform diagram with the pre-stored standard signal waveform diagram to obtain the waveform comparison result;

The signal analysis result acquisition sub-module is used to obtain the signal analysis result according to the preset signal analysis rules and in combination with the comparison result of the waveform diagram.

The third aspect of the embodiment of the present application provides a readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps in the method described in the first aspect of the present application are implemented.

The fourth aspect of the embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and operable on the processor. When the processor executes the computer program, the first aspect of the present application is realized. The steps of the method described in the aspect.

Using the signal analysis method provided by the present application, the pre-written signal acquisition script is loaded into the server under test, and the signal acquisition script is used to perform related tasks for the PCIE signal acquisition of the server under test according to the received instructions ; When receiving the channel information check instruction for the server to be tested, obtain the channel information of all PCIE channels corresponding to the CPU in the server to be tested by the signal acquisition script; according to the channel information, from all the Determine the PCIE channel to be tested in the PCIE channel; when receiving the rate switching instruction for the PCIE channel to be tested, the signal transmission rate of the PCIE channel to be tested is switched to the rate switching instruction by the signal acquisition script Corresponding target signal transmission rate; Obtain the signal waveform diagram of the PCIE channel to be tested under the target signal transmission rate; According to the signal waveform diagram, carry out signal analysis to the PCIE channel to be tested, and obtain the signal analysis result. In this application, a signal acquisition script for performing PCIE signal acquisition is pre-written, and the signal acquisition script is loaded into the server to be tested, and when the PCIE signal of the server to be tested is analyzed, the signal acquisition script is run to obtain the The channel information of all PCIE channels corresponding to the CPU, according to the channel information, determine the PCIE channel to be tested, switch the signal transmission rate of the PCIE channel to be tested to the target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script, and then Perform signal acquisition on the PCIE channel to obtain the signal waveform diagram of the PCIE channel at the target signal transmission rate, analyze the signal waveform diagram, and obtain the analysis result of the PCIE signal consistency, without sending pulses through an oscilloscope with a trigger function To switch the signal rate of the signal, you only need to send instructions to the server under test and run the signal test script to switch the signal transmission rate of the PCIE channel to any signal transmission rate, which saves the time of signal acquisition during signal analysis and improves The speed of PCIE signal consistency analysis.

Description of drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments of the present application. Obviously, the accompanying drawings in the following description are only some embodiments of the present application , for those skilled in the art, other drawings can also be obtained according to these drawings without paying creative labor.

Fig. 1 is the flow chart of the signal analysis method that an embodiment of the present application proposes;

Fig. 2 is the PCIE channel scanning result figure that an embodiment of the present application proposes;

Figure 3 is a wiring diagram of the PCIE signal test that needs to trigger the channel;

Fig. 4 is the PCIE script instruction figure that an embodiment of the present application proposes;

FIG. 5 is a schematic diagram of a ^{signal analysis} device proposed by an embodiment of the present application.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

Referring to FIG. 1 , FIG. 1 is a flowchart of a signal analysis method proposed by an embodiment of the present application. As shown in Figure 1, the method includes the following steps:

S11: Load a pre-written signal acquisition script into the server under test, the signal acquisition script is used to execute related tasks of PCIE signal acquisition for the server under test according to the received instruction.

In this embodiment, the signal acquisition script is a collection of program instructions written for the acquisition task of the PCIE (Peripheral Component InterconnectExpress, high-speed serial computer extended alignment standard) signal, run the script, and input the corresponding instruction to call the computer through the script The corresponding module in executes the instruction. The PCIE signal is a signal sent by the PCIE channel on the CPU (central processing unit, central processing unit) of the server to be tested. The server to be tested is the target device to be tested, and the CPU in the device includes several PCIE channels.

In this embodiment, for the relevant tasks of PCIE signal acquisition that need to be performed, a signal acquisition script is written by a programming language, and the written script file is stored in the server to be tested, and the corresponding signal acquisition task can be performed by running the script.

For example, the signal test script file is copied from the developer's device to a mobile storage device, and then the mobile storage device is connected to the interface of the server to be tested, and the script file is loaded into the server to be tested.

S12: When the channel information viewing instruction for the server under test is received, acquire the channel information of all PCIE channels corresponding to the CPU in the server under test through the signal collection script.

In this embodiment, the channel information viewing instruction is used to trigger a signal acquisition script to scan the PCIE channel of the server under test to obtain channel information of all PCIE channels connected to the CPU of the current server under test. The channel information includes the PCIE channel's name, number, connection status, channel address, signal transmission rate of the current channel, and other related information of the PCIE channel.

In this embodiment, when performing the signal consistency analysis of the PCIE channel, the PC terminal sends a signal inspection instruction to the server to be tested, and when the server to be tested receives the signal inspection instruction, it runs a signal test script. All PCIE channels in the server under test are scanned to obtain the channel information of all PCIE channels corresponding to the CPU in the server to be tested.

With reference to Fig. 2, Fig. 2 is the PCIE channel scanning result figure that an embodiment of the present application proposes, for example, at 0001:00:01.0-1DEF:E102-Bridge Device-PCI/PcI bridge[x0, GEN 1](Link down) In (s0 RC1.0), 0001:00:00.0 is the domain:b:d.f address of the PCIE channel, that is, the address of the PCIE channel in the server to be tested, 1DEF:E102 indicates the channel number of the PCIE channel, Bridge Device-PCI /PCI bridge indicates that the channel is a PCIE channel, [x0, GEN 1] indicates that the speed of the x0 channel is GEN1, and GEN1 is a speed grade, and each speed grade corresponds to a different signal transmission rate. (Link down) indicates that the connection status is not connected), (S0 RC1.0) indicates the physical channel RC1.0 on CPU No. 0. Through the channel scanning of the server to be tested, the channel information of all PCIE channels corresponding to the CPU in the server to be tested can be obtained, and the channel information is sorted and displayed in the operation window to form the display result shown in Figure 2.

In this embodiment, the information viewing instruction is a pre-set instruction when writing the signal detection script, and the channel information can be checked through the signal detection script by inputting the information viewing instruction.

S13: Determine the PCIE channel to be tested from all the PCIE channels according to the channel information.

In this embodiment, the PCIE channel to be tested is a PCIE channel that requires signal consistency analysis, and the PCIE channel has been connected to an oscilloscope.

In this embodiment, the connection status of each PCIE channel can be checked in the PCIE channel information. According to the connection status of the PCIE channel, it can be judged whether the PCIE channel has established a connection with the oscilloscope, and then it is determined from all PCIE channels. Test the PCIE channel.

For example, check the PCIE channel information, and when the connection status of the channel (S0 RC1.0) is displayed as (link on, normal connection) in the PCIE channel information, it is determined that the (S0 RC1.0) channel is the channel to be tested.

S14: When receiving the rate switching instruction for the PCIE channel to be tested, switch the signal transmission rate of the PCIE channel to be tested to the target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script.

In this embodiment, the rate switching instruction is used to switch the signal transmission rate of the PCIE channel. The target signal transmission rate is the signal transmission rate that needs to be achieved by the PCIE channel.

In this embodiment, send the rate switching instruction for the PCIE channel to be tested to the server under test through the PC end, the server runs the signal acquisition script during the test, and the signal acquisition script calls the signal rate control module in the CPU, and the signal of the PCIE channel to be tested The sending rate is switched. Switch the signal transmission rate of the PCIE channel to be tested from the original signal transmission rate to the target signal transmission rate.

Exemplarily, the rate switching instruction is preset when writing the signal acquisition script, for example, the format of the instruction is pci comp<domain:b:d.f><GEN>, specifically, the instruction pci comp0008:00:07.0 3 7 represents The meaning is to switch the signal transmission rate of the PCIE channel whose address is 0008:00:07.0 to GEN3 Preset (preset value) 7.

S15: Obtain a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate.

In this embodiment, the signal waveform diagram is a waveform diagram corresponding to the signal generated according to the PCIE signal, and represents a change in amplitude during signal transmission.

In this embodiment, the PCIE channel to be tested on the server to be tested is pre-connected to an oscilloscope, and when the control CPU sends signals at a target signal rate, the oscilloscope collects the PCIE signal and generates a signal waveform diagram according to the signal. When testing the PCIE channel, it is necessary to collect signal waveforms at different signal transmission rates to analyze the signal consistency of the PCIE channel.

Generally, when analyzing the consistency of PCIE signals, in a data path (Lane) of the physical link of the PCIE bus, it consists of two sets of differential signals, a total of 4 signal lines, in which the components of the transmitting end (TX) and the receiving end (RX) components are connected using a set of differential signals. This link is also called the transmitting end link and is also the receiving link of the receiving end. The RX component at the transmitting end and the TX component at the receiving end are connected using another set of differential signals. This link is also known as the sender receive link, and is also the sender link of the receiver. A PCIE link can consist of multiple lanes.

The PCIE link uses differential signals for data transmission. A differential signal is composed of two signals D+ and D-. The signal receiving end compares the difference between the two signals to determine whether the sending end is sending logic "1" or logic "0". "Compared with single-ended signals, differential signals have stronger anti-interference ability, because differential signals require equal length, equal width, close proximity, and the same layer when wiring. So the external disturbance noise is "passed" and "simultaneously" for the two differential signals. The difference is 0 under rational conditions, and has little influence on the logic value of the signal, so the differential signal can use a higher bus frequency.

At present, PCIE has developed to GEN5, the transmission rate is as high as 32Gb/s, and the standard protocol of GEN6 has also been released. In order to ensure the stable execution of the transmission and reception of high-speed transmission data, the PCIE signal is collected through the oscilloscope, and the collected PCIE signal is in different Signal waveform diagram at the signal transmission rate, and then analyze the signal consistency.

Refer to Figure 3, Figure 3 is the connection diagram of the PCIE signal test that needs to trigger the channel, Figure 3 shows the connection method of the traditional PCIE test, through a multi-channel high-speed oscilloscope with a trigger function, connect to the PCIE slot of the server to be tested Always signal CLK and TX terminal signals, and connect the trigger channel of the oscilloscope with the RX terminal of the PCIE channel to be tested. During the test, the 1 and 3 channels of the oscilloscope collect the PCIE TX signal waveform sent by the CPU, and the 2 and 4 channels Collect the clock signal waveform sent by CLK, and connect the trigger channel to PCIE RX. The oscilloscope sends out a 200mv pulse signal, which is sent to the RX end of the PCIE channel to realize the rate switching of the TX end signal, and then collect the signal waveform.

In this embodiment, unlike the connection method in Fig. 3, there is no need to use an oscilloscope with the function of sending a trigger signal, and only need to connect the channel of the oscilloscope to the TX end of the PCIE slot to receive the PCIE signal, and the sending of the signal The rate is automatically adjusted by the CPU controlled by the signal acquisition script, which is more convenient during signal acquisition, greatly reduces the requirements for the oscilloscope, saves the cost of signal analysis, and improves the rate of signal analysis.

S16: Perform signal analysis on the PCIE channel to be tested according to the signal waveform diagram, and obtain a signal analysis result.

In this embodiment, after the signal waveform diagram is obtained, the signal consistency analysis is performed on the PCIE channel to be tested according to the preset analysis rule of the PCIE signal, and the signal analysis result is obtained.

In this embodiment, after the signal waveform diagram is collected, the signal waveform diagram is obtained by the server to be tested, and the signal waveform diagram is compared with the pre-stored standard signal waveform diagram, so that the waveform in the collected signal waveform diagram can be determined Whether there is any abnormality, and then judge the existence of the PCIE channel according to the preset PCIE signal analysis rules.

In this embodiment, the relevant tasks of signal acquisition of the PCIE channel in the server to be tested are executed through the pre-written signal acquisition script, and it is not necessary to adjust the signal transmission rate of the PCIE channel by transmitting pulses, and the PCIE channel can be transferred only by inputting instructions. The signal transmission rate of the channel is adjusted to the required rate, which saves the cost of signal consistency analysis and improves the rate of signal consistency analysis.

In another embodiment of the present application, before step S12, the method further includes:

S21: Connect the PC device to the server to be tested.

In this embodiment, the PC (personal computer) device is the tester's computer terminal, and the PC device is connected to the system serial port of the server to be tested through a serial cable, and the PC device can control the server to be tested.

In this embodiment, when the PCIE signal consistency analysis is performed on the server to be tested, the PC device is connected to the server to be tested.

Exemplarily, the PC device may be a desktop computer or a tablet computer.

S22: Using the PC device to control the server under test to run the signal collection script.

In this embodiment, after the PC device is connected to the server to be tested, the server to be tested is controlled to run the signal collection script.

In this embodiment, the terminal simulation software is installed on the PC equipment, and the terminal simulation software is used to run the signal acquisition script. The terminal simulation software provides a port, and the tester can interact with the server to be tested through the terminal simulation software, and send data to the server to be tested. Issue instructions to receive the data returned by the server under test.

Exemplarily, the terminal simulation software is not limited here, for example, putty (serial interface connection software) or xSHELL (secure terminal simulation software) can be used.

In this embodiment, refer to FIG. 4 . FIG. 4 is a PCIE script instruction diagram proposed by an embodiment of the present application. Input each instruction in FIG. 4 to control the script to perform corresponding functions. After the tester starts the signal acquisition script and enters the command "pci help" in the window of the terminal simulation software, the preset PCIE-related commands in the signal acquisition script will be displayed, and the tester can realize the corresponding functions according to these commands.

In this embodiment, the PC device is connected to the server to be tested, and the PC device is used to run the script in the server to be tested, which facilitates the rapid collection and analysis of PCIE signals by testers.

In another embodiment of the present application, when the channel information viewing instruction for the server under test is received, the channel information of all PCIE channels corresponding to the CPU in the server under test is acquired through the signal acquisition script, include:

S31: When the channel information viewing instruction is received, execute the information viewing instruction through the signal acquisition script, and perform channel scanning on the PCIE channel.

In this embodiment, when the server under test receives the channel information viewing instruction, it runs the signal collection script, executes the information viewing instruction, and performs channel scanning for all PCIE channels corresponding to the CPU in the server under test. Through the channel scan of the CPU, you can know the connection status of the PCIE channel, the signal transmission rate of the PCIE channel and other information.

S32: Generate channel information of the PCIE channel according to the connection status of the PCIE channel and the current signal transmission rate obtained through scanning.

In the present embodiment, after scanning to obtain the connection state of each PCIE channel and the current signal transmission rate, generate the channel information of the PCIE channel, as shown in Figure 2, the channel information of PCIE is displayed in the terminal simulation software of the PC equipment In the window interface, testers can view the channel information of any PCIE channel.

In this embodiment, when performing the signal consistency analysis of the PCIE channel, inputting the corresponding command can directly view the channel information of all the PCIE channels, which improves the speed of performing the PCIE signal consistency analysis.

In another embodiment of the present application, according to the channel information, determine the PCIE channel to be tested from all the PCIE channels, including:

S41: According to the channel information, determine the connection status of each PCIE channel in all the PCIE channels.

In the present embodiment, in the channel information of PCIE channel, have included the connection state of each PCIE channel, check the channel information of this PCIE channel, can determine the connection status of this PCIE channel, the connection status is divided into connection valid state and unavailable Connection Status.

Exemplarily, the valid connection state is indicated as link on, and the unconnected state is indicated as link down.

S42: Use the PCIE channel whose connection status is valid as the PCIE channel to be tested.

In this embodiment, the PCIE channel whose connection status is valid is used as the PCIE channel to be tested.

In this embodiment, when the connection status of the PCIE channel is valid, it means that the PCIE channel has been connected to the oscilloscope, and the signal of the PCIE channel can be sent to the oscilloscope to complete the signal acquisition of the PCIE channel. When it is necessary to collect the PCIE signal of another channel, the oscilloscope can be reconnected to another PCIE channel, or all channels can be connected to the oscilloscope in advance. When it is desired to collect the channel signal of a certain PCIE channel, through command to specify the PCIE channel signal to be collected.

In this embodiment, the PCIE channel to be tested is determined according to the channel information of the PCIE channel, which ensures that the signal of the PCIE channel to be tested can be accurately collected.

In another embodiment of the present application, when the rate switching instruction for the PCIE channel to be tested is received, the signal transmission rate of the PCIE channel to be tested is switched to the The target signal transmission rate corresponding to the rate switching command, including:

S51: Determine the target signal transmission rate of the PCIE channel according to the rate switching instruction.

In this embodiment, the rate switching instruction includes the channel address of the PCIE channel and the target signal transmission rate to which the PCIE channel needs to be switched.

In this embodiment, when the server to be tested receives the rate switching instruction, it reads the target signal transmission rate included in the rate switching instruction, and determines the specific signal transmission rate to which the PCIE channel to be tested needs to be switched.

For example, when the command is "pci comp 0008:00:07.0 3 7", the target signal transmission rate contained therein is GEN3, and the specific value of the signal transmission rate of GEN3 is 8Gb/s.

S52: Call the PCIE channel rate adjustment module of the CPU through the signal acquisition script, and adjust the signal transmission rate of the PCIE channel to the target signal transmission rate.

In this embodiment, the channel rate adjustment module is a module integrated in the CPU, which is specially used to adjust the transmission rate of the PCIE channel signal.

In this embodiment, after determining the target signal transmission rate, the server to be tested calls the PCIE channel rate adjustment module in the CPU in the server to be tested by the signal acquisition script, and the signal transmission rate of the PCIE channel to be tested is changed from the original transmission rate Switch to target signaling rate.

In this embodiment, the CPU is controlled by a script to adjust the signal transmission rate of the PCIE channel, so that the signal transmission rate of the PCIE channel can realize jump switching, which effectively improves the rate of signal consistency analysis.

In another embodiment of the present application, the acquisition of the signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate includes:

S61: Transmit the signal of the PCIE channel to be tested to the oscilloscope pre-connected to the server to be tested at the target signal transmission rate.

In this embodiment, after adjusting the signal transmission rate of the PCIE channel to the target signal transmission rate, the server to be tested transmits the signal of the PCIE channel to the oscilloscope at the target signal transmission rate.

S62: Using the oscilloscope, according to the signal of the PCIE channel to be tested, generate a signal waveform diagram corresponding to the signal.

In this embodiment, when the oscilloscope receives the signal sent by the PCIE channel, it generates a waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested.

In this embodiment, the oscilloscope displays the corresponding signal waveform diagram on the display screen of the oscilloscope according to the amplitude of the signal during the signal receiving period. After the waveform diagram display is completed, the oscilloscope can also store the waveform diagram and send it to the in the server.

In another embodiment of the present application, the described signal analysis is performed on the PCIE channel to be tested according to the signal waveform diagram, and the signal analysis results are obtained, including:

S71: Comparing the signal waveform diagram with a pre-stored standard signal waveform diagram to obtain a waveform comparison result.

In this embodiment, the standard signal waveform diagram is a waveform diagram of the PCIE channel signal under normal conditions, and the standard signal waveform diagram is pre-stored in the server to be tested.

In this embodiment, after the server to be tested obtains the signal waveform diagram of the PCIE channel to be tested, it obtains a pre-stored standard signal waveform diagram from the storage space of the server, and the rate of the signal corresponding to the standard signal waveform diagram is the PCIE channel to be tested. The current rate of the channel, compare the standard signal waveform diagram with the signal waveform diagram of the PCIE channel to be tested, and obtain the comparison result of the waveform diagram.

For example, when there is a difference between the two waveform diagrams, the difference between the PCIE waveform diagram to be tested and the standard PCIE waveform diagram can be marked, and the marked PCIE waveform diagram can be used as the comparison result of the waveform diagrams.

S72: Obtain the signal analysis result according to the preset signal analysis rule and in combination with the comparison result of the waveform graph.

In this embodiment, the signal analysis rules are based on the problems existing in the signal waveform diagrams during the historical signal consistency analysis process, the summarized rules between the waveform diagram images and the corresponding problems, and the preset signal analysis rules are stored in in the server under test.

In this embodiment, the server to be tested checks the comparison result of the waveform diagram according to the pre-set signal analysis rules after obtaining the comparison result of the waveform diagram. At the same time, the corresponding signal analysis results can be obtained.

In this embodiment, the signal analysis rules can be set and summarized by themselves, and new signal analysis rules can be added to the storage space of the server to be tested at any time.

In this embodiment, after collecting the signal waveform diagram of the PCIE channel to be tested, according to the abnormalities in the signal waveform diagram, combined with the pre-set signal analysis rules, the corresponding signal analysis results are obtained, which improves the performance of PCIE signal consistency analysis. speed.

Based on the same inventive concept, an embodiment of the present application provides a signal analysis device. Referring to FIG. 5 , FIG. 5 is a schematic diagram of a signal analysis device 500 according to an embodiment of the present application. As shown in Figure 5, the device includes:

The file loading module 501 is used to load the pre-written signal acquisition script into the server under test, and the signal acquisition script is used to perform relevant tasks for the PCIE signal acquisition of the server under test according to the received instruction;

Channel information acquisition module 502, for when receiving the channel information viewing instruction for the server to be tested, obtain the channel information of all PCIE channels corresponding to the CPU in the server to be tested by the signal acquisition script;

Passage to be tested determining module 503, for determining the PCIE passage to be tested from all PCIE passages according to the passage information;

The rate switching module 504 is used to switch the signal transmission rate of the PCIE channel to be tested to the rate corresponding to the rate switching command by the signal acquisition script when receiving the rate switching command for the PCIE channel to be tested. target signaling rate;

Signal waveform diagram acquisition module 505, used to obtain the signal waveform diagram of the PCIE channel to be tested under the target signal transmission rate;

The signal analysis result acquisition module 506 is configured to perform signal analysis on the PCIE channel to be tested according to the signal waveform diagram to obtain a signal analysis result.

Optionally, the device also includes:

A device connection module, configured to connect a PC device to the server to be tested;

A program running module, configured to control the server under test to run the signal collection script through the PC device.

Optionally, the channel information acquisition module includes:

The channel scanning submodule is used to perform channel scanning on the PCIE channel by executing the information checking command through the signal acquisition script when the channel information checking command is received;

The channel information generation sub-module is used to generate the channel information of the PCIE channel according to the connection state of the PCIE channel obtained through scanning and the current signal transmission rate.

Optionally, the channel to be tested determination module includes:

A connection status determination submodule, configured to determine the connection status of each PCIE channel in all the PCIE channels according to the channel information;

The submodule for determining the channel to be tested is used to use the PCIE channel whose connection status is valid as the PCIE channel to be tested.

Optionally, the rate switching module includes:

The target signal transmission rate determination submodule is used to determine the target signal transmission rate of the PCIE channel according to the rate switching instruction;

The rate switching sub-module is used to call the PCIE channel rate adjustment module of the CPU through the signal acquisition script, and adjust the signal transmission rate of the PCIE channel to the target signal transmission rate.

Optionally, the signal waveform acquisition module includes:

The signal transmission submodule is used to transmit the signal of the PCIE channel to be tested to the oscilloscope pre-connected on the server to be tested at the target signal transmission rate;

The signal waveform diagram generation submodule is used to generate a signal waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested through the oscilloscope.

Optionally, the signal analysis result acquisition module includes:

The waveform comparison result acquisition sub-module is used to compare the signal waveform diagram with the pre-stored standard signal waveform diagram to obtain the waveform comparison result;

The signal analysis result acquisition sub-module is used to obtain the signal analysis result according to the preset signal analysis rules and in combination with the comparison result of the waveform diagram.

Based on the same inventive concept, another embodiment of the present application provides a readable storage medium on which a computer program is stored, and when the program is executed by a processor, the signal analysis method described in any of the above embodiments of the present application is implemented. step.

Based on the same inventive concept, another embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and operable on the processor. The steps in the signal analysis method described in the embodiment.

As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and for related parts, please refer to the part of the description of the method embodiment.

Each embodiment in this specification is described in a progressive manner, each embodiment focuses on the difference from other embodiments, and the same and similar parts of each embodiment can be referred to each other.

Those skilled in the art should understand that the embodiments of the present application may be provided as methods, devices, or computer program products. Therefore, the embodiment of the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

Embodiments of the present application are described with reference to flowcharts and/or block diagrams of methods, terminal devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each procedure and/or block in the flowchart and/or block diagram, and a combination of procedures and/or blocks in the flowchart and/or block diagram can be realized by computer program instructions. These computer program instructions may be provided to a general purpose computer, special purpose computer, embedded processor or processor of other programmable data processing terminal equipment to produce a machine such that instructions executed by the computer or processor of other programmable data processing terminal equipment Produce means for realizing the functions specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal to operate in a specific manner, such that the instructions stored in the computer-readable memory produce an article of manufacture comprising instruction means, the The instruction means implements the functions specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions can also be loaded into a computer or other programmable data processing terminal equipment, so that a series of operational steps are performed on the computer or other programmable terminal equipment to produce computer-implemented processing, thereby The instructions executed above provide steps for implementing the functions specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

While the preferred embodiments of the embodiments of the present application have been described, additional changes and modifications can be made to these embodiments by those skilled in the art once the basic inventive concept is understood. Therefore, the appended claims are intended to be interpreted to cover the preferred embodiment and all changes and modifications that fall within the scope of the embodiments of the application.

Finally, it should also be noted that in this text, relational terms such as first and second etc. are only used to distinguish one entity or operation from another, and do not necessarily require or imply that these entities or operations, any such actual relationship or order exists. Furthermore, the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article, or terminal equipment comprising a set of elements includes not only those elements, but also includes elements not expressly listed. other elements identified, or also include elements inherent in such a process, method, article, or terminal equipment. Without further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article or terminal device comprising said element.

The signal analysis method, device, equipment and storage medium provided by this application have been introduced in detail above. In this paper, specific examples have been used to illustrate the principle and implementation of this application. The description of the above embodiments is only used to help understanding The method of this application and its core idea; at the same time, for those of ordinary skill in the art, according to the idea of this application, there will be changes in the specific implementation and scope of application. In summary, the content of this specification should not understood as a limitation of the application.

Claims (10)

1. A method of signal analysis, the method comprising:

loading a pre-written signal acquisition script into a server to be tested, wherein the signal acquisition script is used for executing related tasks aiming at PCIE signal acquisition of the server to be tested according to a received instruction;

when a channel information checking instruction aiming at a server to be tested is received, channel information of all PCIE channels corresponding to a CPU in the server to be tested is acquired through the signal acquisition script;

determining PCIE channels to be tested from all PCIE channels according to the channel information;

when a rate switching instruction for the PCIE channel to be tested is received, switching the signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script;

Acquiring a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate;

and according to the signal waveform diagram, carrying out signal analysis on the PCIE channel to be tested to obtain a signal analysis result.

2. The method of claim 1, wherein before obtaining channel information of all PCIE channels corresponding to CPUs in the server to be tested through the signal acquisition script, the method further comprises:

connecting PC equipment to the server to be tested;

and controlling the server to be tested to run the signal acquisition script through the PC equipment.

3. The method of claim 1, wherein when the channel information viewing instruction for the server to be tested is received, obtaining, by the signal acquisition script, channel information of all PCIE channels corresponding to the CPU in the server to be tested, includes:

when the channel information checking instruction is received, executing the information checking instruction through the signal acquisition script, and carrying out channel scanning on the PCIE channel;

and generating channel information of the PCIE channel according to the connection state of the PCIE channel obtained by scanning and the current signal sending rate.

4. The method of claim 1, wherein the determining PCIE lanes to be tested from the PCIE lanes according to the lane information includes:

determining the connection state of each PCIE channel in all PCIE channels according to the channel information;

and taking the PCIE channel with the connection state of being connection-valid as the PCIE channel to be tested.

5. The method of claim 1, wherein when the rate switching instruction for the PCIE channel to be tested is received, switching, by the signal acquisition script, a signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction, includes:

determining a target signal transmission rate of the PCIE channel according to the rate switching instruction;

and calling a PCIE channel rate adjusting module of the CPU through the signal acquisition script, and adjusting the signal transmission rate of the PCIE channel to the target signal transmission rate.

6. The method of claim 1, wherein the obtaining the signal waveform diagram of the PCIE lane to be tested at the target signal transmission rate comprises:

Transmitting the signals of the PCIE channels to be tested to an oscilloscope which is connected to the server to be tested in advance at the target signal transmission rate;

and generating a signal waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested by the oscilloscope.

7. The method of claim 1, wherein the performing signal analysis on the PCIE lane to be tested according to the signal waveform diagram to obtain a signal analysis result includes:

comparing the signal waveform diagram with a pre-stored standard signal waveform diagram to obtain a waveform comparison result;

and according to a preset signal analysis rule, combining the waveform diagram comparison result to obtain the signal analysis result.

8. A signal analysis device, the device comprising:

the file loading module is used for loading a pre-written signal acquisition script into a server to be tested, and the signal acquisition script is used for executing related tasks aiming at PCIE signal acquisition of the server to be tested according to the received instruction;

the channel information acquisition module is used for acquiring the channel information of all PCIE channels corresponding to the CPU in the server to be tested through the signal acquisition script when a channel information checking instruction aiming at the server to be tested is received;

The channel to be tested determining module is used for determining PCIE channels to be tested from all PCIE channels according to the channel information;

the rate switching module is used for switching the signal transmission rate of the PCIE channel to be tested to the target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script when the rate switching instruction for the PCIE channel to be tested is received;

the signal waveform diagram acquisition module is used for acquiring a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate;

and the signal analysis result acquisition module is used for carrying out signal analysis on the PCIE channel to be tested according to the signal waveform diagram to obtain a signal analysis result.

9. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method according to any one of claims 1 to 7.

10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 7 when executing the computer program.

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