CN116318154A - Analog-to-digital conversion device and signal conversion equipment - Google Patents
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Abstract
The utility model relates to an analog-to-digital conversion device and signal conversion equipment, including the first ADC that connects gradually, multichannel level switching device and second ADC, input level is all received to first ADC and second ADC, first ADC is used for according to input level output first digital signal to multichannel level switching device, multichannel level switching device is used for according to first digital signal output reference signal to second ADC, second ADC is used for producing the second digital signal according to input level and reference signal, first digital signal and second digital signal are as analog-to-digital conversion device's digital output. The input level is divided into signal intervals through a first ADC with a faster conversion rate, then a reference signal is obtained, the input level and the reference signal are input into a second ADC with a higher rear end precision, so that high-speed and high-precision analog-to-digital conversion can be realized, and the working performance of the analog-to-digital conversion device is improved.
Description
Technical Field
The present disclosure relates to the field of signal processing technologies, and in particular, to an analog-to-digital conversion device and a signal conversion apparatus.
Background
Analog-to-digital converters (ADCs) are a type of circuit that converts continuous signals in analog form into discrete signals in digital form, and are also an important component of bridges connecting the real world to the digital world, where temperature, sound, images, etc. are continuous signals in analog form, which can be converted into digital signals in discrete form by the ADC for storage and processing by electronic devices. At the same time, the ADC is also an important component in the communication receiver circuit, and the performance of the ADC has a significant influence on the quality of communication.
The main performance indexes of the ADC include conversion precision, conversion rate and the like, and the higher the number of bits of the ADC is, the higher the precision is. In the prior art, the ADC with higher conversion rate usually cannot achieve higher bit number, but the ADC with higher conversion rate is slower, and the chip with high accuracy and high conversion rate is in the international forbidden operation range. Therefore, the conventional ADC has poor operation performance.
Disclosure of Invention
Based on this, it is necessary to provide an analog-to-digital conversion apparatus and a signal conversion device capable of improving the operation performance.
The analog-to-digital conversion device comprises a first ADC, a multipath level switching device and a second ADC which are sequentially connected, wherein the first ADC and the second ADC both receive input levels; the conversion rate of the first ADC is greater than that of the second ADC, and the precision of the second ADC is higher than that of the first ADC;
the first ADC is used for outputting a first digital signal to the multi-path level switching device according to the input level;
the multi-channel level switching device is used for outputting a reference signal to the second ADC according to the first digital signal;
the second ADC is configured to generate a second digital signal based on the input level and the reference signal; the first digital signal and the second digital signal are output as digital quantities.
In one embodiment, the multi-level switching device is a DAC chip.
In one embodiment, the first ADC is the same type as the second ADC.
In one embodiment, the number of output bits of the first ADC is less than the number of output bits of the second ADC.
In one embodiment, the first ADC is of a different type than the second ADC.
In one embodiment, the first ADC is a parallel comparison ADC and the second ADC is an oversampling ADC.
In one embodiment, the multi-level switching device is a multi-level switching circuit.
In one embodiment, the second ADC is configured to generate a second digital signal based on a difference between the input level and the reference signal.
In one embodiment, the input bits of the multi-level switching device are matched with the output bits of the first ADC.
A signal conversion device comprising an analog-to-digital conversion apparatus as described above.
The analog-to-digital conversion device and the signal conversion equipment comprise a first ADC, a multi-channel level switching device and a second ADC which are sequentially connected, wherein the first ADC and the second ADC are used for receiving input levels, the first ADC is used for outputting a first digital signal to the multi-channel level switching device according to the input levels, the multi-channel level switching device is used for outputting a reference signal to the second ADC according to the first digital signal, the second ADC is used for generating a second digital signal according to the input levels and the reference signal, and the first digital signal and the second digital signal are used as digital quantity output of the analog-to-digital conversion device. Because the conversion rate of the first ADC is greater than that of the second ADC, the precision of the second ADC is higher than that of the first ADC, the input level firstly divides a signal interval through the first ADC with higher conversion rate, then the first digital signal is processed by the multi-level switching device to obtain a reference signal, the input level and the reference signal are input into the second ADC with higher precision at the rear end, and the first digital signal and the second digital signal are output as digital quantities of the analog-to-digital conversion device, so that the high-speed and high-precision analog-to-digital conversion can be realized, and the working performance of the analog-to-digital conversion device is improved.
Drawings
In order to more clearly illustrate the technical solutions of embodiments or conventional techniques of the present application, the drawings required for the descriptions of the embodiments or conventional techniques will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
FIG. 1 is a schematic block diagram of an analog-to-digital conversion apparatus according to an embodiment;
FIG. 2 is a schematic diagram of a first ADC in an embodiment;
FIG. 3 is a schematic diagram of the output relationship of a first ADC according to an embodiment;
fig. 4 is a schematic structural diagram of an analog-to-digital conversion apparatus in an embodiment.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Examples of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that the terms "first," "second," and the like, as used herein, may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element. For example, a first resistance may be referred to as a second resistance, and similarly, a second resistance may be referred to as a first resistance, without departing from the scope of the present application. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
It is to be understood that in the following embodiments, "connected" is understood to mean "electrically connected", "communicatively connected", etc., if the connected circuits, modules, units, etc., have electrical or data transfer between them.
It is understood that "at least one" means one or more and "a plurality" means two or more. "at least part of an element" means part or all of the element.
As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," and/or the like, specify the presence of stated features, integers, steps, operations, elements, components, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or groups thereof. Also, the term "and/or" as used in this specification includes any and all combinations of the associated listed items.
The analog-to-digital conversion device is used for converting the continuously-changed analog signals into discrete digital signals so as to facilitate storage and processing of electronic equipment. The digital signal itself represents only a relative magnitude, the analog-to-digital conversion means taking the reference analog quantity as a standard for conversion, the digital quantity being output representing the magnitude of the input signal relative to the reference signal. The analog conversion device can be applied to various technical fields such as communication, sensors and the like.
In one embodiment, as shown in fig. 1, the analog-to-digital conversion apparatus includes a first ADC120, a multi-path level switching apparatus 200, and a second ADC140, which are sequentially connected, and each of the first ADC120 and the second ADC140 receives an input level. The slew rate of the first ADC120 is greater than the slew rate of the second ADC140, and the accuracy of the second ADC140 is greater than the accuracy of the first ADC 120. The first ADC120 is configured to output a first digital signal to the multi-level switching device 200 according to an input level, the multi-level switching device 200 is configured to output a reference signal to the second ADC140 according to the first digital signal, the second ADC140 is configured to generate a second digital signal according to the input level and the reference signal, and the first digital signal and the second digital signal are output as digital values of the analog-to-digital conversion device. Because the conversion rate of the first ADC120 is greater than that of the second ADC140, the accuracy of the second ADC140 is higher than that of the first ADC120, the input level is firstly divided into signal intervals by the first ADC120 with a faster conversion rate, then the first digital signal is passed through the multi-level switching device 200 to obtain a reference signal, the input level and the reference signal are input into the second ADC140 with a higher accuracy at the rear end, and the first digital signal and the second digital signal are output as digital values of the analog-digital conversion device, so that the high-speed and high-accuracy analog-digital conversion can be realized, and the working performance of the analog-digital conversion device is improved.
Specifically, the first ADC120After receiving the input level, the first digital signal is output to the multi-channel level switching device 200 connected thereto according to the received input level. Taking the first ADC120 as an ADC chip, the ADC chip has a small package size, which not only can effectively reduce the area on the board, but also is easy to install and debug. As shown in fig. 2, for the first ADC120,V in is the input level of the first ADC120,V e1 is the ground level of the first ADC120, i.e., the reference 0 level.V ref Is the reference level of the first ADC120, determines the range of the chip measurement signal [A 1 、A 2 、...、A n ]Is the binary digital output of the first ADC120, i.e., the first digital signal, and the number of bits n determines the output accuracy of the first ADC 120. The output D of the first ADC120 is (integer):
as shown in fig. 3, the horizontal axis is the ratio of the input level of the first ADC120 to the reference level, and the vertical axis is the output of the first ADC 120. The first ADC120 outputs a signal variation amount indicated by the minimum intervalLSB=V ref And/8, outputting [000 ] by a chip corresponding to the 0-1/2 LSB segment of the analog input]Analog input 1/2LSB~1/2LSB+V ref /8. It can be seen that the minimum error of the first ADC120 is + -1/2LSB，I.e. the output accuracy of the first ADC 120. From this, the higher the number of bits of the first ADC120, the higher the accuracy. For example, whenV ref When=1v and n=3, the first ADC120 can only measure the output of 0-1 v, and the precision is 3 bits. When input V in When=0.8v, d=6.4≡6, i.e. [A 1 、A 2 、A 3 ]=[1、1、0]. Here, it can be seen that the value of D can only be an integer, and the signal variation LSB indicated by the chip output minimum interval is:
the multi-channel level switching device 200 is configured to correspondingly output a high-precision level according to the digital input, where in the present application, the digital input of the multi-channel level switching device 200 is a first digital signal, the high-precision level is a reference signal, and the reference signal is an analog quantity. The multi-channel level switching device 200 converts the digital quantity into the analog quantity, generates a reference signal according to the first digital signal after receiving the first digital signal, and transmits the reference signal to the second ADC140.
After receiving the input level and the reference signal, the second ADC140 generates a second digital signal based on the received input level and reference signal. The operation principle of the second ADC140 is similar to that of the first ADC120, and will not be described herein.
The first digital signal and the second digital signal are jointly used as digital quantity output of the analog-to-digital conversion device, and further, the first digital signal and the second digital signal sequentially form digital quantity output of the analog-to-digital conversion device, the first digital signal is in front, and the second digital signal is in back. For example, when the first digital signal is [A 1 、A 2 、A 3 、A 4 ]The second digital signal is [A 5 、A 6 、A 7 、A 8 、A 9 、A 10 、A 11 、A 12 、A 13 ]The digital quantity output of the analog-to-digital conversion device is [A 1 、A 2 、A 3 、A 4 、A 5 、A 6 、A 7 、A 8 、A 9 、A 10 、A 11 、A 12 、A 13 ]。
The configuration and type of the multi-level switching device 200 is not unique, for example, in one embodiment the multi-level switching device 200 is a DAC chip. The DAC chip can realize conversion from digital quantity to analog quantity, correspondingly outputs a high-precision level according to digital quantity input, can realize a powerful data processing function by using a smaller volume, has high processing speed and can improve working efficiency. The reference signals output by the DAC chip are as follows:
where n is the number of input bits of the DAC chip,
is the reference level of the DAC chip.
It can be appreciated that in other embodiments, the multi-level switching device 200 may be a multi-level switching circuit configured by a person skilled in the art according to actual requirements, and the structure of the multi-level switching circuit may be set according to actual requirements, which is not limited herein, so long as a function of outputting a level according to digital input can be implemented.
In one embodiment, the first ADC120 is the same type as the second ADC140. The types of the first ADC120 and the second ADC140 may be the same as long as it is possible to realize that the conversion rate of the first ADC120 is greater than that of the second ADC140, and the accuracy of the second ADC140 is higher than that of the first ADC 120. For example, the first ADC120 may be any one of a parallel comparison ADC, a successive approximation ADC, a double integration ADC, a pipeline ADC, a voltage-to-frequency conversion ADC, and an oversampling ADC, and the second ADC140 may be any one of a parallel comparison ADC, a successive approximation ADC, a double integration ADC, a pipeline ADC, a voltage-to-frequency conversion ADC, and an oversampling ADC. The advantages and disadvantages of parallel comparison ADC, successive approximation ADC, double integration ADC, pipelined ADC, voltage-to-frequency conversion ADC, and oversampling ADC are shown in table 1:
TABLE 1
Further, in one embodiment, to achieve a slew rate of the first ADC120 that is greater than a slew rate of the second ADC140, the accuracy of the second ADC140 is greater than the accuracy of the first ADC120, the first ADC120 and the second ADC140 may be selected such that the number of output bits of the first ADC120 is less than the number of output bits of the second ADC140. When the number of output bits of the first ADC120 is smaller than the number of output bits of the second ADC140, the accuracy of the first ADC120 is lower than the accuracy of the second ADC140, and correspondingly, since the accuracy of the first ADC120 is lower, in general, the faster the slew rate of the first ADC120 is, the greater the slew rate of the second ADC140.
In one embodiment, the first ADC120 is of a different type than the second ADC140. The types of the first ADC120 and the second ADC140 may be different as long as it is possible to realize that the conversion rate of the first ADC120 is greater than that of the second ADC140, and the accuracy of the second ADC140 is higher than that of the first ADC 120. For example, the first ADC120 is a parallel comparison ADC, the second ADC140 is an over-sampling ADC, and the conversion rate of the parallel comparison ADC is greater than that of the over-sampling ADC, and the accuracy of the over-sampling ADC is higher than that of the parallel comparison ADC.
It will be appreciated that in other embodiments, the first ADC120 may be any one of a successive approximation ADC, a double integration ADC, a pipeline ADC, a voltage-to-frequency conversion ADC, and an oversampling ADC, and the second ADC140 may be any one of a parallel comparison ADC, a successive approximation ADC, a double integration ADC, a pipeline ADC, and a voltage-to-frequency conversion ADC, which are different from the first ADC120, so long as the conversion rate of the first ADC120 is greater than the conversion rate of the second ADC140, and the precision of the second ADC140 is higher than the precision of the first ADC 120. For example, the first ADC120 may also be an oversampling ADC, and the second ADC140 may also be a voltage-to-frequency conversion ADC. The type combination of the first ADC120 and the second ADC140 is not limited herein.
Further, in one embodiment, the second ADC140 generates a second digital signal based on the difference between the input level and the reference signal when performing data conversion. The reference signal is a signal of which the input level is converted by the first ADC120 and the multi-channel level switching device 200, the signal interval can be divided after the input level is converted by the first ADC120, the second ADC140 generates a second digital signal according to the difference between the input level and the reference signal, and the signal conversion can be performed in the interval divided by the first ADC120 due to the subtraction of the reference signal, so as to realize more comprehensive data conversion.
In one embodiment, the multi-level switching device 200 matches the number of output bits of the first ADC 120. The input side of the multi-level switching device 200 receives the first digital signal output by the output side of the first ADC120, and the matching of the input bit number of the multi-level switching device 200 with the output bit number of the first ADC120 means that the input bit number of the multi-level switching device 200 is the same as the output bit number of the first ADC120, or the difference between the input bit number of the multi-level switching device 200 and the output bit number of the first ADC120 is within an allowable error range, for example, the difference is 1.
For a better understanding of the above embodiments, a detailed explanation is provided below in connection with a specific embodiment. Considering that the ADC with the highest conversion rate cannot normally make a higher number of bits, the ADC with higher accuracy converts slowly, and the chip with high accuracy and high conversion rate is in the international forbidden operation range, the application provides an analog-digital conversion device. In one embodiment, as shown in fig. 4, the analog-to-digital conversion device includes a first ADC120, a multi-channel level switching device 200, and a second ADC140, which are sequentially connected, where the first ADC120 is a parallel comparison ADC, the multi-channel level switching device 200 is a DAC, and the second ADC140 is an oversampling ADC. As shown in FIG. 4, the input level isV in Firstly, dividing a signal interval by a parallel comparison type ADC with higher conversion rate, and then obtaining a reference signal by a DAC or a high-precision multipath level switching circuit of a signal output by the parallel comparison type ADCV out Will input the levelV in With reference signalV out The high-speed and high-precision ADC combined module, namely the analog-to-digital conversion device of the application, can be realized by performing differential re-input and then performing over-sampling ADC with higher rear end precision.
For example, the first ADC120 is a four-bit output ADC chip, the multi-level switching device 200 is a DAC chip, and the second ADC140 is a six-bit output ADC chip. Reference voltage of the first ADC120V ref1 =2v, reference voltage of the second ADC140V ref2 Reference voltage of dac chip =0.125vV ref3 =2V。
Specifically, the first ADC120 will input a levelV in Divided into 2 4 =16 pieces, correspond to [ [A 1 、A 2 、A 3 、A 4 ]Take the values 0, 0]~[1、1、1、1]. After the output of the first ADC120 is converted by the DAC chip, 16 standard levels are respectively outputV out The method comprises the following steps:
then, input levelV in And a reference signal output from the DAC chipV out After differential, the differential voltage is sent to the second ADC140, and the second ADC140 continuously divides the differential voltage into 2 6 =64 pieces, correspond to [A 5 、A 6 、A 7 、A 8 、A 9 、A 10 ]Take the values [0, 0]~[1、1、1、1、1、1]. The output of the two ADC chips is sequentially arranged to be the final output of the analog-to-digital conversion device: [A 1 、A 2 、A 3 、A 4 、A 5 、A 6 、A 7 、A 8 、A 9 、A 10 ]。
Example 1 is:
1) When the input level is 1.52V, the first ADC120 outputs a first digital signal D 1 The method comprises the following steps:
namely [A 1 、A 2 、A 3 、A 4 ]=[1、1、0、0]。
2) Reference signal output by DAC chipV out The method comprises the following steps:
input levelV in And a reference signal output from the DAC chipV out Is 0.02V.
3) Second oneADC140 outputs a second digital signal D 2 The method comprises the following steps:
namely [A 5 、A 6 、A 7 、A 8 、A 9 、A 10 ]=[0、0、1、0、1、0]。
4) The digital quantity output of the whole analog-digital conversion device is as follows:
[A 1 、A 2 、A 3 、A 4 、A 5 、A 6 、A 7 、A 8 、A 9 、A 10 ]=[1、1、0、0、0、0、1、0、1、0]。
in another embodiment (comparative example 1) if a 10-bit ADC chip is directly selected, the chip output D is:
namely [A 1 、A 2 、A 3 、A 4 、A 5 、A 6 、A 7 、A 8 、A 9 、A 10 ]=[1、1、0、0、0、0、1、0、1、0]。
The output result of embodiment 1 is the same as that of comparative example 1, i.e., the analog-to-digital conversion apparatus proposed in the present application also realizes the output accuracy of the 10-bit ADC. That is, the analog-to-digital conversion apparatus of the present application can achieve the same output accuracy as that of the monolithic ADC chip, but since the higher the number of bits of the monolithic ADC chip is, the worse other performances are, for example, the higher the number of bits is, the lower the conversion rate is, the higher the cost is, the higher the loss is, and the like. Therefore, under the condition that the same output precision can be realized, the analog-to-digital conversion device adopts the combination form of the ADC, the ADC with lower conversion precision can be used for cooperative work, high-speed and high-precision sampling can be realized, and the cost and the power consumption are reduced.
In an embodiment, a signal conversion device is provided, comprising the analog-to-digital conversion apparatus of any of the embodiments described above. The signal conversion device is used for realizing the signal conversion function. It will be appreciated that the signal conversion apparatus may comprise one or more analogue to digital conversion means and may comprise other devices which co-operate with the analogue to digital conversion means to achieve corresponding functions, which applicant does not limit.
The signal conversion equipment comprises an analog-to-digital conversion device, wherein the analog-to-digital conversion device comprises a first ADC, a multi-channel level switching device and a second ADC which are sequentially connected, the first ADC and the second ADC are both used for receiving input levels, the first ADC is used for outputting a first digital signal to the multi-channel level switching device according to the input levels, the multi-channel level switching device is used for outputting a reference signal to the second ADC according to the first digital signal, the second ADC is used for generating a second digital signal according to the input levels and the reference signal, and the first digital signal and the second digital signal are used as digital quantity output of the analog-to-digital conversion device. Because the conversion rate of the first ADC is greater than that of the second ADC, the precision of the second ADC is higher than that of the first ADC, the input level firstly divides a signal interval through the first ADC with higher conversion rate, then the first digital signal is processed by the multi-level switching device to obtain a reference signal, the input level and the reference signal are input into the second ADC with higher precision at the rear end, and the first digital signal and the second digital signal are output as digital quantities of the analog-to-digital conversion device, so that the high-speed and high-precision analog-to-digital conversion can be realized, the working performance of the analog-to-digital conversion device is improved, and the working performance of signal conversion equipment is improved.
In the description of the present specification, reference to the term "some embodiments," "other embodiments," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.
Claims (10)
1. The analog-to-digital conversion device is characterized by comprising a first ADC, a multi-channel level switching device and a second ADC which are sequentially connected, wherein the first ADC and the second ADC both receive input levels; the conversion rate of the first ADC is greater than that of the second ADC, and the precision of the second ADC is higher than that of the first ADC;
the first ADC is used for outputting a first digital signal to the multi-path level switching device according to the input level;
the multi-channel level switching device is used for outputting a reference signal to the second ADC according to the first digital signal;
the second ADC is configured to generate a second digital signal based on the input level and the reference signal; the first digital signal and the second digital signal are output as digital quantities.
2. The analog-to-digital conversion apparatus of claim 1, wherein the multi-path level switching means is a DAC chip.
3. The analog-to-digital conversion apparatus according to claim 1, wherein the first ADC and the second ADC are of the same type.
4. The analog-to-digital conversion apparatus according to claim 3, wherein the number of output bits of the first ADC is smaller than the number of output bits of the second ADC.
5. The analog-to-digital conversion apparatus according to claim 1, wherein the first ADC and the second ADC are different in type.
6. The analog-to-digital conversion apparatus of claim 5, wherein the first ADC is a parallel comparison ADC and the second ADC is an oversampling ADC.
7. The analog-to-digital conversion apparatus of claim 1, wherein the multi-level switching means is a multi-level switching circuit.
8. The analog-to-digital conversion apparatus of claim 1, wherein the second ADC is configured to generate a second digital signal based on a difference between the input level and the reference signal.
9. The analog-to-digital conversion apparatus of claim 1, wherein the number of input bits of said multi-level switching means matches the number of output bits of said first ADC.
10. A signal conversion device comprising an analog-to-digital conversion apparatus as claimed in any one of claims 1 to 9.
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