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CN116302687A - Communication recovery method, device, system and readable storage medium - Google Patents

Communication recovery method, device, system and readable storage medium Download PDF

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Publication number
CN116302687A
CN116302687A CN202310144931.8A CN202310144931A CN116302687A CN 116302687 A CN116302687 A CN 116302687A CN 202310144931 A CN202310144931 A CN 202310144931A CN 116302687 A CN116302687 A CN 116302687A
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China
Prior art keywords
signal
serial
data line
serial data
line
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CN202310144931.8A
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Chinese (zh)
Inventor
李建荣
刘元财
张泫舜
陈浩宇
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Ecoflow Technology Ltd
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Ecoflow Technology Ltd
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Priority to CN202310144931.8A priority Critical patent/CN116302687A/en
Publication of CN116302687A publication Critical patent/CN116302687A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/4031Coupling between buses using bus bridges with arbitration
    • G06F13/4036Coupling between buses using bus bridges with arbitration and deadlock prevention
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016Inter-integrated circuit (I2C)
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)

Abstract

The application provides a communication recovery method, a device, a system and a readable storage medium. The communication recovery method comprises the following steps: if the serial data line is detected to be in a deadlock state, performing signal recovery operation on the serial clock line, and acquiring a data signal corresponding to a clock signal on the serial clock line from the serial data line; the signal recovery operation is to set the clock signal as the first level signal and then set the clock signal as the second level signal, if the data signal is detected as the second level signal, the serial clock line and the serial data line are controlled to output release signals so that the serial data line is in a deadlock state.

Description

Communication recovery method, device, system and readable storage medium
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a communication recovery method, device, system, and readable storage medium.
Background
At present, when a master device and a slave device communicate through an I2C (Inter-Integrated Circuit) bus, if an abnormal level on a serial data line in the I2C bus is pulled down, the I2C bus is in a deadlock state, so that normal communication between devices cannot be performed through the bus.
Disclosure of Invention
In view of the foregoing, it is necessary to provide a communication recovery method, apparatus, system and readable storage medium, which solve the technical problem that the I2C bus is in a deadlock state and normal communication cannot be performed between devices.
The application provides a communication recovery method, which is applied to a first device, wherein the first device is communicated with at least one second device through a bus, the bus comprises a serial clock line and a serial data line, and the communication recovery method comprises the following steps: if the serial data line is detected to be in a deadlock state, performing signal recovery operation on the serial clock line, and acquiring a data signal corresponding to a clock signal on the serial clock line from the serial data line; the signal recovery operation is to set the clock signal as a first level signal and then set the clock signal as a second level signal; and if the data signal is detected to be the second level signal, controlling the serial clock line and the serial data line to output release signals so as to release the deadlock state of the serial data line.
Through the embodiment, the communication recovery method is applied to the first device, and the first device can be the slave device or the master device mounted on the bus, and is not limited to the master device, so that the application range of the device is enlarged. The signal recovery operation is to set the clock signal to the first level signal and then set the clock signal to the second level signal. The first level signal may be a low level and the second level signal may be a high level. Since the signal recovery operation causes the clock signal to change in level, the data signal can change from low to high only when the clock signal is low during the data transmission process. And when the data signal is found to be recovered to a high level, the serial clock line and the serial data line are controlled to output release signals, so that the first equipment and the second equipment can stop transmitting data on the serial data line, the serial data line is recovered to an idle state, the serial data line can be released from a deadlock state, and normal communication between the first equipment and the second equipment is recovered.
In one embodiment, after acquiring a data signal corresponding to a clock signal on a serial clock line from the serial data line, the communication recovery method includes: if the data signal is detected to be the first level signal, adding 1 to the first recovery times, and when the first recovery times are smaller than a first threshold value, returning to execute the step of controlling the clock signal on the serial clock line to execute the signal recovery operation.
In an embodiment, the electronic device performs the signal recovery operation a plurality of times when the first recovery number is smaller than the first threshold value, and therefore, when the data signal transmitted in the serial data line is not all low level, the probability that the detected data signal is high level can be improved.
In an embodiment, after adding 1 to the first recovery number, the communication recovery method further includes: and when the first recovery times are greater than or equal to the first threshold value, resetting the first recovery times, and controlling the serial clock line and the serial data line to output release signals so as to release the deadlock state of the serial data line.
In one embodiment, the first threshold is any value greater than a number of bytes, where the number of bytes is the number of bytes that can be sent at one time when communicating using the serial data line.
When the data signal transmitted in the serial data line is at the full low level and the first recovery number is the same as the number of bytes, the data signal at the high level cannot be detected, and by setting the first threshold to a value larger than the number of bytes, more data signals can be acquired and the situation of the data signal just staying at the full low level is reduced, thereby improving the probability that the detected data signal is at the high level.
In one embodiment, after controlling the serial clock line and the serial data line to output the release signal, the communication recovery method further includes: if the serial data line is detected not to be in the deadlock state, adding 1 to the second recovery times, and when the second recovery times are smaller than a second threshold value, returning to execute the step of controlling the clock signal on the serial clock line to execute the signal recovery operation.
In an embodiment, after adding 1 to the second recovery number, the communication recovery method further includes: and restarting the serial clock line and the serial data line when the second recovery number is greater than or equal to a second threshold.
In this embodiment, the serial data line is restarted only when the serial data line still cannot be relieved from the deadlock state after multiple times of recovery, so that the data loss can be reduced to the greatest extent.
In an embodiment, the communication recovery method further includes: and sending the detection information through the serial clock line and the serial data line, and if no response information corresponding to the detection information is received, determining that the serial data line is not in a deadlock state.
In this embodiment, by sending the probe information, it can be verified whether the serial data line is free from the deadlock state, and a preliminary determination is provided for whether the electronic device needs to be restored again.
In an embodiment, the communication recovery method further includes: if the data signal of the serial data line is detected to be the first level signal, and the duration time of the data signal being the first level signal is longer than the preset duration time, determining that the serial data line is in a deadlock state.
In this embodiment, when the data signal is found to be able to recover to the high level, the serial clock line and the serial data line are controlled to output the release signal, so that the serial data line can be quickly recovered to the idle state, and the deadlock state of the serial data line can be quickly released.
The application provides a communication recovery device, operates in first equipment, and first equipment communicates with at least one second equipment through the bus, and the bus includes serial clock line and serial data line, and communication recovery device includes: the control unit is used for executing signal recovery operation on the serial clock line if the serial data line is detected to be in a deadlock state; the signal recovery operation is to set the clock signal as a first level signal and then set the clock signal as a second level signal; an acquisition unit, configured to acquire a data signal corresponding to a clock signal on a serial clock line from the serial data line; and the control unit is also used for controlling the serial clock line and the serial data line to output a release signal when the data signal is detected to be the second level signal so as to release the deadlock state of the serial data line.
The application provides a communication recovery system, which comprises a bus, a first device and at least one second device; the first device and the second device communicate via a bus comprising a serial clock line and a serial data line, the first device comprising: a memory storing at least one instruction; and the processor acquires the instructions stored in the memory to realize the communication recovery method.
The present application provides a computer-readable storage medium having stored therein at least one instruction that is fetched by a processor in an electronic device to implement a communication restoration method.
Drawings
Fig. 1 is an application environment diagram of a communication recovery method provided in an embodiment of the present application.
Fig. 2 is a flowchart of a communication recovery method according to an embodiment of the present application.
Fig. 3 is a flowchart of a communication recovery method according to another embodiment of the present application.
Fig. 4 is a flowchart of a communication recovery method according to another embodiment of the present application.
Fig. 5 is a functional block diagram of a communication recovery device provided in an embodiment of the present application.
Fig. 6 is a schematic structural diagram of a communication recovery system provided in an embodiment of the present application.
Detailed Description
It should be noted that "at least one" in this application means one or more, and "a plurality" means two or more. "and/or", describes an association relationship of an association object, and the representation may have three relationships, for example, a and/or B may represent: a alone, a and B together, and B alone, wherein a, B may be singular or plural. The terms "first," "second," "third," "fourth" and the like in the description and in the claims and drawings, if any, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
In the embodiments of the present application, words such as "exemplary" or "such as" are used to mean serving as examples, illustrations, or descriptions. Any embodiment or design described herein as "exemplary" or "for example" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "such as" is intended to present related concepts in a concrete fashion. The following embodiments and features of the embodiments may be combined with each other without conflict.
When communication is performed through an I2C (Inter-Integrated Circuit) bus at present, the level on a serial data line in the I2C bus may be abnormally lowered due to abnormal conditions such as reset of a master device, so that the I2C bus is in a deadlock state, and normal communication cannot be performed between all devices mounted on the I2C bus through the bus.
In order to solve the above-mentioned problems, an embodiment of the present application provides a communication recovery method, which enables a bus to recover from a deadlock state by performing operations such as mode adjustment and initialization processing on the deadlock bus, so that a device normally transmits data.
The communication restoration method is applicable to a first device, which may be any one of the electronic devices on the bus. For ease of illustration, embodiments of the present application may define electronic devices other than a first device as second devices mounted on a bus, which may have one or more second devices mounted thereon.
The bus may be a bus having a serial clock line and a serial data line, for example, the bus may be an I2C bus. The I2C bus may mount a plurality of devices, which may include a master device and at least one slave device having independent device addresses, each device connected to the I2C bus may connect the serial data line and the serial clock line to the positive supply voltage line through a pull-up resistor or a current source.
As shown in fig. 1, an application environment diagram of a communication recovery method provided in an embodiment of the present application is shown. The first device 1 and the second device 2 in fig. 1 each connect the serial data line and the serial clock line to the positive supply voltage line through a pull-up resistor RP. All the devices and means illustrated in fig. 1 are only examples.
The I2C bus is a Serial bus composed of a Serial Data Line (SDA) and a Serial clock Line (Serial Clock Line, SCL), and the I2C bus can transmit and receive Data.
And a plurality of devices, such as a first device and a second device, mounted on the I2C bus. The first device and the second device may be the same type of electronic device, or may be different types of electronic devices. The electronic device may include, but is not limited to: microprocessors, application specific integrated circuits (Application Specific Integrated Circuit, ASIC), programmable gate arrays (Field-Programmable Gate Array, FPGA), digital signal processors (Digital Signal Processor, DSP), embedded devices, static random access memories (StaticRandom Access Memory, SRAM) or Electronically Erasable Programmable Read Only Memories (EEPROM), analog to digital converters (Analogto Digital Converter, ADC) or digital to analog converters (Digital to Analog Converter, DAC), clock calendars and other I2C peripherals, and the like.
The plurality of devices mounted on the I2C bus may also be modules with programmed functions, such as a single chip microcomputer, a programmable logic controller (Programmable Logic Controller, PLC) or a functional interface device, such as a temperature sensor, etc.
In the process of information transmission, each device connected in parallel on the I2C bus may be either a master device (or a slave device) or a transmitting device (or a receiving device), depending on the function to be completed by each device connected in parallel on the I2C bus, where the device address of each slave device is stored in the master device. When the I2C bus is in an idle state, both the serial data line and the serial clock line are high.
Fig. 2 is a flowchart of a communication recovery method according to an embodiment of the present application. The sequence of the steps in the flow chart can be adjusted according to the actual detection requirement according to different requirements, and certain steps can be omitted. The execution subject of the communication restoration method may be a first device, which may be a master device or a slave device, for example, the first device 1 in fig. 1.
S101, if the serial data line is detected to be in a deadlock state, a signal recovery operation is executed on the serial clock line, wherein the signal recovery operation is that after a clock signal is set to a first level signal, the clock signal is set to a second level signal.
In at least one embodiment of the present application, the method for detecting that the serial data line is in a deadlock state by the first device includes: if the data signal of the serial data line is detected to be the first level signal and the duration time of the data signal being the first level signal is longer than the preset duration time, the electronic equipment determines that the serial data line is in a deadlock state. The preset duration can be set by itself, which is not limited in this application. For example, the preset time period is 30 seconds.
In at least one embodiment of the present application, the method further includes, before controlling the clock signal on the serial clock line to perform the signal recovery operation, the first device: the electronic device configures a mode of the serial clock line as an output mode and configures a mode of the serial data line as an input mode. For example, the output mode may be an open drain output mode or a push-pull output mode, and the input mode may be a floating input mode. In this embodiment, the output mode is determined according to whether a circuit corresponding to the bus has a pull-up resistor, if the circuit corresponding to the bus has the pull-up resistor, the electronic device configures the serial clock line into the open drain output mode, and if the circuit corresponding to the bus does not have the pull-up resistor, the electronic device configures the serial clock line into the push-pull output mode.
S102, acquiring a data signal corresponding to a clock signal on a serial clock line from the serial data line.
In an embodiment of the present application, the electronic device obtains a data signal corresponding to the clock signal from the serial data line, where the data signal may be a first level signal or a second level signal. As an example above, the first level signal may be low and the second level signal may be high.
In an embodiment of the present application, the first device may receive a data signal corresponding to a clock signal actively sent by the second device. For example, it may be that the master device receives the report information of the slave device, and determines whether communication between the master device and the slave device is abnormal by reading a data signal in the report information.
In another embodiment of the present application, the first device may send a read instruction to the second device, and after receiving the response information returned by the second device, receive a data signal corresponding to the clock signal sent from the second device. For example, the master device sends a read instruction of the designation information to the slave device, and the slave device sends response information to the master device according to the received read instruction of the designation information, wherein the response information indicates that the master device can read the designation information, so that the master device accesses the designation information according to the received response information.
And S103, if the data signal is detected to be the second level signal, controlling the serial clock line and the serial data line to output release signals so as to release the deadlock state of the serial data line.
In at least one embodiment of the present application, the release signal indicates a signal for terminating communication, that is, the first device and the second device are caused to exit the communication mode by notifying the end of communication between the first device and the second device by the release signal, and the data signal of the serial data line is at a high level (that is, a second level signal).
In at least one embodiment of the present application, the first device controlling the serial clock line and the serial data line to output the release signal includes: the first device sets the clock signal on the serial clock line to a high level so that the data signal output by the serial data line is at a level that changes from low to high.
In at least one embodiment of the present application, when the serial data line is pulled down to a low level by the electronic device with abnormal communication, for the electronic device with normal communication, if the data signal is detected to be a low level, the I2C bus is considered to be occupied, and the data signal is always waited to be a high level. In this case, the master device controlling the serial clock line waits for the communication-abnormal electronic device to change the data signal to the high level, and at the same time, the communication-abnormal electronic device waits for the master device to set the clock signal to the low level, and the master device and the communication-abnormal electronic device wait for each other, at this time, the serial data line enters a deadlock state.
In at least one embodiment of the present application, a master device on an I2C bus may record a device address of a slave device that communicates after arbitration, and report the recorded slave device address to a visualization interface or an upper computer that communicates with the master device. Therefore, if the first device is a master device, the first device can directly acquire the slave device address, and if the first device is a slave device, the first device acquires the device address from the upper communication computers, so that the electronic device causing the serial data line to be in a deadlock state and abnormal communication can be primarily screened. Through screening out the electronic equipment with abnormal communication and carrying out targeted communication recovery on the electronic equipment with abnormal communication, the operation that all electronic equipment need to be examined for each communication recovery can be reduced, the communication recovery efficiency is improved, and meanwhile, the communication recovery difficulty and risk are reduced.
Wherein, the upper computer is a computer or a singlechip which directly sends operation instructions. For example, the upper computer may be: computers, cell phones, tablets, panels, touch screens, and the like. The host computer and the mounting equipment on the bus can adopt various communication modes, such as serial port communication, wi-Fi communication and the like.
In addition, when a communication abnormality occurs, the number of recordings corresponding to the last slave address recorded before the communication abnormality may be increased by 1. In this way, the number of recordings corresponding to each slave device address can reflect the stability of each slave device, with a greater number of recordings indicating that the slave device is less stable and a lesser number of recordings indicating that the slave device is more stable. Therefore, the manager can conveniently conduct targeted investigation on the slave equipment corresponding to a large number of recording times. In this embodiment, when the first device finds that the data signal is recovered to the high level, the first device may control the serial clock line and the serial data line to output the release signal, so that the first device and the second device can stop transmitting data on the serial data line, and the serial data line is recovered to the idle state, so that the serial data line can be released from the deadlock state. In addition, the control of the serial clock line and the serial data line to output the release signal can also avoid the situation that the electronic device with abnormal communication resends new data or is in a state waiting for the release signal, so that the serial data line falls into a deadlock state again.
The communication restoration method is applicable to a self-moving device, such as a mower, a sweeper, a transportation robot, a storage robot and the like. The I2C bus and the master device and the plurality of slave devices mounted on the I2C bus may be a master control module and an execution module built in the self-mobile device. Wherein, one main control module may control one execution module, or one main control module may control a plurality of execution modules at the same time, or a plurality of main control modules may control one execution module together, or a plurality of main control modules may control a plurality of execution modules respectively. The main control module and the execution module are communicated with each other, so that the self-mobile device can complete the appointed task. For example, the master device may be a master control chip in the mower, and the plurality of slave devices may be algorithm processing chips corresponding to respective functional modules in the mower. When at least one algorithm processing chip in the mower pulls the level of the serial data line in the I2C bus down abnormally, so that the serial data line falls into a deadlock state, and the main control chip in the mower cannot normally communicate with other algorithm processing chips, so that the mower cannot normally work.
In yet another embodiment of the present application, the communication recovery method of the present application does not rely on other external device triggers, but automatically controls the clock signal to perform a signal recovery operation when the serial data line is detected to be in a deadlock state.
Through the embodiment, the communication recovery method is applied to the first device, and the first device can be the slave device or the master device mounted on the bus, and is not limited to the master device, so that the application range of the device is enlarged. The signal recovery operation is to set the clock signal to the first level signal and then set the clock signal to the second level signal. The first level signal may be low level, the second level signal may be high level, and the clock signal may change in level due to the signal recovery operation. And when the data signal is found to be recovered to a high level, the serial clock line and the serial data line are controlled to output release signals, so that the first equipment and the second equipment can stop transmitting data on the serial data line, the serial data line is recovered to an idle state, the serial data line can be released from a deadlock state, and normal communication between the electronic equipment and other electronic equipment is recovered.
As shown in fig. 3, a flowchart of a communication recovery method according to another embodiment of the present application is provided. In this embodiment, for step S102 in fig. 2, a data signal corresponding to a clock signal is obtained from a serial data line, and if the data signal is detected as a first level signal, the communication recovery method may further include a flow as shown in fig. 3.
S201, if the data signal is detected as the first level signal, the first recovery count is increased by 1.
In this embodiment of the present application, the clock signal on the serial clock line is configured by simulating the transition edge of the clock signal, for example, when the clock signal on the serial clock line is at a low level and the data signal on the serial data line is at a low level, the clock signal on the serial clock line needs to be pulled high to obtain the clock signal at a high level. Therefore, each time the data signal is detected as the first level signal (e.g., low level), the signal recovery operation is performed again on the current clock signal, and the number of recovery operations is counted.
S202, judging whether the first recovery times are smaller than a first threshold value.
The first threshold is determined by the bytes sent once during communication, such as 9 clock signals for one round.
In an embodiment of the present application, the first threshold is any value greater than the number of bytes, where the number of bytes is the number of bytes that can be sent at a time when the electronic device communicates with other electronic devices. For example, the electronic device may be able to send 8 bytes of data at a time when communicating with other electronic devices, and the first threshold may be set to 9. In practical application, the setting of the first threshold is not limited to this manner, and may be set and adjusted according to the actual requirement.
S203, when the first recovery times are smaller than the first threshold value, controlling the clock signal on the serial clock line to execute the signal recovery operation.
In this embodiment, when the clock signal is at a low level, the data signal can change from a low level to a high level, and when the first recovery number is smaller than the first threshold value, the first device may repeatedly perform the signal recovery operation a plurality of times, so when the data signal transmitted in the serial data line is not at a low level, the probability that the detected data signal is at a high level can be effectively improved through the plurality of signal recovery operations.
S204, if the first recovery times is greater than or equal to the first threshold value, resetting the first recovery times.
In this embodiment, resetting the first recovery times includes zeroing the first recovery times. And resetting the first recovery times to reset the subsequent first recovery times, so that the subsequent deadlock state of the serial data line can be unlocked.
S205, the serial clock line and the serial data line are controlled to output release signals so as to release the deadlock state of the serial data line.
In at least one embodiment of the present application, the mode of the serial data line is configured to be an output mode before the serial clock line and the serial data line are controlled to output the release signal, wherein the output mode may be an open drain output mode or a push-pull output mode.
In the related art, the level of the data signal is acquired after the clock signal is set to the low level each time, however, when the data signal transmitted in the serial data line is at the full low level, the data signal at the high level cannot be detected at this time, and thus, when the data signal transmitted is at the full low level, the prior art cannot perform effective communication recovery. The present application outputs a release signal (also referred to as a termination signal) for instructing an electronic device on the bus to stop transmitting data by controlling the serial clock line and the serial data line. Therefore, the first device can cause the electronic device with abnormal communication to release the serial data line by outputting the release signal, restore the serial data line to an idle state, and make the detected data signal high level, thereby enabling to resume control of the serial data line. In still another embodiment of the present application, after step S103 in fig. 2 or after step S205 in fig. 3, when the serial clock line and the serial data line are controlled to output the release signal, in order to verify whether the serial data line has released the deadlock state, the communication recovery method may further continue to perform the procedure shown in fig. 4, to verify whether the serial data line has released the deadlock state, to determine whether the first device needs to perform the signal recovery operation again, so that the first device and the second device can resume normal communication. Fig. 4 is a flowchart of a communication recovery method according to another embodiment of the present application.
After controlling the serial data line and the serial clock line to output the release signal, the first device transmits probe information to the abnormal electronic device through the serial clock line and the serial data line in step S301.
The probe information may include, among other things, a start signal, an address of other electronic devices, data, a verification signal, etc.
In this embodiment, the start signal is a jump timing signal, and the start signal includes: when the clock signal is high, the data signal is changed from high to low. The abnormal electronic equipment is the electronic equipment with abnormal communication.
In this embodiment, by sending the probe information, it can be verified whether the serial data line is free from the deadlock state, and a preliminary determination is provided for whether the first device needs to be restored again.
S302, judging whether response information corresponding to the detection information is received.
In at least one embodiment of the present application, the response information includes detecting a change in the data signal from high to low when the clock signal is high, and thereafter the data signal remains low all the time when the clock signal is high.
In at least one embodiment of the present application, the abnormal electronic device performs a determining process on the received probe information, and specifically includes: identifying whether the number of bytes in the received detection information is the same as the number of the appointed bytes locally stored by the electronic equipment with abnormal communication, if the number of the received bytes is the same as the number of the appointed bytes, calculating a first check signal by the electronic equipment with abnormal communication according to the data in the received detection information, comparing the first check signal with a second check signal in the received detection information, and if the first check signal is the same as the second check signal, determining that the received detection information is correct by the electronic equipment with abnormal communication. The agreed byte number refers to the byte number corresponding to each agreed data transmitted by the first device and the abnormal electronic device when the first device and the abnormal electronic device communicate through the serial clock line and the serial data line.
In at least one embodiment of the present application, after receiving the probe information and determining that the probe information is correct, the other electronic device sends response information to the first device.
S303, if the first device receives the response information corresponding to the detection information, the first device determines that the serial data line is in a deadlock state.
In this embodiment, when the first device detects that the data signal changes from high to low when the clock signal is at a high level, and then the data signal remains at a low level all the time when the clock signal is still at a high level, the first device determines that the serial data line is free from the deadlock state.
S304, if the first device does not receive the response information corresponding to the detection information, the first device determines that the serial data line is not in a deadlock state.
S305, if the serial data line is detected not to be in the deadlock state, setting the second recovery times to be increased by 1.
In an embodiment of the present application, by setting the second recovery times and counting the second recovery times, multiple recovery of the serial data line may be achieved to ensure that the serial data line can be relieved from the deadlock state.
S306, judging whether the second recovery times reach a second threshold value.
In this embodiment, the second threshold may be set by itself, which is not limited in this application. For example, the second threshold may be set to a value greater than 3, such as 8 times, 9 times, or 10 times. In other embodiments of the present application, the second threshold may be the same as the first threshold.
S307, if the second recovery times reach the second threshold value, restarting the serial clock line and the serial data line.
In the related art, it is not detected whether the signal recovery is successful after the signal recovery operation is performed, and thus it is not known whether the deadlock state of the serial data line is released. After the signal recovery operation is executed, whether the signal recovery is successful or not is automatically detected, the second threshold is set, and the signal recovery is carried out for a plurality of times when the signal recovery operation is not successful, so that the unlocking probability of the deadlock state of the serial data line can be improved. In addition, when the serial data line can not be relieved from the deadlock state through multiple signal recovery, the serial data line and the serial clock line can be restored to be relieved from the deadlock state through restarting, and the problem that some electronic equipment can not be powered on again in operation can be solved.
In this embodiment, the second recovery count is cleared when the serial data line and the serial clock line are restarted. In this embodiment, the serial data line is restarted only when the serial data line still cannot be relieved from the deadlock state after multiple times of recovery, so that the loss of communication data can be reduced to the greatest extent.
In other embodiments of the present application, the first device records the number of times of restarting in a communication log of the first device, and continuously pushes the communication log to a visualization interface and an upper computer in communication with the first device.
S308, if the second recovery times do not reach the second threshold value, the clock signal on the serial clock line is controlled to execute the signal recovery operation.
By combining the flows of fig. 2 and fig. 4 or fig. 3 and fig. 4, multiple recovery operations on the serial data line can be realized by counting the recovery times, so that the probability of enabling the serial data line to be in a deadlock state can be improved.
Fig. 5 is a functional block diagram of a communication recovery device according to an embodiment of the present application. The communication recovery device 11 includes a control unit 110 and an acquisition unit 111. The module/unit referred to herein is a series of computer readable instructions capable of being fetched by the processor 320 of fig. 6 and performing a fixed function, which are stored in the memory 322 of fig. 6. In the present embodiment, the functions of the respective modules/units will be described in detail in the following embodiments.
A control unit 110, configured to perform a signal recovery operation on the serial clock line if it is detected that the serial data line is in a deadlock state; the signal recovery operation is to set the clock signal to the first level signal and then set the clock signal to the second level signal.
In at least one embodiment of the present application, prior to performing a signal recovery operation on the serial clock line, the control unit 110 is configured to:
if the data signal of the serial data line is detected to be the first level signal, and the duration time of the data signal being the first level signal is longer than the preset duration time, determining that the serial data line is in a deadlock state.
The control unit 110 is further configured to control the serial clock line and the serial data line to output a release signal to release the deadlock state of the serial data line if the data signal is detected as the second level signal.
In at least one embodiment of the present application, after controlling the serial clock line and the serial data line to output the release signal, the control unit 110 is further configured to:
and sending the detection information through the serial clock line and the serial data line, and if no response information corresponding to the detection information is received, determining that the serial data line is not in a deadlock state.
If the serial data line is detected not to be in the deadlock state, adding 1 to the second recovery times, and when the second recovery times are smaller than a second threshold value, returning to execute the step of controlling the clock signal on the serial clock line to execute the signal recovery operation.
In the present embodiment, after adding 1 to the second recovery number, the control unit is further configured to:
and restarting the serial clock line and the serial data line when the second recovery number is greater than or equal to a second threshold.
An acquiring unit 111, configured to acquire a data signal corresponding to a clock signal on a serial clock line from the serial data line.
In at least one embodiment of the present application, after the data signal corresponding to the clock signal on the serial clock line is obtained from the serial data line, the control unit 110 is further configured to:
when the data signal is detected to be a first level signal, adding 1 to the first recovery times, and when the first recovery times are smaller than a first threshold value, returning to execute the step of controlling the clock signal on the serial clock line to execute the signal recovery operation;
in the present embodiment, after adding 1 to the first recovery number, the control unit 110 is further configured to:
and when the first recovery times are greater than or equal to the first threshold value, resetting the first recovery times, and controlling the serial clock line and the serial data line to output release signals so as to release the deadlock state of the serial data line.
Through the embodiment, the communication recovery method is applied to the first device, and the first device can be the slave device mounted on the bus or the device normally executed in the master device, and is not limited to the master device, so that the application range of the device is enlarged. The signal recovery operation is to set the clock signal to the first level signal and then set the clock signal to the second level signal. The first level signal may be low and the second level signal high. Since the signal recovery operation causes the clock signal to change in level, the data signal can change from low to high only when the clock signal is low during the data transmission process. Subsequently, when the data signal is found to be recovered to a high level, the serial clock line and the serial data line are controlled to output a release signal, so that the first device and the second device can stop transmitting data on the serial data line, the serial data line is recovered to an idle state, the serial data line can be released from a deadlock state, and normal communication between the first device and the second device is recovered.
Fig. 6 is a schematic structural diagram of a communication recovery system according to an embodiment of the present application.
As shown in fig. 6, the communication recovery system 3 includes a serial data line 30, a serial clock line 31, an electronic device 32, the electronic device 32 may be a first device and a second device, wherein the electronic device 32 includes, but is not limited to, a memory 322, a processor 320, and a computer program, such as a communication recovery program, stored in the memory 322 and executable on the processor 320.
It will be appreciated by those skilled in the art that the schematic diagram is merely an example of the communication restoration system 3 and is not limiting of the communication restoration system 3, and may include more or fewer components than shown, or may combine certain components, or different components, e.g., the electronic device 32 may also include input-output devices, network access devices, etc.
The processor 320 may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. The general purpose processor may be a microprocessor or the processor may be any conventional processor, etc., and the processor 320 is an operation core and a control center of the electronic device 32, and uses various interfaces and lines to connect various parts of the entire electronic device 32, and obtain an operating system of the electronic device 32, and various installed application programs, program codes, etc.
Processor 320 obtains the operating system of electronic device 32 and the various applications installed. The processor 320 obtains an application program to implement the steps in the various communication restoration method embodiments described above, such as the steps shown in fig. 2, 3, and 4.
For example, a computer program may be partitioned into one or more modules/units, which are stored in memory 322 and retrieved by processor 320 to complete the present application. One or more of the modules/units may be a series of computer program instruction segments capable of performing a specific function for describing the acquisition process of the computer program in the electronic device 32.
Memory 322 may be used to store computer programs and/or modules that processor 320 performs various functions of electronic device 32 by executing or retrieving computer programs and/or modules stored within memory 322, and invoking data stored within memory 322. The memory 322 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, application programs required for at least one function (such as a sound playing function, an image playing function, etc.), and the like; the storage data area may store data created according to the use of the electronic device, etc. In addition, the memory 322 may include non-volatile memory, such as a hard disk, memory, plug-in hard disk, smart Media Card (SMC), secure Digital (SD) Card, flash Card (Flash Card), at least one disk storage device, flash memory device, or other non-volatile solid state storage device.
Memory 322 may be external memory and/or internal memory of electronic device 32. Further, the memory 322 may be a physical memory, such as a memory bank, a TF Card (Trans-flash Card), and the like.
The integrated modules/units of the electronic device 32 may be stored in a computer readable storage medium if implemented in the form of software functional units and sold or used as a stand alone product. Based on such understanding, the present application may implement all or part of the flow of the method of the above embodiment, or may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, where the computer program, when acquired by a processor, may implement the steps of each of the method embodiments described above.
Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an available file, or some intermediate form, etc. The computer readable medium may include: any entity or device capable of carrying computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM).
In connection with fig. 2, a memory 322 in the electronic device 32 stores a plurality of instructions to implement a communication restoration method, and a processor 320 may obtain the plurality of instructions to implement: if the serial data line is detected to be in a deadlock state, performing signal recovery operation on the serial clock line, and acquiring a data signal corresponding to a clock signal on the serial clock line from the serial data line; the signal recovery operation is to set the clock signal as a first level signal and then set the clock signal as a second level signal; and if the data signal is detected to be the second level signal, controlling the serial clock line and the serial data line to output release signals so as to release the deadlock state of the serial data line.
Specifically, the specific implementation method of the above instruction by the processor 320 may refer to the description of the relevant steps in the corresponding embodiment of fig. 2, which is not repeated herein.
In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of modules is merely a logical function division, and other manners of division may be implemented in practice.
The modules illustrated as separate components may or may not be physically separate, and components shown as modules may or may not be physical units, may be located in one place, or may be distributed over multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional module in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units can be realized in a form of hardware or a form of hardware and a form of software functional modules.
The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference signs in the claims shall not be construed as limiting the claim concerned.
Furthermore, it is evident that the word "comprising" does not exclude other elements or steps, and that the singular does not exclude a plurality. A plurality of units or means recited in the present application may also be implemented by one unit or means by software or hardware. The terms first, second, etc. are used to denote a name, but not any particular order.
Finally, it should be noted that the above embodiments are merely for illustrating the technical solution of the present application and not for limiting, and although the present application has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solution of the present application may be modified or substituted without departing from the spirit and scope of the technical solution of the present application.

Claims (10)

1. A communication recovery method applied to a first device that communicates with at least one second device via a bus that includes a serial clock line and a serial data line, the communication recovery method comprising:
if the serial data line is detected to be in a deadlock state, performing signal recovery operation on the serial clock line, and acquiring a data signal corresponding to a clock signal on the serial clock line from the serial data line; the signal recovery operation is to set the clock signal as a first level signal and then set the clock signal as a second level signal;
And if the data signal is detected to be a second level signal, controlling the serial clock line and the serial data line to output release signals so as to release the deadlock state of the serial data line.
2. The communication recovery method according to claim 1, wherein after the data signal corresponding to the clock signal on the serial clock line is acquired from the serial data line, the communication recovery method further comprises:
if the data signal is detected to be a first level signal, adding 1 to the first recovery times;
and when the first recovery times are smaller than a first threshold value, returning to the step of executing the signal recovery operation for controlling the clock signal on the serial clock line.
3. The communication restoration method as set forth in claim 2, wherein after said adding 1 to the first restoration number, the communication restoration method further includes:
and when the first recovery times are greater than or equal to the first threshold value, resetting the first recovery times, and controlling the serial clock line and the serial data line to output release signals so as to release the deadlock state of the serial data line.
4. The communication recovery method according to any one of claims 1 to 3, wherein after the control of the serial clock line and the serial data line to output a release signal, the communication recovery method further comprises:
If the serial data line is detected to be not in the deadlock state, adding 1 to the second recovery times;
and when the second recovery times are smaller than a second threshold value, returning to the step of executing the signal recovery operation for controlling the clock signal on the serial clock line.
5. The communication restoration method as set forth in claim 4, wherein after said adding 1 to the second restoration number, the communication restoration method further includes:
and restarting the serial clock line and the serial data line when the second recovery number is greater than or equal to the second threshold.
6. The communication recovery method according to claim 4, wherein the communication recovery method further comprises:
transmitting probe information through the serial clock line and the serial data line;
and if the response information corresponding to the detection information is not received, determining that the deadlock state of the serial data line is not released.
7. The method of any one of claims 1 to 6, wherein the communication restoration method further comprises:
if the data signal of the serial data line is detected to be a first level signal, and the duration time of the data signal being the first level signal is longer than the preset duration time, determining that the serial data line is in a deadlock state.
8. A communication restoration apparatus operating on a first device, the first device in communication with at least one second device via a bus, the bus including a serial clock line and a serial data line, the communication restoration apparatus comprising:
the control unit is used for executing signal recovery operation on the serial clock line if the serial data line is detected to be in a deadlock state; the signal recovery operation is to set the clock signal as a first level signal and then set the clock signal as a second level signal;
an acquisition unit, configured to acquire a data signal corresponding to a clock signal on the serial clock line from the serial data line;
and the control unit is also used for controlling the serial clock line and the serial data line to output release signals so as to release the deadlock state of the serial data line if the data signal is detected to be the second level signal.
9. A communication restoration system, the communication restoration system comprising a bus, a first device, and at least one second device; the first device and the second device communicate via a bus, the bus including a serial clock line and a serial data line, the first device comprising:
A memory storing at least one instruction; and
A processor that obtains instructions stored in the memory to implement the communication restoration method according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized by: the computer-readable storage medium has stored therein at least one instruction that is fetched by a processor in an electronic device to implement the communication restoration method according to any of claims 1 to 7.
CN202310144931.8A 2023-01-29 2023-01-29 Communication recovery method, device, system and readable storage medium Pending CN116302687A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118643002A (en) * 2024-08-16 2024-09-13 昆山寰安电子科技有限公司 A method, device and system for recovering an integrated circuit bus fault

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118643002A (en) * 2024-08-16 2024-09-13 昆山寰安电子科技有限公司 A method, device and system for recovering an integrated circuit bus fault
CN118643002B (en) * 2024-08-16 2024-11-29 昆山寰安电子科技有限公司 Method, device and system for recovering faults of integrated circuit bus

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