CN116298832A

CN116298832A - Fault scan chain shielding method based on compression environment

Info

Publication number: CN116298832A
Application number: CN202310152503.XA
Authority: CN
Inventors: 钱静洁; 马凌
Original assignee: Wuxi Jiuyi Semiconductor Technology Co ltd
Current assignee: Wuxi Jiuyi Semiconductor Technology Co ltd
Priority date: 2023-02-22
Filing date: 2023-02-22
Publication date: 2023-06-23

Abstract

The application discloses a fault scan chain shielding method based on a compression environment, which relates to the field of EDA detection, and is used for determining the total number of chip scan chains and the maximum number of fault scan chains and generating a vector set to be detected and shielding signals; sequentially selecting test vectors, performing fault shielding diagnosis on the scanning chain according to shielding signals and fault arrangement combinations, and determining a target scanning chain; updating the shielding signal, and generating a target test vector set and a target shielding signal set when the detected fault coverage rate meets a system set threshold value; and the mask signal decoder performs mask test on the target scan chain according to the target test vector and the target mask signal, and performs diagnosis analysis on the scan chain fault according to the compressed response output of the scan chain compressor. The scan chain with higher fault detection weight needs to be observed first, and the scan chain with higher occurrence number in the combination with lower shielding weight value needs to be shielded to determine the test vector and the shielding signal, so that the diagnosis efficiency and the diagnosis precision can be greatly improved.

Description

Fault scan chain shielding method based on compression environment

Technical Field

The embodiment of the application relates to the field of EDA detection, in particular to a fault scan chain shielding method based on a compression environment.

Background

With the development of integrated circuit industry, the integration level of chips is higher and higher, especially for technologies below 90 nanometers, the smaller feature size and larger leakage current of the field effect transistor reduce the observability of faults, and are difficult to detect by a physical fault analysis method, so that the fault diagnosis technology is very important for improving the manufacturing yield of chips and shortening the debugging time of chips.

With the use of the space compressor, the number of scan chains is far greater than that of the traditional circuit, so that in the modern scan design based on space compression, the probability of multiple scan chain faults is greatly increased compared with the prior art, and in the case that two or more scan chains simultaneously fail, test responses of the scan chains can offset each other after being sent into the compressor, which causes difficulty in diagnosis. Compression of the test response can have a negative effect on fault diagnosis due to reduced observability. This problem can be ameliorated by bypassing the compression circuitry or using additional test methods, but bypassing the compression circuitry requires additional circuit structure on the chip and increases the amount of data testing. The use of additional test methods also increases the number of tests performed on the chip in the tester, and increases the test cost. For example, chinese patent publication No. CN112100010a discloses a DFT test port allocation method adapted to multiple packages, and the design adds a logic circuit including a MUX selector and a DEMUX distributor between the I/O and the test port according to different packaging modes in the RTL design stage: taking the PIN as an output port, selecting a proper MUX selector and completing connection; taking the PIN as an output port, selecting a proper DEMUX distributor and completing connection; and controlling the selection state of each MUX selector and the distribution state of each DEMUX distributor according to the package information stored in the memory. The design can adapt to a multi-package DFT test port distribution method, and effectively reduces the complexity of a package scheme. However, this design has drawbacks: firstly, an extra logic circuit is introduced, so that the possibility of the fault of the scanning chain is increased; secondly, the circuit structure adopts a plurality of pairs of PIN PINs as input PINs and output PINs of a test circuit, so that the consumption of hardware resources is high, and the design of a plurality of PIN PINs is phased out along with the use of space compression technology; third, due to the introduction of the decompressors and compressors, faults on one scan chain are masked by faults from other scan chains, resulting in an increased likelihood of failure simulation failure.

Disclosure of Invention

The embodiment of the application provides a fault scan chain shielding method based on a compression environment, which solves the problems of complex logic circuit, occupied hardware resources and low fault diagnosis precision in the process of diagnosing the scan chain faults. The method comprises the following steps:

s1, detecting and determining the total number of scanning chains and the maximum fault scanning chain number of a chip through an ATPG algorithm, and generating a vector set to be detected and a shielding signal; the shielding signal acts on a scan chain shielding signal decoder and is used for shielding a selected target scan chain;

s2, sequentially selecting test vectors from the vector set to be tested, performing fault shielding diagnosis on the scanning chain according to all fault arrangement combinations formed by the shielding signals and the fault scanning chain, and determining a target scanning chain for shielding;

s3, updating the shielding signals according to the target scanning chain, and determining all target test vectors and corresponding target shielding signals when the detection fault coverage rate meets a system set threshold value to generate a target test vector set and a target shielding signal set;

s4, the shielding signal decoder performs shielding test on the target scan chain according to the target test vector and the target shielding signal, and performs diagnosis analysis on the scan chain fault according to the compression response output of the scan chain compressor.

Specifically, step S1 further includes:

respectively sequencing all the scanning chains and the fault scanning chains in a numbering way, and determining all fault permutation and combination of the fault scanning chains according to the number and the number of the fault scanning chains; the fault permutation and combination is used for locating the position of the fault scan chain and determining a fault shielding sequence.

Specifically, step S2 includes:

s21, sequentially extracting a test vector from the vector set to be tested in each detection period, and moving the test vector into the test vector set;

s22, calculating single-shielding weight coefficient W of each fault scanning chain in each fault arrangement combination _C And calculates the corresponding event according to the masking weight functionMask weight value W of barrier arrangement combination _T The method comprises the steps of carrying out a first treatment on the surface of the The masking weight function is as follows:

W _T ＝W _c1 +W _c2 +…+W _cm

wherein m represents the total number of fault scan chains, W _c1 To W _cm Single shielding weight coefficient of all fault scan chains under a fault arrangement combination is represented;

s23, calculating fault detection weights W of all scanning chains based on the residual test vectors in the vector set to be tested _FD And determining the target scan chain according to the accumulated shielding weight value of each fault permutation and combination in each period.

Specifically, the shielding weight value is used for measuring the difficulty level of the shielding signal for the fault diagnosis of the scanning chain; the single-shielding weight coefficient is used for measuring the influence degree of the compressed response output of the single fault scanning chain after being shielded on fault diagnosis; single mask weight coefficient W _C Calculated by the following formula:

W _ci ＝A+αB

wherein A is an optimal detection value, which indicates the number of times that the fault scan chain is observed under the action of a shielding signal; b is an auxiliary detection value, which indicates the times of observing only two fault scanning chains including the fault scanning chain under the action of a shielding signal, and alpha is an auxiliary detection parameter; when more than two fault scan chains are observed, the compressed response output contains less than a diagnosable range of fault diagnosis information, and the single mask weight coefficient is 0.

Specifically, step S23 includes:

generating a weight score sorting table according to the value of the fault detection weight;

marking the scanning chains of the previous target proportion in the weight fraction sorting table, and not performing shielding diagnosis;

determining the minimum accumulated shielding weight value in all fault arrangement combinations as a target arrangement combination, and generating a scanning chain list according to the occurrence times of each fault scanning chain in the combination and the marked scanning chain; the scan chain list does not contain marked scan chains;

and determining the most occurrence number in the scan chain list as a target scan chain.

Specifically, the fault detection weight is used for measuring the fault detection capability of the test vector generated by the ATPG algorithm on the scan chain, and the calculation formula is as follows:

wherein m represents the total number of fault scan chains; d (D) _m Representing the sum of the number of times a particular error has been detected by all test vectors in the set of vectors under test, W _FD (Li _j ) Represents the jth scan chain L _j All k errors above are summed by the inverse of the values detected by all test vectors in the set of vectors to be tested.

Specifically, step S3 includes:

setting a level bit corresponding to the target scanning chain in the shielding signal to be low level 0, and generating the target shielding signal; wherein, the test vector and the shielding signal are in one-to-one correspondence;

and calculating the current fault coverage rate according to the detected fault scanning chain, and generating the target test vector set and the target shielding signal set based on all the determined target test vectors and the corresponding target shielding signals when the fault coverage rate exceeds a set threshold value.

Specifically, when the fault coverage rate does not exceed a set threshold value, detecting the residual test vectors in the vector set to be tested;

when the vector set to be tested contains the residual test vectors, entering the next detection period, selecting one detection vector from the test vectors, and moving the detection vector into the test vector set to carry out shielding diagnosis;

specifically, when the to-be-tested vector set does not contain the residual test vectors, generating additional test vectors and corresponding shielding signals for the residual undetected faults through an ATPG algorithm, and adding the additional test vectors and the corresponding shielding signals into the test vector set;

and continuously calculating a single shielding weight coefficient and a shielding weight value corresponding to the fault arrangement combination according to the newly added test vector set and the shielding signal, and executing a shielding diagnosis process until the fault coverage rate meets the requirement, and generating the target test vector set and the target shielding signal set.

Specifically, the set of vectors to be tested of the scan chain and the mask signal corresponding to each test vector are automatically generated according to the ATPG algorithm and the mask signals initially generated by different test vectors are different.

The beneficial effects that technical scheme that this application embodiment provided include at least: performing preliminary scan test on the scan chain by being compatible with the existing ATPG algorithm to generate test vectors and shielding signals; then selecting test vectors and evaluating single shielding weight coefficients of each scanning chain under each combination and shielding weight values of corresponding combinations one by one through a fault arrangement combination form of fault scanning chains; and then the order of the scanning chains needing to be observed preferentially and shielded preferentially can be determined according to the shielding weight value and the fault detection weight calculated by the residual test vectors in the vector set to be detected. And according to the scan chain with higher fault detection weight which needs to be observed preferentially, the scan chain with higher occurrence number in the combination with lower shielding weight value needs to be shielded, sequentially determining a target test vector and a target scan chain, and updating the level bit of the corresponding shielding signal. And finally, generating a target test vector set and a target shielding signal set under the condition that the fault coverage rate meets the setting.

Therefore, the target scan chain is subjected to shielding test, test vectors can be reduced, a small number of test vectors are used, and diagnosis and analysis are performed on the scan chain faults according to the compression response output of the scan chain compressor, so that fault diagnosis time is greatly shortened.

By the fault analysis strategy, other logic circuits and software analysis modes are not required to be introduced, excessive hardware resources are not required to be occupied, and the phenomenon that output response is disordered due to mutual interference in multi-fault diagnosis is avoided. The scheme not only can be compatible with the existing ATPG algorithm, considers the condition that a plurality of scanning chains have faults at the same time, but also can be applied to the scene of diagnosing the multiple faults of the compression structure multiple scanning chains.

Drawings

FIG. 1 is a schematic diagram of a related art structure for fault detection using a space compressor;

FIG. 2 is a schematic diagram of a scan chain failure resulting in a chaotic compressed response output;

FIG. 3 is a flow chart of a method for fault scan chain masking based on a compression environment provided by an embodiment of the present application;

FIG. 4 is a flowchart of an algorithm for generating a set of target test vectors and a set of target mask signals;

FIG. 5 is a schematic diagram of a process for generating cumulative mask weight values in an embodiment.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

References herein to "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.

The test cost of VLSI circuits tested using a scan chain architecture depends on the time of the test and the amount of data required by an integrated circuit Automatic Tester (ATE). To reduce the amount of data required for testing, the industry has applied ATPG-based diagnostic algorithms and compression response testing in the field of chip-assisted testing. Test response compression is typically accomplished using Multiple Input Signature Registers (MISRs) that can be used for spatial and temporal compression or XOR trees (XOR trees) that can be used for spatial compression.

As shown in fig. 1, a schematic diagram of a structure for fault detection using a classical space compressor is provided. In the classical space compressor basic structure, the system mainly comprises a scanning chain, a scanning chain shielding signal selector and a scanning chain compressor, wherein the responses of multiple scanning chains are compressed by an exclusive-OR gate tree to generate a compressed response output. Typically, and gate-based masking circuits are used to mask unknown states from entering the space compressor. Thus, for chains that require masking, the scan chain selection logic sends 0 to the corresponding AND gate and 1 to the other AND gates. This single chain mode is said if for one test vector only the response of one scan chain enters the spatial compressor, while the other chains are masked. In the test flow, the scan chain integrity test is typically performed in a single chain mode to be able to identify the failed scan chain and the failure type, but the scan chain integrity test vector cannot pinpoint which scan cells failed, and the ATPG algorithm is required to generate the test vector for further diagnosis.

In EDA detection, the set of test vectors generated by the automatic test machine has a large amount of redundancy in fault detection, i.e., a particular fault on a scan chain can be detected by multiple test vectors, so shielding a small number of scan chains does not have a significant impact on fault coverage.

As shown in fig. 2, the symbol marked X in the scan chain is a fault point on the chain, and when a plurality of faulty scan chains are observed by one compressor, a problem may occur in that the fault is cancelled at the compressed response output. As can be seen from fig. 2, chain 2 has a stuck-at-1 failure at element 5 and chain 3 has a stuck-at-1 failure at element 2. During unloading, all upstream units of chain 2 unit 5 and chain 3 unit 2 are affected. After spatial compression, some of them cancel each other, completely disturbing the compressed response, resulting in difficulty in fault diagnosis. As such, while chain 2 and chain 3 have been identified as faulty in previous scan chain integrity tests, it is still not possible to accurately determine which scan cells are faulty. If the No. 2 chain is shielded at this time, it is possible to diagnose a faulty unit on the No. 3 chain; if chain 3 is masked, it is more likely that the failed cell of chain 2 is diagnosed, so the problem of output confusion arises. Aiming at the possible problems, the scheme provides a method for shielding the fault scan chain so as to avoid the problem that effective diagnosis cannot be carried out due to the error shielding.

As shown in fig. 3, a flowchart of a fault scan chain shielding method based on a compression environment according to an embodiment of the present application includes the following steps:

s1, detecting and determining the total number of scanning chains and the maximum fault scanning chain number of a chip through an ATPG algorithm, and generating a vector set to be detected and a shielding signal.

The total number of scan chains and the maximum number of fault scan chains are determined by conventional ATPG algorithm test, test vectors (test pattern) and test vectors are also generated by ATPG algorithm according to detection errors, and mask models are generated for mask model decoders, and the test vectors are in one-to-one correspondence. While the test vectors generated by the conventional ATPG algorithm can satisfy the fault coverage in number, a huge set of test vectors is required, resulting in various increases in cost, since various algorithms need to be introduced to optimize this.

After the test vector, all the scan chains and the fault scan chains have been determined, the serial numbers of all the scan chains and the fault scan chains are respectively ordered, and all fault permutation and combination of the fault scan chains are determined according to the number and the serial numbers of the fault scan chains. This is because the number and error units on different faulty scan chains cannot be identical, and the responses obtained by compressing the different scan chain combinations are confused during spatial compression, which affects the diagnostic analysis. The fault permutation and combination can locate the fault scan chain and determine the fault masking order.

In one possible implementation, assuming that the total number of test vectors of the chip is n, the number of maximum fault scan chains is m, the generated set of vectors to be tested is T, and the corresponding set of initial mask signals is R (the mask signals and the test vectors in R are in a one-to-one correspondence). After numbering the faulty scan chain, it is unknown which m of the n chains is the faulty scan chain in the actual test, so all possible combinations need to be considered when generating the mask signal. The number of possible combinations of m chain failures in the n chains is

That is, the maximum failure permutation combination is +.>

S2, selecting a test vector from the vector set to be tested, performing fault shielding diagnosis on the scanning chain according to all fault arrangement combinations formed by the shielding signals and the fault scanning chain, and determining a target scanning chain for shielding.

The step is to extract test vectors from T one by one, and perform fault diagnosis (pre-diagnosis) on all fault arrangement combinations according to the extracted test vectors and corresponding shielding signals, wherein the pre-diagnosis aims at selecting proper test vectors from the test vectors, and sequentially selecting target fault scan chains from all fault scan chains according to output corresponding results, and the sequence of the sequential selection of the target fault scan chains is the sequence of the shielding diagnosis. Performing the fault diagnosis in this order can obtain a relatively accurate fault diagnosis result with the minimum test vectors selected. And the target fault scanning chain is obtained by calculation according to the shielding weight value and the fault detection weight. Specifically, S2 further includes the following steps:

s21, sequentially extracting a test vector from the vector set to be tested in each detection period, and shifting the test vector into the test vector set.

Because the vector set to be tested contains a large number of test vectors, the test vectors need to be screened, the test vector set is a vector set participating in diagnostic analysis, and in each test period, one test vector in the vector set to be tested needs to be selected and moved into the test vector set. The test vector set in this embodiment is T'.

S22, calculating single-shielding weight coefficient W of each fault scanning chain in each fault arrangement combination _C And calculating a masking weight value W corresponding to the fault arrangement combination according to the masking weight function _T 。

In order to improve fault diagnosis capability, the scheme adopts a strategy of shielding additional scan chains, and the strategy can be applied to any test vector generated for the fault scan chains, so that the compression response output of the compression unit is ensured to be influenced by one specific scan chain as much as possible. The masking strategy is performed only on the compressor side and not on the decompressor side, so for a test vector that detects only one faulty scan chain, anomalies in the compressed response output result from:

1) Loading errors on the masked failed scan chain;

2) Loading errors on unshielded failed scan chains;

3) Unloading errors on unshielded failed scan chains.

But loading errors on the masked failed scan chain affect only a few bits of the compressed response output, while unloading errors on the unmasked failed scan chain affect almost the entire bit stream of the compressed response output. Thus, even if there is a loading error on the masked failed scan chain, the scan chain diagnostic method based on the compressed response can successfully identify the failed scan chain.

However, the above-mentioned mask signal initially generated by the ATPG algorithm is a chip test phase earlier than a phase in which the test vector diagnoses and fault simulates the chip, so that it is not known which scan chains have faults when generating the mask signal, which will have a negative effect on the generation of the mask signal. So in solving this problem, a single mask weight coefficient W is introduced _C And a mask weight value W _T To make the judgment. Mask weight value W _T The method is used for measuring the difficulty level of the shielding signal for the fault diagnosis of the scanning chain; single mask weight coefficient W _C The method is used for measuring the influence degree of the compression response output after the single fault scan chain is shielded on fault diagnosis. For a determined fault arrangement combination, W _T According to the calculation of the shielding weight function, the formula is as follows:

W _T ＝W _c1 +W _c2 +…+W _cm

wherein m represents the total number of fault scan chains, W _c1 To W _cm Representing the single mask weight coefficient of all fault scan chains under a fault permutation and combination.

Single mask weight coefficient W _C Calculated by the following formula:

W _ci ＝A+αB

wherein A is an optimal detection value, which indicates the number of times that the fault scan chain is observed under the action of a shielding signal; b is an auxiliary detection value, which indicates the number of times that only two fault scan chains including the fault scan chain are observed under the action of a shielding signal, and alpha is an auxiliary detection parameter.

Illustratively, assuming that the total number of scan chains input into a single compressor is n, and the maximum number of failed scan chains observable in a single compressor is m, there is a mask signal selector between the scan chains and the compressor, then the mask signal will determine which scan chains can be masked. The single mask weight function W of a single failed scan chain is defined, considering that if one failed scan chain is observed alone more times (no other failed scan chain) then the failed scan chain is more easily diagnosed _ci =a+αb. Therefore, A is expressed as the number of times that only the failed scan chain is observed (the remaining m-1 failed scan chains are all masked) and B is the number of times that two failed scan chains, including the failed scan chain, are simultaneously observed (the remaining m-2 failed scan chains are all masked).

The first part (a) is the basic part, only one faulty scan chain is observed, the best mode for diagnosing the faulty scan chain; the second part (αb) is an auxiliary part, and two fault scan chains including the fault scan chain are observed at the same time, and the compression response output of the compressor also contains a part of information for diagnosing the fault scan chain, but the diagnosis effect is poor. In practical applications, the value of the parameter α is between 0.2 and 0.3. As the number of concurrently observed failed scan chains increases, the information available in the compressed response output to diagnose the failed scan chains decreases exponentially. When the number of simultaneously observed fault scan chains is greater than or equal to three, almost no useful information for diagnosis is contained in the compression response output, and the fault diagnosis information contained in the compression response output is lower than the diagnosable range, the single mask weight coefficient W _ci Then 0. When the shielding signal is determined, each of the m fault scan chains has a single shielding weight coefficient W of the single fault scan chain _ci Will W _ci Summing to obtain the shielding weight value W under the fault arrangement combination _T 。

S23, calculating fault detection weights of all scanning chains based on the residual test vectors in the vector set to be tested, and determining target scanning chains according to accumulated shielding weight values of all fault arrangement combinations in all periods.

ATPG mainly comprises the following steps: 1. and selecting errors to be tested 2, generating a test vector set 3, and comparing the results to diagnose the errors. In general, in step 1, all possible errors are selected, and often more errors are generated than actually; each test vector in step 2 is generated for a portion of all possible errors, each test vector may diagnose one or more errors, each error is diagnosed by one or more test vectors. Step 3 is to compare the expected output with the actual output to determine which errors exist in the whole circuit. Therefore, when a vector set T to be tested is generated, the number of faults which can be diagnosed is determined, and then the fault detection weight W can be calculated _FD 。

In the scheme, fault detection weight W is adopted _FD To measure the fault detection capability of test vectors generated by the ATPG algorithm for the scan chain. In the fault permutation and combination, the determination of the target scan chain is based on the following principle:

1) The higher the fault detection weight, the more the scan chain needs to be observed preferentially;

2) The higher the number of occurrences of scan chains in a combination with lower mask weight values, the more required the masking.

Its fault detection weight W _FD The calculation formula of (2) is as follows:

m represents the total number of fault scan chains; d (D) _m Representing the sum of the number of times a particular error has been detected by all test vectors in the set of vectors under test, W _FD (L _ij ) Represents the jth scan chain L _j All k errors above are summed by the inverse of the values detected by all test vectors in the set of vectors to be tested.

Detailed description of the inventionThe release is as follows: assume a test vector T in a test vector set T _i The j-th scan chain L of the n scan chains can be detected _j K errors on, i.e. test vector t _i For scan chain L _j Has detection capability. For L _j Middle quilt t _i Detecting one of k errors f _m (m＝1，…，k)，f _m Can be not only tested by a test vector T in T _i Detected, possibly also by other test vectors T in T _n Detection. Let all test vectors T in T ₁ ～t _n Detecting an error f _m The number of times is recorded as D _m . If an error f in the scan chain _m Detected by a plurality of test vectors, D _m If the value of f is large, if an error in the scan chain _m Is only included t _i Several test vectors in the test pattern are detected, D _m The value of (2) is small. Therefore, the scan chain L is defined _j Is the failure detection weight W of _FD (L _ij ) Number D of times k errors in the scan chain are detected by all test vectors _m The sum of the reciprocal of (2).

Based on the above definition, for one test vector T in the test vector set T _i If a scan chain L _j The errors in (a) are included only in t _i If a small part of the test vectors are detected, the fault detection weight W _FD (L _ij ) Higher, shielding the scan chain can negatively impact fault coverage, so the scan chain is preferentially observed. Similarly, if a scan chain L _j Is included t _i Most of the test vectors are detected, the fault detection weight W _FD (L _ij ) Lower, after masking the scan chain, errors on the scan chain even if they cannot be tested for vector t _i Is also diagnosed by other test vectors t _i (j+.i) diagnostic. Thus, when selecting a mask scan chain, the fault detection weight W _FD (L _ij ) Higher scan chains need to be observed preferentially.

The process specifically comprises the following steps:

and A, generating a weight fraction sorting table according to the numerical value of the fault detection weight.

And B, marking the scan chains ranked in the front target proportion in the weight fraction ranking table, and not performing shielding diagnosis.

During each cycle of detection, a weight fraction ranking table needs to be generated and the scan chains with the front order need to be marked, and the scan chains need to be temporarily shielded, i.e. cannot be observed first, otherwise the diagnosis of the output response is affected. In one possible implementation, the top 15% of the scan chains are marked, no mask diagnosis is performed, and the rest are judged normally.

However, it should be noted that, in the next cycle of detection, these flags need to be cleared, the weight score ranking table is also cleared correspondingly, and the above-mentioned process is performed again according to the selected test vector set.

And C, determining the minimum accumulated shielding weight value in all fault arrangement combinations as a target arrangement combination, and generating a scan chain list according to the occurrence times of each fault scan chain in the combination and the marked scan chain.

The accumulated mask weight value is the sum of mask weight values of the same fault arrangement combination in the history period, when the target arrangement combination is determined and the scan chain list is generated, the marked scan chain is required to be removed, so the scan chain list generated in the step does not contain the marked scan chain.

And D, determining the most occurrence number in the scan chain list as a target scan chain.

And S3, updating the shielding signals according to the target scan chain, and determining all target test vectors and corresponding target shielding signals when the detection fault coverage rate meets the system set threshold value to generate a target test vector set and a target shielding signal set.

There is a one-to-one correspondence between the number of scan chains and the respective level bits of the mask signal, e.g., a spatial compression circuit of 4 scan chains, with initial mask signals for the two test vectors t1 and t2 being 1110 and 1111 (the most significant bit corresponding to scan chain 1, the least significant bit corresponding to scan chain 4).

And setting the level bit of the corresponding target scanning chain in the shielding signal to be low level 0 for the target scanning chain to be shielded, and generating the target shielding signal.

After the multi-period cyclic test, when the current fault coverage rate is calculated by the detected fault scanning chain to exceed the set threshold value, the determined sequence of the target scanning chain is indicated to be capable of meeting the diagnosis requirement, and the target test vector set and the target shielding signal set can be generated based on all the determined target test vectors and the corresponding target shielding signals. The target test vector set is a test vector selected through a plurality of periods, and the target shielding signal set is a target shielding signal which corresponds to the test vector and is updated.

When the fault coverage rate does not exceed the set threshold value, detecting the residual test vectors in the vector set to be tested;

when the vector set to be tested contains the residual test vectors, the next detection period is entered, one detection vector is selected from the test vectors, and the detection vector is moved into the test vector set for shielding diagnosis.

When the vector set to be tested does not contain the residual test vectors, generating additional test vectors and corresponding shielding signals for the residual undetected faults through an ATPG algorithm, adding the additional test vectors and the corresponding shielding signals into the test vector set, continuously calculating a single shielding weight coefficient and shielding weight values of corresponding fault arrangement and combination according to the newly added test vector set and the shielding signals, and executing a shielding diagnosis process until the fault coverage rate meets the requirement, and generating a target test vector set and a target shielding signal set.

S4, the shielding signal decoder performs shielding test on the target scan chain according to the target test vector and the target shielding signal, and performs diagnosis analysis on the scan chain faults according to the compression response output of the scan chain compressor.

FIG. 4 is a flowchart of an algorithm for generating a set of target test vectors and a set of target mask signals, comprising the steps of:

s401, determining the total number of scanning chains, the number of fault scanning chains, a vector set to be tested and an initial shielding signal;

s402, numbering all the scan chains, and determining possible fault arrangement combinations of all the fault scan chains;

s403, extracting test vectors from the vector set to be tested, adding the test vectors into the test vector set, and calculating W of each fault scanning chain according to the test vector set and the shielding signals _c Value and all fault permutations combined W _T A value;

s404, calculating fault detection weights of all scanning chains based on a vector set to be detected, generating a score sorting table, and marking the scanning chains sorted in the previous target proportion without shielding diagnosis;

s405, determining W _T Generating a scan chain list (excluding marks) according to the occurrence times of each fault scan chain by using the fault arrangement combination with the minimum value;

s406, setting a shielding signal corresponding to a target scanning chain with the largest occurrence number in the scanning chain list to 0, and updating the shielding signal;

s407, detect if the fault coverage meets the set threshold?

When the fault coverage rate is not satisfied with the set threshold, jumping to S409, otherwise executing S408;

s408, outputting the test vector set and the corresponding shielding signals, and ending.

S409, detect if there are any remaining test vectors in the set of test vectors?

When there are remaining test vectors in the set of test vectors, the loop jumps to S403 to continue execution, otherwise S410 is continued to be executed.

S410, generating additional test vectors for the remaining undetected faults, and adding the additional test vectors into a test vector set; the process continues to S410.

The algorithm flow and the fault scan chain shielding method are described in the following by adopting a specific embodiment.

Consider a space compression circuit comprising 4 scan chains, wherein 3 of the chains fail and there are two test vectors t ₁ And t ₂ Generated by normal ATPG algorithm, t ₁ And t ₂ The initial mask signals of 1110 and 1111 (the most significant bit corresponds to scan chain 1 and the least significant bit corresponds to scan chain 4). The existing shielding algorithm optimizes the fault diagnosis flow: first generating all possible groupsIn a combined manner, α=0.2 is selected, and W for each scan chain is calculated _ci Values, and W of each combination _T And updating the list according to the input mask signal.

First a test vector t is introduced ₁ Its initial mask signal is 1110 and

scan chains

1, 2, 3 can be observed. Taking the example of the third combination, the fault chains assumed by the third combination are

chains

1, 3 and 4. For scan chain 1, test vector t ₁ Chain 1 cannot be directly observed, but chain 1 and chain 3 can be jointly observed once, thus W _c1 =0.2; the same applies to scan chain 3, therefore W _c2 =0.2; for scan chain 4, test vector t ₁ Chain 4 cannot be directly observed, therefore W _c3 =0. As can be seen from fig. 5: w combined with one _T The scan chain with the highest occurrence number in a combination is selected for shielding, and the value is the smallest. Further assume that the failure detection weight W of chain 1 _FD (L ₁₁ ) At the highest, chain 1 is not masked, so one of the scan chains in chain 2 or chain 3 is selected for masking: select chain 2 masks, updates the mask signal to 1010, and then updates W according to the new mask signal _T Is a value of (2).

Under the condition that the fault coverage rate does not meet the set requirement, continuously introducing a test vector t ₂ Its initial masking signal is 1111, as can be seen from fig. 5: w of combination one and combination three _T The value is the smallest, and the number of occurrences of scan chain 1 and scan chain 3 is the largest in these two combinations, so one of the scan chains is optionally masked: shield scan chain 3 and test vector t ₂ Is updated to 1101. Updating W of each combination _T Value at t ₁ Observing Strand 1 and Strand 3, t ₂ Observing chains 1, 2, 4, taking combination four as an example, chain 2 is not observed independently, chain 2 and chain 4 are t ₂ Joint observation 1 time, thus accumulating W _c1 =0.2 (0+0.2); chain 3 is t ₁ Independently observe 1 time, thus accumulating W _c2 =1 (1+0); chain 4 is not viewed independently, chain 2 and chain 4 are t ₂ Joint observation 1 time, thus accumulating W _c3 =0.2 (0+0.2), and the cumulative W is calculated _T =1.4. When the test vectors are all introduced and the failure rate is not reachedWhen the coverage is required, additional test vectors are generated by the ATPG algorithm.

Test vector t newly generated by ATPG algorithm ₃ Its initial masking signal is 1111, as can be seen from fig. 5: combining the accumulated W of one, three _T The least value, scan chain 1 is the most frequently occurring scan chain, masks it and tests vector t ₃ Updates the mask signal of (1) to 0111 and updates the accumulated W of each combination _T Values. Assuming that the target condition is eventually reached, a new test vector set T' = { T is thus generated ₁ ，t ₂ ，t ₃ As a test vector set for subsequent fault diagnosis and fault simulation; the mask signal set r= {1010, 1101, 0111} is used as the mask signal of the test vector set T'.

In summary, the present application performs a preliminary scan test on a scan chain by using an existing ATPG algorithm to generate a test vector and a mask signal; then selecting test vectors and evaluating single shielding weight coefficients of each scanning chain under each combination and shielding weight values of corresponding combinations one by one through a fault arrangement combination form of fault scanning chains; and then the order of the scanning chains needing to be observed preferentially and shielded preferentially can be determined according to the shielding weight value and the fault detection weight calculated by the residual test vectors in the vector set to be detected. And according to the scan chain which is required to be observed first when the fault detection weight is higher, the scan chain which is required to be observed more frequently when the number of occurrence is lower in the combination of the shielding weight value is lower, the target test vector and the target scan chain are determined in sequence, and the level bit of the corresponding shielding signal is updated. And finally, generating a target test vector set and a target shielding signal set under the condition that the fault coverage rate meets the setting.

Therefore, the target scan chain is subjected to shielding test, test vectors can be reduced, a small number of test vectors are used, and diagnosis and analysis are performed on the scan chain faults according to the compression response output of the scan chain compressor, so that fault diagnosis time is greatly shortened. By the fault analysis strategy, other logic circuits and software analysis modes are not required to be introduced, excessive hardware resources are not required to be occupied, and the phenomenon that output response is disordered due to mutual interference in multi-fault diagnosis is avoided. The scheme not only can be compatible with the existing ATPG algorithm, considers the condition that a plurality of scanning chains have faults at the same time, but also can be applied to the scene of diagnosing the multiple faults of the compression structure multiple scanning chains.

The foregoing describes preferred embodiments of the present invention; it is to be understood that the invention is not limited to the specific embodiments described above, wherein devices and structures not described in detail are to be understood as being implemented in a manner common in the art; any person skilled in the art will make many possible variations and modifications, or adaptations to equivalent embodiments without departing from the technical solution of the present invention, which do not affect the essential content of the present invention; therefore, any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A method for fault scan chain screening based on a compression environment, the method comprising:

s1, detecting and determining the total number of scanning chains and the maximum fault scanning chain number of a chip through an ATPG algorithm, and generating an initial test vector set to be tested and a shielding signal; the shielding signal acts on a scan chain shielding signal decoder and is used for shielding a selected target scan chain;

2. The compression environment-based fault scan chain masking method according to claim 1, further comprising, after step S1:

3. The compression environment-based fault scan chain masking method according to claim 2, wherein step S2 comprises:

s22, calculating single-shielding weight coefficient W of each fault scanning chain in each fault arrangement combination _C And calculating a masking weight value W corresponding to the fault arrangement combination according to the masking weight function _T The method comprises the steps of carrying out a first treatment on the surface of the The masking weight function is as follows:

W _T ＝W _c1 +W _c2 +…+W _cm

4. The method for shielding a scan chain based on a fault in a compressed environment according to claim 3, wherein the shielding weight is used for measuring the difficulty level of the shielding signal for diagnosing the fault of the scan chain; the single-shielding weight coefficient is used for measuring the influence degree of the compressed response output of the single fault scanning chain after being shielded on fault diagnosis; single mask weightsCoefficient W _C Calculated by the following formula:

W _ci ＝A+αB

5. The compression environment-based fault scan chain masking method as claimed in claim 4, wherein step S23 comprises:

6. A method of masking a scan chain based on a fault in a compressed environment according to claim 3, wherein the fault detection weights are used to measure the fault detection capability of test vectors generated by ATPG algorithm on the scan chain, and the calculation formula is as follows:

wherein m represents the total number of fault scan chains; d (D) _m Indicating the number of times a particular error has been detected by all test vectors in the set of vectors under testAnd, W _FD (L _ij ) Represents the jth scan chain L _j All k errors above are summed by the inverse of the values detected by all test vectors in the set of vectors to be tested.

7. The compression environment-based fault scan chain masking method as claimed in any one of claims 1 to 6, wherein step S3 comprises:

8. The method of claim 7, wherein the remaining test vectors in the set of vectors under test are detected when the fault coverage does not exceed a set threshold;

and when the vector set to be tested contains the residual test vectors, entering the next detection period, selecting one detection vector from the detection vectors, and moving the detection vector into the test vector set to carry out shielding diagnosis.

9. The method for masking a fault scan chain based on a compression environment according to claim 8, wherein when the set of vectors to be tested does not contain remaining test vectors, generating additional test vectors and corresponding masking signals for remaining undetected faults by ATPG algorithm, and adding them to the set of test vectors;

10. The method of claim 1, wherein the set of vectors to be tested and the mask signal corresponding to each test vector of the scan chain are automatically generated according to the ATPG algorithm based on the detected scan chain error, and the mask signals initially generated by different test vectors are different.