CN116244303A - Multi-die chip management method, apparatus, computer device, and storage medium - Google Patents
Multi-die chip management method, apparatus, computer device, and storage medium Download PDFInfo
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Abstract
The application relates to a multi-die chip management method, a multi-die chip management device, a multi-die chip management computer device and a storage medium, wherein the multi-die chip management method comprises the following steps: acquiring die data of each die; recording substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die; and carrying out associated storage on the die data of each die and the substrate information to obtain a database with a corresponding relation. By carrying out the associated storage on the die data of each die and the substrate information, the die data of other dies can be found only by combining the die data of a certain die with the database, and the tracing efficiency of the multi-die chip data is effectively improved.
Description
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to a method and apparatus for managing a multi-die chip, a computer device, and a storage medium.
Background
With the development of technology and the continuous progress of society, various devices are moving toward miniaturization and portability, and chips are moving from traditional single-die chips to system-in-chip chips formed by combining multiple dies, and the application is more and more, and the miniaturization is more and more advanced. The advent of multi-die chips presents greater challenges to chip management methods and modes of management. At present, the traditional single-die chip management mode has severely limited the production management efficiency of multi-die chips, especially sensor chips without registers. How to improve the traceability efficiency of multi-die chip data is a problem to be solved.
Disclosure of Invention
In view of the above, it is necessary to provide a multi-die chip management method, apparatus, computer device, and storage medium that can improve the traceback efficiency for multi-die chip data.
A multi-die chip management method comprising:
acquiring die data of each die;
recording substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die;
and carrying out associated storage on the die data of each die and the substrate information to obtain a database with a corresponding relation.
In one embodiment, the die data includes die identification information and die test data.
In one embodiment, the die identification information includes a wafer lot number, a wafer number, and an X/Y coordinate of the die on the wafer.
In one embodiment, the substrate information includes substrate coordinates and a substrate number corresponding to a die placement substrate position.
In one embodiment, the acquiring die data of each die includes: and acquiring data obtained by performing wafer-level first test on the first die and other dies, and generating die data of each die.
In one embodiment, the acquiring die data of each die includes: and acquiring data obtained by performing wafer-level first test on the first die and original data of other dies when leaving the factory, and generating die data of each die.
In one embodiment, after the associating and storing the die data and the substrate information of each die to obtain the database with the corresponding relationship, the method further includes:
acquiring die identification information of a first die in a packaged chip;
performing a second chip-level test on the chip to obtain chip test data;
and storing the die identification information of the first die and the chip test data in a database in an associated manner.
In one embodiment, after the associating and storing the die data and the substrate information of each die to obtain the database with the corresponding relationship, the method further includes:
acquiring die identification information of a first die in a packaged chip;
and retrieving die data of other corresponding dies from the database according to the die identification information of the first die.
A multi-die chip management apparatus comprising:
the data acquisition module is used for acquiring the die data of each die;
the data recording module is used for recording the substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die;
and the data sorting module is used for carrying out association storage on the die data of each die and the substrate information to obtain a database with a corresponding relation.
A computer device comprising a memory storing a computer program and a processor implementing the steps of the method described above when the processor executes the computer program.
A computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method described above.
According to the multi-die chip management method, the multi-die chip management device, the computer equipment and the storage medium, the substrate information corresponding to each die is recorded in the process of picking the die to the substrate according to the die data of each die. And carrying out associated storage on the die data of each die and the substrate information to obtain a database with a corresponding relation. By carrying out the associated storage on the die data of each die and the substrate information, the die data of other dies can be found only by combining the die data of a certain die with the database, and the tracing efficiency of the multi-die chip data is effectively improved.
Drawings
FIG. 1 is a flow diagram of a method of multi-die chip management in one embodiment;
FIG. 2 is a flow chart of a method of managing a multi-die chip in another embodiment;
FIG. 3 is a flow chart of a method of managing a multi-die chip in yet another embodiment;
FIG. 4 is a schematic diagram of a one-to-one correspondence of a first die pick to a substrate in one embodiment;
FIG. 5 is a schematic diagram of a one-to-one correspondence between second and third die picks up to a substrate in one embodiment;
FIGS. 6-8 are schematic diagrams illustrating one embodiment of locating failures due to wafer level issues;
9-10 are schematic diagrams of a lookup encapsulation process problem resulting in failure in one embodiment;
FIG. 11 is a diagram illustrating correlation analysis of test data at different stages in one embodiment;
FIG. 12 is a block diagram of a multi-die chip management apparatus in one embodiment;
fig. 13 is an internal structural view of a computer device in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In one embodiment, as shown in fig. 1, a multi-die chip management method is provided, comprising:
step S110: die data for each die is acquired.
Specifically, the first test of the wafer level may be performed on all dies or part of dies, so as to obtain die data of the corresponding dies. For the die which is not subjected to the first test of the wafer level, the die data can be obtained directly according to the original data of the die when leaving the factory. The content of the die data is not unique, and specifically may include die identification information and die test data. The die test data is used to indicate whether the die test is passed, and the die identification information can be determined according to the data of the wafer corresponding to each die during production and manufacture. It will be appreciated that the die identification information may also include other relevant information about the die, and may be specifically adapted as desired. In addition, it can be understood that the die identification information and the die test data have a corresponding relationship, that is, after the die identification information of a certain die is obtained, the die test data corresponding to the die can be obtained.
Step S120: and recording substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die.
Specifically, after the die data of each die is obtained, the die data of each die and the die are flowed to a packaging factory together, so that the die is picked according to the die data of each die, namely, the effective die passing the die test is picked according to the die test data, and the subsequent packaging operation is performed. When the die passing the picking test is put on the substrate, corresponding substrate information is recorded. It will be appreciated that the specific content of the substrate information may be adjusted according to actual needs, for example, the substrate coordinates and the substrate number corresponding to the die placement substrate position may be included. Specifically, in the process of picking up the die to the substrate, the X/Y coordinates and the substrate number of the substrate corresponding to the position where the die is placed in the substrate are recorded, and the substrate information corresponding to the die identification information is used as the substrate information of the die. That is, after the die identification information of a certain die is obtained, the substrate information corresponding to the die can be obtained. And similarly, after acquiring certain substrate information, acquiring the die identification information corresponding to the substrate information. It should be noted that, in the present application, the multi-die chip is a chip formed by packaging multiple dies (two or more dies), where the multiple dies may be the same type of die, or may be different types of die, and may be selected according to actual needs. In this way, in the process of picking up the dies to the substrate, a plurality of dies are placed on the same substrate coordinate of the same substrate, that is, one die identification information corresponds to one substrate information, one substrate information corresponds to a plurality of die identification information, the corresponding substrate information can be obtained through the die identification information of one die, and then the die identification information of other dies packaged in the same chip with the die can be further obtained through the substrate information.
Step S130: and carrying out associated storage on the die data of each die and the substrate information to obtain a database with a corresponding relation.
After the substrate information of each die is obtained, integrating all the die data and the substrate information for associated storage, and establishing a database with a corresponding relation so as to carry out subsequent data tracing.
According to the multi-die chip management method, the die data of each die and the substrate information are stored in an associated mode, so that the die data of other dies can be found only by combining the die identification information of one die in the chip with the database, and the tracing efficiency of the multi-die chip data is effectively improved.
In one embodiment, as shown in fig. 2, step S110 includes step S112: and acquiring data obtained by performing wafer-level first test on the first die and other dies, and generating die data of each die.
Specifically, die test data is obtained by performing a first test (e.g., wafer level probing) at the wafer level on all dies including the first die, so as to be used as a package to pick up an effective die, and die identification information is obtained by identifying and/or marking the die when performing the first test at the wafer level. And taking the obtained die test data and the die identification information together as die data of the die so as to carry out picking and data association storage operation later. The details of the first test at the wafer level are not unique, and may be determined according to the type of die, for example, the first die is an ASIC die, a voltage is applied to the first die to perform an electrical performance test, and so on. The type of the test data is not unique, and specifically, a test pattern (also called bin mapping) may be used to record the bin number of the die, for example, bin1 is a test passing sample, and other bin numbers are defective products. In addition, the number of tests of the first test at the wafer level may be one or more.
In another embodiment, as shown in fig. 3, step S110 includes step S114: and acquiring data obtained by performing wafer-level first test on the first die and original data of other dies when leaving the factory, and generating die data of each die.
In this embodiment, die test data is obtained for a first test at the wafer level of the first die row, and the die test data and die identification information are used together as die data of the first die. For other dies, the first test at the wafer level may not be performed, and die data of other dies may be obtained according to the original data of the wafer when leaving the factory. For example, the other die is a sensor-like die, and the first test at the wafer level may not be performed.
It will be appreciated that in other embodiments not shown, other dies may be partially subjected to the first test at the wafer level, and partially not subjected to the first test at the wafer level, in addition to the first die.
In one embodiment, as shown in fig. 2 and 3, after step S130, the method further includes steps S140 to S160.
Step S140: and acquiring die identification information of a first die in the packaged chip.
Specifically, after the picking of each die to the substrate is completed, the subsequent packaging operation is performed, and a plurality of dies positioned on the same substrate and the same substrate coordinate are packaged to form a chip. And reading information of a first die in the packaged chip to obtain die identification information of the first die, such as wafer batch number, wafer number, X/Y coordinate information of a corresponding wafer and the like. Specifically, the first die is a die provided with a memory, and the memory of the first die stores die identification information of the first die. And acquiring the die identification information of the first die by reading the memory of the first die.
Step S150: and performing chip-level second test on the chip to obtain chip test data.
Step S160: the die identification information of the first die and the chip test data are stored in association in a database.
When data analysis is needed, the die identification information of the first die can be obtained by reading the memory of the first die, and then the die data of other related dies and related chip test data are called from the database through the die identification information of the first die.
It will be appreciated that in other embodiments not shown, step S150 may be performed first, and then step S140 may be performed, or step S140 and step S150 may be performed simultaneously.
It will be appreciated that in other embodiments not shown, after steps S140 and S150 are performed, step S160 may not be performed, i.e., the chip test data is not stored in the database, but the correspondence and the die data stored in the database are directly utilized and analyzed in combination with the chip test data. Specifically, if the chip is detected to be normal in step S150, shipment can be performed. If the chip is detected to be low in quality in step S150, the die identification information of the first die may be read according to step S140, and then the corresponding relationship and the die data in the database may be called according to the die identification information of the first die, and the low quality problem analysis may be performed in combination with the chip test data.
It will be appreciated that the content of the second test at the chip level is also not unique and may be adapted to actual needs. For example, the second test at the chip level may include performing a functional test such as power detection, pin detection, test logic detection, etc. on the packaged chip. After the second test at the chip level is completed, the chips that pass the test can be packaged for shipment. In addition, the number of tests of the second test at the chip level may be one or more.
In a conventional manner, die information is distinguished by a special identification point at the time of die wafer fabrication. However, the limitation of marking on the die wafer is more obvious, and firstly, as the die area is smaller, marking points are smaller and are difficult to distinguish; secondly, as a plurality of tube cores are overlapped, the mark is blocked, and the mark can be seen only after complex disassembly; third, if the chip surface is contaminated or scratched, the chip identification may not be recognized.
According to the multi-die chip management method, based on the corresponding relation between the die and the substrate in the process of placing the die pick-up example on the substrate, the die identification information of each die and the substrate information are stored in an associated mode, wherein the die identification information comprises a die corresponding to a wafer batch number, a wafer number, an X/Y coordinate of the die on the wafer, the substrate number of the placed substrate and the X/Y coordinate placed on the substrate, and after the first die is recorded, the corresponding relation between the die and the substrate in the process of placing the multiple dies such as the second die and the third die is recorded according to the same requirements. Further, the first die is provided with a memory and stores die identification information of the first die, and when the second test of the chip level is performed on the chip, the die identification information of the first die is read, and the die identification information of the first die and the chip test data are stored in an associated mode. Therefore, for a certain chip, the die identification information of the first die can be obtained by reading the memory of the first die, after the die identification information of the first die is extracted, the data of all the dies in the chip and the chip test data can be obtained by combining the stored database, and the data of each die can be in one-to-one correspondence, so that the one-to-one correspondence of the wafer-level data and the package-level data is achieved. The method systematically solves the problems that the multi-die chip is traceable, monitorable and process optimized in the whole process of production and manufacture, the system solves the problems that the tracking of the chip after shipment and the tracking of historical production data are traced, and the historical data of the chip need to be analyzed in one-to-one correspondence due to the failure of the client, the whole process of monitoring and tracing of the multi-die chip is truly realized, the efficiency is high, and the operation is simple.
The management cost is further reduced, the requirement on multi-die wafer level testing is reduced, the wafer level testing is only required to be carried out on the die with the memory, whether other dies are subjected to the wafer level testing or not is not required, the selection can be carried out according to the actual requirement, the function realization is not influenced, the cost is reduced, and the multi-die wafer level testing device can be flexibly applied to different requirements. In addition, the size of the first die memory can be reduced as much as possible, only the wafer batch number, the wafer number and the die X/Y coordinate information of the wafer are required to be written, no forced requirement is imposed on other information, the first die area can be increased according to actual conditions, and the reduction of the first die area is facilitated, so that the chip cost is further optimized.
In order to facilitate a better understanding of the multi-die chip management method described above, a detailed explanation is provided below in connection with specific embodiments.
The specific implementation steps of the multi-die chip management method are as follows:
1. and performing wafer-level probing on the first die, and acquiring die data of the first die. The first die has a memory to which information can be written. In the wafer level probing, die identification information of the first die may be written in a memory of the first die, including a wafer lot number, a wafer number, and X/Y coordinate information of the first die on the wafer. Other information can be selectively written or not written according to the size of the reserved space of the memory and other practical requirements. And finishing wafer-level probing of the first die, and generating die test data of the first die. And recording the bin numbers of the tube cores by adopting a test pattern, wherein bin1 is a test passing sample, and other bin numbers are defective products. The test pattern is used for picking up effective tube cores for use in packaging.
2. And performing wafer-level needle testing on the second die and the Nth die of the third die … … to obtain die data. This step is optional, i.e. it is not necessary to perform wafer level probing of all dies except the first die. If the wafer level probing is performed, the die data is acquired using the test pattern. If the wafer level needle test is not performed, the original map of the wafer when leaving the factory is used for acquiring the die data.
3. According to the die test data of the first die, the first die passing the test is picked out and placed on the substrate, and the wafer lot number (wafer number) of the first die, the wafer number, the X/Y coordinates of the picked first die on the wafer, and the X/Y coordinates of the substrate and the substrate number are recorded, as shown in FIG. 4.
4. According to the step 3, picking the second die in sequence, and recording the wafer batch number of the second die, the wafer number, the X/Y coordinates of the picked second die on the wafer, and the X/Y coordinates and the substrate number of the substrate corresponding to the position of the substrate; after the second die picking is completed, the third die, the fourth die, … … and the nth die are picked and recorded (if any) continuously as shown in fig. 5. When the second die, the third die, the … … die and the Nth die are selected, if a test pattern obtained by wafer level test exists, the second die, the third die, the … … die and the Nth die are selected according to the test pattern; if the wafer level test is not performed, the wafer level test is performed according to the original map delivered from the wafer factory.
5. Integrating the data in the steps 1-4, and establishing a database with a corresponding relation.
6. And (5) finishing the picking of the multiple dies, and packaging the multiple dies to form a chip. Specifically, multiple dies located on the same substrate coordinates of the same substrate are packaged together to form a single chip.
7. And finally testing the packaged chips, and reading the die identification information of the first die from the first die memory, wherein the die identification information comprises wafer batch numbers, wafer numbers and X/Y coordinate information of corresponding wafers. These are necessary information to be read, and may be read together, as well as other information.
8. And storing the read die identification information of the first die and final test data in a database in an associated manner. When data analysis is needed, the die data and final test data of all the associated dies of the chip in the database can be called by reading the die identification information of the first die. Or, if the final test result is low, acquiring the die data of other dies in the database according to the die identification information of the first die, and carrying out low-quality problem analysis by combining the final test data.
The multi-die chip management method can solve the following problems:
1. failure due to wafer level problems is looked up.
Taking fig. 6-8 as an example: the final test of a certain batch is low, the main exception is X test items, and X can be a failure code or a test parameter value. Because the chip particles of the final test are disordered, if the problem is examined by only relying on the final test data, the effect is very little, and the reason can not be found out frequently.
According to the database provided by the application, after final measurement data are converted into wafer-level data, the wafer-level data look like disordered failure, the conversion rule is clear, 1 represents good products, and X represents defective products. As shown in fig. 6, all failed chips come from the wafer edge; FIG. 7 shows that all failed chips come from certain regular fixed positions of the wafer; as shown in fig. 8, all failed chips come from a certain area of the wafer.
2. And searching for the packaging process problem.
If there is no rule after conversion to wafer level data, as shown in fig. 9, it is considered to sort by package substrate information. As shown in fig. 10, after sorting according to package substrate information, the rules are obvious, and the failed chips come from the regularly distributed vertical bars, and the information brings high-efficiency and direct directions to the searching problem.
3. Through the correlation analysis of test data in different stages, the test card control standard is optimized, the test card control effectiveness is improved, and the production cost is saved. As shown in fig. 11, the correlation analysis of the wafer level test and the final test data shows that the wafer level test item X has a value less than 1.46 and all fails at the final test end, which indicates that the wafer level X test item clamping standard does not meet the final test end test requirement. Through optimizing the wafer-level test X test item control standard, the die which does not accord with the product performance can be screened out before packaging, the yield of the subsequent production flow is improved, and the cost is saved.
4. The database can integrate all stage data correlation analysis, check product performance parameters and Cheng Zhonggong process correlation, optimize and monitor corresponding processes, optimize the processes and maintain stable processes.
It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.
Based on the same inventive concept, the embodiments of the present application also provide a multi-die chip management apparatus for implementing the multi-die chip management method referred to above. The implementation of the solution provided by the device is similar to the implementation described in the above method, so the specific limitation in the embodiments of the multi-die chip management device provided below may be referred to the limitation of the multi-die chip management method hereinabove, and will not be repeated herein.
In one embodiment, as shown in fig. 12, there is also provided a multi-die chip management apparatus, including: a data acquisition module 110, a data recording module 120, and a data sort module 130, wherein:
a data acquisition module 110, configured to acquire die data of each die.
The data recording module 120 is configured to record substrate information corresponding to each die in a process of picking the die to the substrate according to the die data of each die.
And the data sorting module 130 is configured to store the die data and the substrate information of each die in an associated manner, so as to obtain a database with a corresponding relationship.
In one embodiment, the data obtaining module 110 is configured to obtain data obtained by performing a first test on a wafer level on a first die and other dies, and generate die data of each die; the memory of the first die stores die identification information.
In one embodiment, the data obtaining module 110 is configured to obtain data obtained by performing a first test on a first die at a wafer level, and other raw data when the dies leave the factory, and generate die data of each die; the memory of the first die stores die identification information.
In one embodiment, performing a second test on the chip at a chip level, obtaining chip test data while reading die identification information of a first die in the chip; the data acquisition module 110 is further configured to acquire die identification information of a first die in the packaged chip and chip test data; the data sort module 130 is further configured to store the die identification information of the first die and the chip test data in association in a database.
In one embodiment, performing a second test on the chip at a chip level, obtaining chip test data while reading die identification information of a first die in the chip; the data acquisition module 110 is further configured to acquire die identification information of a first die in the packaged chip; the data sort module 130 is further configured to retrieve die data of other corresponding dies from the database according to the die identification information of the first die.
The various modules in the multi-die chip management apparatus described above may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In one embodiment, a computer device is provided, which may be a server, and the internal structure of which may be as shown in fig. 13. The computer device includes a processor, a memory, an Input/Output interface (I/O) and a communication interface. The processor, the memory and the input/output interface are connected through a system bus, and the communication interface is connected to the system bus through the input/output interface. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database of the computer device is for storing data. The input/output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements a multi-die chip management method.
In one embodiment, a computer device is provided comprising a memory storing a computer program and a processor that when executing the computer program performs the steps of: acquiring die data of each die; recording substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die; and carrying out associated storage on the die data of each die and the substrate information to obtain a database with a corresponding relation.
In one embodiment, the processor when executing the computer program further performs the steps of: acquiring data obtained by performing wafer-level first test on a first die and other dies, and generating die data of each die; the memory of the first die stores die identification information.
In one embodiment, the processor when executing the computer program further performs the steps of: acquiring data obtained by performing wafer-level first test on a first die and original data of other dies when leaving factories, and generating die data of each die; the memory of the first die stores die identification information.
In one embodiment, the processor when executing the computer program further performs the steps of: acquiring die identification information of a first die in a packaged chip and chip test data obtained by performing chip-level second test on the chip; the die identification information of the first die and the chip test data are stored in association in a database.
In one embodiment, the processor when executing the computer program further performs the steps of: acquiring die identification information of a first die in a packaged chip; and retrieving die data of other corresponding dies from the database according to the die identification information of the first die.
In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of: acquiring die data of each die; recording substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die; and carrying out associated storage on the die data of each die and the substrate information to obtain a database with a corresponding relation.
In one embodiment, the computer program when executed by the processor further performs the steps of: acquiring data obtained by performing wafer-level first test on a first die and other dies, and generating die data of each die; the memory of the first die stores die identification information.
In one embodiment, the computer program when executed by the processor further performs the steps of: acquiring data obtained by performing wafer-level first test on a first die and original data of other dies when leaving factories, and generating die data of each die; the memory of the first die stores die identification information.
In one embodiment, the computer program when executed by the processor further performs the steps of: acquiring die identification information of a first die in a packaged chip and chip test data obtained by performing chip-level second test on the chip; the die identification information of the first die and the chip test data are stored in association in a database.
In one embodiment, the computer program when executed by the processor further performs the steps of: acquiring die identification information of a first die in a packaged chip; and retrieving die data of other corresponding dies from the database according to the die identification information of the first die.
In one embodiment, a computer program product is provided comprising a computer program which, when executed by a processor, performs the steps of: acquiring die data of each die; recording substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die; and carrying out associated storage on the die data of each die and the substrate information to obtain a database with a corresponding relation.
In one embodiment, the computer program when executed by the processor further performs the steps of: acquiring data obtained by performing wafer-level first test on a first die and other dies, and generating die data of each die; the memory of the first die stores die identification information.
In one embodiment, the computer program when executed by the processor further performs the steps of: acquiring data obtained by performing wafer-level first test on a first die and original data of other dies when leaving factories, and generating die data of each die; the memory of the first die stores die identification information.
In one embodiment, the computer program when executed by the processor further performs the steps of: acquiring die identification information of a first die in a packaged chip and chip test data obtained by performing chip-level second test on the chip; the die identification information of the first die and the chip test data are stored in association in a database.
In one embodiment, the computer program when executed by the processor further performs the steps of: acquiring die identification information of a first die in a packaged chip; and retrieving die data of other corresponding dies from the database according to the die identification information of the first die.
It should be noted that, the user information (including, but not limited to, user equipment information, user personal information, etc.) and the data (including, but not limited to, data for analysis, stored data, presented data, etc.) referred to in the present application are information and data authorized by the user or sufficiently authorized by each party, and the collection, use and processing of the related data are required to comply with the related laws and regulations and standards of the related countries and regions.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in the various embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magnetic random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (Phase Change Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in the form of a variety of forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), and the like. The databases referred to in the various embodiments provided herein may include at least one of relational databases and non-relational databases. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processors referred to in the embodiments provided herein may be general purpose processors, central processing units, graphics processors, digital signal processors, programmable logic units, quantum computing-based data processing logic units, etc., without being limited thereto.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples merely represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the invention. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.
Claims (10)
1. A multi-die chip management method, comprising:
acquiring die data of each die;
recording substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die;
and carrying out associated storage on the die data of each die and the substrate information to obtain a database with a corresponding relation.
2. The method of claim 1, wherein the die data comprises die identification information and die test data.
3. The method of claim 2, wherein the die identification information includes a wafer lot number, a wafer number, and X/Y coordinates of the die on the wafer.
4. The method of claim 1, wherein the substrate information includes substrate coordinates and a substrate number corresponding to a die placement substrate location.
5. The method of claim 1, wherein the acquiring die data for each die comprises: acquiring data obtained by performing wafer-level first test on a first die and other dies, and generating die data of each die; or,
the acquiring the die data of each die includes: and acquiring data obtained by performing wafer-level first test on the first die and original data of other dies when leaving the factory, and generating die data of each die.
6. The method of claim 5, wherein after the associating and storing the die data and the substrate information of each die to obtain the database with the correspondence relationship, further comprises:
acquiring die identification information of a first die in a packaged chip;
performing a second chip-level test on the chip to obtain chip test data;
and storing the die identification information of the first die and the chip test data in a database in an associated manner.
7. The method of claim 5, wherein after the associating and storing the die data and the substrate information of each die to obtain the database with the correspondence relationship, further comprises:
acquiring die identification information of a first die in a packaged chip;
and retrieving die data of other corresponding dies from the database according to the die identification information of the first die.
8. A multi-die chip management apparatus, comprising:
the data acquisition module is used for acquiring the die data of each die;
the data recording module is used for recording the substrate information corresponding to each die in the process of picking the die to the substrate according to the die data of each die;
and the data sorting module is used for carrying out association storage on the die data of each die and the substrate information to obtain a database with a corresponding relation.
9. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any of claims 1 to 7 when the computer program is executed.
10. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 7.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117763457A (en) * | 2023-11-21 | 2024-03-26 | 上海源斌电子科技有限公司 | Chip test data management system and method based on big data analysis |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117763457A (en) * | 2023-11-21 | 2024-03-26 | 上海源斌电子科技有限公司 | Chip test data management system and method based on big data analysis |
| CN117763457B (en) * | 2023-11-21 | 2024-05-17 | 上海源斌电子科技有限公司 | Chip test data management system and method based on big data analysis |
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