CN116192397B - A physically unclonable function circuit based on ring oscillation - Google Patents
A physically unclonable function circuit based on ring oscillation Download PDFInfo
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- CN116192397B CN116192397B CN202211624889.1A CN202211624889A CN116192397B CN 116192397 B CN116192397 B CN 116192397B CN 202211624889 A CN202211624889 A CN 202211624889A CN 116192397 B CN116192397 B CN 116192397B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
- H04L9/3271—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response
- H04L9/3278—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response using physically unclonable functions [PUF]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/34—Encoding or coding, e.g. Huffman coding or error correction
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Abstract
The invention relates to the technical field of digital integrated circuits and discloses a physical unclonable function circuit based on ring oscillation, which comprises a controller, wherein the controller is connected with a decoder, a multiplexer and a measuring module, the decoder and the multiplexer are connected with an entropy source array, the entropy source array comprises a plurality of groups of special-shaped rings, the input ends of the special-shaped rings are connected with the decoder, the output ends of the special-shaped rings are connected with the multiplexer, a clock generator and a timer are arranged in the controller, the measuring module comprises a level counter, a period counter, a divider, a buffer and a comparator, and the controller is connected with the level counter, the period counter and the comparator. The duty ratio of the periodic signal generated by the special-shaped ring is sensitive to process deviation, and is also less sensitive to working voltage and environmental temperature change, so that the output response of the physical unclonable function circuit has higher reliability.
Description
Technical Field
The invention relates to the technical field of digital integrated circuits, in particular to a physical unclonable function circuit based on ring oscillation.
Background
With the rapid development of internet of things (IoT), large amounts of data were previously stored in embedded devices of user terminals in an unprecedented manner. While this brings undisputed benefits to human society, there are serious implications in the information security of devices deployed in the electronic world. Private data is stored in non-volatile memory on the device, which can be stolen by reverse engineering, thereby maliciously attacking or falsifying. Therefore, techniques to ensure hardware security and trust are of interest. The physical unclonable function circuit is used as a low-cost and high-safety hardware primitive, and the resistance to reverse engineering and other physical attacks is enhanced by extracting random physical changes generated in the manufacturing process of the integrated circuit as unique fingerprints. For a mature process, the fab must control the manufacturing bias to a very limited extent. Thus, the process variations available for physical unclonable function circuits in a particular circuit are in fact very small, which results in difficulty in achieving a stable response under circuit noise, particularly under voltage and temperature variations. Designing a highly reliable PUF primitive is a very critical challenge.
Physically unclonable function circuits based on ring oscillators are one of the most interesting architectures in the academia and industry because they are easy to implement on FPGA or ASIC platforms. This mechanism of accumulating the number of oscillations in the sampling time effectively eliminates the interference of random circuit noise by measuring the period difference between two identical ring oscillators to obtain the response of the physically unclonable function circuit. However, a major disadvantage of a physically unclonable function circuit based on a ring oscillator is that its reliability is significantly affected by voltage and temperature variations and counter accuracy. To solve this problem, a physical unclonable function circuit for measuring the duty cycle of a ring oscillator instead of a period is proposed. However, this way of comparing the duty cycle of a conventional ring oscillator as an output response is very inefficient for the extraction of process variations. Resulting in a circuit that often does not achieve the desired reliability results when implemented in a mature manufacturing process, rather increasing the complexity of the design and hardware resource overhead. Therefore, the extraction efficiency of process variations is critical to the reliability of the physically unclonable function circuit, and ensuring efficient extraction of process variations while improving the circuit's ability to withstand voltage and temperature variations is a serious challenge.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a physical unclonable function circuit based on ring oscillation, so that the influence of process deviation, working voltage and environmental temperature on the reliability is better balanced, and the physical unclonable function circuit realized in a mature manufacturing process is ensured to have high reliability.
The invention adopts the following technical scheme that the physical unclonable function circuit based on ring oscillation comprises a controller, wherein the controller is connected with a decoder, a multiplexer and a measurement module, and the decoder and the multiplexer are connected with an entropy source array;
the entropy source array comprises a plurality of groups of special-shaped rings, the input ends of the special-shaped rings are connected with the decoder, and the output ends of the special-shaped rings are connected with the multiplexer;
a clock generator and a timer are arranged in the controller;
The measuring module comprises a level counter, a period counter, a divider, a buffer and a comparator, wherein the controller is connected with the level counter, the period counter and the comparator, the level counter and the period counter are connected with the divider and the multiplexer, and the divider, the buffer and the comparator are sequentially connected.
As a further improvement of the above solution, the profiled ring includes a first inverter, a second inverter, a third inverter, a first nand gate and a second nand gate;
the input end of the special-shaped ring is a first input end of a first NAND gate, the first input end of the first NAND gate is connected with a decoder, the first output end of the first NAND gate is connected with the input end of a first inverter, the output end of the first inverter is respectively connected with the input end of a third inverter and the first input end of a second NAND gate, the output end of the third inverter is connected to the input end of a second inverter, the output end of the second inverter is connected with the second input end of the second NAND gate, and the output end of the second NAND gate is connected with the second input end of the first NAND gate;
the output end of the special-shaped ring is the output end of the second inverter, and the output end of the second inverter is connected with the multiplexer.
As a further improvement of the above-described scheme, the controller is configured to control the operation state to ensure operation in accordance with the designed timing.
As a further improvement of the above scheme, the controller is configured to receive an original excitation signal input from the outside, send a special-shaped ring sequence signal to the decoder and the multiplexer, send a high-speed sampling signal, a reset signal and a start signal to the measurement module, and transmit a response signal to the outside.
As a further improvement of the above scheme, the decoder receives the special-shaped ring sequence signal from the controller and compiles it into a corresponding multi-bit special-shaped ring strobe signal, and transmits the compiled multi-bit special-shaped ring strobe signal to the entropy source array.
As a further improvement of the above scheme, the entropy source array is configured to generate an oscillation signal with unique identification according to the strobe signal compiled by the decoder.
The method comprises the steps of obtaining a duty ratio value of a special-shaped ring through dividing operation of a divider, obtaining the duty ratio value of the special-shaped ring through dividing operation of the divider, obtaining the duty ratio value of the divider by the buffer, and comparing two-stage data in the buffer by the comparator.
Compared with the prior art, the invention has the beneficial effects that:
1. the invention can compare the duty cycles of any two profiled rings in the entropy source array in response.
2. The duty ratio of the periodic signal generated by the special-shaped ring is sensitive to process deviation, and is also less sensitive to working voltage and environmental temperature change, so that the output response of the physical unclonable function circuit has higher reliability.
Drawings
FIG. 1 is a block diagram of a physical unclonable function circuit based on ring oscillation in accordance with the present invention;
FIG. 2 is a circuit diagram of a profiled ring of the present invention;
FIG. 3 is a waveform diagram of a periodic signal output by a profiled ring according to the invention;
fig. 4 is a timing diagram illustrating the operation of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and detailed description, wherein it is to be understood that, on the premise of no conflict, the following embodiments or technical features may be arbitrarily combined to form new embodiments.
Example 1:
Referring to fig. 1, a physical unclonable function circuit based on ring oscillation in this embodiment includes a controller, where the controller is connected with a decoder, a multiplexer and a measurement module, and the decoder and the multiplexer are connected with an entropy source array;
The entropy source array comprises a plurality of groups of special-shaped rings, the input ends of the special-shaped rings are connected with the decoder, and the output ends of the special-shaped rings are connected with the multiplexer;
the controller is internally provided with a clock generator and a timer;
The measuring module comprises a level counter, a period counter, a divider, a buffer and a comparator, wherein the controller is connected with the level counter, the period counter and the comparator, the level counter and the period counter are connected with the divider and the multiplexer, and the divider, the buffer and the comparator are sequentially connected;
The controller is used for controlling the working state to ensure operation according to the designed time sequence.
The controller is used for receiving an original excitation signal input by the outside, sending a special-shaped ring sequence signal to the decoder and the multiplexer, sending a high-speed sampling signal, a reset signal and a start signal to the measurement module, and transmitting a response signal to the outside.
The decoder receives the special-shaped ring sequence signal from the controller, compiles the special-shaped ring sequence signal into a corresponding multi-bit special-shaped ring strobe signal, and transmits the compiled multi-bit special-shaped ring strobe signal to the entropy source array.
The entropy source array is used for enabling the multi-bit profiled ring to generate an oscillating signal with unique identification according to the gating signal compiled by the decoder.
The system comprises a period counter, a level counter, a divider, a buffer and a comparator, wherein the period counter is used for measuring the number of times of rising edges of signals received by the measuring module in sampling time, the level counter is used for measuring the number of times of sampling the signals received by the measuring module to high level by a high-speed sampling clock in the sampling time, the divider is used for dividing to obtain a duty ratio value of a special-shaped ring, the buffer is used for receiving the duty ratio value from the divider, and the comparator is used for extracting two-stage data in the buffer to conduct numerical comparison.
Example 2:
As shown in fig. 1, the first input terminal Challenge of the controller is configured to receive an external original excitation signal, the fifth output terminal Response of the controller is configured to output a Response signal received by the second input terminal Response to the outside, the first output terminal sel_ring [7:0] is configured to transmit an 8-bit original excitation signal to the decoder module and the multiplexer module, the second output terminal dc_clk is configured to connect the 800MHz clock generator to the level counter of the measurement module, the third output terminal count_reset-1 is configured to connect the reset signal of the timer to the level counter and the period counter in the measurement module, so as to clear the counter in time after each measurement is completed, and the fourth output terminal count_start-2 is configured to connect the timer enable signal to the level counter and the period counter in the measurement module, so as to control sampling times of the level counter and the period counter.
Example 3:
as shown in the figure 2 of the drawings,
The special-shaped ring comprises a first inverter INV1, a second inverter INV2, a third inverter INV3, a first NAND gate NAND1 and a second NAND gate NAND2;
The input end Enable of the special-shaped ring is a first input end of a first NAND gate NAND1, the first input end of the first NAND gate NAND1 is connected with a decoder, the first output end of the first NAND gate NAND1 is connected with the input end of a first inverter INV1, the output end of the first inverter INV1 is respectively connected with the input end of a third inverter INV3 and the first input end of a second NAND gate NAND2, the output end of the third inverter INV3 is connected to the input end of a second inverter INV2, the output end of the second inverter INV2 is connected with the second input end of the second NAND gate NAND2, and the output end of the second NAND gate NAND2 is connected with the second input end of the first NAND gate NAND 1;
the output end of the special-shaped ring is the output end of the second inverter INV2, and the output end of the second inverter INV2 is connected with the multiplexer.
Example 4:
As shown in FIG. 3, waveforms are observed by selecting an output node INV1_o of the first inverter INV1, an output node OUT of the second inverter and an output node NAND2_o of the second NAND gate NAND2, the waveform of the special-shaped ring output OUT is a periodic signal with a duty ratio of not 50%, one complete period of the waveform is composed of three paths of delays, the first section T1 is the sum of delays of the second inverter INV2 and the third inverter INV3, the second section T2 and the third section T3 are the sum of delays of the first NAND gate NAND1, the second NAND gate NAND2 and the first inverter INV1, and the duty ratio of the periodic signal of the special-shaped ring output is obtained by dividing the delays of two different circuits, so that the correlation is weaker, and good process deviation sensitivity can be ensured.
Fifth embodiment:
FIG. 4 is a timing diagram showing the operation of the Ring oscillation based physical unclonable function circuit of the present invention, wherein the controller receives the original excitation Change from the outside and converts it into 8-bit Ring select signals sel_Ring [7:0], which are then compiled by the decoder into 256-bit enable signals ro_en [0:255], wherein the corresponding Nth bit ro_en [ N ] is set high;
The enable input end of the Nth special-shaped ring is gated, the ring starts to work, and the output end is connected to the measuring module by the multiplexer;
Then, the count_start signal is changed from 0 to 1, the level counter and the period counter start sampling at the same time, the sampling time is determined by a timer in the controller, and the count_start signal is changed from 1 to 0 after the sampling is finished;
The results of the level counter and the period counter are sent to a divider for operation, and the duty ratio value of the first special-shaped ring is obtained and temporarily stored in a buffer BUFF-1;
Resetting a count_reset signal, and then temporarily storing the duty ratio value of the second special-shaped ring into a buffer BUFF-2 according to the same operation;
and finally, comparing the duty ratio values of the two caches by a comparator to obtain a final response result.
In conclusion, the technical scheme designed by the invention can compare the duty ratio of any two special-shaped rings in the entropy source array as a response, and the duty ratio of periodic signals generated by the special-shaped rings is more sensitive to process deviation and is less sensitive to working voltage and environmental temperature change, so that the output response of the physical unclonable function circuit has higher reliability.
The above embodiments are only preferred embodiments of the present invention, and the scope of the present invention is not limited thereto, but any insubstantial changes and substitutions made by those skilled in the art on the basis of the present invention are intended to be within the scope of the present invention as claimed.
Claims (6)
1. The physical unclonable function circuit based on ring oscillation comprises a controller, and is characterized in that the controller is connected with a decoder, a multiplexer and a measurement module, and the decoder and the multiplexer are connected with an entropy source array;
the entropy source array comprises a plurality of groups of special-shaped rings, the input ends of the special-shaped rings are connected with the decoder, and the output ends of the special-shaped rings are connected with the multiplexer;
a clock generator and a timer are arranged in the controller;
The measuring module comprises a level counter, a period counter, a divider, a buffer and a comparator, wherein the controller is connected with the level counter, the period counter and the comparator, the level counter and the period counter are connected with the divider and the multiplexer, and the divider, the buffer and the comparator are sequentially connected;
the special-shaped ring comprises a first inverter, a second inverter, a third inverter, a first NAND gate and a second NAND gate;
the input end of the special-shaped ring is a first input end of a first NAND gate, the first input end of the first NAND gate is connected with a decoder, the first output end of the first NAND gate is connected with the input end of a first inverter, the output end of the first inverter is respectively connected with the input end of a third inverter and the first input end of a second NAND gate, the output end of the third inverter is connected to the input end of a second inverter, the output end of the second inverter is connected with the second input end of the second NAND gate, and the output end of the second NAND gate is connected with the second input end of the first NAND gate;
the output end of the special-shaped ring is the output end of the second inverter, and the output end of the second inverter is connected with the multiplexer.
2. A physically unclonable function based on ring oscillation according to claim 1, wherein the controller is adapted to control the operating conditions to ensure operation in accordance with a designed timing.
3. The physically unclonable function circuit based on ring oscillation according to claim 1, wherein the controller is configured to receive an original excitation signal inputted from the outside, send a special ring sequence signal to the decoder and the multiplexer, send a high-speed sampling signal, a reset signal and a start signal to the measurement module, and transmit a response signal to the outside.
4. A physically unclonable function based on ring oscillation as claimed in claim 1, wherein the decoder receives the profiled ring sequence signal from the controller and compiles it into a corresponding multi-bit profiled ring strobe signal and transmits the compiled multi-bit profiled ring strobe signal to the entropy source array.
5. The physically unclonable function circuit based on ring oscillation of claim 1, wherein the entropy source array is configured to generate the oscillation signal with unique identification for the selected profiled ring according to the strobe signal compiled by the decoder.
6. The physically unclonable function circuit according to claim 1, wherein the period counter is used for measuring the number of times that the rising edge of the signal received by the measuring module occurs in the sampling time, the level counter is used for measuring the number of times that the signal received by the measuring module is sampled to a high level by a high-speed sampling clock in the sampling time, the divider performs division operation to obtain a duty ratio value of the special-shaped ring, the buffer is used for receiving the duty ratio value from the divider, and the comparator extracts two-stage data in the buffer for numerical comparison.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110061721A (en) * | 2017-12-22 | 2019-07-26 | 波音公司 | IC system and the method realized by it |
| CN112511308A (en) * | 2020-11-19 | 2021-03-16 | 深圳大学 | Physical unclonable function circuit structure based on grid overhang modulation |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US10027492B1 (en) * | 2017-06-26 | 2018-07-17 | Xilinx, Inc. | Method of and circuit for generating a physically unclonable function |
| US10917251B2 (en) * | 2018-03-30 | 2021-02-09 | Intel Corporation | Apparatus and method for generating hybrid static/dynamic entropy physically unclonable function |
| CN113515783B (en) * | 2021-09-13 | 2021-12-14 | 南京航空航天大学 | Multi-mode reconfigurable physical unclonable function circuit and method thereof |
| CN113707201B (en) * | 2021-10-27 | 2022-03-15 | 南京航空航天大学 | An Efficient Reconfigurable Ring Oscillator PUF Circuit Based on RRAM |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110061721A (en) * | 2017-12-22 | 2019-07-26 | 波音公司 | IC system and the method realized by it |
| CN112511308A (en) * | 2020-11-19 | 2021-03-16 | 深圳大学 | Physical unclonable function circuit structure based on grid overhang modulation |
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