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CN116169022A - Method for preparing metal microstructure - Google Patents

Method for preparing metal microstructure Download PDF

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Publication number
CN116169022A
CN116169022A CN202111406278.5A CN202111406278A CN116169022A CN 116169022 A CN116169022 A CN 116169022A CN 202111406278 A CN202111406278 A CN 202111406278A CN 116169022 A CN116169022 A CN 116169022A
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Prior art keywords
pattern
metal
hard mask
metal layer
layer
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Pending
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CN202111406278.5A
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Chinese (zh)
Inventor
张永恩
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Shanghai Industrial Utechnology Research Institute
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Shanghai Industrial Utechnology Research Institute
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Priority to CN202111406278.5A priority Critical patent/CN116169022A/en
Publication of CN116169022A publication Critical patent/CN116169022A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The invention provides a preparation method of a metal microstructure, which comprises the following steps: 1) Forming a hard mask layer on a substrate; 2) Forming a photoresist pattern on the hard mask layer; 3) Etching the hard mask layer to form a groove pattern in the hard mask layer and removing the photoresist pattern; 4) Forming a metal layer in the groove pattern and on the surface of the hard mask layer; 5) Flattening the metal layer to enable the top surface of the metal layer in the groove pattern to be flush with the top surface of the hard mask layer so as to obtain a pattern metal layer in the groove pattern; 6) Forming a protective pattern on the pattern metal layer; 7) And removing the hard mask layer by dry etching and removing the protective pattern to obtain the pattern metal layer on the substrate. The invention can effectively solve the problem that irregular burrs are easy to occur on the side wall and the surface of the metal pattern in the existing metal stripping process and the problem that poor contact is easy to occur on the bottoms of the two sides of the metal pattern.

Description

Method for preparing metal microstructure
Technical Field
The invention belongs to the field of semiconductor manufacturing, and particularly relates to a preparation method of a metal microstructure.
Background
In the manufacturing process of semiconductors or MEMS products, micromachining of metals is required. The metal micromachining methods commonly used in semiconductor fabrication include metal etching and metal lift-off. Some metals, such as gold, platinum, etc., are difficult to micromachine by etching. For example, when the thickness of the gold thin film is more than 500nm, the metal etching mode becomes difficult, and the difficulty increases as the thickness of the metal increases. Thus, some metal microstructures often require metal lift-off processes to complete. The metal stripping process mainly includes the steps of forming a photoresist pattern by photolithography, metal vapor deposition, and then removing the photoresist by solution, and simultaneously stripping the metal on the photoresist, leaving a desired metal pattern 102 on the substrate 101 at the opening of the photoresist pattern (i.e., the exposed surface of the substrate). However, in the metal peeling process, the adhesion of the metal film formed by vapor deposition is not good enough, and the integrity of the metal pattern in the peeling process is not good enough. For example, the sidewall of the stripped metal pattern 102 may generate irregular protruding burrs 103 as shown in fig. 1, and the bottom of the metal pattern 102 may be recessed 104 to cause detachment from the substrate as shown in fig. 2. Further, the thicker the metal film thickness, the more difficult the metal peeling becomes. The problems of metal etching and metal stripping can affect the performance of the device and can cause the reduction of the yield of the product; at the same time, the miniaturization of the metal pattern is restricted.
It should be noted that the foregoing description of the background art is only for the purpose of facilitating a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background section of the present application.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a method for preparing a metal microstructure, which is used for solving the problem that the integrity of a metal pattern is easily damaged during the metal peeling process in the prior art.
To achieve the above and other related objects, the present invention provides a method for preparing a metal microstructure, the method comprising: 1) Providing a substrate, and forming a hard mask layer on the substrate; 2) Forming a photoresist pattern on the hard mask layer; 3) Etching the hard mask layer to form a groove pattern in the hard mask layer, and removing the photoresist pattern; 4) Forming a metal layer in the groove pattern and on the surface of the hard mask layer; 5) Flattening the metal layer to enable the top surface of the metal layer in the groove pattern to be flush with the top surface of the hard mask layer so as to obtain a pattern metal layer in the groove pattern; 6) Forming a protective pattern on the pattern metal layer; 7) And removing the hard mask layer by dry etching, and removing the protection pattern to obtain the pattern metal layer on the substrate.
Optionally, step 1) the hard mask layer includes a silicon dioxide layer, and step 3) etching the hard mask layer through a dry etching process to obtain a groove pattern with a bottom exposing the substrate and smooth and dense side walls.
Optionally, an included angle between the side wall of the groove pattern and the surface of the substrate is 88-90 degrees.
Optionally, step 4) forming a metal layer in the groove pattern and on the surface of the hard mask layer by adopting a sputtering process so as to ensure the adhesion strength of the metal layer and the substrate.
Optionally, step 5) planarizes the metal layer using a chemical mechanical polishing process.
Optionally, the planar shape of the graphic metal layer includes one of a dot pattern, a line pattern, a planar pattern, a mesh pattern, and an interdigital pattern.
Optionally, the material of the patterned metal layer includes an alloy composed of one or both of Al and Cu.
Optionally, step 6) forms a protection pattern on the patterned metal layer, where the width of the protection pattern is equal to the width of the patterned metal layer.
Optionally, the protective pattern of step 6) includes photoresist.
Optionally, the thickness of the hard mask layer and the patterned metal layer is greater than or equal to 500 nanometers.
Optionally, in step 7), the ion etching direction of removing the hard mask layer through dry etching is vertical to the surface of the substrate, and in the dry etching process, at least part of the thickness of the protection pattern is reserved on the pattern metal layer, so that the top surface of the pattern metal layer is protected in the whole process.
Optionally, the patterned metal layer obtained in step 7) has smooth sidewalls and surfaces.
As described above, the preparation method of the metal microstructure of the present invention has the following beneficial effects:
the invention can effectively solve the problem that irregular burrs are easy to occur on the side wall and the surface of the metal pattern in the existing metal stripping process and the problem that poor contact is easy to occur on the bottoms of the two sides of the metal pattern.
Compared with the existing metal stripping process, the preparation method provided by the invention can be used for advanced products with smaller size and finer granularity.
The invention solves the problem that the metal is difficult to completely strip in the prior art.
The invention can deposit metal by adopting a metal sputtering mode, thereby avoiding the problem of poor adhesion of metal vapor plating metal and greatly increasing the adhesion strength of the metal and the substrate.
The method effectively overcomes the limitation of traditional metal etching, can obtain the desired regular metal patterns, and has wide application scenes and application prospects.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is apparent that the drawings in the following description are only some of the embodiments of the present application.
Fig. 1 to 2 are schematic diagrams showing defects of a metal layer caused by a metal stripping process in the prior art.
Fig. 2 to 12 are schematic structural views showing steps of a method for manufacturing a metal microstructure according to an embodiment of the present invention.
Description of element reference numerals
101. Substrate board
102. Metal pattern
103. Protruding burr
104. Bottom recess
201. Substrate
202. Hard mask layer
203. Photoresist layer
204. Photoresist pattern
205. Groove pattern
206. Patterned metal layer
207. Protecting graphics
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
It should be emphasized that the term "comprises/comprising" when used herein is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps or components.
Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments in combination with or instead of the features of the other embodiments.
As described in detail in the embodiments of the present invention, the cross-sectional view of the device structure is not partially enlarged to a general scale for convenience of explanation, and the schematic drawings are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
For ease of description, spatially relative terms such as "under", "below", "beneath", "above", "upper" and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Furthermore, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present.
In the context of this application, a structure described as a first feature being "on" a second feature may include embodiments where the first and second features are formed in direct contact, as well as embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings rather than the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
As shown in fig. 2 to 12, the present embodiment provides a method for preparing a metal microstructure, including:
as shown in fig. 3, step 1) is first performed, a substrate 201 is provided, and a hard mask layer 202 is formed on the substrate 201.
In one embodiment, the substrate 201 may be silicon, germanium, silicon-on-insulator, germanium-on-insulator, silicon carbide, a group III-V semiconductor compound, sapphire, or the like. In this embodiment, the material of the substrate 201 is silicon.
In one embodiment, the hard mask layer 202 may be a silicon dioxide layer, which may be prepared by a Plasma Enhanced Chemical Vapor Deposition (PECVD) process or a thermal oxidation process, for example, and the thickness of the hard mask layer 202 may be set according to the thickness of the patterned metal layer 206, that is, the thickness of the patterned metal layer 206 may be precisely controlled by controlling the thickness of the hard mask layer 202, with higher precision. In one embodiment, the thickness of the hard mask layer 202 and the subsequent patterned metal layer 206 are each greater than or equal to 500 nanometers.
As shown in fig. 4 to 5, step 2) is then performed to form a photoresist pattern 204 on the hard mask layer 202.
Specifically, a photoresist layer 203 is formed on the hard mask layer 202 through a spin coating process, and then the photoresist layer 203 is exposed and developed to form a photoresist pattern 204.
As shown in fig. 6 to 7, step 3) is performed to etch the hard mask layer 202, so as to form a groove pattern 205 in the hard mask layer 202, and remove the photoresist pattern 204.
In one embodiment, the hard mask layer 202 is etched by a dry etching process to obtain a trench pattern 205 with a smooth dense sidewall with the bottom exposing the substrate 201.
In one embodiment, the sidewall of the groove pattern 205 is at an angle of between 88 and 90 degrees to the surface of the substrate 201. In this example, by controlling the conditions of etching gas, power, etc., the included angle between the sidewall of the groove pattern 205 and the surface of the substrate 201 is kept at the included angle between the sidewall of the groove pattern 205 and the surface of the substrate 201, so that it can be ensured that the pattern metal layer 206 will not block the hard mask layer 202 on the sidewall thereof when the hard mask layer 202 is etched and removed later, so that the hard mask layer 202 can be completely removed, and the quality of the pattern metal is ensured. Preferably, the side wall of the groove pattern 205 forms an angle of 90 degrees with the surface of the substrate 201.
Since the recess pattern 205 can be manufactured by advanced semiconductor process, the present application can be used in advanced products with smaller and finer dimensions compared to the existing metal lift-off process.
As shown in fig. 8, step 4) is then performed to form a metal layer within the recess pattern 205 and on the surface of the hard mask layer 202.
In one embodiment, a metal layer is formed in the recess pattern 205 and on the surface of the hard mask layer 202 using a sputtering process to ensure adhesion strength of the metal layer to the substrate 201. The invention can avoid the problem of poor adhesion of metal vapor plating metal by adopting a metal sputtering mode to deposit metal, and greatly increases the adhesion strength of the metal and the substrate 201.
In one embodiment, the deposition thickness of the metal layer may be set to just fill the recess pattern 205 or slightly greater than the depth of the recess pattern 205, so as to avoid metal waste, which is beneficial to saving the time cost and the material cost of deposition and also beneficial to the subsequent planarization process. In this embodiment, the deposition thickness of the metal layer is slightly greater than the depth of the recess pattern 205, so as to ensure that the recess pattern 205 is completely filled, and the recess of the metal layer at the recess pattern 205 is not caused during the subsequent planarization process.
As shown in fig. 9, step 5) is performed to planarize the metal layer so that the top surface of the metal layer in the recess pattern 205 is flush with the top surface of the hard mask layer 202, to obtain a patterned metal layer 206 in the recess pattern 205.
In one embodiment, the metal layer is planarized using a chemical mechanical polishing process.
In one embodiment, the planar shape of the patterned metal layer 206 includes one of a dot pattern, a line pattern, a planar pattern, a mesh pattern, and an inter-digitated pattern.
In one embodiment, the material of the patterned metal layer 206 includes one of Au, pt, al, cu, ag, ti and Ni, a stack of two or more, or an alloy of two or more.
In one embodiment, the patterned metal layer 206 has a thickness of greater than or equal to 500 nanometers, such as 1000 nanometers to 5000 nanometers.
As shown in fig. 10, step 6) is then performed to form a protective pattern 207 on the patterned metal layer 206.
In one embodiment, after forming the protective pattern 207 on the patterned metal layer 206, the protective pattern 207 has a width equal to the width of the patterned metal layer 206. For example, the protective pattern 207 may be a photoresist. The protection pattern 207 may protect the surface of the patterned metal layer 206 from being damaged by etching during the subsequent dry etching.
As shown in fig. 11 to 12, step 7) is finally performed to remove the hard mask layer 202 by dry etching and remove the protective pattern 207, so as to obtain a patterned metal layer 206 on the substrate 201.
In one embodiment, the ion etching direction of removing the hard mask layer 202 by dry etching is perpendicular to the surface of the substrate 201, and during the dry etching, at least a part of the thickness of the protection pattern 207 remains on the pattern metal layer 206, so as to protect the top surface of the pattern metal layer 206 in the whole process.
In one embodiment, on the one hand, the sidewalls of the recess pattern 205 of the hard mask layer 202 may be made more dense and smooth than the photoresist recess, thereby ensuring that the patterned metal layer 206 has smooth sidewalls, and in addition, during the dry etching process, at least a portion of the thickness of the protection pattern 207 remains on the patterned metal layer 206 to protect the top surface of the patterned metal layer 206 in the whole process, and the patterned metal layer 206 may have a smooth top surface, so that the patterned metal layer 206 obtained in the present application has smooth sidewalls and surfaces. The invention can effectively solve the problem that irregular burrs are easy to occur on the side wall and the surface of the metal pattern in the existing metal stripping process and the problem that poor contact is easy to occur on the bottoms of the two sides of the metal pattern.
The hard mask layer 202 can be completely removed by a dry etching process, and the method can effectively solve the problem that the metal is difficult to completely strip in the prior art.
As described above, the preparation method of the metal microstructure of the present invention has the following beneficial effects:
the invention can effectively solve the problem that irregular burrs are easy to occur on the side wall and the surface of the metal pattern in the existing metal stripping process and the problem that poor contact is easy to occur on the bottoms of the two sides of the metal pattern.
Compared with the existing metal stripping process, the preparation method provided by the invention can be used for advanced products with smaller size and finer granularity.
The invention solves the problem that the metal is difficult to completely strip in the prior art.
The invention can avoid the problem of poor adhesion of metal vapor plating metal by adopting a metal sputtering mode to deposit metal, and greatly increases the adhesion strength of the metal and the substrate 201.
The method effectively overcomes the limitation of traditional metal etching, can obtain the desired regular metal patterns, and has wide application scenes and application prospects.
Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (12)

1. A method for producing a metal microstructure, the method comprising:
1) Providing a substrate, and forming a hard mask layer on the substrate;
2) Forming a photoresist pattern on the hard mask layer;
3) Etching the hard mask layer to form a groove pattern in the hard mask layer, and removing the photoresist pattern;
4) Forming a metal layer in the groove pattern and on the surface of the hard mask layer;
5) Flattening the metal layer to enable the top surface of the metal layer in the groove pattern to be flush with the top surface of the hard mask layer so as to obtain a pattern metal layer in the groove pattern;
6) Forming a protective pattern on the pattern metal layer;
7) And removing the hard mask layer by dry etching, and removing the protection pattern to obtain the pattern metal layer on the substrate.
2. The method for producing a metal microstructure according to claim 1, wherein: step 1) the hard mask layer comprises a silicon dioxide layer, and step 3) the hard mask layer is etched through a dry etching process to obtain a groove pattern with the bottom exposed out of the substrate and smooth and compact side walls.
3. The method for producing a metal microstructure according to claim 1, wherein: the included angle between the side wall of the groove pattern and the surface of the substrate is 88-90 degrees.
4. The method for producing a metal microstructure according to claim 1, wherein: and 4) forming a metal layer in the groove pattern and on the surface of the hard mask layer by adopting a sputtering process so as to ensure the adhesion strength of the metal layer and the substrate.
5. The method for producing a metal microstructure according to claim 1, wherein: and 5) carrying out planarization treatment on the metal layer by adopting a chemical mechanical polishing process.
6. The method for producing a metal microstructure according to claim 1, wherein: the planar shape of the graphic metal layer comprises one of a dot pattern, a linear pattern, a planar pattern, a net pattern and an interdigital pattern.
7. The method for producing a metal microstructure according to claim 1, wherein: the material of the pattern metal layer comprises an alloy consisting of one or two of Al and Cu.
8. The method for producing a metal microstructure according to claim 1, wherein: and 6) forming a protection pattern on the pattern metal layer, wherein the width of the protection pattern is equal to that of the pattern metal layer.
9. The method for producing a metal microstructure according to claim 1, wherein: the protective pattern of step 6) comprises photoresist.
10. The method for producing a metal microstructure according to claim 1, wherein: the thickness of the hard mask layer and the graphic metal layer is greater than or equal to 500 nanometers.
11. The method for producing a metal microstructure according to claim 1, wherein: and 7) removing the ion etching direction of the hard mask layer by dry etching to be vertical to the surface of the substrate, wherein in the dry etching process, at least part of the thickness of the protection pattern is reserved on the pattern metal layer so as to protect the top surface of the pattern metal layer in the whole process.
12. The method for producing a metal microstructure according to claim 1, wherein: the patterned metal layer obtained in step 7) has smooth sidewalls and surfaces.
CN202111406278.5A 2021-11-24 2021-11-24 Method for preparing metal microstructure Pending CN116169022A (en)

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Application Number Priority Date Filing Date Title
CN202111406278.5A CN116169022A (en) 2021-11-24 2021-11-24 Method for preparing metal microstructure

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118910565A (en) * 2024-07-16 2024-11-08 广东省埃森塔科技有限公司 Method for manufacturing metal pattern on electronic element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118910565A (en) * 2024-07-16 2024-11-08 广东省埃森塔科技有限公司 Method for manufacturing metal pattern on electronic element

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