CN116153961A - A display panel and a display device - Google Patents

Abstract

Embodiments of the present application provide a display panel and a display device. A plurality of light-emitting device groups and a plurality of first signal lines are arranged on the same side of the base substrate, and the light-emitting device group includes a plurality of light-emitting devices arranged along the second direction. ; A plurality of first signal lines and a plurality of light emitting device groups are arranged along the first direction, and the first signal lines are electrically connected to at least some of the light emitting devices in the correspondingly arranged light emitting device groups; wherein, among the plurality of first signal lines At least a first type of first signal line is included, and the orthographic projection of the first type of first signal line on the base substrate at least partially overlaps the orthographic projection of the corresponding light emitting device group on the base substrate. By arranging the first signal line of the first type in the area where the light-emitting device group is located, the space for specially setting the first signal line in the planar area of the display panel is reduced, and it is easy to implement the pixel circuit and the signal line electrically connected to it. layout design, it is also easy to implement a display device with a narrow bezel.

Description

Display panel and display device

【Technical field】

The present application relates to the field of display technology, in particular to a display panel and a display device.

【Background technique】

In recent years, narrow frame display and frameless display of display screens have become an important development direction of high-end displays.

In order to meet the current demand for narrow bezels, flexible display screens have won everyone's favor. By bending the circuits in the bezel area to the back of the display panel, the display screen looks bezel-less. However, flexible display screens are difficult to apply to all current display scenarios due to reasons such as high price, poor stability, resistance to high temperature and high humidity, and corrosion resistance.

Therefore, how to realize extremely narrow bezels is still an urgent problem in the display field.

【Application content】

In view of this, embodiments of the present application provide a display panel and a display device.

In the first aspect, the embodiment of the present application provides a display panel, including:

Substrate substrate;

A plurality of light-emitting device groups arranged on one side of the base substrate; a plurality of the light-emitting device groups are arranged along a first direction and the light-emitting device groups include a plurality of light-emitting devices arranged along a second direction;

A plurality of first signal lines are arranged on the same side of the substrate as the light-emitting device group; the plurality of first signal lines are arranged along the first direction; the first signal lines are connected to the The groups of light emitting devices are correspondingly arranged, and the first signal line is electrically connected to at least part of the light emitting devices in the correspondingly arranged groups of light emitting devices;

Wherein, the plurality of first signal lines at least include the first type of first signal lines; the orthographic projection of the first type of first signal lines on the base substrate and the light emitting device group correspondingly arranged therein The orthographic projections on the substrate substrate at least partially overlap.

In a second aspect, an embodiment of the present application provides a display device, including the display panel as provided in the first aspect.

By arranging the first signal line of the first type in the area where the light-emitting device group is located, the space for specially setting the first signal line in the planar area of the display panel is reduced, and it is easy to implement the pixel circuit and the signal line electrically connected to it. layout design, it is also easy to implement a display device with a narrow bezel.

【Description of drawings】

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the accompanying drawings that need to be used in the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. Those of ordinary skill in the art can also obtain other drawings based on these drawings without any creative effort.

FIG. 1 is a schematic diagram of a display panel provided by an embodiment of the present application;

Figure 2 is a schematic cross-sectional view of Figure 1 along the M1-M2 direction;

FIG. 3 is a schematic diagram of partial details of the A1 area of the display panel shown in FIG. 1;

FIG. 4 is a schematic diagram of a display panel provided by an embodiment of the present application;

FIG. 5 is a schematic diagram of a display panel provided by an embodiment of the present application;

FIG. 6 is a schematic diagram of partial details of the A2 area of the display panel shown in FIG. 4;

FIG. 7 is a partially enlarged schematic diagram of a display panel provided by an embodiment of the present application;

Fig. 8 is a schematic cross-sectional view along the N1-N2 direction in Fig. 3 and Fig. 6;

FIG. 9 is a partially enlarged schematic diagram of a display panel provided by an embodiment of the present application;

FIG. 10 is a partially enlarged schematic diagram of a display panel provided by an embodiment of the present application;

FIG. 11 is a partially enlarged schematic diagram of a display panel provided by an embodiment of the present application;

FIG. 12 is a schematic diagram of a display device provided by an embodiment of the present application;

FIG. 13 is a schematic diagram of another display device provided by an embodiment of the present application.

【Detailed ways】

In order to better understand the technical solutions of the present application, the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings.

It should be clear that the described embodiments are only some of the embodiments of the present application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

Terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of this application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

It should be understood that the term "and/or" used herein is only an association relationship describing associated objects, which means that there may be three relationships, for example, A and/or B, which may mean that A exists alone, and A and B exist simultaneously. B, there are three situations of B alone. In addition, the character "/" in this article generally indicates that the contextual objects are an "or" relationship.

In the description of this specification, it should be understood that words such as "substantially", "approximately", "approximately", "approximately", "approximately" and "substantially" described in the claims and embodiments of the present application refer to Within the reasonable range of process operation or tolerance, it can be generally agreed, rather than an exact value.

It should be understood that although the terms first, second, third, etc. may be used in the embodiments of the present application to describe signal lines, scan lines, etc., these signal lines, etc. should not be limited to these terms. These terms are only used to distinguish signal lines, scan lines, etc. from each other. For example, without departing from the scope of the embodiments of the present application, a first signal line may also be called a second signal line, and similarly, a second signal line may also be called a first signal line.

The applicant in this case provided a solution to the problems existing in the prior art through detailed and in-depth research.

FIG. 1 is a schematic diagram of a display panel provided by an embodiment of the present application, and FIG. 2 is a schematic cross-sectional diagram along the M1-M2 direction of FIG. 1 .

1 and 2, the display panel 001 provided by the embodiment of the present application includes a base substrate 01, a plurality of light-emitting device groups 02 and a plurality of first signal lines L1, and the light-emitting device groups 02 and the first signal lines L1 are arranged on the substrate. The same side of the base substrate 01.

The multiple light emitting device groups 02 included in the display panel 001 are arranged along a first direction Y, and the light emitting device group 02 includes a plurality of light emitting devices 20 arranged along a second direction X. The second direction X intersects the first direction Y, specifically, the second direction X may be perpendicular to the first direction Y. Wherein, the light emitting device 20 may specifically be any one of a submillimeter light emitting diode (mini LED) or a micro light emitting diode (micro LED).

The plurality of first signal lines L1 included in the display panel 001 are arranged along the first direction Y and the first signal lines L1 may generally extend along the second direction X. The first signal line L1 is disposed corresponding to the light emitting device group 02 and the first signal line L1 is electrically connected to at least part of the light emitting devices 20 in the correspondingly disposed light emitting device group 02 . That is, the first signal line L1 may be a signal line for transmitting signals for the plurality of light emitting devices 20 in the light emitting device group 02 .

In the embodiment of the present application, the display panel 001 further includes a plurality of pixel circuit groups 03 , and the pixel circuit groups 03 and the light emitting device group 02 are arranged on the same side of the base substrate 01 . A plurality of pixel circuit groups 03 are arranged along the first direction Y, and the pixel circuit group 03 includes a plurality of pixel circuits 30 arranged along the second direction X.

Wherein, the pixel circuit group 03 is arranged corresponding to the light emitting device group 02 , and the pixel circuit 30 in the pixel circuit group 03 is electrically connected to the light emitting device 20 in the correspondingly arranged light emitting device group 02 . For example, as shown in FIG. 1 , the pixel circuit group 03 is arranged in one-to-one correspondence with the light emitting device group 02 .

Further, the orthographic projection of the pixel circuit group 03 on the base substrate 01 may not overlap with the orthographic projection of the correspondingly arranged light emitting device group 02 on the base substrate 01 . Then the orthographic projection of the pixel circuit group 03 on the base substrate 01 and the orthographic projection of the corresponding light-emitting device group 02 on the base substrate 01 are arranged along the first direction Y. As shown in FIG. 1 , the pixel circuit group 03 and the corresponding light emitting device group 02 are arranged along the first direction Y, and further, the pixel circuits 30 and the corresponding light emitting devices 20 are arranged along the first direction Y.

When the light emitting device 20 is a sub-millimeter light emitting diode or a micro light emitting diode, etc., the light emitting device 20 can be transferred to an array substrate by mass transfer technology, where the array substrate refers to the pixel circuit 30, Substrates for various signal lines, etc. As shown in FIG. 2 , the array substrate includes a first signal line L1, a pixel circuit 30 , a cathode pad 220 and an anode pad 210 , the cathode 22 in the light emitting device 20 is bound to the cathode pad 220 and the light emitting device 20 The anode 21 is bound to the anode pad 210 . Among the cathode pad 220 and the anode pad 210 , one is electrically connected to the first signal line L1 , and the other is electrically connected to the pixel circuit 30 .

For example, as shown in FIG. 2, when the light emitting device 20 is a submillimeter light emitting diode or a micro light emitting diode, the first signal line L1 may be electrically connected to the cathode pad 220, that is, the first signal line L1 is connected to the submillimeter light emitting diode or the micro light emitting diode. The cathode 22 of the micro LED is electrically connected and provides a cathode signal for the submillimeter LED or the micro LED. At this time, the anode 21 of the submillimeter LED or micro LED can be electrically connected to the pixel circuit 30 through the anode pad 210 .

In addition, when the light emitting device 20 is a submillimeter light emitting diode or a micro light emitting diode, the first signal line L1 can be electrically connected to the anode pad 210, that is, the first signal line L1 is connected to the anode 21 of the submillimeter light emitting diode or the micro light emitting diode. It is electrically connected and provides an anode signal for a submillimeter LED or a micro LED. At this time, the cathode 22 of the submillimeter LED or micro LED can be electrically connected to the pixel circuit 30 through the cathode pad 220 .

Since different pixel circuits 30 can output different electrical signals to the light emitting device 20, at least some of the different first signal lines L1 can provide the same signal to the light emitting devices 20 that are respectively electrically connected to them. A signal line L1 can be electrically connected together to reduce impedance. For example, as shown in FIG. 1, all the first signal lines L1 can be electrically connected together, and then a plurality of first signal lines L1 are electrically connected together through the connection electrode L10 to form a grid-shaped conductive structure, wherein the first signal lines L1 is a portion extending along the second direction X in the grid-shaped conductive structure. In addition, the connecting electrode L10 and the first signal line L1 may be located in different conductive film layers.

FIG. 3 is a schematic diagram of partial details of the A1 area of the display panel shown in FIG. 1 .

It should be noted that, in addition to the first signal line L1, the signal lines in the array substrate may also include a second signal line L2 electrically connected to the pixel circuit 30, a data line L3, a first scanning line SL1, a second scanning line line SL2 , the third scanning line SL3 , and a reset signal line L4 . Usually, the signal lines whose extension directions intersect are located in different film layers and the signal lines whose extension directions are parallel can be located in the same film layer. extended, the first signal line L1 can be set on the same layer as the first scanning line SL1, the second scanning line SL2, and the third scanning line SL3; the second signal line L2 and the data line L3 extend along the first direction Y, then the connection The electrode L10 may be disposed on the same layer as the second signal line L2 and the data line L3.

Wherein, when the first signal line L1 is electrically connected to the cathode pad 220, the first signal line L1 is used to transmit a negative power supply voltage, and the second signal line L2 can transmit a positive power supply voltage to the pixel circuit 30; When a signal line L1 is electrically connected to the anode pad 210 , the first signal line L1 is used to transmit a positive power supply voltage, and the second signal line L2 can transmit a negative power supply voltage to the pixel circuit 30 .

It should be noted that, in the embodiment of the present application, the type and quantity of the signal lines can be set according to the specific circuit structure of the pixel circuit 30 , which is not limited in the present application.

In the embodiment of the present application, the plurality of first signal lines L1 at least include the first type of first signal line L11, and the orthographic projection of the first type of first signal line L11 on the base substrate 01 corresponds to the light emitting device The orthographic projections of the group 02 on the base substrate 01 are at least partially overlapping. That is, some of the first signal lines L1 included in the display panel 001 overlap with the light emitting devices 20 electrically connected to them along the thickness direction of the display panel 001 .

The orthographic projection of the first type of first signal line L11 on the base substrate 01 and the orthographic projection of the corresponding light emitting device group 02 on the base substrate 01 at least partially overlap means that the first type of first signal line L11 At least partially arranged in the area where the light emitting device group 02 is located and located under the light emitting device group 02 . Further, the orthographic projection of the first signal line L11 of the first type on the base substrate 01 and the cathode pad on the base substrate 01 that are electrically connected to the cathodes of the plurality of light emitting devices 20 in the corresponding light emitting device group 02 The orthographic projections overlap along the second direction X.

Along the second direction X, the two ends of the orthographic projection of the first signal line L11 of the first type on the base substrate 01 may protrude beyond the orthographic projection of the corresponding light emitting device group 02 on the base substrate 01; The part of the orthographic projection of the first signal line L11 on the base substrate 01 overlapping with the orthographic projection of the light emitting device 20 on the base substrate 01 is completely covered by the light emitting device 20 . It can be understood that the first type of first signal line L11 is close to its corresponding light emitting device group 02 along the first direction Y, so that the first type of first signal line L11 overlaps with its corresponding light emitting device group 02 .

In the technical solution provided by the embodiment of the present application, by arranging the first type of first signal line L11 in the area where the light-emitting device group 02 is located, the need to specially arrange the first signal line L1 in the plane area of the display panel 001 is reduced. It is easy to realize the layout design of the pixel circuit 30 and the signal lines electrically connected thereto.

In one embodiment of the present application, as shown in FIG. 1, FIG. 2 and FIG. The orthographic projection on the base substrate 01 does not overlap with the orthographic projection of the corresponding light emitting device group 02 on the base substrate 01 . That is, the orthographic projection of some of the first signal lines L1 included in the display panel 001 and the light emitting devices 20 electrically connected to them on the base substrate 01 is arranged along the first direction Y.

The orthographic projection of the second type of first signal line L12 on the base substrate 01 and the orthographic projection of the corresponding light emitting device group 02 on the base substrate 01 do not overlap, which means that the second type of first signal line L12 and the corresponding The light emitting device groups 02 are arranged in different areas of the display panel 001. Then the orthographic projection of the first signal line L12 of the second type on the base substrate 01 is soldered to the cathode pad 220 electrically connected to the cathode of the plurality of light emitting devices 20 in the corresponding light emitting device group 02 and the anode pad 220 electrically connected to the anode. The orthographic projections of the disk 210 on the base substrate 01 along the second direction X have no overlap.

In a technical solution corresponding to this embodiment, the orthographic projection of the light-emitting device group 02 arranged corresponding to the second-type first signal line L12 on the base substrate 01 is located on the correspondingly arranged second-type first signal line L12 Between the orthographic projection on the base substrate 01 and the orthographic projection of the corresponding pixel circuit group 03 on the base substrate 01 . That is, in the orthographic projections of the first signal line L12 of the second type and its corresponding pixel circuit group 03 and light emitting device group 02 on the base substrate 01, the orthographic projection of the pixel circuit group 03, the orthographic projection of the light emitting device group 02 and The orthographic projections of the second type of first signal lines L12 are sequentially arranged along the first direction Y.

Furthermore, the first signal lines L12 of the second type and the cathode pads 220 to which they are electrically connected are arranged along the first direction Y, then the first signal lines L12 of the second type and the cathode pads 230 are arranged perpendicular to the surface where the display panel 001 is located. There is no overlap in the direction of the cathode pad 220, so the lower side of the cathode pad 220 can have a relatively flat bearing surface. Furthermore, it is ensured that the contact yield between the cathode pad 220 and the cathode 22 of the light emitting device 20 is high.

FIG. 4 is a schematic diagram of a display panel provided by an embodiment of the present application, and FIG. 5 is a schematic diagram of a display panel provided by an embodiment of the present application.

In one embodiment of the present application, as shown in FIG. 1 , FIG. 4 and FIG. 5 , among the plurality of first signal lines L1 arranged along the first direction Y, at least one first signal line near the edge of the display panel 001 L1 is a first type of first signal line L11. For example, the first direction Y is the column direction and the second direction X is the row direction. As shown in FIG. 1 and FIG. The first signal line L1 at the bottom of the display panel 001 may at least partially overlap with the corresponding light emitting device group 02 in a direction perpendicular to the surface where the display panel 001 is located; as shown in FIG. 4 and FIG. The first signal line L1 can be the first type of first signal line L11, that is, the first signal line L1 at the top of the display panel 001 can be at least partially overlapped.

By setting the first signal line L1 close to the edge of the display panel 001 as the first type of first signal line L11, the light emitting device 20 is closer to the edge of the display panel 001, and the risk of black borders appearing on the display panel 001 can be reduced. greatly reduced.

In a technical solution corresponding to this embodiment, referring to FIG. 1 , FIG. 5 and FIG. 3 , the light emitting device group 02 close to the lower edge of the display panel 001 is arranged on the side of the corresponding pixel circuit group 03 facing the lower edge, and The first signal line L1 corresponding to the light emitting device group 02 is a first type first signal line L11 and overlaps with the light emitting device group 02 in a direction perpendicular to the surface where the display panel 001 is located.

FIG. 6 is a partial detailed schematic diagram of the area A2 in the display panel shown in FIG. 4 .

In a technical solution corresponding to this embodiment, in combination with FIG. 4 , FIG. 5 and FIG. 6 , in a technical solution corresponding to this embodiment, in combination with FIG. 3 , FIG. 4 and FIG. The light-emitting device group 02 is arranged on the side of the corresponding pixel circuit group 03 facing the upper edge, and the first signal line L1 corresponding to the light-emitting device group 02 is a first-type first signal line L11 and is connected to the light-emitting device group 02 Overlap in a direction perpendicular to the surface where the display panel 001 is located.

When the display panel 001 includes both the first-type first signal lines L11 and the second-type first signal lines L12 , the second-type first signal lines L12 may be the first signal lines L1 away from the edge of the display panel 001 . That is, the orthographic projection of the first type of first signal line L11 on the base substrate 01 is located on the side of the orthographic projection of the second type of first signal line L12 on the base substrate 01 close to the edge of the base substrate 01 .

1 and 3, FIG. 4 and FIG. 6, the second type of first signal line L12 and the corresponding light emitting device group 02 are arranged along the first direction Y, and the second type of first signal line L12 and the corresponding cathode pad The electrical connection between 220 can be realized by connecting wires extending along the first direction Y. When the first type of first signal line L11 overlaps with the corresponding light emitting device group 02, then the first type of first signal line L11 overlaps with the corresponding cathode pad 220, on the one hand it reduces the area of the display panel 001 On the other hand, it also reduces the space for arranging the connecting wires extending along the second direction Y and connecting the first signal line L1 and the cathode pad 220 in the planar area of the display panel 001. space. Moreover, when the second type of first signal line L12 is disposed at a position away from the edge of the display panel 001 and the first type of first signal line L11 is disposed at a position close to the edge of the display panel 001, the first type of first signal line L11 can be reduced. The distance between the line L11 and the edge of the display panel 001 can effectively avoid the risk of black borders appearing on the display panel 001 during display.

FIG. 7 is a partially enlarged schematic diagram of a display panel provided by an embodiment of the present application.

In one embodiment of the present application, as shown in FIG. 7 , the width of the portion of the first type of first signal line L11 that overlaps the light emitting device 20 is larger than that of the first type of first signal line L11 that does not overlap with the light emitting device 20 . The width of at least part of the stack. Wherein, the first type of first signal line L11 generally extends along the second direction X, and the width of the first type of first signal line L11 refers to the width of the first type of first signal line L11 along the first direction Y.

In this embodiment, the width of the first type of first signal line L11 is designed in a differentiated manner, wherein, the portion of the first type of first signal line L11 that overlaps with the light emitting device 20 in a direction perpendicular to the surface where the display panel 001 is located If the width of the first signal line L11 of the first type is larger, when the material of the first signal line L11 of the first type is reflective metal, this part of the first signal line L11 of the first type can direct the light emitted by the light emitting device 20 toward the base substrate 01 to the display. The side of the light emitting surface of the panel 001 is reflected to improve the brightness of the light emitting from the display panel 001 . In addition, the width of at least part of the first type of first signal line L11 that does not overlap with the light-emitting device 20 in the direction perpendicular to the surface of the display panel 001 is small, which can reduce the interaction between the first type of first signal line L11 and other components. The overlapping area of the signal lines can avoid excessive influence of parasitic capacitance on signal transmission.

In one embodiment of the present application, as shown in FIG. 3 , FIG. 6 and FIG. 7 , the display panel 001 further includes a plurality of second signal lines L2, and the second signal lines L2 and the first signal lines L1 are arranged on the base substrate. 01, wherein a plurality of second signal lines L2 are arranged along the second direction X and may generally extend along the first direction Y. Then the orthographic projections of the first signal line L1 and the second signal line L2 respectively on the base substrate 01 intersect. Then, along the direction perpendicular to the surface where the display panel 001 is located, the first type of first signal line L11 and the second signal line L1 at least partially overlap, that is, the first type of first signal line L11 and the second signal line are respectively on the substrate. Orthographic projection cross on substrate 01.

Wherein, one of the first signal line L1 and the second signal line L2 is used for transmitting the first power supply voltage, and the other is used for transmitting the second power supply voltage. Specifically, the first power supply voltage may be a negative power supply voltage, and the second power supply voltage may be a positive power supply voltage. Then when the first signal line L1 is electrically connected to the cathode pad 220 , the first signal line L1 is used to transmit the first power supply voltage and the second signal line L2 is used to transmit the second power supply voltage.

FIG. 8 is a schematic cross-sectional view along the N1-N2 direction in FIG. 3 and FIG. 6 .

In a technical solution corresponding to this embodiment, referring to FIG. 3 , FIG. 6 and FIG. 8 , an insulating layer 04 is provided between the film layer where the first signal line L1 is located and the film layer where the second signal line L2 is located. The thickness of the layer 04 in the overlapping region of the first type of first signal line L11 and the second signal line L2 is greater than that of other at least partial regions. That is, in the area where the first-type first signal line L11 and the second signal line L2 overlap, the insulating layer 04 between the first-type first signal line L11 and the second signal line L2 is thickened.

As shown in FIG. 3 and FIG. 6, since the first type of first signal line L11 and the corresponding cathode pad 220 overlap along the direction perpendicular to the surface of the display panel 001, the first type of first signal line L11 and the second type of The overlapping position of the signal line L2 is closer to the cathode pad 220 . When the light-emitting device 20 is bonded, the stress of the bond will damage the insulating layer near the cathode pad 220 and the anode pad 210, then the first signal line L11 of the first type and the second signal line L2 at the overlapping position There is an increased risk of damage to the insulation. By thickening the thickness of the insulating layer 04 between the first signal line L11 and the second signal line L2 of the first type and at the position where the two overlap, the damage to the insulating layer 04 at this position can be alleviated. rate of influence.

In addition, when the first signal line L11 and the second signal line L2 are used to transmit the negative power supply voltage and the positive power supply voltage respectively, since the voltage difference between the negative power supply voltage and the positive power supply voltage is large, the first signal line The risk of breakdown increases when the insulating layer 04 located between the line L11 and the second signal line L2 is damaged. By increasing the thickness of this part of the insulating layer 04, the risk of its breakdown can be effectively reduced.

FIG. 9 is a partially enlarged schematic diagram of a display panel provided by an embodiment of the present application.

In a technical solution corresponding to this embodiment, as shown in FIG. 9 , the width of the part of the second signal line L2 that overlaps with the first type of first signal line L11 is smaller than that of the second signal line L2 that does not overlap with the first signal line L11. At least part of the width of the overlapping first signal line L11. Wherein, the second signal line L2 generally extends along the first direction Y, and the width of the second signal line L2 refers to the width of the second signal line L2 along the second direction X.

For example, as shown in FIG. 9, the width of the portion of the second signal line L2 overlapping with the first-type first signal line L11 is smaller than the width of the portion of the second signal line L2 overlapping with the second-type first signal line L12. width.

In this technical solution, the width of the second signal line L2 is designed in a differentiated manner, wherein, the portion of the second signal line L2 that overlaps with the first type of first signal line L11 in a direction perpendicular to the surface where the display panel 001 is located If the width is smaller, the overlapping area of the second signal line L2 and the first type of first signal line L11 along the direction perpendicular to the surface where the display panel 001 is located decreases. Then, the area of the insulating layer 04 located between the second signal line L2 and the first-type first signal line L11 and in the overlapping area of the two decreases, and correspondingly, the area of the insulating layer 04 between the second signal line L2 and the first-type first signal line L11 is reduced. The risk of breakdown of the insulating layer 04 between the signal lines L11 is also reduced.

In addition, the width of at least a part of the second signal line L2 that does not overlap with the first signal line L1 in the direction perpendicular to the surface of the display panel 001 is relatively large, which can alleviate the reduction in the width of the second signal line L2 caused by the partial area. And lead to the problem of excessive increase in impedance.

FIG. 10 is a partially enlarged schematic diagram of a display panel provided by an embodiment of the present application.

In a technical solution corresponding to this embodiment, as shown in FIG. 10 , the width of the part of the first-type first signal line L11 that overlaps the second signal line L2 is smaller than that of the first-type first signal line L11 that is not The width of at least a portion overlapping with the second signal line L2. Wherein, the first type of first signal line L11 generally extends along the second direction X, and the width of the first type of first signal line L11 refers to the width of the first type of first signal line L11 along the first direction Y.

In this technical solution, the width of the first signal line L11 of the first type is designed in a differentiated manner, wherein the first signal line L11 of the first type overlaps with the second signal line L2 in a direction perpendicular to the surface where the display panel 001 is located If the width of the portion is smaller, the overlapping area of the first type first signal line L11 and the second signal line L2 along the direction perpendicular to the surface where the display panel 001 is located is reduced. Then, the area of the insulating layer 04 located between the first type of first signal line L11 and the second signal line L2 and in the overlapping area of the two is reduced, and correspondingly, the area of the insulating layer 04 located between the first type of first signal line L11 and the second signal line L2 is reduced. The risk of breakdown of the insulating layer 04 between the signal lines L2 is also reduced.

In addition, the width of at least a part of the first type of first signal line L11 that does not overlap with the second signal line L2 in the direction perpendicular to the surface of the display panel 001 is relatively large, which can alleviate the problem caused by the first type of first signal line L11. There is a problem that the width of some regions is reduced to cause an excessive increase in impedance.

FIG. 11 is a partially enlarged schematic diagram of a display panel provided by an embodiment of the present application.

In addition, the overlapping area of the second signal line L2 and the first-type first signal line L11 along the direction perpendicular to the surface where the display panel 001 is located can also be reduced in other ways. For example, as shown in FIG. 11 , the width of the portion of the first-type first signal line L11 that overlaps the second signal line L2 is smaller than at least the portion of the first-type first signal line L11 that does not overlap the second signal line L2. The width of the portion of the second signal line L2 that overlaps with the first-type first signal line L11 is smaller than the width of at least a portion of the second signal line L2 that does not overlap with the first-type first signal line L11.

FIG. 12 is a schematic diagram of a display device provided by an embodiment of the present application.

As shown in FIG. 12 , an embodiment of the present application provides a display device, and the display device includes the display panel 001 provided in the above embodiment. The display device provided in the embodiment of the present application may be electronic equipment such as a mobile phone, a computer, a television, a smart wearable device (for example, a smart watch), and a vehicle-mounted display device, which is not specifically limited in the embodiment of the present application.

In the display device, by arranging the first type of first signal line L11 in the area where the light emitting device group 02 is located, the space for specially setting up the first signal line L1 is reduced in the planar area of the display device, and it is easy to implement the pixel circuit. 30 and the layout design of the signal lines electrically connected thereto.

FIG. 13 is a schematic diagram of another display device provided by an embodiment of the present application.

In an embodiment of the present application, as shown in FIG. 13 , a display device may be assembled by splicing a plurality of display panels 001 as provided in the above embodiments. Wherein, at least two display panels 001 are spliced and arranged along the first direction Y. Exemplarily, the spliced display device may be an LED splicing screen, a movie screen, or an electronic product for remote viewing, which is not specifically limited in this embodiment of the present application.

The above is only a preferred embodiment of the application, and is not intended to limit the application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the application should be included in the application. within the scope of protection.

Claims (12)

1. A display panel, comprising:

a substrate base;

a plurality of light emitting device groups disposed on one side of the substrate base plate; the light emitting device groups are arranged along a first direction, and the light emitting device groups comprise a plurality of light emitting devices arranged along a second direction;

a plurality of first signal lines provided on the same side of the substrate as the light emitting device group; a plurality of the first signal lines are arranged along the first direction; the first signal line is arranged corresponding to the light emitting device group, and is electrically connected with at least part of the light emitting devices in the light emitting device group which are arranged correspondingly;

wherein the plurality of first signal lines at least comprise first signal lines of a first type; the orthographic projection of the first signal lines of the first type on the substrate is overlapped with the orthographic projection of the light emitting device groups correspondingly arranged on the substrate at least partially.

2. The display panel of claim 1, wherein the plurality of first signal lines further comprises a second type of first signal line; the orthographic projection of the second type first signal line on the substrate is not overlapped with the orthographic projection of the light emitting device group which is correspondingly arranged on the substrate.

3. The display panel of claim 2, further comprising:

a plurality of pixel circuit groups disposed on the same side of the substrate as the light emitting device groups; a plurality of pixel circuit groups are arranged along the first direction, and each pixel circuit group comprises a plurality of pixel circuits arranged along the second direction; the pixel circuit group is arranged corresponding to the light emitting device group, and the pixel circuit in the pixel circuit group is electrically connected with the light emitting device in the light emitting device group which is arranged correspondingly;

the orthographic projection of the pixel circuit group on the substrate is not overlapped with orthographic projection of the light-emitting device group on the substrate;

the orthographic projection of the light emitting device group corresponding to the second type first signal line on the substrate is positioned between the orthographic projection of the corresponding second type first signal line on the substrate and the orthographic projection of the corresponding pixel circuit group on the substrate.

4. The display panel of claim 2, wherein the orthographic projection of the first type of signal lines on the substrate is located on a side of the orthographic projection of the second type of signal lines on the substrate near an edge of the substrate.

5. The display panel of claim 1, further comprising:

a plurality of second signal lines disposed on the same side of the substrate as the first signal lines; a plurality of the second signal lines are arranged along the second direction;

wherein the first signal lines and the second signal lines at least partially overlap in a direction perpendicular to a plane of the display panel.

6. The display panel according to claim 5, wherein an insulating layer is disposed between the film layer where the first signal line is located and the film layer where the second signal line is located, and the thickness of the insulating layer in the overlapping area of the first signal line and the second signal line is greater than the thickness of the insulating layer in other at least partial areas.

7. The display panel according to claim 5, wherein a width of a portion of the second signal line overlapping the first-type first signal line is smaller than a width of at least a portion of the second signal line not overlapping the first-type first signal line.

8. The display panel according to claim 5, wherein a width of a portion of the first-type first signal line overlapping the second signal line is smaller than a width of at least a portion of the first-type first signal line not overlapping the second signal line.

9. The display panel according to any one of claims 5, wherein the first signal line is for transmitting a first power supply voltage and the second signal line is for transmitting a second power supply voltage.

10. The display panel according to claim 1, wherein a width of a portion of the first-type first signal line overlapping the light emitting device is larger than a width of at least a portion of the first-type first signal line not overlapping the light emitting device.

11. The display panel of claim 1, wherein the light emitting device is any one of a micro light emitting diode or a sub-millimeter light emitting diode.

12. A display device comprising a display panel according to any one of claims 1-11.

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