CN116108799B - Track-based automatic layout wiring method, system and device - Google Patents
Track-based automatic layout wiring method, system and device Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
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- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
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- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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Abstract
The application relates to the technical field of semiconductor manufacturing processes, in particular to an automatic wiring method, an automatic wiring system and an automatic wiring device for a layout based on a track, which can solve the problem that wiring planning by a Lee maze algorithm or a sequential winding algorithm is low in actual operation to a certain extent. The automatic wiring method of the layout comprises the following steps: acquiring configuration information of the tested device and the bonding pad, and drawing the tested device and the bonding pad on a layout according to the configuration information of the tested device and the bonding pad; track objects are created, the track objects are preset on two sides of a tested device and a bonding pad drawn by a layout, and the track objects are preset positions for wiring paths; acquiring leading-out port information according to configuration information of a tested device, adding the leading-out port information to a track object, traversing the tested device and the leading-out port information in the track object, and establishing a connection network for describing the connection relation of the tested device; traversing the connection network, acquiring an actual wiring path, and drawing wiring paths in each track object according to the actual wiring path.
Description
Technical Field
The application relates to the technical field of semiconductor manufacturing processes, in particular to a layout automatic wiring method, system and device based on a track.
Background
In the semiconductor manufacturing process, the model test structure is a test unit for monitoring the process development quality. In the whole development process of the test layout, the wiring path between the model test structure and the probe contact is an important step in the development process, the result of logic synthesis is converted into a physical layout file through the layout and wiring technology, and the wiring path between the model test structure and the probe contact has influence on the overall efficiency and cost of process development.
In the process of planning and testing wiring paths of a layout, according to the number of the designed probe contacts, in a single test pattern (Tile) design layout, a pre-drawn contact (PAD) layout is placed according to the configured contact (PAD) intervals, and then a layout structure of a model test structure (Testkey) is placed. And generating a layout of a single test pattern (Tile) by using a track planning method and post-trimming. The test layout of the Fullchip contains thousands of test Tile patterns containing tens of thousands of model test structures (Testkeys) completed by the above wiring.
Methods of planning wiring paths between a model test structure (Testkey) and a probe contact (PAD) in the related art include two kinds, single-network wiring and multi-network wiring. The Lee maze algorithm is a single-network winding algorithm, firstly, a wiring plane is divided into uniform grids with consistent sizes, cost values of 4 grids which are horizontally adjacent to the vertical direction and are not occupied are set from an initial grid, the step is iterated, the cost values are increased according to ascending order, finally, a target grid is searched, and the target grid is traced back to the initial grid, so that the shortest path is obtained.
The sequential winding algorithm is a multi-network winding algorithm, firstly, the winding sequence of the network to be wound is set, the network to be wound is wound according to the sequence, and when one network completes winding, the congestion degree of the global winding resource is updated, which can lead to the network to be wound to be forced to use the congested winding resource.
For the mode of planning wiring paths disclosed above, the problem of low efficiency and large storage requirement exists in the Lee maze algorithm for network wiring, the defect that the network is wound after the network is affected by the winding is existed in the sequential winding algorithm, meanwhile, the two wiring modes are complex, the success rate of winding can be improved only by setting a good winding sequence in the sequential winding, and the efficiency is not high in the actual wiring process.
Disclosure of Invention
In order to solve the problem that wiring planning is low in practical operation through a Less maze algorithm or a sequential winding algorithm, the application provides an automatic wiring method, an automatic wiring system and an automatic wiring device for a layout based on a track.
Embodiments of the present application are implemented as follows:
in a first aspect, an embodiment of the present application provides a method for automatically wiring a layout based on a track, where the method for automatically wiring a layout includes:
acquiring configuration information of the tested device and the bonding pad, and drawing the tested device and the bonding pad on a layout according to the configuration information of the tested device and the bonding pad; the configuration information of the tested device comprises the information of the size, the position, the leading-out port and the like of the tested device; the configuration information of the bonding pad comprises the information of the size, the position, the leading-out port and the like of the bonding pad;
creating a track object, wherein the track object is preset on two sides of a tested device and a bonding pad drawn by a layout, and the track object is a wiring path preset azimuth; acquiring leading-out port information according to configuration information of a tested device, adding the leading-out port information to a track object, traversing the tested device and the leading-out port information in the track object, and establishing a connection network for describing the connection relation of the tested device;
traversing the connection network, acquiring an actual wiring path, and drawing wiring paths in each track object according to the actual wiring path.
In some embodiments, in the step of creating the track object, the layout automatic wiring method includes:
traversing configuration information of all the tested devices to obtain wiring width data and wiring spacing data of all the tested devices;
comparing the wiring width data of all the tested devices to obtain the maximum wiring width;
comparing the wiring interval data of all the tested devices to obtain the maximum wiring interval;
track objects are preset according to the maximum wiring widths and the maximum wiring pitches.
In some embodiments, in the step of traversing the connection network to obtain the actual wiring path, the automatic wiring method of the layout includes:
setting all connected networks as non-routed networks;
traversing the non-routing network, judging whether wiring paths overlap along the vertical direction of the track, and sequencing the wiring paths according to the positions of the head and tail points and the leading-out ports of the paths in the vertical direction;
sequencing wiring paths along the horizontal direction of the wiring paths to obtain a preset wiring path network;
traversing a preset wiring path network, and judging the crossing condition of wiring paths in the vertical direction and the horizontal direction;
when the wiring paths are crossed, the wiring paths in the vertical direction are designated as other layers, the actual wiring paths are acquired, and the acquired actual wiring paths are stored in the track object.
In some embodiments, in traversing the non-routed network, determining whether the wiring paths overlap along the vertical direction of the track, and sorting the wiring paths according to the positions of the head and tail points and the outgoing ports of the paths in the vertical direction, the automatic wiring method of the layout includes:
when the wiring paths are overlapped along the vertical direction of the track, acquiring the head and tail positions of the wiring paths and judging whether the head and tail positions are overlapped or not in the vertical direction;
when overlapping and containing relations exist, longer line segments in the wiring paths are arranged on the outer side, and shorter line segments in the wiring paths are arranged on the inner side;
when the overlapping and non-contained relation exists, the horizontal position of the leading-out port in the wiring path is judged, the horizontal wiring line segment with the left position is placed on the upper layer, and the horizontal wiring line segment with the right position is placed on the lower layer.
In some embodiments, in traversing the non-routed network, determining whether the wiring paths overlap along the vertical direction of the track, and sorting the wiring paths according to the positions of the head and tail points and the outgoing ports of the paths in the vertical direction, the automatic wiring method of the layout includes:
when the wiring paths are not overlapped along the vertical direction of the track, the wiring path line segments in the horizontal direction are vertically connected to the extraction ports of the corresponding tested devices, and the wiring paths from the wiring paths to the wiring paths in the horizontal direction of the extraction ports along the vertical direction of the track are stored.
In some embodiments, in the step of drawing wiring paths in the respective track objects from actual wiring paths, the layout automatic wiring method includes:
drawing a path in the vertical direction of the track object according to the obtained actual wiring path;
and drawing a path of the track object in the horizontal direction according to the acquired actual wiring path.
In a second aspect, an embodiment of the present application provides an automatic layout wiring system based on a track, the automatic layout wiring system including:
the layout drawing module is used for obtaining the configuration information of the tested device and the bonding pad and drawing the tested device and the bonding pad on the layout according to the configuration information of the tested device and the bonding pad; the configuration information of the tested device comprises the information of the size, the position, the leading-out port and the like of the tested device; the configuration information of the bonding pad comprises the information of the size, the position, the leading-out port and the like of the bonding pad;
the connection network presetting module is used for creating a track object, the track object is preset on two sides of a tested device and a bonding pad drawn by a layout, and the track object is a wiring path preset azimuth; acquiring leading-out port information according to configuration information of a tested device, adding the leading-out port information to a track object, traversing the tested device and the leading-out port information in the track object, and establishing a connection network for describing the connection relation of the tested device;
the wiring path output module is used for traversing the connection network, acquiring an actual wiring path and drawing wiring paths in each track object according to the actual wiring path.
In a third aspect, an embodiment of the present application provides an automatic layout wiring device based on a track, where the automatic layout wiring device includes: at least one processor; and a memory communicatively coupled to the at least one processor; the memory stores instructions executable by the one processor, and the instructions are executed by the at least one processor, so that the at least one processor executes the steps of the automatic layout wiring method in the technical scheme.
The method has the advantages that the configuration information of the tested device and the bonding pad is traversed by drawing the approximate direction of the track object in the layout based on the configuration information of the tested device and the bonding pad, wiring paths of the tested device and the bonding pad can be conveniently sequenced, the wiring paths are conveniently sequenced in sequence, the probability that different wiring paths overlap in the same interval is reduced, and meanwhile, the purpose of optimizing the area of the layout after wiring can be achieved; by traversing the obtained connection network, the intersection position of the wiring paths in the track object can be further judged, and the aim of improving the reliability of the wiring paths can be fulfilled.
Drawings
FIG. 1 is a flow chart of a track-based layout wiring method according to an embodiment of the present application;
fig. 2 is a schematic layout wiring diagram of an embodiment of the present application.
FIG. 3 is a schematic diagram of a track object preset position of a track-based layout wiring method according to another embodiment of the present application;
FIG. 4 is a schematic diagram of a Port of a track-based layout wiring method connecting tracks along a horizontal direction according to another embodiment of the present application;
FIG. 5 is a schematic diagram of connection of wiring paths of a track-based layout wiring method according to another embodiment of the present application without overlapping along a vertical direction of a track;
FIG. 6 is a schematic diagram of connection when wiring paths of a track-based layout wiring method according to another embodiment of the present application overlap along a vertical direction of a track;
FIG. 7 is a schematic diagram of a connection of wiring paths with intersections along a vertical direction and a horizontal direction in a track-based layout wiring method according to another embodiment of the present application;
FIG. 8 is a schematic diagram of wiring paths of a track-based layout wiring method according to another embodiment of the present application ordered according to the position of ports along a horizontal direction;
FIG. 9 is a schematic diagram of connection of wiring paths of a track-based layout wiring method along a horizontal wiring hierarchy of a track according to another embodiment of the present application;
fig. 10 is a schematic connection diagram of a connection path of a track-based layout wiring method according to another embodiment of the present application along a vertical direction and a horizontal direction in combination with a hierarchical structure.
Detailed Description
In order to facilitate the technical solution of the application, some concepts related to the present application will be described below first. The brief description of the terminology in the present application is for the purpose of facilitating understanding of the embodiments described below only and is not intended to limit the embodiments of the present application. Unless otherwise indicated, these terms should be construed in their ordinary and customary meaning.
The terms "first," second, "" third and the like in the description and in the claims and in the above-described figures are used for distinguishing between similar or similar objects or entities and not necessarily for limiting a particular order or sequence, unless otherwise indicated. It is to be understood that the terms so used are interchangeable under appropriate circumstances.
The terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a product or apparatus that comprises a list of elements is not necessarily limited to all elements explicitly listed, but may include other elements not expressly listed or inherent to such product or apparatus.
Referring to fig. 1 and 2, fig. 1 is a flowchart of a track-based layout wiring method according to an embodiment of the present application; fig. 2 is a schematic layout wiring diagram of an embodiment of the present application.
The application provides a layout automatic wiring method based on a track, which comprises the following steps:
acquiring configuration information of a device under test (namely Device Under Test, DUT for short) and a bonding PAD (PAD), and drawing the Device Under Test (DUT) and the bonding PAD (PAD) on a layout according to the configuration information of the Device Under Test (DUT) and the bonding PAD (PAD); the configuration information of the tested device comprises the information of the size, the position, the leading-out port and the like of the tested device; the configuration information of the bonding pad comprises the information of the size, the position, the leading-out port and the like of the bonding pad;
track objects are created, the track objects are preset on two sides of a tested device and a bonding pad drawn by a layout, and the track objects are preset positions for wiring paths; acquiring leading-out port information according to configuration information of a tested device, adding the leading-out port information to a track object, traversing the tested device and the leading-out port information in the track object, and establishing a connection network for describing the connection relation of the tested device;
traversing the connection network, acquiring an actual wiring path, and drawing wiring paths in each track object according to the actual wiring path.
In the process of acquiring the configuration information of the DUT and the PAD, the configuration of the DUT and the PAD is read from a configuration file and stored, and the configuration file adopts json and yaml formats commonly used in programming.
And drawing the corresponding DUT and PAD on the layout according to the obtained configuration information, extracting the DUT and PAD configuration information and the DUT and PAD drawing information drawn on the layout, and storing the extracted DUT and PAD drawing information into a database, so that the DUT and PAD configuration information can be conveniently read in the subsequent process of creating a track object and establishing a connection network.
Referring to fig. 3 and fig. 4, fig. 3 is a schematic diagram of a preset position of a track object in a track-based layout wiring method according to another embodiment of the present application; fig. 4 is a schematic diagram of a Port of a track-based layout wiring method according to another embodiment of the present application connecting a track in a horizontal direction.
In the process of acquiring the information of the leading-out Port according to the configuration information of the tested device and adding the information to the track object, the method is specifically implemented in such a way that corresponding wiring contacts of the DUT are drawn on the layout according to the configuration information of the DUT, the wiring contacts are a starting point and an ending point of layout wiring, and the wiring contacts are ports; and storing all Port information of the DUTs to a database, wherein the Port information comprises the position and connection information of the ports.
The part of the code of the process of adding Port is as follows:
the codes in the process of traversing the tested device and the leading-out port information in the track object and establishing a connection network for describing the connection relation of the tested device are as follows:
net describes the connection relationship, name (name of currently connected network), ports (a list of two Port objects are stored), which can be understood as connecting 'PAD <3>' to 'g_l <4>', side indicates which azimuth of a Port is on the DUT, 1, 2 indicates vertical direction, 3, 4 indicates horizontal direction, attribute x indicates y-axis coordinates of a Port, hTrack is horizontal track, and is not currently specified.
By drawing the approximate direction of the track object in the layout based on the configuration information of the tested device and the bonding pad, the configuration information of the tested device and the bonding pad can be traversed, wiring paths of the tested device and the bonding pad can be conveniently sequenced, the wiring paths can be conveniently sequenced in sequence in a preset mode, the probability of overlapping different wiring paths in the same section is reduced, and meanwhile the purpose of optimizing the area of the layout after wiring can be achieved; by traversing the obtained connection network, the intersection position of the wiring paths in the track object can be further judged, and the aim of improving the reliability of the wiring paths can be fulfilled.
In some embodiments, in order to further increase the drawing speed of the connection line of the track object, in the step of creating the track object, the layout automatic wiring method provided by the present application further includes:
traversing configuration information of all the tested devices to obtain wiring width data and wiring spacing data of all the tested devices;
comparing the wiring width data of all the tested devices to obtain the maximum wiring width;
comparing the wiring interval data of all the tested devices to obtain the maximum wiring interval;
track objects are preset according to the maximum wiring widths and the maximum wiring pitches.
The following are example codes:
wherein for represents traversing using for loop, width refers to preset wire width, space refers to preset wire spacing.
The wiring width data and the wiring spacing required by different connection lines on the same layout are different in the process of entity production; in the method, the maximum wiring width and the maximum wiring distance are obtained through screening, and then all connection routes in the layout object are drawn by using the maximum wiring width and the maximum wiring distance, so that the complicated flow caused by reading configuration information for many times before drawing each connection route can be simplified and obtained, the probability of increasing the area of the layout by using the maximum wiring width and the maximum wiring distance can be reduced, and the purpose of improving the speed of drawing the connection routes in the track object can be realized.
Referring to fig. 5, 6 and 7, fig. 5 is a schematic connection diagram of a wiring path of a track-based layout wiring method according to another embodiment of the present application, in which the wiring path is not overlapped along a vertical direction of a track; FIG. 6 is a schematic diagram of connection when wiring paths of a track-based layout wiring method according to another embodiment of the present application overlap along a vertical direction of a track; FIG. 7 is a schematic diagram of a connection of wiring paths with intersections along a vertical direction and a horizontal direction in a track-based layout wiring method according to another embodiment of the present application.
In some embodiments, in the step of traversing the connection network to obtain the actual wiring path, the automatic wiring method of the layout includes:
setting all connected networks as non-routed networks;
traversing the non-routing network, judging whether wiring paths overlap along the vertical direction of the track, and sequencing the wiring paths according to the positions of the head and tail points and the leading-out ports of the paths in the vertical direction;
sequencing wiring paths along the horizontal direction of the wiring paths to obtain a preset wiring path network;
traversing a preset wiring path network, and judging the crossing condition of wiring paths in the vertical direction and the horizontal direction;
when the wiring paths are crossed, the wiring paths in the vertical direction are designated as other layers, the actual wiring paths are acquired, and the acquired actual wiring paths are stored in the track object.
Referring to fig. 8, 9 and 10, fig. 8 is a schematic diagram illustrating a wiring path of a track-based layout wiring method according to another embodiment of the present application, which is ordered according to positions of ports along a horizontal direction; FIG. 9 is a schematic diagram of connection of wiring paths of a track-based layout wiring method along a horizontal wiring hierarchy of a track according to another embodiment of the present application; fig. 10 is a schematic connection diagram of a connection path of a track-based layout wiring method according to another embodiment of the present application along a vertical direction and a horizontal direction in combination with a hierarchical structure.
As shown in FIG. 8, the horizontal wiring path context is determined according to the position of the Port - 1 compared to Port - 2 is far to the left, then Port - 1 above.
Track in fig. 10 indicates a track.
In some embodiments, in traversing an rerouted network, determining whether wiring paths overlap along a vertical direction of a track, and sorting the wiring paths according to positions of head and tail points and outgoing ports of the paths along the vertical direction, the automatic wiring method for a layout provided by the application includes:
when the wiring paths are overlapped along the vertical direction of the track, acquiring the head and tail positions of the wiring paths and judging whether the head and tail positions are overlapped or not in the vertical direction;
when overlapping and containing relations exist, longer line segments in the wiring paths are arranged on the outer side, and shorter line segments in the wiring paths are arranged on the inner side;
when the overlapping and non-contained relation exists, the horizontal position of the leading-out port in the wiring path is judged, the horizontal wiring line segment with the left position is placed on the upper layer, and the horizontal wiring line segment with the right position is placed on the lower layer.
Since the wiring paths all follow the vertical constraint, the vertical constraint is that two adjacent line segments of the wiring paths are fixed in a vertical relationship.
If the two network paths overlap in the vertical direction, the head and tail positions in the vertical direction are judged, if the head and tail containing condition occurs, the long side is placed outside, and the short side is placed inside. If the network is overlapped and not included, judging the position of the Port in the network, if the Port of the network is relatively far left, placing the network horizontal wiring path on the upper layer, otherwise, placing the network horizontal wiring path on the lower layer. Therefore, the probability of crossing of wiring paths is reduced, and reasonable distribution of wiring paths in a layout is facilitated.
In some embodiments, in traversing an rerouted network, determining whether wiring paths overlap along a vertical direction of a track, and sorting the wiring paths according to positions of head and tail points and outgoing ports of the paths along the vertical direction, the automatic wiring method for a layout provided by the application includes:
when the wiring paths are not overlapped along the vertical direction of the track, the wiring path line segments in the horizontal direction are vertically connected to the extraction ports of the corresponding tested devices, and the wiring paths from the wiring paths to the horizontal direction of the extraction ports along the vertical direction of the track are stored.
When the vertical tracks are not overlapped, the path on the tracks is only required to be vertically connected to the Port of the device, and the hTrack attribute in the Net is set to be 1, so that the path setting in the horizontal direction can be completed; when the vertical tracks are overlapped, determining the up-down sequence of the connecting route in the section in the horizontal direction according to the head-tail point of the vertical direction path and the position of the leading-out port, determining the attribute value of 'hTrack' in the Net, if the current network horizontal path is at the top, setting 'hTrack' as 1, and setting 'hTrack' as 2.
The crossing condition of the wiring paths in the horizontal direction and the vertical direction is determined by calculating the obstacle first. According to the wiring paths determined by the positions of the head and tail points of the vertical direction paths and the leading-out ports, the situation that the vertical direction paths are not vertical is caused, the horizontal direction paths are connected again, the crossing situation is caused, and finally, the vertical line segments of the wiring paths under the crossing situation are designated as other layers, so that the purpose of avoiding the crossing conflict of the wiring paths in the same layer can be achieved.
In some embodiments, in the step of drawing wiring paths in the respective track objects from actual wiring paths, the layout automatic wiring method includes:
drawing a path in the vertical direction of the track object according to the obtained actual wiring path;
and drawing a path of the track object in the horizontal direction according to the acquired actual wiring path.
And drawing the wiring path of the track object according to the obtained actual wiring path, so that the time required to be consumed in the process of intersecting and drawing the vertical path and the horizontal path is reduced, and the probability of error occurrence of a drawing layer in the process of drawing the wiring path is reduced.
The method has the advantages that the wiring paths of the tested device and the bonding pad can be conveniently sequenced by traversing the configuration information of the tested device and the bonding pad based on the configuration information of the tested device and the bonding pad, and the wiring paths are conveniently sequenced in sequence, so that the probability of overlapping different wiring paths in the same interval is reduced, and the purpose of optimizing the area of the layout after wiring can be realized; by traversing the obtained connection network, the intersection position of the wiring paths in the track object can be further judged, and the aim of improving the reliability of the wiring paths can be fulfilled.
Corresponding to the embodiment of the automatic layout wiring method, the application also provides an automatic layout wiring system based on the track, and the automatic layout wiring system provided by the application comprises:
the layout drawing module is used for obtaining the configuration information of the tested device and the bonding pad and drawing the tested device and the bonding pad on the layout according to the configuration information of the tested device and the bonding pad; the configuration information of the tested device comprises the information of the size, the position, the leading-out port and the like of the tested device; the configuration information of the bonding pad comprises the information of the size, the position, the leading-out port and the like of the bonding pad;
the connection network presetting module is used for creating a track object, the track object is preset on two sides of a tested device and a bonding pad drawn by a layout, and the track object is a wiring path preset azimuth; acquiring leading-out port information according to configuration information of a tested device, adding the leading-out port information to a track object, traversing the tested device and the leading-out port information in the track object, and establishing a connection network for describing the connection relation of the tested device;
the wiring path output module is used for traversing the connection network, acquiring an actual wiring path and drawing wiring paths in each track object according to the actual wiring path.
Corresponding to the embodiment of the automatic layout wiring method, the application also provides an automatic layout wiring device based on the track, and the automatic layout wiring device provided by the application comprises:
at least one processor; and a memory communicatively coupled to the at least one processor; the memory stores instructions executable by the one processor, and the instructions are executed by the at least one processor, so that the at least one processor performs the steps of the automatic layout wiring method in the foregoing technical solution.
Claims (7)
1. The automatic layout wiring method based on the track is characterized by comprising the following steps of:
acquiring configuration information of the tested device and the bonding pad, and drawing the tested device and the bonding pad on a layout according to the configuration information of the tested device and the bonding pad; the configuration information of the tested device comprises the size, the position and an extraction port of the tested device; the configuration information of the bonding pad comprises the size, the position and an outgoing port of the bonding pad;
creating a track object, wherein the track object is preset on two sides of a tested device and a bonding pad drawn by a layout, and the track object is a wiring path preset azimuth; acquiring leading-out port information according to configuration information of a tested device, adding the leading-out port information to a track object, traversing the tested device and the leading-out port information in the track object, and establishing a connection network for describing the connection relation of the tested device;
traversing the connection network to obtain an actual wiring path, including:
setting all connected networks as non-routed networks;
traversing the non-routing network, judging whether wiring paths overlap along the vertical direction of the track, and sequencing the wiring paths according to the positions of the head and tail points and the leading-out ports of the paths in the vertical direction;
sequencing wiring paths along the horizontal direction of the wiring paths to obtain a preset wiring path network;
traversing a preset wiring path network, and judging the crossing condition of wiring paths in the vertical direction and the horizontal direction;
when the wiring paths are crossed, designating the wiring paths in the vertical direction as other layers, acquiring actual wiring paths, and storing the acquired actual wiring paths to the track object;
and drawing wiring paths in the track objects according to the actual wiring paths.
2. The automatic layout wiring method according to claim 1, wherein in the step of creating a track object, the automatic layout wiring method comprises:
traversing configuration information of all the tested devices to obtain wiring width data and wiring spacing data of all the tested devices;
comparing the wiring width data of all the tested devices to obtain the maximum wiring width;
comparing the wiring interval data of all the tested devices to obtain the maximum wiring interval;
track objects are preset according to the maximum wiring widths and the maximum wiring pitches.
3. The automatic wiring method for a track-based layout according to claim 1, wherein in traversing an rerouted network, determining whether wiring paths overlap in a vertical direction of the track, and sorting the wiring paths according to positions of head and tail points and outgoing ports of the paths in the vertical direction, the automatic wiring method for a layout comprises:
when the wiring paths are overlapped along the vertical direction of the track, acquiring the head and tail positions of the wiring paths and judging whether the head and tail positions are overlapped or not in the vertical direction;
when overlapping and containing relations exist, longer line segments in the wiring paths are arranged on the outer side, and shorter line segments in the wiring paths are arranged on the inner side;
when the overlapping and non-contained relation exists, the horizontal position of the leading-out port in the wiring path is judged, the horizontal wiring line segment with the left position is placed on the upper layer, and the horizontal wiring line segment with the right position is placed on the lower layer.
4. The automatic wiring method for a track-based layout according to claim 1, wherein in traversing an rerouted network, determining whether wiring paths overlap in a vertical direction of the track, and sorting the wiring paths according to positions of head and tail points and outgoing ports of the paths in the vertical direction, the automatic wiring method for a layout comprises:
when the wiring paths are not overlapped along the vertical direction of the track, the wiring path line segments in the horizontal direction are vertically connected to the extraction ports of the corresponding tested devices, and the wiring paths from the wiring paths to the horizontal direction of the extraction ports along the vertical direction of the track are stored.
5. The automatic wiring method for track-based layout according to claim 1, wherein in the step of drawing wiring paths in respective track objects from actual wiring paths, the automatic wiring method for layout comprises:
drawing a path in the vertical direction of the track object according to the obtained actual wiring path;
and drawing a path of the track object in the horizontal direction according to the acquired actual wiring path.
6. A track-based automatic layout wiring system, the automatic layout wiring system comprising:
the layout drawing module is used for obtaining the configuration information of the tested device and the bonding pad and drawing the tested device and the bonding pad on the layout according to the configuration information of the tested device and the bonding pad; the configuration information of the tested device comprises the size, the position and an extraction port of the tested device; the configuration information of the bonding pad comprises the size, the position and an outgoing port of the bonding pad;
the connection network presetting module is used for creating a track object, the track object is preset on two sides of a tested device and a bonding pad drawn by a layout, and the track object is a wiring path preset azimuth; acquiring leading-out port information according to configuration information of a tested device, adding the leading-out port information to a track object, traversing the tested device and the leading-out port information in the track object, and establishing a connection network for describing the connection relation of the tested device;
the wiring path output module is used for traversing the connection network to obtain an actual wiring path, and comprises the following steps:
setting all connected networks as non-routed networks;
traversing the non-routing network, judging whether wiring paths overlap along the vertical direction of the track, and sequencing the wiring paths according to the positions of the head and tail points and the leading-out ports of the paths in the vertical direction;
sequencing wiring paths along the horizontal direction of the wiring paths to obtain a preset wiring path network;
traversing a preset wiring path network, and judging the crossing condition of wiring paths in the vertical direction and the horizontal direction;
when the wiring paths are crossed, designating the wiring paths in the vertical direction as other layers, acquiring actual wiring paths, and storing the acquired actual wiring paths to the track object;
and drawing wiring paths in the track objects according to the actual wiring paths.
7. An automatic layout wiring device based on a track, which is characterized by comprising: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the one processor to cause the at least one processor to perform the steps of the layout automatic wiring method of any of claims 1 to 5.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108763662A (en) * | 2018-05-10 | 2018-11-06 | 北京华大九天软件有限公司 | It is a kind of abnormity domain in the multiple-layer overlapped wiring method based on track |
| CN111368493A (en) * | 2018-12-26 | 2020-07-03 | 杭州广立微电子有限公司 | Automatic layout wiring generation method based on sparse grid |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108763662A (en) * | 2018-05-10 | 2018-11-06 | 北京华大九天软件有限公司 | It is a kind of abnormity domain in the multiple-layer overlapped wiring method based on track |
| CN111368493A (en) * | 2018-12-26 | 2020-07-03 | 杭州广立微电子有限公司 | Automatic layout wiring generation method based on sparse grid |
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