CN116053303A - A method of manufacturing a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion - Google Patents

Abstract

The invention provides a method for manufacturing a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion, comprising: taking a silicon carbide substrate, and oxidizing and growing a silicon dioxide buried layer on the silicon carbide substrate; A barrier layer is formed on the layer, and the barrier layer is etched to form a via hole, and the drift layer is formed by via deposition; the barrier layer is formed again, and the barrier layer is etched to form a via hole, and the body region is deposited through the via hole; the barrier layer is re-formed , and etch the barrier layer to form two through holes, perform ion implantation on the drift layer and the body region through the through holes to form the drain region and the source region; deposit metal on the source region and the drain region to form the source metal layer and the drain metal layer; re-form the barrier layer, etch the barrier layer to form a through hole, and form a gate insulating layer through the oxidation growth of the through hole; form a gate metal by depositing metal on the gate insulating layer; remove all barrier layers, so that The heat generated during work is dissipated through the metal layer, prolonging the service life of the device.

Description

A method of manufacturing a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion

technical field

The invention relates to a method for manufacturing a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion.

Background technique

SiC device Silicon carbide (SiC) material has been widely concerned and researched due to its superior physical properties. Its vertical devices have gradually matured and are widely used in automotive electronics, charging piles, photovoltaic, wind power and other power generation devices, high-speed rail, etc., but they are all single-tube or packaged modules, and there is no application of integrated circuits; and due to the excellent SiC Thermal conductivity, the heat will diffuse to the bottom of the device, and there is no heat dissipation channel at the bottom, heat concentration occurs on the substrate, and the heat is difficult to dissipate, and the device will be damaged if too much heat is accumulated at the bottom.

Contents of the invention

The technical problem to be solved by the present invention is to provide a method for manufacturing a lateral power silicon carbide MOSFET that suppresses the vertical diffusion of heat, so that the heat generated when the device is in operation can be dissipated directly through the source metal layer and the drain metal layer without Accumulated at the bottom of the device, thereby prolonging the service life of the device.

The present invention is achieved in this way: a method for manufacturing a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion, specifically includes the following steps:

Step 1. Take a silicon carbide substrate, and oxidize and grow a silicon dioxide buried layer on the silicon carbide substrate;

Step 2, forming a barrier layer on the silicon dioxide buried layer, etching the barrier layer to form a through hole, and forming a drift layer through through hole deposition;

Step 3, re-forming the barrier layer, etching the barrier layer to form a through hole, and depositing the body region through the through hole;

Step 4, forming a barrier layer again, and etching the barrier layer to form two through holes, and performing ion implantation on the drift layer and the body region through the through holes to form a drain region and a source region;

Step 5, depositing metal in the source region and the drain region to form a source metal layer and a drain metal layer;

Step 6, re-forming the barrier layer, etching the barrier layer to form a through hole, and oxidizing and growing the through hole to form a gate insulating layer;

Step 7, forming a gate metal by depositing metal on the gate insulating layer;

Step 8. Remove all barrier layers.

Further, the oxidation growth process in the step 1 adopts dry oxygen oxidation, wet oxygen oxidation and dry oxygen oxidation processes.

Further, the drift layer, the drain region and the source region are all N-type, and the body region is P-type.

Further, the silicon dioxide buried layer has a thickness of 200-500 nm.

The advantage of the present invention is that: the present invention is a method for manufacturing a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion, and the obtained device is a lateral device, which can be used as a traditional monolithic power device or integrated circuit process integration, Manufactured together with integrated circuits, it has the characteristics of integration; at the same time, it can well suppress the diffusion of heat on the surface of the device to the substrate, and can effectively utilize the high thermal conductivity of SiC, allowing the heat generated by the device to directly The source metal layer and the drain metal layer dissipate without gathering at the bottom of the device, thereby prolonging the service life of the device.

Description of drawings

The present invention will be further described below in conjunction with the embodiments with reference to the accompanying drawings.

1 to 8 are schematic flow charts of a method for manufacturing a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion in the present invention.

FIG. 9 is a schematic structural diagram of a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion according to the present invention.

Detailed ways

As shown in Figures 1 to 8, a method for manufacturing a lateral power silicon carbide MOSFET that suppresses thermal longitudinal diffusion in the present invention specifically includes the following steps:

Step 1, take a silicon carbide substrate 1, and oxidize and grow a silicon dioxide buried layer 2 on the silicon carbide substrate 1;

Step 2, forming a barrier layer a on the silicon dioxide buried layer 2, etching the barrier layer a to form a through hole, and forming a drift layer 3 through through hole deposition;

Step 3, re-forming the barrier layer a, and etching the barrier layer a to form a through hole, and depositing the body region 4 through the through hole;

Step 4, re-forming the barrier layer a, and etching the barrier layer a to form two through holes, and performing ion implantation on the drift layer 3 and the body region 4 through the through holes to form the drain region 31 and the source region 41;

Step 5, depositing metal on the source region 41 and the drain region 31 to form the source metal layer 7 and the drain metal layer 6;

Step 6, re-forming the barrier layer a, and etching the barrier layer a to form a through hole, and oxidizing and growing through the through hole to form the gate insulating layer 5;

Step 7, forming a gate metal 8 by depositing metal on the gate insulating layer 5;

Step 8, removing all barrier layers a.

The oxidation growth process in the step 1 adopts dry oxygen oxidation, wet oxygen oxidation and dry oxygen oxidation process, that is, the dry oxygen oxidation process, wet oxygen oxidation process and dry oxygen oxidation process are used for oxidation growth.

The drift layer 3 , the drain region 31 and the source region 41 are all N-type, the body region 4 is P-type, and the thickness of the silicon dioxide buried layer 2 is 200-500 nm.

The gate structure of the silicon carbide MOSFET is a laterally diffused power MOSFET, and the conductive channel is lateral; after power-on, the heat is distributed on the upper part of the device and does not diffuse toward the substrate, allowing the heat generated by the device to pass directly through the source metal. Layer 7 and drain metal layer 6 are scattered without gathering at the bottom of the device and damaging the device; the silicon carbide MOSFET has no vertical process and can be realized in the power integrated circuit process, and has the characteristics of being integrated, that is, it can be integrated with the integrated circuit Made together.

As shown in Figure 9, the silicon carbide MOSFET obtained by the above manufacturing method includes:

SiC substrate 1,

The silicon dioxide buried layer 2, the lower side of the silicon dioxide buried layer 2 is connected to the upper side of the silicon carbide substrate 1; the silicon dioxide buried layer 2 is adopted, and the thermal conductivity of silicon dioxide is three times that of silicon carbide. It is about one percent, so it can effectively suppress the heat from the surface of the device from diffusing to the substrate, and its silicon dioxide buried layer 2 will not affect the withstand voltage characteristics of the device. Silicon dioxide has good withstand voltage characteristics and will not produce withstand voltage The silicon dioxide buried layer 2 will not affect the current characteristics of the device, because the silicon dioxide insulation performance is good, the current in the conductive channel on the surface of the device will not go to the inside of the device, and has no effect on the current characteristics of the device; the silicon dioxide buried layer 2. Isolate the upper structure of the device from the silicon carbide substrate 1, and there is no body parasitic, so the leakage is reduced and the performance is improved;

A drift layer 3, the lower side of the drift layer 3 is connected to the upper side of the buried silicon dioxide layer 2, and the drift layer 3 is provided with a drain region 31;

Body region 4, the lower side of the body region 4 is connected to the upper side of the buried silicon dioxide layer 2, and the left side of the body region 4 is connected to the right side of the drift layer 3, the body A source area 41 is provided on area 4;

a gate insulating layer 5, the lower side of the gate insulating layer 5 is respectively connected to the upper side of the drift layer 3 and the upper side of the body region 4;

a drain metal layer 6, the drain metal layer 6 is connected to the upper side of the drain region 31;

a source metal layer 7, the source metal layer 7 is connected to the upper side of the source region 41;

And, a gate metal layer 8 , the gate metal layer 8 is connected to the gate insulating layer 5 .

The drift layer 3 , the drain region 31 and the source region 41 are all N-type, the body region 4 is P-type, and the silicon dioxide buried layer 2 has a thickness of 200-500 nm.

Although the specific embodiments of the present invention have been described above, those skilled in the art should understand that the specific embodiments we have described are only illustrative, rather than used to limit the scope of the present invention. Equivalent modifications and changes made by skilled personnel in accordance with the spirit of the present invention shall fall within the protection scope of the claims of the present invention.

Claims (4)

1. A method of fabricating a lateral power silicon carbide MOSFET that inhibits thermal longitudinal diffusion, comprising the steps of:

step 1, taking a silicon carbide substrate, and oxidizing and growing a layer of silicon dioxide buried layer on the silicon carbide substrate;

step 2, forming a barrier layer on the silicon dioxide buried layer, etching the barrier layer to form a through hole, and depositing the through hole to form a drift layer;

step 3, re-forming a barrier layer, etching the barrier layer to form a through hole, and depositing a body region through the through hole;

step 4, re-forming a barrier layer, etching the barrier layer to form two through holes, and performing ion implantation on the drift layer and the body region through the through holes to form a drain region and a source region;

step 5, depositing metal in the source region and the drain region to form a source metal layer and a drain metal layer;

step 6, re-forming a barrier layer, etching the barrier layer to form a through hole, and forming a gate insulating layer through oxidation growth of the through hole;

step 7, forming gate metal by depositing metal on the gate insulating layer;

and 8, removing all the barrier layers.

2. The method of manufacturing a lateral power silicon carbide MOSFET with suppressed thermal longitudinal diffusion according to claim 1, wherein the oxidation growth process in step 1 employs dry oxygen oxidation, wet oxygen oxidation and dry oxygen oxidation processes.

3. The method of fabricating a lateral power silicon carbide MOSFET having thermal longitudinal diffusion suppressed according to claim 1 wherein said drift layer, drain region and source region are all N-type and said body region is P-type.

4. The method of fabricating a lateral power silicon carbide MOSFET for inhibiting thermal longitudinal diffusion of claim 1 wherein said buried silicon dioxide layer has a thickness of 200-500nm.

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