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CN116029350A - Two-dimensional photonic coherent convolution acceleration chip and its application system based on time interleaving - Google Patents

Two-dimensional photonic coherent convolution acceleration chip and its application system based on time interleaving Download PDF

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CN116029350A
CN116029350A CN202310321188.9A CN202310321188A CN116029350A CN 116029350 A CN116029350 A CN 116029350A CN 202310321188 A CN202310321188 A CN 202310321188A CN 116029350 A CN116029350 A CN 116029350A
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CN116029350B (en
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郭清水
尹坤
陈宏晨
刘硕
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Zhejiang Lab
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Abstract

The invention discloses a two-dimensional photon coherent convolution acceleration chip based on time interleaving and an application system thereof, belonging to the technical field of photoelectric integration and being applicable to all artificial intelligent neural networks comprising convolution operation. The invention integrates the intensity modulator, M delay weight phase shift units, M-1 second-stage delay waveguides, a second-stage beam combiner and a photoelectric detector which finish convolution acceleration operation through a photon integration technology. The convolution kernel matrix coefficient weighting, the primary time interleaving and the coherent summation of the signals to be convolved are realized by using a delay weighting phase shifting unit comprising an adjustable coupler, a delay waveguide, a phase shifter and a primary beam combiner, the secondary time interleaving of the weighted modulated optical signals is realized by using a secondary delay waveguide, and the weighted summation operation is realized by using a secondary beam combiner and a photoelectric detector. The invention takes light as an information carrier, and can greatly improve the speed and the energy efficiency ratio of convolution operation.

Description

基于时间交织的二维光子相干卷积加速芯片及其应用系统Two-dimensional photonic coherent convolution acceleration chip and its application system based on time interleaving

技术领域technical field

本发明涉及一种面向深度学习的光子神经网络卷积加速芯片,具体为基于时间交织的二维光子相干卷积加速芯片及其应用系统,属于光子集成技术领域。The invention relates to a deep learning-oriented photonic neural network convolution acceleration chip, specifically a two-dimensional photon coherent convolution acceleration chip based on time interleaving and an application system thereof, belonging to the field of photon integration technology.

背景技术Background technique

人工智能如今广泛应用于机器视觉、自然语言处理及自动驾驶等领域,其中作为人工智能技术重要模型之一的人工神经网络因具有优秀泛化能力及稳定性而被广泛使用。人工神经网络本质上通过模仿生物神经系统结构,建立类似的神经元网络互联模式。基于电子技术的成熟发展,如今主流神经网络模型训练与测试主要以电子集成芯片为载体,例如,CPU、GPU、FPGA以及专用集成电路等。由于目前电子芯片采用将程序空间与数据空间分离的经典计算机结构,致使存储单元与计算单元之间数据载荷不稳定且功耗较高,限制网络模型训练的效率。虽然可以通过提高电子芯片集成度或通过存内计算来提高运算效率,但受限于电子芯片的微观量子特性及宏观高频响应特性,这些技术方向也面临巨大挑战(参见[陈宏伟, 于振明, 张天, 等. 光子神经网络发展与挑战. 中国激光, 2020, 47(5): 0500004.])。以光子作为信息载体的光子技术具有大带宽、低损耗以及可并行等特点,广泛应用于雷达、通信以及成像等领域(参见[J. Capmany, D. Novak, "Microwavephotonics combines two worlds," Nature photonics, vol. 1, no. 6, pp. 319-330,2007.]),将光子技术与传统神经网络相结合,有望充分发挥两种技术的优势,突破传统电子神经网络高功耗、长延时、速度有限的技术发展瓶颈(参见[Shen Y, Harris N C,Skirlo S, et al. "Deep learning with coherent nanophotonic circuits,"NaturePhotonics, vol. 11, no. 7, pp. 441-446, 2017.])。首先,光子神经网络采用模拟计算架构,存算同时进行,在提高计算速度的同时能够降低计算时延;其次,基于光传输介质的本质特性,光链路具有低损耗特性,间接可降低系统功耗;最后,光子器件相对电子器件,有效工作带宽增加了几个数量级,更适应神经网络的高速实时运算。目前,有多种基于波分复用技术的光子卷积运算方法发布,但波分复用技术的实现基础是多波长光源,而多波长光源的实现方法往往比较复杂且成本较高。Artificial intelligence is now widely used in fields such as machine vision, natural language processing, and autonomous driving. Among them, artificial neural networks, one of the important models of artificial intelligence technology, are widely used because of their excellent generalization ability and stability. The artificial neural network essentially establishes a similar neuron network interconnection mode by imitating the structure of the biological nervous system. Based on the mature development of electronic technology, the training and testing of mainstream neural network models are mainly based on electronic integrated chips, such as CPU, GPU, FPGA and application-specific integrated circuits. Since the current electronic chip adopts a classic computer structure that separates the program space from the data space, the data load between the storage unit and the computing unit is unstable and the power consumption is high, which limits the efficiency of network model training. Although the computing efficiency can be improved by improving the integration of electronic chips or through in-memory calculations, but limited by the microscopic quantum characteristics and macroscopic high-frequency response characteristics of electronic chips, these technical directions are also facing great challenges (see [Chen Hongwei, Yu Zhenming, Zhang Tian, et al. Development and Challenges of Photonic Neural Networks. China Laser, 2020, 47(5): 0500004.]). Photon technology, which uses photons as information carriers, has the characteristics of large bandwidth, low loss, and parallelism, and is widely used in radar, communication, and imaging fields (see [J. Capmany, D. Novak, "Microwavephotonics combines two worlds," Nature photonics , vol. 1, no. 6, pp. 319-330,2007.]), the combination of photon technology and traditional neural network is expected to give full play to the advantages of the two technologies, breaking through the high power consumption and long delay of traditional electronic neural network Technology development bottleneck with limited time and speed (see [Shen Y, Harris N C, Skirlo S, et al. "Deep learning with coherent nanophotonic circuits," Nature Photonics, vol. 11, no. 7, pp. 441-446, 2017 .]). First of all, the photonic neural network adopts an analog computing architecture, and the storage and calculation are performed at the same time, which can reduce the computing delay while increasing the computing speed; second, based on the essential characteristics of the optical transmission medium, the optical link has low loss characteristics, which can indirectly reduce the system power. Finally, compared with electronic devices, the effective working bandwidth of photonic devices has increased by several orders of magnitude, which is more suitable for high-speed real-time computing of neural networks. At present, there are a variety of photon convolution calculation methods based on wavelength division multiplexing technology released, but the realization basis of wavelength division multiplexing technology is multi-wavelength light source, and the realization method of multi-wavelength light source is often more complicated and costly.

发明内容Contents of the invention

本发明的目的在于:克服现有技术不足,提供一种基于时间交织的二维光子相干卷积加速芯片及其应用系统。本发明基于光子集成技术,利用包含可调耦合器、延迟波导、移相器和一级合束器的延时加权移相单元实现待卷积信号的卷积核矩阵系数加权、一级时间交织及相干求和,利用二级延时波导实现加权调制光信号的二级时间交织,通过二级合束器及光电探测器实现加权后求和运算,无需波分复用,且延时波导可复用,适用于多维数据卷积运算。The purpose of the present invention is to overcome the disadvantages of the prior art and provide a two-dimensional photon coherent convolution acceleration chip based on time interleaving and its application system. Based on the photon integration technology, the present invention utilizes a delay weighted phase-shifting unit including an adjustable coupler, a delay waveguide, a phase shifter and a first-order beam combiner to realize the convolution kernel matrix coefficient weighting and first-order time interleaving of the signal to be convoluted And coherent summation, using the second-level delay waveguide to realize the second-level time interleaving of the weighted modulated optical signal, through the second-level beam combiner and photodetector to realize the weighted summation operation, without wavelength division multiplexing, and the delay waveguide can be Multiplexing, suitable for multi-dimensional data convolution operations.

本发明具体采用以下技术方案解决上述技术问题:The present invention specifically adopts the following technical solutions to solve the above technical problems:

一种基于时间交织的二维光子相干卷积加速芯片,所述芯片由强度调制器、M个延时加权移相单元、M-1个二级延时波导、二级合束器及光电探测器一体化集成;其中:A two-dimensional photonic coherent convolution acceleration chip based on time interleaving, the chip is composed of an intensity modulator, M delay weighted phase shifting units, M-1 secondary delay waveguides, secondary beam combiner and photoelectric detection device integration; where:

所述强度调制器具有1个电输入端、1个光输入端及1个光输出端,光输入端为整个芯片的光输入端,用于接收外部光信号,光输出端连接第一个延时加权移相单元的光输入端;电输入端用于接收外部待卷积信号,待卷积信号通过所述强度调制器强度调制输入调制器的光信号,得到强度调制光信号;The intensity modulator has 1 electrical input terminal, 1 optical input terminal and 1 optical output terminal, the optical input terminal is the optical input terminal of the whole chip, and is used to receive external optical signals, and the optical output terminal is connected to the first extension The optical input end of the time-weighted phase-shifting unit; the electrical input end is used to receive an external signal to be convoluted, and the signal to be convolved is modulated by the intensity modulator to intensity-modulate the optical signal input to the modulator to obtain an intensity-modulated optical signal;

所述M个延时加权移相单元具有相同的结构设计,每个延时加权移相单元由N个可调耦合器、N个移相器以及1个一级合束器组成;所述可调耦合器至少包括1个光输入端,2个光输出端,其中,N个可调耦合器的第一个光输出端与输入端依次串联连接,即:第一个可调耦合器的第一个光输出端与第二个可调耦合器的光输入端连接,第二个可调耦合器的第一个光输出端与第三个可调耦合器的光输入端连接,依次类推;第一个可调耦合器的光输入端为延时加权移相单元的光输入端,第N个可调耦合器的第一个光输出端为延时加权移相单元的第一光输出端,N个可调耦合器的第二个光输出端分别接一个移相器的光输入端,且N个移相器的光输出端接一级合束器的N个光输入端,一级合束器的光输出端为延时加权移相单元的第二光输出端。M个延时加权移相单元通过二级延时波导串联连接,其中,前一个延时加权移相单元的第一光输出端通过二级延时波导与后一个延时加权移相单元的光输入端连接;M个延时加权移相单元的M个第二光输出端连接二级合束器的光输入端;所述二级合束器由M个光输入端与1个光输出端组成;通过控制所述可调耦合器的耦合系数及移相器的相位实现卷积核矩阵系数加权,可在二级合束器的光输出端得到延时加权光信号;The M delay-weighted phase-shifting units have the same structural design, and each delay-weighted phase-shifting unit is composed of N adjustable couplers, N phase shifters, and a first-level beam combiner; the adjustable The adjustable coupler includes at least one optical input terminal and two optical output terminals, wherein the first optical output terminals of the N adjustable couplers are connected in series with the input terminals sequentially, that is: the first optical output terminal of the first adjustable coupler One optical output end is connected with the optical input end of the second adjustable coupler, the first optical output end of the second adjustable coupler is connected with the optical input end of the third adjustable coupler, and so on; The optical input end of the first adjustable coupler is the optical input end of the delay weighted phase shift unit, and the first optical output end of the Nth adjustable coupler is the first optical output end of the delay weighted phase shift unit , the second optical output terminals of the N adjustable couplers are respectively connected to the optical input terminals of a phase shifter, and the optical output terminals of the N phase shifters are connected to the N optical input terminals of the first-level beam combiner, and the first-level The optical output end of the beam combiner is the second optical output end of the delay weighted phase shifting unit. M delay-weighted phase-shift units are connected in series through a two-stage delay waveguide, wherein the first optical output end of the previous delay-weighted phase-shift unit passes through the second-stage delay waveguide and the light of the latter delay-weighted phase-shift unit The input terminals are connected; the M second optical output terminals of the M delay weighted phase-shifting units are connected to the optical input terminals of the secondary beam combiner; the secondary beam combiner is composed of M optical input terminals and 1 optical output terminal Composition; by controlling the coupling coefficient of the adjustable coupler and the phase of the phase shifter to realize the weighting of the coefficient of the convolution kernel matrix, the delay weighted optical signal can be obtained at the optical output end of the secondary beam combiner;

二级合束器的光输出端与光电探测器的光输入端连接,所述光电探测器具有1个光输入端与1个电输出端,用于对二级合束器的光输出端得到延时加权光信号进行光电转换,得到电输出信号,此信号经采集处理重构即可得到待卷积信号完成二维卷积运算后的特征信号。The optical output end of the secondary beam combiner is connected to the optical input end of the photodetector, and the photodetector has an optical input end and an electrical output end, which are used to obtain the optical output end of the secondary beam combiner. The time-delayed weighted optical signal undergoes photoelectric conversion to obtain an electrical output signal, which is collected, processed and reconstructed to obtain the characteristic signal after the two-dimensional convolution operation of the signal to be convoluted.

优选地,所述可调耦合器可以基于马赫-曾德尔干涉结构、微环结构实现。Preferably, the adjustable coupler can be realized based on Mach-Zehnder interference structure and microring structure.

进一步地,所述延时加权移相单元中相邻可调耦合器由一段长为的延迟波导连接,其中c为光在真空中的速度,nw为波导延迟线有效折射率,为待卷积信号单个符号持续时间,SM为待卷积信号符号速率。Further, the adjacent adjustable coupler in the delay-weighted phase-shifting unit has a length of The delay waveguide connection of , where c is the speed of light in vacuum, n w is the effective refractive index of the waveguide delay line, is the duration of a single symbol of the signal to be convolved, and SM is the symbol rate of the signal to be convolved.

进一步地,所述连接相邻延时加权移相单元的二级延时波导长为,其中,P为二维待卷积数据矩阵的列数,N为二维卷积核矩阵的列数。Further, the length of the two-stage delay waveguide connecting adjacent delay-weighted phase-shifting units is , where P is the number of columns of the two-dimensional data matrix to be convoluted, and N is the number of columns of the two-dimensional convolution kernel matrix.

进一步地,所述待卷积信号为二维待卷积数据平坦化处理后得到的一维时间序列,而二维待卷积数据为原始二维数据通过矩阵变换得到,具体变换过程为:Further, the signal to be convoluted is a one-dimensional time series obtained after flattening the two-dimensional data to be convoluted, and the two-dimensional data to be convoluted is obtained by matrix transformation of the original two-dimensional data, and the specific transformation process is as follows:

原始二维数据AQ×O在列方向以步进P-N+1滑动分割为H个子二维数据BQ×P,每个子二维数据即是一个二维待卷积数据,其中Q为原始二维数据的行数,O为原始二维数据的列数,P为二维待卷积数据矩阵的列数,N为二维卷积核矩阵的列数。The original two-dimensional data A Q×O is slidingly divided into H sub-two-dimensional data B Q×P in the column direction by stepping P-N+1, and each sub-two-dimensional data is a two-dimensional data to be convoluted, where Q is The number of rows of the original two-dimensional data, O is the number of columns of the original two-dimensional data, P is the number of columns of the two-dimensional data matrix to be convoluted, and N is the number of columns of the two-dimensional convolution kernel matrix.

进一步地,所述通过控制所述可调耦合器的耦合系数及移相器的相位实现卷积核矩阵系数加权,具体为:Further, the convolution kernel matrix coefficient weighting is realized by controlling the coupling coefficient of the adjustable coupler and the phase of the phase shifter, specifically:

根据卷积核矩阵系数的大小及正负符号分别确定可调耦合器的耦合系数及移相器的相位,且通过热光效应或电光效应改变可调耦合器耦合系数,其中根据核矩阵系数的大小确定耦合系数,根据卷积核矩阵系数的正负符号确定相位,每个延时加权移相单元中的N个可调耦合器与N个移相器对应卷积核矩阵中一行系数,M个延时加权移相单元中的M×N个可调耦合器与M×N个移相器对应大小为M×N的二维卷积核矩阵系数。The coupling coefficient of the adjustable coupler and the phase of the phase shifter are respectively determined according to the size and sign of the convolution kernel matrix coefficient, and the coupling coefficient of the adjustable coupler is changed by the thermo-optic effect or the electro-optical effect, wherein according to the coefficient of the kernel matrix The size determines the coupling coefficient, and the phase is determined according to the positive and negative signs of the convolution kernel matrix coefficients. N adjustable couplers and N phase shifters in each delay weighted phase shifter correspond to a row of coefficients in the convolution kernel matrix, M The M×N adjustable couplers and the M×N phase shifters in the delay weighted phase shifting units correspond to two-dimensional convolution kernel matrix coefficients with a size of M×N.

优选地,所述芯片基于三五族材料集成工艺,或硅基集成工艺集成。Preferably, the chip is integrated based on III-V material integration process, or silicon-based integration process.

进一步地,所述原始二维数据可以为三维或多维原始数据分解得到。Further, the original two-dimensional data can be decomposed into three-dimensional or multi-dimensional original data.

基于相同的原理,本发明还提供了一种基于时间交织的二维光子相干卷积加速芯片的卷积运算应用系统,包括:Based on the same principle, the present invention also provides a convolution operation application system based on a time-interleaved two-dimensional photon coherent convolution acceleration chip, including:

上述的基于时间交织的二维光子相干卷积加速芯片、相干光源、待卷积信号源、卷积核控制单元以及采集处理单元;其中,待卷积信号源的输出端与所述二维光子相干卷积加速芯片的电输入端相连,相干光源的光输出端与所述二维光子相干卷积加速芯片的光输入端相连,卷积核控制单元用于根据卷积核矩阵系数的大小及正负符号分别确定控制可调耦合器的耦合系数及移相器的相位;采集处理单元与所述二维光子相干卷积加速芯片的电输出端相连,用于对电输出信号进行重构得到待卷积信号完成二维卷积运算后的特征信号。The above-mentioned two-dimensional photon coherent convolution acceleration chip based on time interleaving, a coherent light source, a signal source to be convoluted, a convolution kernel control unit, and an acquisition and processing unit; wherein, the output terminal of the signal source to be convolved is connected to the two-dimensional photon The electrical input end of the coherent convolution acceleration chip is connected, the optical output end of the coherent light source is connected with the optical input end of the two-dimensional photon coherent convolution acceleration chip, and the convolution kernel control unit is used to control the convolution kernel according to the size of the convolution kernel matrix coefficient and The positive and negative signs respectively determine and control the coupling coefficient of the adjustable coupler and the phase of the phase shifter; the acquisition processing unit is connected to the electrical output terminal of the two-dimensional photon coherent convolution acceleration chip, and is used to reconstruct the electrical output signal to obtain The characteristic signal after the two-dimensional convolution operation is completed on the signal to be convolved.

进一步地,所述待卷积信号源输出的待卷积信号为二维待卷积数据平坦化处理后得到的一维时间序列,二维待卷积数据为原始二维数据通过矩阵变换得到,具体变换过程为:Further, the signal to be convoluted outputted by the signal source to be convolved is a one-dimensional time series obtained after flattening the two-dimensional data to be convoluted, and the two-dimensional data to be convoluted is obtained by matrix transformation of the original two-dimensional data, The specific conversion process is:

原始二维数据AQ×O在列方向以步进P-N+1滑动分割为H个子二维数据BQ×P,每个子二维数据即是一个二维待卷积数据,其中Q为原始二维数据的行数,O为原始二维数据的列数,P为二维待卷积数据矩阵的列数,N为二维卷积核矩阵的列数。The original two-dimensional data A Q×O is slidingly divided into H sub-two-dimensional data B Q×P in the column direction by stepping P-N+1, and each sub-two-dimensional data is a two-dimensional data to be convoluted, where Q is The number of rows of the original two-dimensional data, O is the number of columns of the original two-dimensional data, P is the number of columns of the two-dimensional data matrix to be convoluted, and N is the number of columns of the two-dimensional convolution kernel matrix.

所述原始二维数据为三维或多维原始数据分解得到。The original two-dimensional data is obtained by decomposing three-dimensional or multi-dimensional original data.

相比现有技术,本发明技术方案具有以下有益效果:Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

1)本发明基于单波长承载待卷积信号,利用相干技术实现实数域卷积核矩阵系数的加权,相对波分复用技术,无需多波长光信号,方案简单紧凑。1) The present invention is based on a single wavelength carrying the signal to be convoluted, and uses coherent technology to realize the weighting of the convolution kernel matrix coefficients in the real number domain. Compared with wavelength division multiplexing technology, it does not require multi-wavelength optical signals, and the solution is simple and compact.

2)本发明通过两级延时波导实现单波长加权调制光信号的两级时间交织,在单个信号周期即可实现二维数据的二维卷积核卷积加速运算,解决传统方法数据冗余问题,方案简单高效。2) The present invention realizes two-stage time interleaving of single-wavelength weighted modulated optical signals through two-stage delay waveguides, and can realize two-dimensional convolution kernel convolution acceleration operation of two-dimensional data in a single signal period, and solve data redundancy in traditional methods problem, the solution is simple and efficient.

3)本发明通过两级延时波导串联连接延时加权移相单元实现加权调制信号二级时间交织,可实现波导的延时复用,相对并联在降低芯片尺寸的同时,降低延时波导带来的信号传输损耗,从而提高芯片的能量利用效率。3) The present invention realizes the two-level time interleaving of the weighted modulation signal by connecting the delay-weighted phase-shifting unit in series with two-stage delay waveguides, which can realize the delay multiplexing of waveguides, and the relative parallel connection can reduce the chip size while reducing the delay waveguide band The incoming signal transmission loss, thereby improving the energy utilization efficiency of the chip.

附图说明Description of drawings

图1为本发明的一种基于时间交织的二维光子相干卷积加速芯片结构示意图。FIG. 1 is a schematic structural diagram of a two-dimensional photonic coherent convolution acceleration chip based on time interleaving in the present invention.

图2为本发明一种基于时间交织的二维光子相干卷积加速芯片一个具体实施例结构示意图。FIG. 2 is a schematic structural diagram of a specific embodiment of a two-dimensional photonic coherent convolution acceleration chip based on time interleaving according to the present invention.

图3为本发明一种基于时间交织的二维光子相干卷积加速芯片一个具体实施例中延时加权移相单元的结构示意图。FIG. 3 is a schematic structural diagram of a delay-weighted phase-shifting unit in a specific embodiment of a two-dimensional photonic coherent convolution acceleration chip based on time interleaving in the present invention.

图4为本发明一种基于时间交织的二维光子相干卷积加速芯片一个具体实施例中原始二维数据到二维待卷积数据的矩阵变换过程示意图。FIG. 4 is a schematic diagram of a matrix transformation process from original two-dimensional data to two-dimensional data to be convoluted in a specific embodiment of a time-interleaving-based two-dimensional photonic coherent convolution acceleration chip of the present invention.

图5为本发明一种基于时间交织的二维光子相干卷积加速芯片一个具体实施例中二维待卷积数据矩阵平坦化处理示意图,其中,图5中的A为二维待卷积数据矩阵及卷积核矩阵,图5中的B为二维待卷积数据矩阵一维平坦化处理方法示意图,图5中的C为一维特征数据重组的二维特征数据矩阵。Fig. 5 is a schematic diagram of flattening processing of a two-dimensional data matrix to be convoluted in a specific embodiment of a two-dimensional photon coherent convolution acceleration chip based on time interleaving according to the present invention, wherein A in Fig. 5 is two-dimensional data to be convolved Matrix and convolution kernel matrix, B in Figure 5 is a schematic diagram of a one-dimensional flattening processing method for a two-dimensional data matrix to be convoluted, and C in Figure 5 is a two-dimensional feature data matrix recombined with one-dimensional feature data.

图6为本发明一种基于时间交织的二维光子相干卷积加速芯片一个具体实施例中强度调制器输出强度调制光信号的时间序列与波长关系图。FIG. 6 is a graph showing the relationship between the time sequence and the wavelength of the intensity modulator outputting the intensity modulated optical signal in a specific embodiment of a two-dimensional photonic coherent convolution acceleration chip based on time interleaving according to the present invention.

图7为本发明一种基于时间交织的二维光子相干卷积加速芯片一个具体实施例中各工作节点的光谱示意图,其中,图7中的A为第一个延时加权移相单元N个可调耦合器第二光输出端输出的加权调制光信号的时间序列与各可调耦合器关系图,图7中的B为第一个延时加权移相单元第一光输出端得到延时强度调制光信号的时间序列与波长关系图,图7中的C为第一个延时加权移相单元第二光输出端输出的延时加权调制光信号的时间序列与各移相器关系图,图7中的D为最后一个延时加权移相单元第二光输出端输出的延时加权调制光信号的时间序列与各移相器关系图。Fig. 7 is a schematic diagram of the spectrum of each working node in a specific embodiment of a two-dimensional photonic coherent convolution acceleration chip based on time interleaving according to the present invention, wherein A in Fig. 7 is the first N delay-weighted phase-shifting units The time sequence of the weighted modulated optical signal output by the second optical output end of the adjustable coupler and the relationship diagram of each adjustable coupler, B in Figure 7 is the delay obtained by the first optical output end of the first delay weighted phase shifting unit The relationship between the time series and the wavelength of the intensity modulated optical signal, C in Figure 7 is the time series of the time series of the delay weighted modulated optical signal output by the second optical output end of the first delay weighted phase shift unit and the relationship diagram between each phase shifter , D in FIG. 7 is a diagram showing the relationship between the time sequence of the delay-weighted modulated optical signal output from the second optical output end of the last delay-weighted phase-shifting unit and each phase shifter.

图8为本发明一种基于时间交织的二维光子相干卷积加速芯片一个具体实施例中二级合束器输出的延时加权光信号的时间序列与各移相器关系图。FIG. 8 is a diagram showing the relationship between the time sequence of the delay-weighted optical signal output by the secondary beam combiner and each phase shifter in a specific embodiment of a two-dimensional photonic coherent convolution acceleration chip based on time interleaving according to the present invention.

图9为本发明一种二维光子卷积加速芯片一个具体实施例中二维特征数据到原始二维特征数据的矩阵变换过程示意图。FIG. 9 is a schematic diagram of a matrix transformation process from two-dimensional feature data to original two-dimensional feature data in a specific embodiment of a two-dimensional photon convolution acceleration chip of the present invention.

具体实施方式Detailed ways

针对现有技术的不足,本发明的思路是基于光子集成技术,利用包含可调耦合器、延迟波导、移相器和一级合束器的延时加权移相单元实现待卷积信号的卷积核矩阵系数加权、一级时间交织及相干求和,利用二级延时波导实现加权调制光信号的二级时间交织,通过二级合束器及光电探测器实现加权后求和运算,降低传统方法对多波长信号的需求。Aiming at the deficiencies of the prior art, the idea of the present invention is based on the photonic integration technology, and realizes the convolution of the signal to be convoluted by using a delay weighted phase shift unit including an adjustable coupler, a delay waveguide, a phase shifter and a first-level beam combiner. Product matrix coefficient weighting, first-level time interleaving and coherent summation, using second-level delay waveguides to realize second-level time interleaving of weighted modulated optical signals, and realizing weighted summation operations through second-level beam combiners and photodetectors, reducing Traditional methods require multi-wavelength signals.

下面将详细地对示例性实施例进行说明,其示例表示在附图中。下面的描述涉及附图时,除非另有表示,不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本申请相一致的所有实施方式。相反,它们仅是与如所附权利要求书中所详述的、本申请的一些方面相一致的装置和方法的例子。Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with aspects of the present application as recited in the appended claims.

在本申请使用的术语是仅仅出于描述特定实施例的目的,而非旨在限制本申请。The terminology used in this application is for the purpose of describing particular embodiments only, and is not intended to limit the application.

在本申请和所附权利要求书中所使用的单数形式的“一种”、“所述”和“该”也旨在包括多数形式,除非上下文清楚地表示其他含义。还应当理解,本文中使用的术语“和/或”是指并包含一个或多个相关联的列出项目的任何或所有可能组合。As used in this application and the appended claims, the singular forms "a", "the", and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. It should also be understood that the term "and/or" as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

应当理解,尽管在本申请可能采用术语第一、第二、第三等来描述各种信息,但这些信息不应限于这些术语。这些术语仅用来将同一类型的信息彼此区分开。例如,在不脱离本申请范围的情况下,第一信息也可以被称为第二信息,类似地,第二信息也可以被称为第一信息。取决于语境,如在此所使用的词语“如果”可以被解释成为“在……时”或“当……时”或“响应于确定”。It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, the information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of the present application, first information may also be called second information, and similarly, second information may also be called first information. Depending on the context, the word "if" as used herein may be interpreted as "at" or "when" or "in response to a determination."

图1示出为本发明基于时间交织的二维光子相干卷积加速芯片结构示意图,如图1所示,二维光子相干卷积加速芯片上集成的光子组件有:强度调制器、M个延时加权移相单元、M-1个二级延时波导、二级合束器及光电探测器;各光子组件之间通过光波导连接;所述强度调制器具有1个电输入端、1个光输入端及1个光输出端,所述强度调制器的光输入端为整个芯片的光输入端,用于接收外部光信号,电输入端用于接收外部待卷积信号,所述强度调制器的光输出端连接第一个延时加权移相单元的光输入端;Fig. 1 is a schematic structural diagram of a two-dimensional photon coherent convolution acceleration chip based on time interleaving in the present invention. As shown in Fig. 1, the photon components integrated on the two-dimensional photon coherent convolution acceleration chip include: intensity modulator, M delays Time-weighted phase-shifting unit, M-1 secondary delay waveguides, secondary beam combiner and photodetector; the photonic components are connected through optical waveguides; the intensity modulator has 1 electrical input terminal, 1 An optical input end and an optical output end, the optical input end of the intensity modulator is the optical input end of the entire chip, which is used to receive an external optical signal, and the electrical input end is used to receive an external signal to be convolved, and the intensity modulator The optical output end of the device is connected to the optical input end of the first delay weighted phase shifting unit;

所述M个延时加权移相单元通过M-1个二级延时波导串联连接,M个延时加权移相单元具有相同的结构设计,每个延时加权移相单元由N个可调耦合器、N个移相器以及1个一级合束器组成;以第1个延时加权移相单元为例,其中,第一个可调耦合器的光输入端为延时加权移相单元的光输入端,第一个可调耦合器的第一个光输出端接下一个可调耦合器的光输入端,第二个光输出端接移相器的光输入端,依次类推,N个可调耦合器串联连接,N个可调耦合器的第二个光输出端分别接一个移相器的光输入端,且最后1个可调耦合器的第一个光输出端为延时加权移相单元的第一光输出端;N个移相器的光输出端接一级合束器的N个光输入端,一级合束器的光输出端为延时加权移相单元的第二光输出端。M个延时加权移相单元通过二级延时波导串联连接,其中,前一个延时加权移相单元的第一光输出端与后一个延时加权移相单元的光输入端连接;M个延时加权移相单元的M个第二光输出端连接二级合束器的光输入端;所述二级合束器由M个光输入端与1个光输出端组成;通过控制所述可调耦合器的耦合系数及移相器的相位实现卷积核矩阵系数加权,可在二级合束器的光输出端得到延时加权光信号。The M delay-weighted phase-shifting units are connected in series through M-1 secondary delay waveguides, and the M delay-weighted phase-shifting units have the same structural design, and each delay-weighted phase-shifting unit consists of N adjustable Coupler, N phase shifters and a first-level beam combiner; take the first delay-weighted phase-shift unit as an example, where the optical input end of the first adjustable coupler is delay-weighted phase-shift The optical input end of the unit, the first optical output end of the first adjustable coupler is connected to the optical input end of the next adjustable coupler, the second optical output end is connected to the optical input end of the phase shifter, and so on. N adjustable couplers are connected in series, the second optical output ends of the N adjustable couplers are respectively connected to the optical input end of a phase shifter, and the first optical output end of the last adjustable coupler is a delay The first optical output terminal of the time-weighted phase-shifting unit; the optical output terminals of the N phase shifters are connected to the N optical input terminals of the primary beam combiner, and the optical output terminals of the primary beam combiner are delay-weighted phase-shifting units the second optical output terminal. M delay-weighted phase-shifting units are connected in series through two-stage delay waveguides, wherein the first optical output end of the previous delay-weighted phase-shifting unit is connected to the optical input end of the subsequent delay-weighted phase-shifting unit; M The M second optical output terminals of the delay weighted phase-shifting unit are connected to the optical input terminals of the secondary beam combiner; the secondary beam combiner is composed of M optical input terminals and 1 optical output terminal; by controlling the The coupling coefficient of the coupler and the phase of the phase shifter can be adjusted to realize the weighting of the coefficient of the convolution kernel matrix, and the delay weighted optical signal can be obtained at the optical output end of the secondary beam combiner.

所述可调耦合器可以基于马赫-曾德尔干涉结构、微环结构实现,至少包括1个光输入端,2个光输出端以实现对应功能,本实施例优选为1×2可调耦合器;所述芯片可以基于三五族材料集成工艺,或硅基集成工艺集成。The adjustable coupler can be realized based on the Mach-Zehnder interference structure and the microring structure, and at least includes one optical input port and two optical output ports to realize the corresponding functions. This embodiment is preferably a 1×2 adjustable coupler ; The chip can be integrated based on III-V material integration process, or silicon-based integration process.

一种基于时间交织的二维光子相干卷积加速芯片的卷积运算应用系统一个具体实施例如图2所示,其包括:上述光子神经网络卷积加速芯片、相干光源、待卷积信号源、卷积核控制单元以及采集处理单元。A specific embodiment of a convolution operation application system based on a time-interleaved two-dimensional photonic coherent convolution acceleration chip is shown in Figure 2, which includes: the above-mentioned photonic neural network convolution acceleration chip, a coherent light source, a signal source to be convolved, Convolution kernel control unit and acquisition processing unit.

首先,相干光源产生光信号并通过光子神经网络卷积加速芯片的光输入端送入强度调制器,待卷积信号通过光子神经网络卷积加速芯片的电输入端送入强度调制器,待卷积信号通过强度调制器加载到光信号上得到强度调制光信号,其中,所述待卷积信号为二维待卷积数据经矩阵平坦化处理后得到的一维时间序列;强度调制光信号送入第一个延时加权移相单元的光输入端,在第一个延时加权移相单元中,通过卷积核矩阵控制单元根据卷积核矩阵系数的大小来控制N个1×2可调耦合器的耦合系数实现强度调制光信号分为N份强度调制光信号,并分别实现N个强度调制光信号卷积核系数加权,在第一个延时加权移相单元第一光输出端得到第一延时强度调制光信号,在N个1×2可调耦合器第二光输出端得到对应的N个第一加权调制光信号。再通过卷积核矩阵控制单元根据卷积核矩阵系数的正负符号来控制N个移相器的相位量,在N个移相器输出端得到对应的N个第一加权移相调制光信号,N个第一加权移相调制光信号通过一级合束器耦合,在第一延时加权移相单元第二光输出端得到第一延时加权调制光信号;第一延时强度调制光信号通过第一个二级延时波导延时后送入第二个延时加权移相单元的光输入端执行类似于第一个延时加权移相单元的操作;依次类推,在第M个延时加权移相单元第二光输出端得到第M延时加权调制光信号;M个延时加权调制光信号通过二级合束器耦合得到延时加权光信号;延时加权光信号通过光电探测器完成光电探测即可得到电输出信号,此信号经采集处理重构即可得到待卷积信号完成二维卷积运算后的特征信号。First, the coherent light source generates an optical signal and sends it to the intensity modulator through the optical input terminal of the photonic neural network convolution acceleration chip, and the signal to be convoluted is sent to the intensity modulator through the electrical input terminal of the photonic neural network convolution acceleration chip. The product signal is loaded onto the optical signal through an intensity modulator to obtain an intensity modulated optical signal, wherein the signal to be convoluted is a one-dimensional time series obtained after matrix flattening of two-dimensional data to be convoluted; the intensity modulated optical signal is sent to Into the optical input end of the first delay-weighted phase-shift unit, in the first delay-weighted phase-shift unit, the convolution kernel matrix control unit controls N 1×2 adjustable By adjusting the coupling coefficient of the coupler, the intensity-modulated optical signal is divided into N intensity-modulated optical signals, and the convolution kernel coefficient weighting of the N intensity-modulated optical signals is realized respectively, at the first optical output end of the first delay weighted phase-shifting unit The first time-delayed intensity modulated optical signal is obtained, and the corresponding N first weighted modulated optical signals are obtained at the second optical output ends of the N 1×2 tunable couplers. Then, the phase quantities of the N phase shifters are controlled by the convolution kernel matrix control unit according to the positive and negative signs of the convolution kernel matrix coefficients, and the corresponding N first weighted phase shift modulated optical signals are obtained at the output terminals of the N phase shifters , N first weighted phase-shift modulated optical signals are coupled through a first-stage beam combiner, and the first time-delayed weighted modulated optical signal is obtained at the second optical output end of the first time-delayed weighted phase-shifted unit; the first time-delayed intensity modulated optical signal After the signal is delayed by the first two-stage delay waveguide, it is sent to the optical input end of the second delay-weighted phase-shift unit to perform operations similar to the first delay-weighted phase-shift unit; and so on, at the Mth The second optical output terminal of the delay-weighted phase-shifting unit obtains the Mth delay-weighted modulated optical signal; the M delay-weighted modulated optical signals are coupled through a secondary beam combiner to obtain a delay-weighted optical signal; the delay-weighted optical signal passes through the photoelectric After the detector completes the photoelectric detection, the electrical output signal can be obtained. After the signal is collected, processed and reconstructed, the characteristic signal after the two-dimensional convolution operation of the signal to be convolved can be obtained.

为了便于公众理解,下面通过一个具体实施例来对本发明的技术方案进行进一步详细说明:In order to facilitate the public's understanding, the technical solution of the present invention will be further described in detail through a specific embodiment below:

首先,相干光源输出波长为λ的光信号,光信号的信号强度为A,光信号通过光纤-波导耦合技术送入光子芯片的强度调制器光输入端,待卷积信号源输出的待卷积信号通过强度调制器对光信号进行调制,将待卷积信号分别加载到光信号上。待卷积信号序列可以表示为, 其中i表示离散化时间序号,R=QP为待卷积信号的长度,待卷积信号为二维待卷积信号经矩阵平坦化处理后得到的一维信号,而二维待卷积信号为原始二维数据通过矩阵变换得到,变换过程如图4所示,原始二维数据AQ×O在列方向以步进P-N+1滑动分割为H个子二维数据BQ×P,每个子二维数据即是一个二维待卷积信号,其中Q为原始二维数据的行数,O为原始二维数据的列数,P为二维待卷积信号矩阵的列数,N为二维卷积核矩阵的列数。二维待卷积信号矩阵如图5中的A所示,为一个Q行P列的矩阵。矩阵平坦化具体操作为将二维或多维矩阵转为一维矩阵,其过程如图5中的B所示。每一个强度调制的载波对应一个待卷积信号,得到强度调制光信号,强度调制光信号SMod用矩阵可以表示为:First, the coherent light source outputs an optical signal with a wavelength of λ, and the signal strength of the optical signal is A. The optical signal is sent to the optical input end of the intensity modulator of the photonic chip through the fiber-waveguide coupling technology, and the output signal to be convoluted is The signal is modulated by the intensity modulator to the optical signal, and the signal to be convolved is respectively loaded on the optical signal. The signal sequence to be convolved can be expressed as , where i represents the discretized time sequence number, R=QP is the length of the signal to be convoluted, the signal to be convolved is a one-dimensional signal obtained after the two-dimensional signal to be convolved is processed by matrix flattening, and the two-dimensional signal to be convolved The original two-dimensional data is obtained through matrix transformation, and the transformation process is shown in Figure 4. The original two-dimensional data A Q×O is divided into H sub-two-dimensional data B Q×P in the column direction by sliding in steps of P-N+1, Each sub-two-dimensional data is a two-dimensional signal to be convoluted, where Q is the number of rows of the original two-dimensional data, O is the number of columns of the original two-dimensional data, P is the number of columns of the two-dimensional signal matrix to be convoluted, and N is the number of columns of the two-dimensional convolution kernel matrix. The two-dimensional signal matrix to be convolved is shown as A in FIG. 5 , which is a matrix of Q rows and P columns. The specific operation of matrix flattening is to convert a two-dimensional or multi-dimensional matrix into a one-dimensional matrix, and the process is shown in B in Figure 5. Each intensity-modulated carrier corresponds to a signal to be convoluted to obtain an intensity-modulated optical signal. The intensity-modulated optical signal S Mod can be expressed as a matrix:

 (1) (1)

对应的强度调制光信号的时间序列与波长关系图如图6所示。强度调制器输出的强度调制光信号依次送入通过二级延时波导串联连接的M个延时加权移相单元。延时加权移相单元的结构示意图如图3所示,每个延时加权移相单元由N个1×2可调耦合器(TOC)、N个移相器(PS)以及1个一级合束器组成,可调耦合器彼此之间由一段长为的延时波导(DW)连接,其中nw为波导延时线有效折射率,为待卷积信号单个符号持续时间,SM为待卷积信号符号速率,c是光在真空中的速度。根据卷积核矩阵系数的大小确定可调耦合器的耦合系数,且通过热光效应或电光效应改变可调耦合器耦合系数,每个延时加权移相单元中N个可调耦合器对应卷积核矩阵中一行元素的大小。卷积核矩阵控制单元首先控制第一个可调耦合器的耦合系数,使在强度调制器输出的强度调制光信号按特定耦合系数耦合输出到对应的移相器中,实现卷积核矩阵系数大小的加权。强度调制光信号经过第一个可调耦合器后进入延时波导实现延时,延时后的强度调制光信号通过第二个可调耦合器实现系数大小的加权,依次类推,M个延时加权移相单元共完成MN个信号加权。在MN个可调耦合器第二光输出端得到MN个加权调制光信号,设卷积核矩阵Mcon可以表示为:The corresponding time series and wavelength relationship diagram of the intensity modulated optical signal is shown in FIG. 6 . The intensity-modulated optical signal output by the intensity modulator is sequentially sent to M delay-weighted phase-shifting units connected in series through two-stage delay waveguides. The structural diagram of the delay-weighted phase-shift unit is shown in Figure 3. Each delay-weighted phase-shift unit consists of N 1×2 tunable couplers (TOC), N phase shifters (PS) and a first-stage The beam combiner is composed of adjustable couplers with a length of The delay waveguide (DW) connection, where n w is the effective refractive index of the waveguide delay line, is the single symbol duration of the signal to be convolved, SM is the symbol rate of the signal to be convolved, and c is the speed of light in vacuum. The coupling coefficient of the adjustable coupler is determined according to the size of the convolution kernel matrix coefficient, and the coupling coefficient of the adjustable coupler is changed by the thermo-optical effect or the electro-optical effect. The size of a row of elements in the product matrix. The convolution kernel matrix control unit first controls the coupling coefficient of the first adjustable coupler, so that the intensity modulated optical signal output by the intensity modulator is coupled to the corresponding phase shifter according to a specific coupling coefficient, and the convolution kernel matrix coefficient is realized. Size weighting. The intensity modulated optical signal enters the delay waveguide after passing through the first adjustable coupler Time delay, the delayed intensity modulated optical signal is weighted by the coefficient size through the second adjustable coupler, and so on, M delay weighted phase shifting units complete MN signal weighting in total. MN weighted modulated optical signals are obtained at the second optical output ports of MN adjustable couplers, and the convolution kernel matrix M con can be expressed as:

 (2) (2)

w表示卷积核矩阵元素的大小;则第一个延时加权移相单元N个可调耦合器的第二光输出端输出的第一加权调制光信号SModcon_1可以表示为:w represents the size of the convolution kernel matrix elements; then the first weighted modulated optical signal S Modcon_1 output by the second optical output terminals of the N adjustable couplers of the first delay weighted phase shift unit can be expressed as:

 (3) (3)

第一个延时加权移相单元N个可调耦合器的第二光输出端输出的第一加权调制光信号的时间序列与各可调耦合器关系图如图7中的A所示,在第一个延时加权移相单元第一光输出端得到第一延时强度调制光信号的时间序列与波长关系图如图7中的B所示。卷积核矩阵控制单元控制M个延时加权移相单元中MN个移相器相移量,使输入移相器的加权调制光信号发生相位偏移,实现卷积核矩阵系数正负符号的加权,设相移量Mpm可以表示为:The time sequence of the first weighted modulated optical signal output by the second optical output terminals of the N adjustable couplers of the first delay weighted phase shifting unit and the relationship between each adjustable coupler is shown in A in Figure 7. The relationship between the time sequence and the wavelength of the first delayed intensity modulated optical signal obtained at the first optical output terminal of the first delay weighted phase shifting unit is shown in B in FIG. 7 . The convolution kernel matrix control unit controls the phase shift amount of MN phase shifters in the M delay weighted phase shifting units, so that the weighted modulated optical signal input to the phase shifter undergoes a phase shift, and the positive and negative signs of the convolution kernel matrix coefficients are realized. Weighted, the phase shift M pm can be expressed as:

 (4) (4)

表示相移量,其值为0或;第一个延时加权移相单元N个移相器输出的第一加权移相调制光信号通过一级合束器耦合,在第一延时加权移相单元的第二光输出端得到第一延时加权调制光信号,第一延时加权调制光信号SMpm_1可以表示为: Indicates the amount of phase shift, its value is 0 or ; The first weighted phase-shift modulated optical signal output by the N phase shifters of the first time-delay weighted phase-shift unit is coupled through a first-stage beam combiner, and the second light output terminal of the first time-delay weighted phase-shift unit obtains the first A delay weighted modulated optical signal, the first delay weighted modulated optical signal S Mpm_1 can be expressed as:

(5) (5)

第一个延时加权移相单元的第二光输出端输出的第一延时加权调制光信号的时间序列与各移相器关系图如图7中的C所示。第一延时加权移相单元的第一光输出端输出的第一延时强度调制光信号送入长为的二级延时波导实现二级延时,二级延时后的光信号送入第二延时加权移相单元进行与在第一延时加权移相单元中相同的操作,在后续串联的延时加权移相单元及二级延时波导中也进行相同的操作,直至最后一个延时加权移相单元。每个延时加权移相单元的第二光输出端输出的第m延时加权调制光信号表示为:The time sequence of the first delay-weighted modulated optical signal output from the second optical output end of the first delay-weighted phase-shifting unit and each phase shifter is shown in C in FIG. 7 . The length of the first delayed intensity modulated optical signal output by the first optical output terminal of the first delay weighted phase shifting unit is sent to The second-level delay waveguide realizes the second-level delay, and the optical signal after the second-level delay is sent to the second delay-weighted phase-shift unit for the same operation as in the first delay-weighted phase-shift unit. The same operation is also performed in the delay-weighted phase-shifting unit and the second-stage delay waveguide until the last delay-weighted phase-shifting unit. The m-th delay-weighted modulated optical signal output by the second optical output end of each delay-weighted phase-shifting unit is expressed as:

 ( m=1,2,..,M)    (6)( m=1,2,..,M) (6)

其中,最后一个延时加权移相单元第二光输出端输出的第M延时加权调制光信号的时间序列与各移相器关系图如图7中的D所示。Wherein, the time sequence of the Mth delay-weighted modulated optical signal output from the second optical output terminal of the last delay-weighted phase-shifting unit and the relationship diagram of each phase shifter is shown in D in FIG. 7 .

M个延时加权移相单元的第二光输出端输出的延时加权调制光信号送入二级合束器的M个光输入端耦合为延时加权光信号,延时加权光信号的时间序列与各移相器关系图如图8所示。延时加权光信号通过波导输入到光电探测器中实现光电转换,得到二维光子卷积加速芯片的电输出信号,电输出信号有效时序内的信号可以表示为:The delay-weighted modulated optical signals output by the second optical output terminals of the M delay-weighted phase-shifting units are sent to the M optical input terminals of the secondary beam combiner to be coupled into delay-weighted optical signals, and the time of the delay-weighted optical signals is The relationship between the sequence and each phase shifter is shown in Figure 8. The delay-weighted optical signal is input to the photodetector through the waveguide to realize photoelectric conversion, and the electrical output signal of the two-dimensional photon convolution acceleration chip is obtained. The signal in the effective time sequence of the electrical output signal can be expressed as:

其中,Sca(r)为第r次卷积运算的结果,wmn为卷积核矩阵系数,为相移量。采集处理单元对该信号采集后,对有效时序信号以矩阵平坦化处理相反的方式即可在数字域实现信号二维重构,二维重构的数据如图5中的C所示,其中最后的N-1列为冗余数据。去除冗余数据后即可得到二维待卷积信号完成卷积运算后的二维特征信号。以上过程是在原始数据没有补零的情况下进行的具体实施例说明。当对原始数据补零时,补完零的数据可作为原始二维数据同上进行的操作。Among them, S ca (r) is the result of the rth convolution operation, w mn is the convolution kernel matrix coefficient, is the amount of phase shift. After the acquisition and processing unit collects the signal, the two-dimensional reconstruction of the signal can be realized in the digital domain in the opposite way to the matrix flattening process for the effective timing signal. The two-dimensional reconstruction data is shown in C in Figure 5, where the last The N-1 columns are redundant data. After removing the redundant data, the two-dimensional characteristic signal after the convolution operation of the two-dimensional signal to be convoluted can be obtained. The above process is a description of a specific embodiment performed under the condition that the original data is not filled with zeros. When zero-padded to the original data, the zero-padded data can be used as the original two-dimensional data to perform the same operation as above.

最后,将H个二维特征信号通过图9所示的方法合为一个对应原始二维数据的特征信号,继而完成原始二维数据的卷积运算。Finally, the H two-dimensional feature signals are combined into one feature signal corresponding to the original two-dimensional data through the method shown in FIG. 9 , and then the convolution operation of the original two-dimensional data is completed.

最后,需要注意的是,以上列举的仅是本发明的具体实施例。本发明不限于以上实施例,还可以有很多变形。本领域的普通技术人员能从本发明公开的内容中直接导出或联想到的所有变形,均应认为是本发明的保护范围。Finally, it should be noted that what is listed above are only specific embodiments of the present invention. The present invention is not limited to the above embodiments, and many modifications are possible. All deformations that can be directly derived or associated by those skilled in the art from the content disclosed in the present invention should be considered as the protection scope of the present invention.

Claims (10)

1.一种基于时间交织的二维光子相干卷积加速芯片,其特征在于,所述芯片由强度调制器、M个延时加权移相单元、M-1个二级延时波导、二级合束器及光电探测器一体化集成;其中:1. A two-dimensional photonic coherent convolution acceleration chip based on time interleaving, characterized in that the chip consists of an intensity modulator, M delay weighted phase-shifting units, M-1 secondary delay waveguides, secondary Integrated integration of beam combiner and photodetector; where: 所述强度调制器具有1个电输入端、1个光输入端及1个光输出端,光输入端为整个芯片的光输入端,用于接收外部光信号,光输出端连接第一个延时加权移相单元的光输入端;电输入端用于接收外部待卷积信号,待卷积信号通过所述强度调制器强度调制输入调制器的光信号,得到强度调制光信号;The intensity modulator has 1 electrical input terminal, 1 optical input terminal and 1 optical output terminal, the optical input terminal is the optical input terminal of the whole chip, and is used to receive external optical signals, and the optical output terminal is connected to the first extension The optical input end of the time-weighted phase-shifting unit; the electrical input end is used to receive an external signal to be convoluted, and the signal to be convolved is modulated by the intensity modulator to intensity-modulate the optical signal input to the modulator to obtain an intensity-modulated optical signal; 所述延时加权移相单元由N个可调耦合器、N个移相器以及1个一级合束器组成;所述可调耦合器至少包括1个光输入端,2个光输出端,其中,N个可调耦合器的第一个光输出端与输入端依次串联连接,第一个可调耦合器的光输入端为延时加权移相单元的光输入端,第N个可调耦合器的第一个光输出端为延时加权移相单元的第一光输出端,N个可调耦合器的第二个光输出端分别接一个移相器的光输入端,N个移相器的光输出端接一级合束器的N个光输入端,一级合束器的光输出端为延时加权移相单元的第二光输出端;M个延时加权移相单元通过二级延时波导串联连接;所述二级合束器由M个光输入端与1个光输出端组成;M个延时加权移相单元的M个第二光输出端连接二级合束器的光输入端;通过控制所述可调耦合器的耦合系数及移相器的相位实现卷积核矩阵系数加权;The delay-weighted phase-shifting unit is composed of N adjustable couplers, N phase shifters and a first-level beam combiner; the adjustable coupler includes at least one optical input terminal and two optical output terminals , wherein the first optical output ends and input ends of the N adjustable couplers are sequentially connected in series, the optical input end of the first adjustable coupler is the optical input end of the delay-weighted phase-shifting unit, and the Nth adjustable coupler can be The first optical output end of the adjustable coupler is the first optical output end of the delay weighted phase shift unit, and the second optical output ends of the N adjustable couplers are respectively connected to the optical input end of a phase shifter, N The optical output terminal of the phase shifter is connected to the N optical input terminals of the primary beam combiner, and the optical output terminal of the primary beam combiner is the second optical output terminal of the delay weighted phase shift unit; M delay weighted phase shift units The units are connected in series through two-stage delay waveguides; the two-stage beam combiner is composed of M optical input ports and one optical output port; M second optical output ports of the M delay-weighted phase-shifting units are connected to the two-stage The optical input end of the beam combiner; realize the convolution kernel matrix coefficient weighting by controlling the coupling coefficient of the adjustable coupler and the phase of the phase shifter; 所述二级合束器的光输出端与光电探测器的光输入端连接,所述光电探测器具有1个光输入端与1个电输出端,用于对二级合束器的光输出端得到延时加权光信号进行光电转换,得到电输出信号,电输出信号经采集处理重构得到待卷积信号完成二维卷积运算后的特征信号。The optical output end of the secondary beam combiner is connected to the optical input end of the photodetector, and the photodetector has an optical input end and an electrical output end for the optical output of the secondary beam combiner The terminal obtains the time-delayed weighted optical signal for photoelectric conversion to obtain the electrical output signal, and the electrical output signal is collected, processed and reconstructed to obtain the characteristic signal after the two-dimensional convolution operation of the signal to be convoluted. 2.如权利要求1所述的一种基于时间交织的二维光子相干卷积加速芯片,其特征在于,所述可调耦合器的结构为马赫-曾德尔干涉结构或微环结构。2. A two-dimensional photonic coherent convolution acceleration chip based on time interleaving according to claim 1, wherein the structure of the adjustable coupler is a Mach-Zehnder interference structure or a microring structure. 3.如权利要求1所述的一种基于时间交织的二维光子相干卷积加速芯片,其特征在于,所述延时加权移相单元中相邻可调耦合器由一段长为的延迟波导连接,其中c为光在真空中的速度,nw为波导延迟线有效折射率,为待卷积信号单个符号持续时间,SM为待卷积信号符号速率。3. A kind of two-dimensional photonic coherent convolution acceleration chip based on time interleaving as claimed in claim 1, wherein the adjacent adjustable coupler in the time-delay weighted phase-shifting unit has a length of The delay waveguide connection of , where c is the speed of light in vacuum, n w is the effective refractive index of the waveguide delay line, is the duration of a single symbol of the signal to be convolved, and SM is the symbol rate of the signal to be convolved. 4.如权利要求1所述的一种基于时间交织的二维光子相干卷积加速芯片,其特征在于,所述连接相邻延时加权移相单元的二级延时波导长为,其中,P为二维待卷积数据矩阵的列数,N为二维卷积核矩阵的列数。4. A kind of two-dimensional photonic coherent convolution acceleration chip based on time interleaving as claimed in claim 1, wherein the length of the secondary delay waveguide connecting the adjacent delay weighted phase shifting units is , where P is the number of columns of the two-dimensional data matrix to be convoluted, and N is the number of columns of the two-dimensional convolution kernel matrix. 5.如权利要求1所述的一种基于时间交织的二维光子相干卷积加速芯片,其特征在于,所述待卷积信号为二维待卷积数据平坦化处理后得到的一维时间序列,二维待卷积数据为原始二维数据通过矩阵变换得到,具体变换过程为:5. A two-dimensional photonic coherent convolution acceleration chip based on time interleaving as claimed in claim 1, wherein the signal to be convoluted is the one-dimensional time obtained after the two-dimensional data to be convolved is flattened. Sequence, the two-dimensional data to be convolved is the original two-dimensional data obtained through matrix transformation, the specific transformation process is: 原始二维数据AQ×O在列方向以步进P-N+1滑动分割为H个子二维数据BQ×P,每个子二维数据即是一个二维待卷积数据,其中Q为原始二维数据的行数,O为原始二维数据的列数,P为二维待卷积数据矩阵的列数,N为二维卷积核矩阵的列数。The original two-dimensional data A Q×O is slidingly divided into H sub-two-dimensional data B Q×P in the column direction by stepping P-N+1, and each sub-two-dimensional data is a two-dimensional data to be convoluted, where Q is The number of rows of the original two-dimensional data, O is the number of columns of the original two-dimensional data, P is the number of columns of the two-dimensional data matrix to be convoluted, and N is the number of columns of the two-dimensional convolution kernel matrix. 6.如权利要求5所述的一种基于时间交织的二维光子相干卷积加速芯片,其特征在于,所述原始二维数据为三维或多维原始数据分解得到。6. A two-dimensional photonic coherent convolution acceleration chip based on time interleaving as claimed in claim 5, wherein the original two-dimensional data is decomposed into three-dimensional or multi-dimensional original data. 7.如权利要求1所述的一种基于时间交织的二维光子相干卷积加速芯片,其特征在于,所述通过控制所述可调耦合器的耦合系数及移相器的相位实现卷积核矩阵系数加权,具体为:7. A kind of two-dimensional photonic coherent convolution acceleration chip based on time interleaving as claimed in claim 1, wherein the convolution is realized by controlling the coupling coefficient of the adjustable coupler and the phase of the phase shifter Kernel matrix coefficient weighting, specifically: 根据卷积核矩阵系数的大小及正负符号分别确定可调耦合器的耦合系数及移相器的相位,且通过热光效应或电光效应改变可调耦合器耦合系数,每个延时加权移相单元中的N个可调耦合器与N个移相器对应卷积核矩阵中一行系数,M个延时加权移相单元中的M×N个可调耦合器与M×N个移相器对应大小为M×N的二维卷积核矩阵。The coupling coefficient of the adjustable coupler and the phase of the phase shifter are respectively determined according to the size and sign of the coefficient of the convolution kernel matrix, and the coupling coefficient of the adjustable coupler is changed by the thermo-optic effect or the electro-optical effect, and each delay weighted shift The N adjustable couplers and N phase shifters in the phase unit correspond to a row of coefficients in the convolution kernel matrix, and the M×N adjustable couplers and M×N phase shifters in the M delay weighted phase shift units The device corresponds to a two-dimensional convolution kernel matrix with a size of M×N. 8.如权利要求1所述的一种基于时间交织的二维光子相干卷积加速芯片,其特征在于,所述芯片基于三五族材料集成工艺,或硅基集成工艺集成。8. A two-dimensional photonic coherent convolution acceleration chip based on time interleaving as claimed in claim 1, characterized in that the chip is integrated based on the integration process of III-V materials or silicon-based integration process. 9.一种基于时间交织的二维光子相干卷积加速芯片的卷积运算应用系统,其特征在于,包括:9. A convolution operation application system based on a time-interleaved two-dimensional photon coherent convolution acceleration chip, characterized in that it includes: 权利要求1-8任一项所述的基于时间交织的二维光子相干卷积加速芯片、相干光源、待卷积信号源、卷积核控制单元以及采集处理单元;其中,待卷积信号源的输出端与所述二维光子相干卷积加速芯片的电输入端相连,相干光源的光输出端与所述二维光子相干卷积加速芯片的光输入端相连,卷积核控制单元用于根据卷积核矩阵系数的大小及正负符号分别确定控制可调耦合器的耦合系数及移相器的相位;采集处理单元与所述二维光子相干卷积加速芯片的电输出端相连,用于对电输出信号进行重构得到待卷积信号完成二维卷积运算后的特征信号。The two-dimensional photonic coherent convolution acceleration chip based on time interleaving, the coherent light source, the signal source to be convoluted, the convolution kernel control unit, and the acquisition and processing unit according to any one of claims 1-8; wherein, the signal source to be convoluted The output end of the coherent light source is connected to the electrical input end of the two-dimensional photon coherent convolution acceleration chip, the optical output end of the coherent light source is connected to the optical input end of the two-dimensional photon coherent convolution acceleration chip, and the convolution kernel control unit is used for Determine and control the coupling coefficient of the adjustable coupler and the phase of the phase shifter according to the size and the positive and negative signs of the convolution kernel matrix coefficients; The method is to reconstruct the electrical output signal to obtain the characteristic signal after the two-dimensional convolution operation of the signal to be convolved is completed. 10.根据权利要求9所述的卷积运算应用系统,其特征在于,所述待卷积信号源输出的待卷积信号为二维待卷积数据平坦化处理后得到的一维时间序列,二维待卷积数据为原始二维数据通过矩阵变换得到,具体变换过程为:10. The convolution operation application system according to claim 9, wherein the signal to be convoluted outputted by the signal source to be convoluted is a one-dimensional time series obtained after two-dimensional data to be convolved is flattened, The two-dimensional data to be convolved is the original two-dimensional data obtained through matrix transformation, and the specific transformation process is as follows: 原始二维数据AQ×O在列方向以步进P-N+1滑动分割为H个子二维数据BQ×P,每个子二维数据即是一个二维待卷积数据,其中Q为原始二维数据的行数,O为原始二维数据的列数,P为二维待卷积数据矩阵的列数,N为二维卷积核矩阵的列数。The original two-dimensional data A Q×O is slidingly divided into H sub-two-dimensional data B Q×P in the column direction by stepping P-N+1, and each sub-two-dimensional data is a two-dimensional data to be convoluted, where Q is The number of rows of the original two-dimensional data, O is the number of columns of the original two-dimensional data, P is the number of columns of the two-dimensional data matrix to be convoluted, and N is the number of columns of the two-dimensional convolution kernel matrix.
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