CN115987093A - SC-Buck converter dynamic response control method and device based on capacitor charge balance - Google Patents

Abstract

A method and a device for controlling dynamic response of an SC-Buck converter based on capacitance charge balance relate to the field of dynamic response of a load point power supply. In order to solve the problems of more complex control and poorer stability of the converter in the prior art, the invention provides the following technical scheme: the method comprises the following steps: the acquisition circuit outputs voltage as acquisition data; filtering the acquired data; judging whether the filtered data is subjected to load sudden change or not, if so, executing a step 4, and if not, executing a step 5; and 4, step 4: setting the driving signal sent to the circuit high, temporarily setting the driving signal low when the turn-off voltage is detected, and recovering the driving signal when the sudden load increase condition disappears; and 5: and setting the driving signal sent to the circuit low, temporarily setting the driving signal high when the turn-off voltage is detected, and recovering the driving signal when the load sudden reduction condition disappears. The method is suitable for improving the dynamic response of the power supply at the load point and meeting the power supply requirements of electric equipment such as a CPU (central processing unit) and the like.

Description

SC-Buck converter dynamic response control method and device based on capacitor charge balance

technical field

The invention relates to the field of dynamic response of a point-of-load power supply, and specifically relates to a dynamic response control method of an SC-Buck converter.

Background technique

With the continuous improvement of chip technology and processor performance, in the data center power supply system, the power supply voltage drops from 3.3V to 1V or even hundreds of millivolts, and as the amount of processed data increases, the current required by the processor increases sharply Increase. In addition to the low-voltage and high-current requirements for the converter, the high-performance processor also puts forward higher requirements for its dynamic response, requiring its output voltage fluctuation to be small enough when the load changes suddenly.

The traditional Buck converter is based on voltage mode control, and the frequency is low. The converter is equivalent to a linear system, and it is studied by using the classic control method. This PI control mode can maintain a stable output voltage in a steady state, but the response is not fast enough when the load changes dynamically, and there is a large overshoot, which cannot meet the requirements of loads such as high-performance processors.

Multi-phase interleaved parallel Buck converter:

With the rapid development of digital signal processors and microprocessors, their power supplies are often required to have output characteristics of low voltage, high current and fast dynamic response. In order to solve the problems of slow dynamic response, large output current ripple, and uneven distribution of thermal stress in switching power converters in such applications, a multi-phase interleaved parallel topology can be used. The interleaved driving technology is to connect multiple identical modules in parallel, and the switching frequency of each module is the same, but there is a phase angle difference of 2π/N between the adjacent two-phase driving signals, where N represents the number of parallel-connected phases of the converter. Figure 1 shows the schematic diagram of the main power circuit of a multi-phase interleaved parallel synchronous Buck converter.

Compared with the traditional single-phase circuit structure, the multi-phase interleaved parallel technology makes the total output inductor current ripple of the converter smaller than the current ripple of each phase through interleaved superposition and cancellation. The proposal of the interleaved parallel technology is beneficial to realize the high frequency and miniaturization of the DC switching converter. At the same time, the advantages of interleaved parallel technology can be summarized as follows:

1) At the same switching frequency, the interleaved drive control can reduce the output ripple, reduce the number and volume of passive components in the circuit, and help improve the power density of the converter.

2) In a multi-module parallel system, the power borne by a single module is only 1/N of the total power, which is conducive to the uniform distribution of power and heat;

3) The multi-phase interleaved parallel connection can reduce the inductance while ensuring the output ripple, and at the same time, it can provide energy for the load through the multi-phase path and improve the dynamic response of the converter.

Although multi-phase interleaved parallel connection greatly improves the current output capability and dynamic response capability, for a simple Buck converter, its step-down ratio is limited, especially at higher frequencies, and it is difficult for each module to achieve current sharing.

Improved COT control Buck converter:

The CPU is usually powered by a POL (Point Of Load) converter, and the POL converter needs to follow strict Adaptive Voltage Positioning (AVP) requirements to ensure that the CPU works in an ideal state. For POL converters, COT (Constant On Time) control is a commonly used variable frequency current mode control. The conduction time of COT control mode is fixed, and the switching frequency changes when the input and output of the system change. However, when the load rises transiently, the response speed of the COT control mode is not fast enough due to the constant on-time characteristic, which will cause the output voltage to undershoot or overshoot and fail to meet the power supply requirements. An improved COT-controlled POL converter structure is shown in Figure 2. When the load changes suddenly, controlling the normally-on and normally-off of the switch tube through the state track can realize a single-cycle response and improve the dynamic response of the converter. However, its control is relatively complicated, and it is not easy to be connected in parallel, so it is not suitable for high-current output scenarios. The closed-loop of analog devices is susceptible to interference and has poor stability.

Contents of the invention

In order to solve the problems existing in the prior art that the control of converters is relatively complex, not easy to be connected in parallel, not suitable for large current output scenarios, and the closed loop of analog devices is susceptible to interference and poor stability, the technical solution provided by the present invention is:

A method for controlling the dynamic response of an SC-Buck converter based on capacitor charge balance, the method comprising:

Step 1: Collect the output voltage of the circuit as the collected data;

Step 2: filtering the collected data;

Step 3: Determine whether the filtered data has a sudden load change or not. If a sudden load increase occurs, perform step 4. If a sudden load decrease occurs, perform step 5;

Step 4: Set the driving signal sent to the circuit to high, set the driving signal low when the shutdown voltage is detected, and restore the driving signal when the load sudden increase disappears;

Step 5: Set the driving signal sent to the circuit to low, set the driving signal high when the shutdown voltage is detected, and restore the driving signal when the sudden load drop disappears.

Further, a preferred implementation manner is provided, in the step 3, the way of judging the data is: through threshold detection.

Further, a preferred implementation manner is provided, the threshold in the threshold detection is a preset threshold.

Further, a preferred implementation manner is provided, the method for judging the sudden increase and decrease of the load is: a method of passing a threshold value detection.

Further, to provide a preferred implementation manner, the dynamic control method in the circuit adopts the idea of a state machine.

Further, to provide a preferred implementation manner, the method for determining the cut-off voltage is:

By formula:

V_max表示峰值电压，D表示负载突变设置占空比，V_desire表示期望电压值。where d represents the theoretical duty cycle,

V _max represents the peak voltage, D represents the duty cycle of the load mutation setting, and V _desire represents the expected voltage value.

Based on the same inventive concept, the present invention also provides an SC-Buck converter dynamic response control device based on capacitor charge balance, said device comprising:

Module 1: used to collect the output voltage of the circuit as the collected data;

Module 2: for filtering the collected data;

Module 3: It is used to judge whether the filtered data has a load mutation or not. If a load sudden increase occurs, the function of module 4 will be executed, and if the load suddenly decreases, the function of module 5 will be executed;

Module 4: used to set the driving signal sent to the circuit to high, set the driving signal low when the shutdown voltage is detected, and restore the driving signal when the load sudden increase disappears;

Module 5: used to set the driving signal sent to the circuit to low, set the driving signal high when the shutdown voltage is detected, and restore the driving signal when the sudden load drop disappears.

Based on the same inventive concept, the present invention also provides a dynamic response control system of an SC-Buck converter based on capacitor charge balance, including an SC-Buck circuit, and the system also includes:

An output voltage acquisition component, a load change acquisition component and a processing unit;

The output voltage collection component is used to collect the output voltage in the circuit;

The load change collection component is used to collect the load voltage in the circuit;

The processing unit is configured to execute the method for controlling the dynamic response of the SC-Buck converter based on capacitor charge balance.

Based on the same inventive concept, the present invention also provides a computer storage medium for storing a computer program. When the processor of the computer processes the computer program stored in the storage medium, the computer executes the SC based on capacitance charge balance. -Buck converter dynamic response control method.

Based on the same inventive concept, the present invention also provides a computer, including a processor and a storage medium, characterized in that, when the processor processes the computer program stored in the storage medium, the computer executes the Balanced SC-Buck converter dynamic response control method.

The benefits of the present invention are:

The dynamic response control method of the SC-Buck converter based on the capacitance charge balance provided by the present invention has simple control, is suitable for a large current output scene, and has high stability before the anti-interference ability of the simulation software.

The SC-Buck converter dynamic response control method based on capacitor charge balance provided by the present invention breaks through the limitation that the duty ratio of the SC-Buck converter does not exceed 0.5, and provides a larger current change rate when the load changes suddenly to meet the load Dynamically respond to requirements.

The SC-Buck converter dynamic response control method based on capacitor charge balance provided by the present invention applies the capacitor charge balance control algorithm to the SC-Buck converter for the first time, and calculates the current and voltage changes in each process of load mutation, and deduces Switching voltage at sudden load changes.

The SC-Buck converter dynamic response control method based on capacitor charge balance provided by the present invention requires less control information, simple circuit design, and only needs to collect the output voltage, and the optimal control can be realized by controlling the precise turn-on and turn-off of the switch tube. Dynamic Response.

The SC-Buck converter dynamic response control method based on capacitor charge balance provided by the present invention adopts the FPGA+high-speed ADC control scheme, which greatly shortens the sampling time, improves the sampling accuracy, shortens the execution time of the control program, and realizes faster dynamic response. Responsive control, using the idea of state machine control, improves the robustness of the control system and simplifies the control program.

The SC-Buck converter dynamic response control method based on capacitor charge balance provided by the present invention can be applied to the scene of multi-module parallel output, greatly improves the current output capability of the converter, and is suitable for high-power application scenarios.

It is suitable for improving the dynamic response of the point-of-load power supply and meeting the power supply requirements of CPU and other electrical equipment.

Description of drawings

Fig. 1 is the schematic diagram of the multi-channel interleaved parallel Buck converter mentioned in the background technology;

Fig. 2 is the schematic diagram of the improved COT control Buck converter mentioned in the background technology;

3 is a schematic diagram of the two-phase drive signal and the inductor current waveform mentioned in Embodiment 1;

FIG. 4 is a schematic diagram of the capacitor charge charge and discharge balance curve when the load suddenly increases mentioned in the first embodiment;

5 is a flow chart of the SC-Buck converter dynamic response control method based on capacitor charge balance mentioned in Embodiment 1;

FIG. 6 is a schematic diagram of a dynamic control state machine model mentioned in Embodiment 1;

FIG. 7 is a schematic diagram of a load surge control signal waveform mentioned in Embodiment 1;

FIG. 8 is a schematic diagram of the waveform of the sudden load reduction control signal mentioned in the first embodiment;

Fig. 9 is a schematic diagram of the main body of the 48V-1V test prototype mentioned in Embodiment 11;

FIG. 10 is a schematic diagram of the 50A-150A switching output voltage waveform mentioned in Embodiment 11;

Fig. 11 is a detailed waveform diagram of the 50A-150A switching output voltage mentioned in the eleventh embodiment;

FIG. 12 is a detailed waveform diagram of the 150A-50A switching output voltage mentioned in the eleventh embodiment.

Detailed ways

In order to make the advantages and benefits of the technical solution provided by the present invention more concrete, the technical solution provided by the present invention will now be described in further detail in conjunction with the accompanying drawings, specifically:

Embodiment 1. This embodiment is described in conjunction with FIGS. 3-8. This embodiment provides a method for controlling the dynamic response of an SC-Buck converter based on capacitor charge balance. The method includes:

Step 1: Collect the output voltage of the circuit as the collected data;

Step 2: filtering the collected data;

Step 3: Determine whether the filtered data has a sudden load change or not. If a sudden load increase occurs, perform step 4. If a sudden load decrease occurs, perform step 5;

Step 4: Set the driving signal sent to the circuit to high, set the driving signal low when the shutdown voltage is detected, and restore the driving signal when the load sudden increase disappears;

Step 5: Set the driving signal sent to the circuit to low, set the driving signal high when the shutdown voltage is detected, and restore the driving signal when the sudden load drop disappears.

specific:

In order to improve the dynamic response of the converter, this embodiment proposes a digital control algorithm based on capacitor charge balance, which breaks through the limitation that the duty cycle of the SC-Buck converter cannot exceed 0.5, and systematically analyzes its working principle and implementation method.

Compared with the traditional Buck converter, the SC-Buck converter has a higher step-down ratio. Usually, in order to maintain the charge balance of the intermediate capacitor, the duty cycle of the SC-Buck converter is set to no more than 0.5, which limits The rate of change of current in the converter. In order to improve the dynamic response, this design breaks the limit of the duty cycle when the load changes suddenly, deduces the current change rate under different duty cycles, and finally sets the full duty cycle when the load suddenly increases, that is, the driving signal is pulled high; Setting the zero duty cycle when the time is reduced, that is, pulling the driving signal low, greatly improves the current change rate of the converter and can meet higher load mutation requirements. And due to the self-sharing characteristics of the SC-Buck converter, the intermediate capacitor will quickly return to the steady state after the load mutation adjustment is completed, without affecting the normal operation of the converter.

When the duty ratio D>0.5, the SC-Buck converter two-phase drive signal and inductor current waveform are shown in Figure 3;

Assuming that the series capacitance is large enough, and the voltage of the series capacitance remains unchanged during the transient process, the average change slopes m ₁ and m ₂ of the two-phase inductor current in one cycle are:

Among them, V _IN is the input voltage, Vo is the output voltage, and D is the duty cycle set by the load mutation.

When the duty ratio D=0, the average change slopes m ₁ and m ₂ of the two-phase inductor current in one cycle are:

Where V _O is the output voltage, L is the two-phase inductance value of the converter

On this basis, a time-optimized control based on capacitive charge balance is proposed. Utilize the charge and discharge balance of the output capacitor to reasonably allocate the high and low level time of the driving signal to achieve the minimum voltage ripple and the shortest adjustment time. Taking the load sudden increase as an example, the whole process is divided into three stages. By analyzing the capacitor charging and discharging process, the turn-off voltage when the load suddenly increases can be calculated. Similarly, the turn-on voltage when the load suddenly decreases can be obtained. By controlling the switch tube to turn on accurately Shutdown allows for optimal dynamic response.

Figure 4 shows the change curves of the sum of the inductor current I _L , the capacitor current I _C , and the output voltage V _O of the two-phase series capacitor Buck converter when the load current increases from I _o1 to I _o2 . V _mid represents the minimum output voltage when the load suddenly increases, and V _SW represents the switch off voltage.

Neglecting the influence of the output voltage change on the slope of the inductor current change during the load mutation process, the influence of the capacitor ESR on the capacitor discharge process, the line loss, and the inductor resistance, the on-resistance of the switch tube can be analyzed to obtain the following three processes:

1. T ₀ (t ₀ <t<t ₁ )

At time t ₀ , the digital controller enters the all-through stage after detecting a sudden load increase, and the inductor current gradually increases. In this process, I _L <I _LO2 , the output capacitor is discharged, and the output voltage keeps decreasing. At time t ₁ , I _L = I _LO2 , the capacitor voltage reaches the minimum, during this process

I _L ＝I _L1 +I _L2 ＝I _O1 +(m ₁ +m ₂ )(tt ₀ ) (4-6)

I _O2 ＝I _O1 +(m ₁ +m ₂ )(t ₁ -t ₀ ) (4-7)

I _C ＝I _L -I _O2 ＝(m ₁ +m ₂ )(tt ₁ ) (4-8)

Where I _L1 is the inductor current of phase A, I _L2 is the inductor current of phase B, I _L is the total output current, I _O1 is the load current before the sudden change, I _O2 is the load current after the sudden change, I _C is the current flowing into the output capacitor, V _desire is the expected output voltage value, V _min is the valley voltage, V _IN is the input voltage, Vo is the output voltage, and D is the duty cycle of the load mutation setting.

2. T ₁ (t ₁ <t<t ₂ )

Among them, V _C is the voltage value of the output capacitor, V _min is the valley voltage, and V _SW is the cut-off point voltage.

3. T ₂ (t ₂ <t<t ₃ )

I _L1 =I _O21 +m ₃ (t ₃ -t) (4-14)

I _L2 =I _O22 +m ₃ (t ₃ -t) (4-15)

I _O21 +I _O22 ＝I _O2 (4-16)

I _C (t)＝I _L1 +I _L2 -I _O2 ＝2m ₃ (t ₃ -t) (4-17)

According to the charge and discharge balance process of the capacitor, (m ₁ +m ₂ )T ₁ =2m ₃ T ₂ can be calculated to obtain the cut-off voltage:

In the same way, it can be calculated that the cut-off voltage when the load drops suddenly is:

Among them, V _max is the peak voltage and V _SW is the turn-on point voltage.

In terms of implementation, the FPGA is used with a high-speed ADC with a sampling rate of 100Msps, and the collected data is processed by an algorithm. The specific implementation block diagram and the change of the driving signal are shown in Figure 5. The collected data is filtered, and the threshold detection method is used to judge whether the load mutation occurs. Taking the load sudden increase as an example, when the filtered output voltage data exceeds the set threshold, it is determined to enter the load sudden increase state, and at the same time, the drive signal is set high (Q _1a and Q _1b are turned on, Q _2a and Q _2b are turned off), and the inductor As the current rises, the output voltage continues to drop because the inductor current is smaller than the load current. When the inductor current is equal to the load current, the output voltage drops to the lowest point. Record the voltage valley at this time and calculate the cut-off voltage value according to formula (4-22) , when the shutdown voltage is detected, the drive signal is set low (Q _1a , Q _1b are off, Q _2a , Q _2b are on), because the inductor current is greater than the load current, the output voltage continues to rise, when the output voltage rises into the threshold range After switching to PI to adjust the output to be stable, when the output voltage returns to the expected value, set a fixed duty cycle according to the result of PI calculation to reduce load fluctuations. The control algorithm is the same when the load drops suddenly. Dynamic control adopts the idea of state machine in program design, as shown in Figure 6, which greatly improves the robustness of the control program and is easier to implement.

Wherein, the waveform of the sudden load increase control signal is shown in FIG. 7 , and the waveform of the sudden load decrease control signal is shown in FIG. 8 .

Embodiment 2. This embodiment is a further limitation of the SC-Buck converter dynamic response control method based on capacitor charge balance provided in Embodiment 1. In the step 3, the method of judging the data is: through threshold detection method.

Embodiment 3. This embodiment is a further limitation of the method for controlling the dynamic response of the SC-Buck converter based on capacitor charge balance provided in Embodiment 2. The threshold in the threshold detection is a preset threshold.

Embodiment 4. This embodiment is a further limitation of the SC-Buck converter dynamic response control method based on capacitor charge balance provided in Embodiment 1. The method for judging the sudden increase and decrease of the load is: through threshold detection method.

Embodiment 5. This embodiment is a further limitation of the method for controlling the dynamic response of the SC-Buck converter based on capacitor charge balance provided in Embodiment 1. The dynamic control method in the circuit adopts the idea of a state machine.

Embodiment 6. This embodiment is a further limitation of the SC-Buck converter dynamic response control method based on capacitor charge balance provided in Embodiment 1. The method for determining the shutdown voltage is:

By formula:

V_max表示峰值电压，D表示负载突变设置占空比，V_desire表示期望电压值。where d represents the theoretical duty cycle,

V _max represents the peak voltage, D represents the duty cycle of the load mutation setting, and V _desire represents the expected voltage value.

Embodiment 7. This embodiment provides a dynamic response control device for an SC-Buck converter based on capacitor charge balance, and the device includes:

Module 1: used to collect the output voltage of the circuit as the collected data;

Module 2: for filtering the collected data;

Module 3: It is used to judge whether the filtered data has a load mutation or not. If a load sudden increase occurs, the function of module 4 will be executed, and if the load suddenly decreases, the function of module 5 will be executed;

Module 4: used to set the driving signal sent to the circuit to high, set the driving signal low when the shutdown voltage is detected, and restore the driving signal when the load sudden increase disappears;

Module 5: used to set the driving signal sent to the circuit to low, set the driving signal high when the shutdown voltage is detected, and restore the driving signal when the sudden load drop disappears.

Embodiment 8. This embodiment provides a dynamic response control system for an SC-Buck converter based on capacitor charge balance, including an SC-Buck circuit. The system also includes:

An output voltage acquisition component, a load change acquisition component and a processing unit;

The output voltage collection component is used to collect the output voltage in the circuit;

The load change collection component is used to collect the load voltage in the circuit;

The processing unit is used to execute the dynamic response control method of the SC-Buck converter based on capacitor charge balance provided by any one of Embodiments 1 to 6.

Embodiment 9. Based on the same inventive concept, the present invention also provides a computer storage medium for storing computer programs. When the processor of a computer processes the computer program stored in the storage medium, the computer executes The dynamic response control method of the SC-Buck converter based on capacitor charge balance provided by any one of Embodiments 1 to 6.

Embodiment 10. Based on the same inventive concept, the present invention also provides a computer, including a processor and a storage medium. It is characterized in that, when the processor processes the computer program stored in the storage medium, the The computer executes the dynamic response control method of the SC-Buck converter based on capacitor charge balance provided by any one of Embodiments 1 to 6.

Embodiment 11. This embodiment will be described with reference to Figures 9-12. This embodiment is to provide a specific implementation of the SC-Buck converter dynamic response control method based on capacitor charge balance provided by Embodiment 1, and it is also used to explain Embodiments 1 to 6 above, specifically:

Build a 48-1V, 200W output test prototype as shown in Figure 9. The load jumps between 50A-150A at intervals of 5ms, and the load change rate is 100A/us. Record the output voltage when the load changes suddenly, as shown in Figure 10-12. It can be seen that the output voltage drop is only 128mV when the load suddenly increases, and the output voltage overshoot is only 134mV when the load suddenly decreases. However, under no control or traditional control, When the load changes suddenly, the output voltage drops and overshoots more than 300mV. Observing the detailed waveform of the voltage when the load changes suddenly, it can be seen that the control signal is obviously set when the load changes suddenly, and the control algorithm is well implemented, and the correctness of the control theory is verified.

Claims (10)

1. based on the SC-Buck converter dynamic response control method of capacitance charge balance, it is characterized in that, described method comprises: Step 1: Collect the output voltage of the circuit as the collected data; Step 2: filtering the collected data; Step 3: Determine whether the filtered data has a sudden load change or not. If a sudden load increase occurs, perform step 4. If a sudden load decrease occurs, perform step 5; Step 4: Set the driving signal sent to the circuit to high, set the driving signal low when the shutdown voltage is detected, and restore the driving signal when the load sudden increase disappears; Step 5: Set the driving signal sent to the circuit to low, set the driving signal high when the shutdown voltage is detected, and restore the driving signal when the sudden load drop disappears. 2. The dynamic response control method of the SC-Buck converter based on capacitor charge balance according to claim 1, characterized in that, in the step 3, the method of judging the data is: through the method of threshold value detection. 3. The SC-Buck converter dynamic response control method based on capacitor charge balance according to claim 2, characterized in that, the threshold in the threshold detection is a preset threshold. 4. The dynamic response control method of the SC-Buck converter based on capacitor charge balance according to claim 1, wherein the method for judging the sudden load increase and sudden load decrease is: a method of detecting through a threshold. 5. the SC-Buck converter dynamic response control method based on capacitor charge balance according to claim 1, is characterized in that, the dynamic control method in the circuit adopts state machine idea. 6. the SC-Buck converter dynamic response control method based on capacitor charge balance according to claim 1, is characterized in that, the determination method of described cut-off voltage is: By formula:

where d represents the theoretical duty cycle,

V _max represents the peak voltage, D represents the duty cycle of the load mutation setting, and V _desire represents the expected voltage value. 7. The SC-Buck converter dynamic response control device based on capacitance charge balance, is characterized in that, described device comprises: Module 1: used to collect the output voltage of the circuit as the collected data; Module 2: for filtering the collected data; Module 3: It is used to judge whether the filtered data has a load mutation or not. If a load sudden increase occurs, the function of module 4 will be executed, and if the load suddenly decreases, the function of module 5 will be executed; Module 4: used to set the driving signal sent to the circuit to high, set the driving signal low when the shutdown voltage is detected, and restore the driving signal when the load sudden increase disappears; Module 5: used to set the driving signal sent to the circuit to low, set the driving signal high when the shutdown voltage is detected, and restore the driving signal when the sudden load drop disappears. 8. The SC-Buck converter dynamic response control system based on capacitor charge balance, comprising SC-Buck circuit, is characterized in that, described system also comprises: An output voltage acquisition component, a load change acquisition component and a processing unit; The output voltage collection component is used to collect the output voltage in the circuit; The load change collection component is used to collect the load voltage in the circuit; The processing unit is configured to execute the method for controlling the dynamic response of the SC-Buck converter based on capacitor charge balance according to any one of claims 1-6. 9. Computer storage medium, for storing computer program, it is characterized in that, when the processor of computer processes the computer program stored in described storage medium, described computer executes the described capacitance-based Dynamic response control method of SC-Buck converter with charge balance. 10. A computer, comprising a processor and a storage medium, characterized in that, when the processor processes the computer program stored in the storage medium, the computer executes the method according to any one of claims 1-6 based on capacitive charge Balanced SC-Buck converter dynamic response control method.

Images