CN115882967A - A Frequency Mask Trigger Device Based on MonoFFT - Google Patents

Abstract

The invention discloses a frequency template trigger device based on MonoFFT, which controls the rotation factor of the MonoFFT and the quantization digit of input data through user adjustable parameters, controls the accuracy of the MonoFFT according to the complexity of the input signal of a user, ensures the effective utilization of resources, can control the on-off enabling of a frequency template trigger module, stops the MonoFFT module at unnecessary moment to save the power consumption of a system, has very good expansibility and flexibility, and can adapt to the increasing trend of processing various digital signals.

Description

A frequency template trigger device based on MonoFFT

Technical Field

The invention belongs to the technical field of digital signal processing, and more specifically, relates to a frequency template triggering device based on MonoFFT.

Background Art

As modern RF signals become increasingly complex, it becomes very important to detect and characterize RF signals at different intensities, durations, and environments.

The emergence of the frequency mask trigger (FMT) function has solved the problem very well. When debugging RF circuits, FMT is essential for finding short-duration or time-varying signals. With the frequency mask trigger, users can perform related trigger measurements based on unique event patterns in the spectrum. Due to the high dynamic range of FMT, users can trigger on weak transient signals while ignoring strong signals. A simple level-based trigger will not capture weak signal pulses. In general, FMT can reliably capture complex RF signals or frequency anomalies missed by traditional analyzers, and detect occasional signals, existing intermodulation products, and transient spectrum problems.

A multi-domain joint trigger device proposed in Chinese patent CN201910309530.7 uses a frequency template to trigger the extraction of the corresponding data segment, and then judges the trigger condition of the data segment in the order of energy and time, thereby improving the stability and observation effect of the multi-domain analysis of the signal. In the mobile communication system burst signal test method disclosed in Chinese patent CN200410088406.6, a frequency template is set in the tester in advance, and the frequency point is set to the frequency of the subcarrier in the time division synchronous code division multiple access TD-SCDMA mobile communication system. When the signal power received by the tester on the subcarrier frequency reaches the preset power value of the frequency template, a trigger signal is generated, thereby triggering the capture process of the tester. Chinese patent CN201810175940.2 discloses a spectrum analysis system for abnormal signals, the frequency template includes a normal area and an abnormal area, and the abnormal signal is the waveform point that enters the abnormal area of the frequency template.

However, in the above-mentioned frequency template trigger device, there are usually many performance limitations such as slow operation speed when using traditional Fourier transform for spectrum analysis. In this study, the MonoFFT algorithm was used to replace the traditional FFT frequency measurement technology when designing the frequency template trigger function, which can not only improve the operation speed, but also effectively measure the frequency and phase information of the signal. Its specific performance is equivalent to that of the standard FFT.

Summary of the invention

The purpose of the present invention is to overcome the shortcomings of the prior art and provide a frequency template trigger device based on MonoFFT. The MonoFFT method is used to measure the frequency domain signal of the data and generate a trigger, which can improve the operation speed, reduce the delay time, and reduce resource consumption. It is particularly suitable for triggering large-point FFT transformations.

To achieve the above-mentioned object of the invention, the present invention provides a frequency template trigger device based on MonoFFT, characterized in that it comprises: a down-conversion module DDC, a data storage module DDR3, a frequency template trigger decision module, a block random access memory BLOCK RAM and a digital signal processing module DSP;

The DDC is used to receive an input RF signal and perform down-conversion processing on the RF signal to obtain I and Q baseband signals;

The DDR3 is used to cache I and Q baseband signals, receive the trigger signal generated by the frequency template trigger decision template and record the trigger address, and then read the cached data in the DDR3 according to the trigger address and transmit it to the BLOCK RAM as trigger data;

The frequency template trigger decision module includes FIFO, a configurable Fourier transformer MonoFFT, a modulus operator, a threshold RAM, a comparator and a frequency domain trigger control module;

Among them, MonoFFT is initialized first, and the rotation factor and quantization bit number are sent to MonoFFT through the host computer. At the same time, the host computer presets the threshold to the frequency domain trigger control module, and the frequency domain control module controls the reading and writing of the threshold RAM, thereby generating a threshold signal and sending it to the comparator;

FIFO is used to cache I and Q baseband signals in real time. The capacity of FIFO needs to be greater than 4 N-point data pairs. When the number of data in FIFO is greater than N, the host computer enables the frequency domain trigger control module to run, so that the frequency domain trigger control module enables MonoFFT to read N I and Q data pairs from FIFO for fast Fourier transform, and then send the transformation result to the modulus operator for approximate modulus calculation, and then send the calculated result to the comparator for comparison with the threshold generated by the frequency domain trigger control module. If the result of the modulus operation is greater than the threshold, a trigger signal is generated and sent to the DDR3 module, and the current DDR3 trigger address is recorded, otherwise the above operation is continued until the trigger signal is found;

The BLOCK RAM is used to transmit the trigger data to the DSP in frames;

The DSP is used to receive trigger data and perform subsequent digital signal processing.

The object of the invention of the present invention is achieved in this way:

The present invention discloses a frequency template trigger device based on MonoFFT. The device controls the rotation factor of MonoFFT and the number of quantization bits of input data through user adjustable parameters, controls the precision of MonoFFT according to the complexity of the user input signal, ensures the effective use of resources, and can also perform switch enabling control on the frequency template trigger module, stops the MonoFFT module when it is not needed to save system power consumption. The device has very good scalability and flexibility, and can adapt to the growing trend of processing diversified digital signals today.

At the same time, the frequency template triggering device based on MonoFFT of the present invention also has the following beneficial effects:

(1) DDR3 and FIFO are used in parallel for data storage, which can perform real-time synchronous FFT transformation while seamlessly collecting data, and will not cause data loss even in the fastest data conditions;

(2) In the past, frequency template trigger devices used traditional Fourier transform to perform spectrum analysis, which usually had many performance limitations such as slow operation speed. When designing the frequency template trigger function, the present invention uses the MonoFFT algorithm to replace the traditional FFT frequency measurement technology, which can not only improve the operation speed, but also effectively measure the frequency and phase information of the signal. Its specific performance is equivalent to that of the standard FFT.

(3) The hardware of the present invention adopts a method of approximate calculation of the modulus value of complex signals. Compared with the standard modulus value calculation, it can greatly reduce the use of hardware resources while ensuring accuracy.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of a frequency template trigger device based on MonoFFT according to the present invention;

FIG2 is a schematic diagram of a frequency template trigger decision module;

FIG3 is a schematic diagram of a rotation factor matrix on a frequency circle;

Fig. 4 is a schematic diagram of an input signal;

FIG5 is a schematic diagram of an input signal after single-bit quantization;

FIG6 is a spectrum diagram of the input signal after single-bit quantization plotted after FFT transformation;

FIG. 7 is a spectrum diagram of the input signal after single-bit quantization and MonoFFT transformation.

DETAILED DESCRIPTION

The specific implementation of the present invention is described below in conjunction with the accompanying drawings so that those skilled in the art can better understand the present invention. It should be noted that in the following description, when the detailed description of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

Example

FIG1 is a schematic diagram of a frequency template trigger device based on MonoFFT according to the present invention.

In this embodiment, as shown in FIG. 1 , a frequency template trigger device based on MonoFFT of the present invention comprises: a down-conversion module DDC, a data storage module DDR3, a frequency template trigger decision module, a block random access memory BLOCK RAM and a digital signal processing module DSP;

DDC is used to receive the input RF signal and down-convert the RF signal to obtain I and Q baseband signals;

DDR3 is used to cache I and Q baseband signals, receive the trigger signal generated by the frequency template trigger decision template and record the trigger address, and then read the cached data in DDR3 according to the trigger address and transmit it to BLOCKRAM as trigger data; in this way, I and Q baseband signals are seamlessly collected in DDR3 to avoid data loss;

As shown in FIG2 , the frequency template trigger decision module includes a FIFO, a configurable Fourier transformer MonoFFT, a modulus operator, a threshold RAM, a comparator, and a frequency domain trigger control module;

Among them, MonoFFT is initialized first, and the rotation factor and quantization bit number are sent to MonoFFT through the host computer. At the same time, the host computer presets the threshold to the frequency domain trigger control module, and the frequency domain control module controls the reading and writing of the threshold RAM, thereby generating a threshold signal and sending it to the comparator;

FIFO is used to cache I and Q baseband signals in real time. The capacity of FIFO needs to be greater than 4 N-point data pairs. When the number of data in FIFO is greater than N, the host computer enables the frequency domain trigger control module to run, so that the frequency domain trigger control module enables MonoFFT to read N I and Q data pairs from FIFO for fast Fourier transform. For example, assuming that the DFT operation of signal x(n) with N points can be expressed as:

Among them, the multiplication of the rotation factor W = e ^-j2 π ^kn/N and the signal x(n) is the main source of computational complexity. Under 1-bit quantization, x(n) has only two forms: 0 and 1, while the rotation factor W = e ^-j2 π ^kn/N is a floating point value with N options. When the value of N is large, a large number of complex multiplication operations will occur, requiring high processing resources. In the actual engineering implementation process, in order to minimize the complexity of multiplication operations and reduce processing resources, the number of rotation factors needs to be simplified as much as possible.

In this embodiment, MonoFFT is to quantize the rotation factor matrix W, and the specific process is as follows:

对应在频率圆周上进行简化，如图3所示，以4point为例：当把旋转因子矩阵W量化成4个不同取值，旋转因子只有±1和±j的情况，运算过程只需要进行加减运算，对资源的需求大大降低。In the above formula, the rotation factor matrix

The corresponding simplification is performed on the frequency circle, as shown in Figure 3. Taking 4point as an example: when the rotation factor matrix W is quantized into 4 different values, the rotation factors are only ±1 and ±j. The calculation process only requires addition and subtraction operations, which greatly reduces the demand for resources.

Through theoretical analysis and calculation, the MonoFFT method is used to measure the frequency domain signal of low-bit data, which has the same performance as the standard FFT in terms of frequency measurement accuracy, phase measurement accuracy and amplitude distortion. The main difference between the two algorithms is that MonoFFT can achieve the minimum delay time and reduce resource consumption, especially for FFT transformations with large points.

Then we send the transformation result to the modulo operator for approximate modulo calculation, and then send the calculated result to the comparator for comparison with the threshold generated by the frequency domain trigger control module. If we need to observe the waveform information of the frequency greater than the amplitude we give, we will compare the result of the modulo operator with the threshold. If it is greater than the threshold, a trigger signal is generated and sent to the DDR3 module, and the current DDR3 trigger address is recorded. Otherwise, continue to perform the above operations until the trigger signal is found.

The BLOCK RAM is used to transmit the trigger data to the DSP in frames;

The DSP is used to receive trigger data and perform subsequent digital signal processing.

Assume that the input frequency is a 30 Hz sinusoidal signal: x(n) = sin(2π*30t). The signal is first quantized by single bit. The original signal and the quantized signal are shown in FIG4 and FIG5. By comparing FIG4 and FIG5, it can be found that the frequency of the input original signal and the quantized signal are basically the same.

Next, we continue to perform N=1024-point MonoFFT transformation on the above single-bit quantized signal, and plot the spectrum diagrams after FFT transformation and MonoFFT transformation of the quantized signal respectively. The results are shown in Figures 6 and 7 respectively. By comparing Figures 6 and 7, it can be found that the spectrum composition and amplitude information of the original signal and the quantized signal are basically consistent. Although the MonoFFT algorithm will introduce errors, under the condition of appropriate signal-to-noise ratio, the processed data is sufficient to estimate the signal frequency.

Although the above describes the illustrative specific embodiments of the present invention to facilitate the understanding of the present invention by those skilled in the art, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

Claims (2)

1. A frequency template trigger device based on MonoFFT, characterized by comprising: a down-conversion module DDC, a data storage module DDR3, a frequency template trigger decision module, a block random access memory BLOCK RAM and a digital signal processing module DSP; The DDC is used to receive an input RF signal and perform down-conversion processing on the RF signal to obtain I and Q baseband signals; The DDR3 is used to cache I and Q baseband signals, receive the trigger signal generated by the frequency template trigger decision template and record the trigger address, and then read the cached data in the DDR3 according to the trigger address and transmit it to the BLOCKRAM as trigger data; The frequency template trigger decision module includes FIFO, a configurable Fourier transformer MonoFFT, a modulus operator, a threshold RAM, a comparator and a frequency domain trigger control module; Among them, MonoFFT is initialized first, and the rotation factor and quantization bit number are sent to MonoFFT through the host computer. At the same time, the host computer presets the threshold to the frequency domain trigger control module, and the frequency domain control module controls the reading and writing of the threshold RAM, thereby generating a threshold signal and sending it to the comparator; FIFO is used to cache I and Q baseband signals in real time. The capacity of FIFO needs to be greater than 4 N-point data pairs. When the number of data in FIFO is greater than N, the host computer enables the frequency domain trigger control module to run, so that the frequency domain trigger control module enables MonoFFT to read N I and Q data pairs from FIFO for fast Fourier transform, and then send the transformation result to the modulus operator for approximate modulus calculation, and then send the calculated result to the comparator for comparison with the threshold generated by the frequency domain trigger control module. If the result of the modulus operation is greater than the threshold, a trigger signal is generated and sent to the DDR3 module, and the current DDR3 trigger address is recorded, otherwise the above operation is continued until the trigger signal is found; The BLOCK RAM is used to transmit the trigger data to the DSP in frames; The DSP is used to receive trigger data and perform subsequent digital signal processing. 2. The frequency template triggering device based on MonoFFT according to claim 1, characterized in that, wherein the approximate modulus calculation method is: (1) Calculate the modulus of the I and Q baseband signals after fast Fourier transformation, denoted as |I|, |Q|; (2) Determine max{|I|, Q|}, min{|I|, |Q}; (3) Calculate M1 = 7/8max{|I|, Q|} + 1/2min{|I|, |Q}; (4) Find max{|I|, |Q|, |M1|} as the final result.

Images