CN115871338A - Heater device with memory unit and operation method thereof - Google Patents

Abstract

A heater device with a memory cell includes a first transistor, a second transistor, a memory cell and a heater. The first end of the second transistor is electrically connected with the first end of the first transistor. The memory unit is electrically connected to the second end of the first transistor. The heater is electrically connected to the second end of the second transistor.

Description

Heater device with memory unit and method of operation thereof

technical field

Embodiments of the present disclosure relate to a heater device, and in particular to a heater device with a memory unit and an operating method thereof.

Background technique

The known printer device uses a heater control circuit to heat the heater of the inkjet head, so that the inkjet head can eject the desired pattern. However, if the printer device needs to increase functions, such as memory blocks, it will increase signals, pins, circuit usage area, cost and so on. Therefore, there is a need for a new circuit structure design, which can improve the aforementioned problems.

Contents of the invention

An embodiment of the disclosure provides a heater device with a memory unit, including a first transistor, a second transistor, a memory unit, and a heater. The first end of the second transistor is electrically connected to the first end of the first transistor. The memory unit is electrically connected to the second terminal of the first transistor. The heater is electrically connected to the second terminal of the second transistor.

Embodiments of the present disclosure provide a method of operating a heater device having a memory unit. The heater device has a writing mode, a reading mode, and a heating mode. The heater device includes a plurality of heater circuits, and each heater circuit includes a first transistor and a second transistor, and is electrically connected to the first transistor and the second transistor respectively. Transistor memory cells and heaters. The above method includes the following steps. In the recording mode, at least one of the first transistors is selectively turned on according to the first signal, so that the first current generated by the voltage coupled to the two terminals of the first transistor passes through the memory unit. In the read mode, the first transistors are sequentially turned on to determine the state of the memory unit. In the heating mode, at least one of the second transistors is selectively turned on according to the second signal, so that the second current generated by the voltage coupled to the two terminals of the second transistor passes through the heater.

Description of drawings

In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

FIG. 1 is a schematic diagram of a heater device with a memory unit according to an embodiment of the disclosure.

FIG. 2 is a schematic diagram of a heater device with a memory unit according to an embodiment of the disclosure.

FIG. 3 is a schematic diagram of a heater device with a memory unit according to an embodiment of the disclosure.

FIG. 4 is a schematic diagram of a heater device with a memory unit according to an embodiment of the disclosure.

FIG. 5 is a flowchart of a method of operating a heater device with a memory unit according to an embodiment of the disclosure.

FIG. 6 is a flowchart of a method of operating a heater device with a memory unit according to another embodiment of the present disclosure.

Figures 1-6 are numbered as follows:

100, 200, 300, 400: heater unit with memory unit

110, 210, 310, 410_1～410_N: heater circuit

120: memory unit

130: Heater

140, 430: logic control circuit

420_1～420_N: selection switch

M1, M2, M3, M4, M5, M6: Transistors

V1, V2, V3, V4: reference voltage signal

SLS: Selection Signal

ADS: address signal

DS: data signal

S502～S506, S602～S606: steps

Detailed ways

In order to make the purpose, features or advantages of the present disclosure more comprehensible, the following specifically cites the embodiments, together with the accompanying drawings, for a detailed description. In order to make the readers understand easily and the drawings are concise, the several drawings in the present disclosure may only depict a part of the whole device, and the specific components in the drawings are not drawn according to the actual scale.

The specification of the disclosure provides different embodiments to illustrate the technical features of different implementations of the disclosure. Wherein, the configuration, quantity and size of each component in the embodiments are for illustration, not for limiting the present disclosure. In addition, if the numbering of components in the embodiment and the drawings is repeated, it is for the purpose of simplifying the description, and does not imply the correlation between different embodiments.

Furthermore, the ordinal numbers used in the specification and claims, such as "first", "second", etc., are used to modify the components of the claims, which themselves do not imply and represent that the claimed components have any previous The ordinal number does not represent the order of a requested component with another requested component, or the order of the manufacturing method. The use of multiple ordinal numbers is only used to enable a requested component with a certain name to be compared with another one with the same name. Request components make a clear distinction.

In the present disclosure, as long as the features of the various embodiments do not violate the spirit of the invention or conflict, they can be mixed and matched arbitrarily.

"Include" mentioned throughout the specification and claims is an open term, so it should be interpreted as "including but not limited to".

Furthermore, "connection" and "coupling" here include any direct and indirect connection means. Thus, when a component or film is referred to as being "connected to" another component or film, it can be directly connected to the other component or film or intervening components or films may be present therebetween. When a component is referred to as being "directly connected" to another component or layer, there are no intervening components or layers in between. If it is described in the text that a first device on the circuit is coupled to a second device, it means that the first device can be directly electrically connected to the second device. When the first device is directly electrically connected to the second device, the first device and the second device They are only connected through wires or passive components (such as resistors, capacitors, etc.), and no other electronic components are connected between the first device and the second device.

FIG. 1 is a schematic diagram of a heater device with a memory unit according to an embodiment of the disclosure. In this embodiment, the heater device 100 with a memory unit may be disposed on a silicon (Si) wafer (silicon (Si) wafer) substrate, a glass substrate or a polyimide (polyimide, PI) substrate, but the disclosure is not limited thereto. . Please refer to FIG. 1 , the heater device 100 with a memory unit includes a heater circuit 110 , and the heater circuit 110 may at least include a transistor M1 , a transistor M2 , a memory unit 120 and a heater 130 .

The first end of the transistor M2 and the first end of the transistor M1 are electrically connected to each other. The memory unit 120 can be electrically connected to the second terminal of the transistor M1. The heater 130 can be electrically connected to the second terminal of the transistor M2.

In this embodiment, the transistor M1 is, for example, an N-type transistor, but the disclosure is not limited thereto. The first terminal of the transistor M1 may be a gate terminal, and the second terminal of the transistor M1 (that is, the second terminal of the transistor M1 to which the memory unit 120 is electrically connected) may be a drain terminal. The third terminal may be a source terminal. In addition, the second terminal (such as the drain terminal) of the transistor M1 can receive the reference voltage signal V1 (such as a high voltage signal) through the memory unit 120, and the third terminal (such as the source terminal) of the transistor M1 can receive the reference voltage signal V2 (such as low voltage signal). In some embodiments, the transistor M1 may also be a P-type transistor.

In this embodiment, the transistor M1 and the transistor M2 may be transistors of the same doping type. That is to say, the transistor M2 is also an N-type transistor, for example, but the disclosure is not limited thereto. The first terminal of the transistor M2 may be a gate terminal, the second terminal of the transistor M2 (ie, the second terminal of the transistor M2 to which the heater 130 is electrically connected) may be a drain terminal, and the third terminal of the transistor M2 may be a source terminal. In addition, the second terminal (such as the drain terminal) of the transistor M2 can receive the reference voltage signal V3 (such as a high voltage signal) through the heater 130, and the third terminal (such as the source terminal) of the transistor M2 can receive the reference voltage signal V4 (such as low voltage signal). In some embodiments, the transistor M2 can also be a P-type transistor.

In some embodiments, the memory unit 120 is, for example, a fuse, but the disclosure is not limited thereto. When a current passes through the memory unit 120 , the heater circuit 110 can perform a recording operation, so as to burn out the memory unit 120 to present an open circuit. In addition, when there is no current passing through the memory unit 120 , the heater circuit 110 will not perform a writing operation, so that the memory unit 120 does not appear to be an open circuit. In addition, the material of the memory unit 120 is, for example, indium tin oxide (ITO), polysilicon (polysilicon), aluminum (Al), copper (Cu), nickel (Ni), molybdenum (Mo), indium zinc oxide (indium zinc oxide) , IZO), but the present disclosure is not limited thereto.

In some embodiments, the heater 130 may be a resistance or other suitable heating element, but the present disclosure is not limited thereto. When a current flows through the heater 130, the heater circuit 110 can perform a heating operation, so that the inkjet head corresponding to the position performs an inkjet operation (for example, ejects a desired pattern). When no current passes through the heater 130, the heater circuit 110 does not perform a heating operation.

In addition, the heater device 100 further includes a logic control circuit 140 . The logic control circuit 140 can be electrically connected to the first terminal of the transistor M1 and the first terminal of the transistor M2. In addition, the heater device 100 may further include a control circuit (not shown) and a power circuit (not shown). The control circuit can be electrically connected to the terminal of the reference voltage signal V1 and the logic control circuit 140 . The power circuit can be electrically connected to the control circuit with the terminal of the reference voltage signal V2, the terminal of the reference voltage signal V3, the terminal of the reference voltage signal V4, and the control circuit can control the power circuit so that the power circuit provides the reference voltage signal V2, the reference voltage Signal V3, reference voltage signal V4. In this embodiment, the control circuit is, for example, a microcontroller (microcontroller unit, MCU), and the power circuit is, for example, a power supply chip, but the disclosure is not limited thereto.

In this embodiment, the heater device 100 may include a writing mode, a reading mode and a heating mode, but the disclosure is not limited thereto. In the operation of the heater device 100, in the recording mode, the logic control circuit 140 may generate a first signal (such as a high voltage signal) to a first terminal (such as a gate terminal) of the transistor M1 to turn on the transistor M1, And the control circuit can provide the reference voltage signal V1 and control the power supply circuit to provide the reference voltage signal V2, so that the current generated by the voltage signal (such as the reference voltage signal V1 and the reference voltage signal V2) coupled to the two terminals of the transistor M1 passes through the memory unit 120 , to perform a recording operation on the memory unit 120 , for example, burn the memory unit 120 to present an open circuit. On the other hand, when the logic control circuit 140 does not generate the first signal (such as a high voltage signal) to the first terminal (such as the gate terminal) of the transistor M1, the transistor M1 will be turned off (turn off) and no current will flow through the memory unit. 120, the recording operation will not be performed on the memory unit 120 so that the memory unit 120 does not appear to be open.

In addition, in the recording mode, the control circuit can also selectively disconnect the voltage signal coupled to the two terminals of the transistor M2. That is to say, the control circuit can control the power supply circuit to stop providing the reference voltage signal V3 and the reference voltage signal V4 , so that no current flows through the heater 130 , so that the heater circuit 110 does not perform heating operation. In this way, the power consumption of the heater device 100 can be reduced.

Next, in the read mode, the logic control circuit 140 controls to turn on (or conduct) the transistor M1 so that the control circuit can determine the state of the memory unit 120 . That is to say, when the logic control circuit controls the transistor M1 to turn on, the control circuit can stop providing the reference voltage signal V1, and the control circuit can read the memory unit 120 through the terminal of the reference voltage signal V1, and based on the read result , judging whether the state of the memory unit 120 is an open circuit or not. In some embodiments, an open circuit is represented as "0", and a non-open circuit is represented as "1", for example, but the disclosure is not limited thereto. In another embodiment, an open circuit is represented as "1", and a non-open circuit is represented as "0", for example. Therefore, the reading result of the control circuit can be "0" or "1", and this reading result can be used as an identifier of the inkjet head of the printer device, preventing the printer device from being downgraded to old firmware or software, or as a product Parameter batch identification. In this way, the heater device 100 can have a memory function to increase the convenience of use.

In addition, in the read mode, the control circuit can also selectively disconnect the voltage signal coupled to the two terminals of the transistor M2. That is to say, the control circuit can control the power supply circuit to stop providing the reference voltage signal V3 and the reference voltage signal V4 , so that no current flows through the heater 130 , so that the heater circuit 110 does not perform heating operation. In this way, the power consumption of the heater device 100 can be reduced.

Afterwards, in the heating mode, the logic control circuit 140 can generate a second signal (such as a high voltage signal) to the first terminal (such as a gate terminal) of the transistor M2 to turn on the transistor M2, and the control circuit can control the power supply circuit to provide a reference voltage signal V3 and the reference voltage signal V4 make the current generated by the voltage signal (for example, the reference voltage signal V3 and the reference voltage signal V4 ) coupled to the two terminals of the transistor M2 pass through the heater 130 to make the heater circuit 110 perform a heating operation. On the other hand, when the logic control circuit 140 does not generate the second signal (such as a high voltage signal) to the first terminal (such as the gate terminal) of the transistor M2, the transistor M2 will be turned off and no current will pass through the heater 130, and the heating The heater circuit 110 will not perform a heating operation.

In addition, in the heating mode, the control circuit can also selectively disconnect the voltage signal coupled to the two terminals of the transistor M1. That is to say, the control circuit can stop providing the reference voltage signal V1 and control the power supply circuit to stop providing the reference voltage signal V2, so as to reduce the power consumption of the heater device 100 .

In this embodiment, the first end of the transistor M1 and the first end of the transistor M2 are electrically connected to each other and receive the same signal, but the disclosure is not limited thereto. In some embodiments, the first terminal of the transistor M1 and the first terminal of the transistor M2 can be separated and receive different signals, and the same effect of having a memory function can also be achieved.

FIG. 2 is a schematic diagram of a heater device with a memory unit according to an embodiment of the disclosure. Please refer to FIG. 2 , the heater device 200 with a memory unit includes a heater circuit 210 , and the heater circuit 210 may at least include a transistor M3 , a transistor M4 , a memory unit 120 and a heater 130 . In this embodiment, the memory unit 120 and the heater 130 are the same or similar to the memory unit 120 and the heater 130 in FIG. 1 , and reference may be made to the description of the embodiment in FIG. 1 , so details are not repeated here.

The first end of the transistor M4 and the first end of the transistor M3 are electrically connected to each other. The memory unit 120 can be electrically connected to the second terminal of the transistor M3. The heater 130 can be electrically connected to the second terminal of the transistor M4.

In this embodiment, the transistor M3 is, for example, a P-type transistor, but the disclosure is not limited thereto. The first terminal of the transistor M3 may be a gate terminal, the second terminal of the transistor M3 (ie, the second terminal of the transistor M3 electrically connected to the memory unit 120 ) may be a drain terminal, and the third terminal of the transistor M3 may be a source terminal. In addition, the second terminal (such as the drain terminal) of the transistor M3 can receive the reference voltage signal V2 (such as the low voltage signal) through the memory unit 120, and the third terminal (such as the source terminal) of the transistor M3 can receive the reference voltage signal V1 (such as the low voltage signal). high voltage signal). In some embodiments, the transistor M3 may also be an N-type transistor.

In this embodiment, the transistor M3 and the transistor M4 may be transistors of different doping types. That is to say, the transistor M4 is, for example, an N-type transistor, but the disclosure is not limited thereto. The first terminal of the transistor M4 may be a gate terminal, the second terminal of the transistor M4 (ie, the second terminal of the transistor M4 to which the heater 130 is electrically connected) may be a drain terminal, and the third terminal of the transistor M4 may be a source terminal. In addition, the second terminal (such as the drain terminal) of the transistor M4 can receive the reference voltage signal V3 (such as a high voltage signal) through the heater 130, and the third terminal (such as the source terminal) of the transistor M4 can receive the reference voltage signal V4 (such as low voltage signal). In some embodiments, the transistor M4 can also be a P-type transistor.

In addition, the heater device 200 further includes a logic control circuit 140 . The logic control circuit 140 can be electrically connected to the first terminal of the transistor M3 and the first terminal of the transistor M4. In addition, the logic control circuit 140 can control whether to provide the reference voltage signal V1, the reference voltage signal V2, the reference voltage signal V3, and the reference voltage signal V4. In this embodiment, the operation process of the heater device 200 is the same or similar to that of the heater device 100 , and reference may be made to the description of the embodiment in FIG. 1 , so details are not repeated here.

In this embodiment, the first end of the transistor M3 and the first end of the transistor M4 are electrically connected to each other and receive the same signal, but the disclosure is not limited thereto. In some embodiments, the first terminal of the transistor M3 and the first terminal of the transistor M4 can be separated and receive different signals, and the same effect of having a memory function can also be achieved.

FIG. 3 is a schematic diagram of a heater device with a memory unit according to an embodiment of the disclosure. Referring to FIG. 3 , the heater device 300 with a memory unit includes a heater circuit 310 , and the heater circuit 310 may at least include a transistor M5 , a transistor M6 , a memory unit 120 and a heater 130 . In this embodiment, the memory unit 120 and the heater 130 are the same or similar to the memory unit 120 and the heater 130 in FIG. 1 , and reference may be made to the description of the embodiment in FIG. 1 , so details are not repeated here.

The first end of the transistor M6 and the first end of the transistor M5 are electrically connected to each other. The memory unit 120 can be electrically connected to the second terminal of the transistor M5 and the third terminal of the transistor M6. The heater 130 can be electrically connected to the second terminal of the transistor M6.

In this embodiment, the transistor M5 is, for example, a P-type transistor, but the disclosure is not limited thereto. The first terminal of the transistor M5 may be a gate terminal, the second terminal of the transistor M5 (ie, the second terminal of the transistor M5 electrically connected to the memory unit 120 ) may be a drain terminal, and the third terminal of the transistor M5 may be a source terminal. In addition, the second terminal (for example, the drain terminal) of the transistor M5 can receive the reference voltage signal V4 (for example, a low voltage signal) through the memory unit 120, and the third terminal (for example, the source terminal) of the transistor M5 can receive the reference voltage signal V1 (for example, high voltage signal). In some embodiments, the transistor M5 can also be an N-type transistor.

In this embodiment, the transistor M5 and the transistor M6 may be transistors of different doping types. That is to say, the transistor M6 is, for example, an N-type transistor, but the disclosure is not limited thereto. The first terminal of the transistor M6 may be a gate terminal, the second terminal of the transistor M6 (ie, the second terminal of the transistor M6 to which the heater 130 is electrically connected) may be a drain terminal, and the third terminal of the transistor M6 may be a source terminal. In addition, the second terminal (such as the drain terminal) of the transistor M6 can receive the reference voltage signal V3 (such as a high voltage signal) through the heater 130, and the third terminal (such as the source terminal) of the transistor M6 can receive the reference voltage signal V4 (such as low voltage signal). In some embodiments, the transistor M6 can also be a P-type transistor.

In addition, the heater device 300 further includes a logic control circuit 140 . The logic control circuit 140 can be electrically connected to the first terminal of the transistor M5 and the first terminal of the transistor M6. In addition, the logic control circuit 140 can control whether to provide the reference voltage signal V1, the reference voltage signal V2, the reference voltage signal V3, and the reference voltage signal V4. In this embodiment, the operation process of the heater device 300 is the same or similar to that of the heater device 100 , and reference may be made to the description of the embodiment in FIG. 1 , so details are not repeated here.

In this embodiment, the first end of the transistor M5 and the first end of the transistor M6 are electrically connected to each other and receive the same signal, but the disclosure is not limited thereto. In some embodiments, the first terminal of the transistor M5 and the first terminal of the transistor M6 can be separated and receive different signals, and the same effect of having a memory function can also be achieved.

FIG. 4 is a schematic diagram of a heater device with a memory unit according to an embodiment of the disclosure. Referring to FIG. 4 , the heater device 400 with a memory unit includes a plurality of heater circuits 410_1 ˜ 410_N, a plurality of selection switches 420_1 ˜ 420_N, and an AND logic control circuit 430 , wherein N is a positive integer greater than 1. In some embodiments, the heater circuits 410_1˜410_N may be the heater circuit 110 of FIG. 1 , the heater circuit 210 of FIG. 2 , the heater circuit 310 of FIG. 3 or a combination thereof, but the disclosure is not limited thereto. In addition, the internal circuits of the heater circuits 410_1 - 410_N and their connections can refer to the description of the embodiment in FIG. 1 , FIG. 2 or FIG. 3 , so details are not repeated here.

The selection switches 420_1 - 420_N are electrically connected to the heater circuits 410_1 - 410_N, respectively. For example, the selection switch 420_1 is electrically connected to the heater circuit 410_1 , the selection switch 420_2 is electrically connected to the heater circuit 410_2 , . . . , and the selection switch 420_N is electrically connected to the heater circuit 410_N.

The logic control circuit 430 is electrically connected to the heater circuits 410_1 - 410_N through the selection switches 420_1 - 420_N. Further, the logic control circuit 430 can electrically connect the first end of the first transistor (such as the transistor M1 , the transistor M3 or the transistor M5 ) of the heater circuits 410_1 to 410_N and the second transistor (such as the transistor M2 , the transistor M4 or the transistor M6) first end. In addition, the control circuit of the heater device 400 may further include a control circuit (not shown) and a power circuit (not shown). The control circuit can be electrically connected to the terminal of the reference voltage signal V1 and the logic control circuit 430 . The power circuit can be electrically connected to the control circuit with the terminal of the reference voltage signal V2, the terminal of the reference voltage signal V3, the terminal of the reference voltage signal V4, and the control circuit can control the power circuit so that the power circuit provides the reference voltage signal V2, the reference voltage Signal V3, reference voltage signal V4. In addition, the logic control circuit 430 can receive the selection signal SLS, the address signal ADS and the data signal DS, and control the opening or closing of the selection switches 420_1˜420_N according to the selection signal SLS, the address signal ADS and the data signal DS, so as to control the heater 410_1 ~410_N to perform corresponding operations.

In FIG. 4 , the number of the selection signal SLS, the address signal ADS and the data signal DS is one, but the disclosure is not limited thereto. In some embodiments, the number of the selection signal SLS, the address signal ADS and the data signal DS may be multiple, and the number of the selection signal SLS, the address signal ADS and the data signal DS may increase or decrease according to the number of the heater circuits 410_1˜410_N. reduced, but the disclosure is not limited thereto. That is to say, when the number of the heater circuits 410_1 - 410_N increases, the number of the selection signal SLS, the address signal ADS and the data signal DS can increase correspondingly. When the number of the heater circuits 410_1 - 410_N is reduced, the number of the selection signal SLS, the address signal ADS and the data signal DS can be correspondingly reduced.

In this embodiment, the heater device 400 may include a recording mode, a reading mode and a heating mode, but the disclosure is not limited thereto. In the operation of the heater device 400, in the recording mode, the logic control circuit 430 can generate a first signal (such as a high voltage signal or a low voltage signal) to the heater circuit according to the selection signal SLS, the address signal ADS and the data signal DS. At least one of 410_1˜410_N is, for example, the heater circuit 410_1. Then, the first signal is provided to the first terminal (eg, gate terminal) of the first transistor (eg, transistor M1 , transistor M3 or transistor M5 ) of the heater circuit 410_1 to turn on the first transistor (eg, transistor M1 , transistor M5 ) of the heater circuit 410_1 . transistor M3 or transistor M5), and the control circuit can provide a reference voltage signal V1 and control the power supply circuit to provide a reference voltage signal V2 or a reference voltage signal V4, so that the first transistor coupled to the heater circuit 410_1 (such as transistor M1, transistor M3 or transistor M5) The current generated by the voltage signal (such as the reference voltage signal V1 and the reference voltage signal V2 or the reference voltage signal V1 and the reference voltage signal V4) at the two terminals of the transistor M5 passes through the memory unit 120 of the heater circuit 410_1 to The memory unit 120 of the heater circuit 410_1 performs a recording operation, for example, the memory unit 120 of the heater circuit 410_1 is burnt to present an open circuit. On the other hand, when the logic control circuit 430 does not generate the first signal (such as a high-voltage signal or a low-voltage signal) to the heater circuits 410_2-410_N, the first transistors (such as the transistor M1 and the transistor M3 of the heater circuits 410_2-410_N Or the transistor M5) will be turned off and no current will pass through the memory units 120 of the heater circuits 410_2˜410_N, and the memory units 120 of the heater circuits 410_2˜410_N will not be programmed and no open circuit will appear.

In addition, in the writing mode, the control circuit can also selectively disconnect the voltage signal coupled to the two terminals of the second transistors (such as transistor M2 and transistor M4 ) of the heater circuits 410_1˜410_N or the second transistor (such as A voltage signal coupled to one terminal of the transistor M6). That is to say, the control circuit can control the power supply circuit to stop providing the reference voltage signal V3 and the reference voltage signal V4 or the reference voltage signal V3 to reduce the power consumption of the heater device 400 .

Next, in the read mode, the logic control circuit 430 sequentially turns on the first transistors (such as the transistor M1, the transistor M3 or the transistor M5) of the heater circuits 410_1˜410_N, so that the control circuit determines the temperature of the heater circuits 410_1˜410_N. The state of memory unit 120 . That is to say, when the first transistors (such as transistor M1 , transistor M3 or transistor M5 ) of the heater circuits 410_1 ˜ 410_N are turned on, the control circuit can sequentially control the heater circuits 410_1 ˜ 410_N through the terminals of the reference voltage signal V1 . The memory units 120 of 410_N are read, and according to the read results, it is determined whether the states of the memory units 120 of the heater circuits 410_1 - 410_N are open or not. In this embodiment, the states of the memory units 120 of the heater circuit 410_1 are open, and the states of the memory units 120 of the heater circuits 420_2 - 420_N are not open. Therefore, the reading result of the control circuit is, for example, "01...1" or "10...0", and this reading result can be used as the identifier of the inkjet head of the printer device, preventing the printer device from being downgraded to the old firmware or software, or batch identification as product parameters. In this way, the heater device 400 can have a memory function to increase the convenience of use.

In addition, in the reading mode, the control circuit can also selectively disconnect the voltage signal coupled to the two terminals of the second transistors (such as the transistor M2 and the transistor M4 ) of the heater circuits 410_1˜410_N or the second transistor ( For example, a voltage signal coupled to one terminal of the transistor M6). That is to say, the control circuit can control the power supply circuit to stop providing the reference voltage signal V3 and the reference voltage signal V4 or the reference voltage signal V3 to reduce the power consumption of the heater device 400 .

Afterwards, in the heating mode, the logic control circuit 430 can generate a second signal (such as a high voltage signal) to at least one of the heater circuits 410_1˜410_N, such as a heater, according to the selection signal SLS, the address signal ADS and the data signal DS. Circuit 410_1. Then, the second signal is provided to the gate terminal of the second transistor (such as transistor M2, transistor M4 or transistor M6) of the heater circuit 410_1 to turn on the second transistor (such as transistor M2, transistor M4 or transistor M6) of the heater circuit 410_1. , and the control circuit controls the power supply circuit to provide the reference voltage signal V3 and the reference voltage V4, so that the voltage signal (such as the reference voltage The current generated by the signal V3 and the reference voltage signal V4) passes through the heater 130 of the heater circuit 410_1, so that the heater circuit 410_1 performs a heating operation. On the other hand, when the logic control circuit 430 does not generate the second signal (such as a high voltage signal) to the heater circuits 410_2 ˜ 410_N to the heater circuits 410_2 ˜ 410_N, the second transistors (such as the transistor M2 ) of the heater circuits 410_2 ˜ 410_N , transistor M4 or transistor M6) will be turned off and no current will flow through the heater 130 of the heater circuits 410_2-410_N, and the heater circuits 410_2-410_N will not perform heating operation.

In addition, in the heating mode, the control circuit can also selectively disconnect the voltage signal coupled to the two terminals of the first transistors (such as transistor M1 and transistor M3 ) of the heater circuits 410_1˜410_N or the first transistor (such as A voltage signal coupled to one terminal of the transistor M5). That is to say, the control circuit can stop providing the reference voltage signal V1 and control the power supply circuit to stop providing the reference voltage signal V2, so as to reduce the power consumption of the heater device 400 .

FIG. 5 is a flowchart of a method of operating a heater device with a memory unit according to an embodiment of the disclosure. In this embodiment, the heater device has a writing mode, a reading mode and a heating mode. The heater device includes a plurality of heater circuits, and each heater circuit includes a first transistor and a second transistor, and a memory unit and a heater electrically connected to the first transistor and the second transistor, respectively. In step S502 , in the recording mode, at least one of the plurality of first transistors is selectively turned on according to a first signal, so that a first current generated by a voltage coupled to two terminals of the first transistor passes through the memory unit.

In step S504, in the read mode, the first transistors are sequentially turned on to determine the state of the memory cell. In step S506 , in the heating mode, at least one of the second transistors is selectively turned on according to the second signal, so that a second current generated by the voltage coupled to the two terminals of the second transistor passes through the heater.

FIG. 6 is a flowchart of a method of operating a heater device with a memory unit according to an embodiment of the disclosure. In this embodiment, step S502, step S504, and step S506 are the same as or similar to step S502, step S504, and step S506 in FIG.

In step S602, in the writing mode, the voltage coupled to the two terminals of the second transistor is disconnected. In step S604, in the read mode, the voltage signal coupled to the two terminals of the second transistor is disconnected. In step S606, in the heating mode, the voltage signal coupled to the two terminals of the first transistor is disconnected.

In summary, the heater device with memory unit and the method for operating the heater device with memory unit according to the embodiments of the present disclosure are electrically connected to each other through the first terminal of the second transistor and the first terminal of the first transistor , the memory unit is electrically connected to the second terminal of the first transistor, and the heater is electrically connected to the second terminal of the second transistor. In addition, in the recording mode, the first transistor is turned on according to the first signal, so that the first current generated by the voltage signal coupled to the two terminals of the first transistor passes through the memory unit, and in the reading mode, the first transistor is turned on To determine the state of the memory unit, and in the heating mode, turn on the second transistor according to the second signal, so that the second current generated by the voltage signal coupled to the two terminals of the second transistor passes through the heater. In this way, the heater device can have a memory function, reduce the power consumption of the heater device, reduce the number of signals used, reduce the number of pins or reduce the area used by the circuit, so as to increase the convenience of use.

Although the present disclosure is disclosed above with the embodiments, it is not intended to limit the scope of the present disclosure. Anyone with ordinary knowledge in the technical field can use several different embodiments without departing from the spirit and scope of the present disclosure. The features can be replaced, rearranged, mixed or slightly adjusted, combined, changed and modified to complete other embodiments, so the protection scope of the present disclosure should be defined by the appended claims.

Claims (15)

1. A heater device with a memory unit, comprising: a first transistor; a second transistor, the first end of the second transistor is electrically connected to the first end of the first transistor; a memory cell electrically connected to a second terminal of the first transistor; and A heater is electrically connected to a second terminal of the second transistor. 2. The heater device with a memory unit as claimed in claim 1, wherein the first terminal of the first transistor is a gate terminal, and the first terminal of the second transistor is a gate terminal. 3. The heater device with a memory unit as claimed in claim 1, wherein the first transistor is an N-type transistor, and the second terminal of the first transistor electrically connected to the memory unit is a drain terminal. 4. The heater device with a memory unit as claimed in claim 3, wherein the drain terminal of the first transistor receives a high voltage signal through the memory unit, and a source terminal of the first transistor receives a low voltage signal. 5. The heater device with a memory unit as claimed in claim 1, wherein the first transistor is a P-type transistor, and the second terminal of the first transistor electrically connected to the memory unit is a drain terminal. 6. The heater device with a memory unit as claimed in claim 5, wherein the drain terminal of the first transistor receives a low voltage signal through the memory unit, and a source terminal of the first transistor receives a high voltage signal. 7. The heater device with a memory unit as claimed in claim 1, wherein the first transistor and the second transistor are transistors of the same doping type. 8. The heater device with a memory unit as claimed in claim 1, wherein the first transistor and the second transistor are transistors of different doping types. 9. The heater device with a memory unit as claimed in claim 1, wherein the memory unit is further electrically connected to a third terminal of the second transistor. 10. The heater device with a memory unit as claimed in claim 1, wherein the memory unit is a fuse. 11. The heater device with a memory unit as claimed in claim 1, further comprising a logic control circuit electrically connected to the first terminals of the first transistor and the second transistor. 12. A method of operating a heater device having a memory unit, the heater device having a recording mode, a reading mode and a heating mode, the heater device comprising a plurality of heater circuits, each heater circuit comprising A first transistor and a second transistor, and a memory unit and a heater respectively electrically connected to the first transistor and the second transistor, characterized in that the method includes: In the recording mode, at least one of the plurality of first transistors is selectively turned on according to a first signal, so that a first current generated by a voltage signal coupled to two terminals of the first transistor passes through the memory unit; In the read mode, sequentially turn on the plurality of first transistors to determine the states of the plurality of memory cells; and In the heating mode, at least one of the plurality of second transistors is selectively turned on according to a second signal, so that a second current generated by a voltage signal coupled to two terminals of the second transistor passes through the heating device. 13 . The method for operating a heater device with a memory unit as claimed in claim 12 , wherein in the recording mode, the voltage signal coupled to the two terminals of the plurality of second transistors is disconnected. 14 . 14. The method for operating a heater device with a memory unit as claimed in claim 12, wherein in the read mode, the voltage signal coupled to the two terminals of the plurality of second transistors is disconnected. 15. The method for operating a heater device with a memory unit as claimed in claim 12, wherein in the heating mode, the voltage signal coupled to the two terminals of the plurality of first transistors is disconnected.

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