CN115802537A - Adjustable optical drive circuit - Google Patents

Abstract

The present application provides a dimmable driving circuit, including: a pre-converter, coupled with an external power supply, and outputting a first voltage; a dimming drive module, coupled with the pre-converter and an external load, receiving the The first voltage, outputs the second voltage, and drives the external load to work; the first detection circuit, coupled with the previous stage converter, receives the first voltage, and outputs the first detection circuit representing the first voltage signal; a second detection circuit, coupled with the dimming drive module, receives the second voltage, and outputs a second detection signal representing the second voltage; a main control module, receives the first detection signal, the the second detection signal, output an adjustment signal, and send it to the front-end converter, the front-end converter adjusts the value of the first voltage, and the ratio of the second voltage to the first voltage is maintained at a preset set value. The dimmable driving circuit described in this application can minimize the frustration of the dimming process.

Description

Dimmable driver circuit

technical field

The present application relates to the technical field of integrated circuit design, in particular to a dimmable light driving circuit.

Background technique

In the past two years, the development of intelligent lighting has risen rapidly, during which the dimming function has been particularly sought after. Now, an excellent intelligent lighting will require its dimming drive circuit to have a silky dimming effect, so that the overall visual effect will be more comfortable and more in line with the optical requirements of the human eye; that is, the dimming effect requires No dithering during any brightness and dimming process, because the dithering of the light will give people a dangerous feeling. PWM chopper dimming is a very cost-effective dimming drive solution, which can achieve a dimming depth of one thousandth or even one ten thousandth deeper, thereby meeting various dimming needs.

However, the researchers noticed that if the change of the two PWM dimming signals before and after falls just in the discharge period of the inductor, the current of the inductor will not actually increase at this time, and the brightness of the lamp will not change. Please refer to Figure 1. In the figure below, the effective high level of the previous PWM dimming signal lasts to position a, and the effective high level of the latter PWM dimming signal lasts to position b, that is, two PWM dimmings before and after. The length of the effective high level of the signal changes from position a to position b, increasing the brightness of the lamp in theory; but because the changes of the two PWM dimming signals just fall on the discharge period of the inductor, as shown in the figure above As shown in the dotted line period (the operating frequency of the inductor is determined separately), at this time, the current of the inductor (also the current flowing through the lamp bead) will not increase, so the brightness of the lamp bead will not change. In this way, it is necessary to wait until the effective high level of the following PWM dimming signal falls on the charging period of the inductor. At this time, the current of the inductor will directly work according to the current corresponding to the following PWM dimming signal, that is, the current jumps and increases directly. , the brightness of the lamp bead jumps directly to become brighter, which is the setback (jitter) in dimming; if the changes of multiple consecutive PWM dimming signals fall on the discharge period of the inductor, this setback is more obvious.

In this regard, a direct corresponding solution is to detect and judge the effective high-level time of the PWM dimming signal and the charging period and discharging period of the inductor, so that the effective high-level time of the PWM dimming signal falls within the charging period of the inductor as much as possible. But obviously, the specific implementation of this plan is unusually difficult. The inventor of the present application proposes that if the duty cycle of the PWM chopper dimming circuit is increased as much as possible, for example, 100% in an extreme ideal state, that is, the ratio of the output voltage to the input voltage of the PWM chopper dimming circuit is increased, so that the For the discharge period of the inductor, please refer to the dotted line period in Figure 2. In this way, it is relatively easy to avoid the change of the PWM dimming signal falling in the discharge period of the inductor, thereby reducing the setback of dimming. Therefore, the inventor of the present application proposed the proposal of the present application.

Contents of the invention

The purpose of the present application is to provide a dimmable driving circuit, which can minimize the frustration of the dimming process.

In order to achieve the above object, the application provides the following technical solutions:

The application provides a dimmable driving circuit, including:

a pre-stage converter, coupled to an external power supply, to output a first voltage;

a dimming drive module, coupled to both the pre-converter and the external load, receives the first voltage, outputs a second voltage, and drives the external load to work;

a first detection circuit, coupled to the front-end converter, receives the first voltage, and outputs a first detection signal representing the first voltage;

A second detection circuit, coupled to the dimming drive module, receives the second voltage, and outputs a second detection signal representing the second voltage;

The main control module is coupled to the first detection circuit, the second detection circuit, and the front-end converter, receives the first detection signal and the second detection signal, outputs an adjustment signal, and sends it to In the front-end converter, the front-end converter adjusts the value of the first voltage, and the ratio of the second voltage to the first voltage is maintained at a preset value.

In an embodiment, the dimmable driving circuit further includes a voltage reference and a feedback loop, the voltage reference and the feedback loop are coupled to the main control module and the front-end converter, and receive the The adjustment signal output by the main control module generates a feedback signal and sends it to the front-end converter, and the front-end converter adjusts the value of the first voltage according to the feedback signal.

In one embodiment, the main control module includes a main control chip, the main control chip has a first pin as a power supply pin, and is coupled to a working power supply; the main control chip has a second pin as a first detection pin Pin, coupled with the first detection circuit, receiving the first detection signal output by the first detection circuit; the main control chip has a third pin as a second detection pin, which is connected to the first detection circuit Two detection circuits are coupled to receive the second detection signal output by the second detection circuit; the main control chip has a third pin as an adjustment signal output pin, which outputs the adjustment signal; the main control chip The eighth pin is a ground pin, which is coupled with the signal ground.

In one embodiment, the main control chip has a seventh pin that is a dimming signal output pin, coupled to the dimming driving module, and outputs a dimming signal to the dimming driving module.

In one embodiment, the dimming drive module includes a dimming chip, the dimming chip has a second pin that is a dimming signal input pin, and is coupled to the signal ground via a second resistor; the dimming The chip has a third pin which is a power supply pin, which is coupled to the signal ground via a first capacitor, and coupled to the pre-stage converter via a first resistor, and receives the first voltage; the dimming chip has a first Pin 5 is a drive pin, coupled to the external load via a second inductor, and coupled to the pre-stage converter via a first diode, the anode of the first diode is connected to the first A voltage coupling, the cathode of the first diode is coupled to the fifth pin of the dimming chip; the seventh pin of the dimming chip is a ground pin, which is coupled to the signal ground.

In one embodiment, the dimming driving module is a PWM chopping dimming driving circuit, and the dimming signal is a PWM signal.

In an embodiment, the first detection circuit includes a ninth resistor and an eleventh resistor connected in series, and the free end of the ninth resistor is coupled to the front-stage converter to receive the first voltage, so The free end of the eleventh resistor is coupled to the signal ground, and the coupling point of the ninth resistor and the eleventh resistor outputs the first detection signal; the second detection circuit includes a fourth resistor connected in series, The tenth resistor, the free end of the fourth resistor is coupled to the dimming drive module to receive the second voltage, the free end of the tenth resistor is coupled to the signal ground, the fourth resistor, the The coupling point of the tenth resistor outputs the second detection signal.

In one embodiment, the voltage reference and the feedback loop include a reference voltage chip and an optocoupler, the reference voltage chip has a third pin as a ground pin, which is coupled to the signal ground; the reference voltage chip has a second The pin is a power supply pin, which is coupled to the pre-stage converter via the sixteenth and seventeenth resistors connected in series to receive the first voltage; the reference voltage chip has a first pin which is an adjustment pin , coupled to the main control module via the 23rd resistor, to receive the adjustment signal, the first pin of the reference voltage chip is also coupled to the signal ground via the 20th resistor, and also via the 18th resistor Coupled with the previous stage converter, and coupled with the second pin of the reference voltage chip through the eighth capacitor and the twenty-first resistor connected in series; the optocoupler has a first pin, a second pin The pin is connected in parallel with the two ends of the seventeenth resistor, the optocoupler has a third pin coupled with the power ground, the optocoupler has a fourth pin coupled with the previous stage converter, and outputs The feedback signal is sent to the front-stage converter.

In one embodiment, the front-stage converter includes an auxiliary control chip, a power transistor, and a transformer, and the auxiliary control chip has an eighth pin as a feedback pin, which is coupled to the voltage reference and the feedback loop, and receives The feedback signal provided by the voltage reference and the feedback loop, the eighth pin of the auxiliary control chip is also coupled to the power supply ground via the third capacitor; the second pin of the auxiliary control chip is a power supply pin, and the The sixth resistor and the third diode connected in series are coupled to the transformer, and are also coupled to the power supply ground via the third electrolytic capacitor; the auxiliary control chip has a seventh pin as a ground pin, which is coupled to the power supply ground ; The auxiliary control chip has a fifth pin as a control pin, which is coupled to the transformer via the power tube.

In one embodiment, the front-end converter further includes a rectifier bridge, the input terminal of the rectifier bridge is coupled to the external power supply, and a first electrolytic capacitor is connected in parallel between the two ends of the output terminal of the rectifier bridge, And then coupled with the transformer.

Compared with the prior art, the technical solution of the present application has the following beneficial effects:

The dimmable driving circuit described in this application obtains the first voltage output by the front-stage converter (that is, the input voltage of the dimming driving module), and the second voltage output by the dimming driving module ( That is, the output voltage of the dimming drive module, that is, the load voltage), according to different load voltages (such as different external loads, that is, the second voltage) and the ratio of the second voltage to the first voltage A preset value (the highest value of the duty cycle of the dimming drive module), adjusting the value of the first voltage output by the front-stage converter, so that the ratio of the second voltage to the first voltage Maintaining the preset value, thereby reducing the discharge period of the inductor in the dimming drive module, and also avoiding the probability that the change of the dimming signal falls within the discharge period of the inductor, thereby reducing the setback in the dimming process, Improved user experience.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings that need to be used in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, other drawings can also be obtained based on these drawings without any creative effort.

FIG. 1 is a schematic diagram of the current of an inductor and a waveform of a dimming signal in a dimmable driving circuit in the prior art;

FIG. 2 is a schematic diagram of the waveform of the current of the inductor in the adjustable light driving circuit described in the present application;

FIG. 3 is a schematic structural diagram of a dimmable driving circuit provided in the first embodiment of the present application.

Detailed ways

The following will clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts belong to the scope of protection of this application.

The technical solution of the present application provides a dimmable driving circuit, which will be described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments of the present application. And in the following embodiments, the description of each embodiment has its own focus, and for the part not described in detail in a certain embodiment, you can refer to the relevant descriptions of other embodiments.

Please refer to FIG. 3, the first embodiment of the present application provides a dimmable driving circuit, including:

The front-stage converter 10 is coupled to an external power supply and outputs a first voltage V1;

The dimming driving module 20 is coupled to both the pre-converter 10 and the external load 70, receives the first voltage V1, outputs a second voltage V2, and drives the external load 70 to work;

The first detection circuit 30 is coupled to the preceding stage converter 10, receives the first voltage V1, and outputs a first detection signal ADC_V1 representing the first voltage V1;

The second detection circuit 40 is coupled to the dimming driving module 20, receives the second voltage V2, and outputs a second detection signal ADC_V2 representing the second voltage V2;

The main control module 50 is coupled to the first detection circuit 30, the second detection circuit 40, and the front-stage converter 10, and receives the first detection signal ADC_V1 and the second detection signal ADC_V2, The output adjustment signal DAC_ADJ is sent to the front-end converter 10, the front-end converter 10 adjusts the value of the first voltage V1, and the ratio of the second voltage V2 to the first voltage V1 is maintained at a predetermined value. set value.

Wherein, the first voltage V1 is provided to the dimming driving module 20 , which may also be referred to as an input voltage of the dimming driving module 20 . The second voltage V2 is output from the dimming driving module 20 , which may also be referred to as the output voltage of the dimming driving module 20 , and is applied to the external load 70 , which may also be referred to as a load voltage. In one embodiment, the external load 70 is an LED lamp bead, and multiple or multiple groups of LED lamp beads can be connected in series and/or in parallel; the second voltage V2 is applied to the negative pole of the LED lamp bead, and the The anode of the LED lamp bead is coupled to the first voltage V1. The ratio of the second voltage V2 to the first voltage V1 can also be referred to as the duty ratio D of the dimming driving module 20 . Generally speaking, the highest value of the duty ratio D of a dimming driver module 20 can be determined according to various parameter requirements of the dimming driver module 20 and subsequent test verification during design, and the determined duty ratio The highest value of the duty ratio D is saved in the dimming driving module 20 as the preset value. For example, in a specific embodiment, the highest value of the duty ratio D may be 94%, or 95%. Generally speaking, the duty ratio D is preferably greater than 80%, especially greater than 90%. This application adjusts the first voltage V1 (the input voltage of the dimming drive module 20 ) by detecting the load voltage (the second voltage V2, the load voltage is different when different external loads 70 are coupled), so that the second voltage V2 The ratio to the first voltage V1 is maintained at a preset value, that is, a higher duty cycle D, such as 94% or 95%, so that no matter what kind of external load 70 is coupled to the dimmable driving circuit described in this application, , the discharge period of the inductor in the dimming drive module 20 will be as short as possible, so as to avoid the change of the dimming signal falling in the discharge period of the inductor as much as possible, thereby reducing the frustration of dimming, and giving users better use experience.

In one embodiment, the main control module 50 includes a main control chip U5, the main control chip U5 has a first pin as a power supply pin, and is coupled to a working power supply; the main control chip U5 has a second pin is the first detection pin CS/PA7, coupled with the first detection circuit 30, and receives the first detection signal ADC_V1 output by the first detection circuit 30; the main control chip U5 has a third pin is the second detection pin TKS/PA6, coupled with the second detection circuit 40, and receives the second detection signal ADC_V2 output by the second detection circuit 40; the main control chip U5 has a third pin In order to adjust the signal output pin RSTB/PA5, the adjustment signal DAC_ADJ is output; the eighth pin of the main control chip U5 is a ground pin, which is coupled to the signal ground SGND. As mentioned above, the main control module 50 stores a preset value of the ratio of the second voltage V2 to the first voltage V1, that is, the highest value of the duty cycle D of the dimming driving module 20; In addition, the obtained first detection signal ADC_V1 actually represents the actual value of the first voltage V1, and the obtained second detection signal ADC_V2 actually represents the actual value of the second voltage V2, thus After judgment, comparison and calculation, an adjustment signal DAC_ADJ can be output to represent the ideal value that the first voltage V1 should reach. For example, in a specific embodiment, the current actual value of the first voltage V1 is 24V, but it is compared and calculated in combination with the second voltage V2 and the highest value (preset value) of the duty ratio D to obtain The ideal value of the first voltage V1 should be preferably 22V, and the adjustment signal DAC_ADJ thus outputted represents this 22V.

In one embodiment, the adjustment signal DAC_ADJ is an analog signal. The analog signal cannot directly control the front-end converter 10 to change the output first voltage V1. Therefore, in an embodiment, the dimmable driving circuit further includes a voltage reference and feedback loop 60, the voltage reference and feedback loop 60 are connected with the main control module 50 and the front-stage converter 10 Coupled to receive the adjustment signal DAC_ADJ output by the main control module 50, generate a feedback signal FB, and send it to the front-end converter 10, and the front-end converter 10 adjusts the first-stage converter according to the feedback signal FB A value of the voltage V1. The adjustment signal DAC_ADJ is converted by the voltage reference and the feedback loop 60 to generate a feedback signal FB, which is sent to the front-end converter 10, and the front-end converter 10 can adjust the output signal according to the feedback signal FB. Describe the value of the first voltage V1.

In one embodiment, the voltage reference and feedback loop 60 includes a reference voltage chip U2 and an optocoupler U3, the reference voltage chip U2 has a third pin as a ground pin, which is coupled to the signal ground SGND; The voltage chip U2 has a second pin as a power supply pin, which is coupled to the front-stage converter 10 through the sixteenth resistor R16 and the seventeenth resistor R17 connected in series, and receives the first voltage V1; the reference voltage The chip U2 has a first pin as an adjustment pin, which is coupled to the main control module 50 via a twenty-third resistor R23 to receive the adjustment signal DAC_ADJ. The first pin of the reference voltage chip U2 is also connected to the first pin through the second The twentieth resistor R20 is coupled to the signal ground SGND, and is also coupled to the front-stage converter 10 via the eighteenth resistor R18, and is also connected to the reference voltage chip via the eighth capacitor C8 and the twenty-first resistor R21 connected in series. The second pin of U2 is coupled; the optocoupler U3 has a first pin and a second pin, which are connected in parallel to the two ends of the seventeenth resistor R17, and the optocoupler has a third pin and a power ground PGND, the optocoupler U3 has a fourth pin, coupled with the front-end converter 10 , outputs the feedback signal FB, and sends it to the front-end converter 10 . In a specific embodiment, the model of the reference voltage chip U2 is TL431M. The adjustment signal DAC_ADJ, which is an analog signal, is transformed by the voltage reference and the feedback loop 60 to generate a feedback signal FB, which is the first voltage V1 used to control the output of the front-end converter 10 .

In one embodiment, the front-stage converter 10 includes an auxiliary control chip U1, a power transistor Q1, and a transformer T1. The auxiliary control chip U1 has an eighth pin as a feedback pin, which is connected to the voltage reference and the feedback loop The circuit 60 is coupled to receive the feedback signal FB provided by the voltage reference and feedback loop 60, and the eighth pin of the auxiliary control chip U1 is also coupled to the power ground PGND via the third capacitor C3; the auxiliary control chip U1 has a second pin as a power supply pin, which is coupled to the transformer T1 via a sixth resistor D6 and a third diode D3 connected in series, and is also coupled to the power supply ground PGND via a third electrolytic capacitor EC3; the auxiliary The control chip U1 has a seventh pin which is a ground pin and is coupled to the power ground PGND; the auxiliary control chip U1 has a fifth pin which is a control pin and is coupled to the transformer T1 via the power transistor Q1. In a specific embodiment, the model of the auxiliary control chip U1 is HFC0100HS. According to the difference of the feedback signal FB, the value of the first output voltage V1 can be adjusted.

More specifically, in one embodiment, the pre-converter 10 further includes a rectifier bridge DB1, the input end of the rectifier bridge DB1 is coupled to the external power supply, and in a specific embodiment, the external power supply The two ends of the input end of the rectifier bridge DB1 are respectively coupled to the alternating current through a live line L and a neutral line N. A first electrolytic capacitor EC1 is connected in parallel between the two ends of the output end of the rectifier bridge DB1, and is coupled to the transformer T1. The transformer T1 has a first pin, a third pin, a fifth pin, a sixth pin, a ninth pin, and a tenth pin, and the first pin and the third pin of the transformer T1 are Form the primary winding of the transformer T1 between them, form the secondary winding of the transformer T1 between the ninth pin and the tenth pin of the transformer T1, and form the fifth pin and the sixth pin of the transformer T1 Between them constitute the auxiliary winding of the transformer T1. The first pin of the transformer T1 is coupled to the first end of the output end of the rectifier bridge DB1, the second end of the output end of the rectifier bridge DB1 is coupled to the power ground PGND, and the third pin of the transformer T1 The pin is coupled to the drain of the power transistor Q1. A fourth diode D4 and a fourth electrolytic capacitor EC4 are connected in series between the ninth pin and the tenth pin of the transformer T1, and the tenth pin of the transformer T1 is coupled to the signal ground SGND, the The coupling point of the fourth diode D4 and the fourth electrolytic capacitor EC4 outputs the first voltage V1. The fifth pin of the transformer T1 is coupled to the power ground PGND, and the sixth pin of the transformer T1 is connected to the auxiliary control chip U1 via the third diode D3 and the sixth resistor D6 connected in series. The second pin is coupled. The auxiliary control chip U1 also has a first pin that is a valley detection pin, coupled to the sixth pin of the transformer T1 via a seventh resistor R7, and coupled to the power ground PGND via a fifth capacitor C5. The auxiliary control chip U1 also has a fourth pin which is a voltage supply pin HV, which is coupled to the first end of the output end of the rectifier bridge DB1 via a fifth resistor R5. The auxiliary control chip U1 also has a sixth pin which is a sampling pin CS, which is coupled to the power supply ground PGND via the fourth capacitor C4, and is coupled to the power supply ground PGND via the twelfth resistor R12, and is connected to the power transistor Source coupling of Q1. The fifth pin of the auxiliary control chip U1 is coupled to the gate of the power transistor Q1. In this way, the front-stage converter 10 can work more completely and safely, adjust the value of the output first voltage V1 according to the difference of the feedback signal FB, and can perform various sampling and detection of the circuit, so that The circuit works safely and stably.

In one embodiment, the dimming driver module 20 includes a dimming chip U6, the dimming chip U6 has a second pin as a dimming signal input pin, and is coupled to the signal ground SGND via a second resistor R2 The dimming chip U6 has a third pin as a power pin, which is coupled to the signal ground SGND via the first capacitor C1, and coupled to the front-stage converter 10 via the first resistor R1, and receives the first A voltage V1; the dimming chip U6 has a fifth pin as a driving pin, coupled to the external load 70 via the second inductor T2, and connected to the pre-converter 10 via the first diode D1 coupling, the anode of the first diode D1 is coupled to the first voltage V1, and the cathode of the first diode D1 is coupled to the fifth pin of the dimming chip U6; the The dimming chip U6 has a seventh pin which is a ground pin and is coupled to the signal ground SGND. The dimming signal is provided by the main control module 50 . The main control chip U5 has a seventh pin which is a dimming signal output pin, which is coupled to the dimming driving module 20 and outputs a dimming signal to the dimming driving module 20 . That is, the second pin of the dimming chip U6 is coupled to the seventh pin of the main control chip U5 to receive the dimming signal output from the seventh pin of the main control chip U5. In one embodiment, the dimming signal is a PWM signal, that is, the dimming driving module 20 is a PWM chopping dimming driving circuit. More specifically, the eighth pin of the dimming chip U6 is a ground pin, which is coupled to the seventh pin of the dimming chip U6; the sixth pin of the dimming chip U6 is also a driving pin. pin, coupled with the fifth pin of the dimming chip U6; the dimming chip U6 has a first pin that is also a voltage stabilizing pin LD, coupled with the third pin of the dimming chip U6 .

In one embodiment, the first detection circuit 30 includes a ninth resistor R9 and an eleventh resistor R11 connected in series, and the free end of the ninth resistor R9 is coupled to the front-end converter 10 to receive the The first voltage V1, the free end of the eleventh resistor R11 is coupled to the signal ground SGND, and the coupling point of the ninth resistor R9 and the eleventh resistor R11 outputs the first detection signal ADC_V1. The second detection circuit 40 includes a fourth resistor R4 and a tenth resistor R10 connected in series, the free end of the fourth resistor R4 is coupled to the dimming drive module 20 to receive the second voltage V2, the A free end of the tenth resistor R10 is coupled to the signal ground SGND, and a coupling point of the fourth resistor R4 and the tenth resistor R10 outputs the second detection signal ADC_V2 .

Finally, it should be added that the first pin of the main control chip U5 is coupled to the front-end converter 10 via the voltage conversion chip U4, and the first voltage V1 output by the front-end converter 10 is converted into the working voltage required by the main control chip U5. For example, the first voltage V1 is 24V, and the working voltage required by the main control chip U5 is 5V, and the conversion is completed by the voltage conversion chip U4.

Compared with the prior art, the technical solution of the present application has the following beneficial effects:

The dimmable driving circuit described in this application obtains the first voltage output by the front-stage converter (that is, the input voltage of the dimming driving module), and the second voltage output by the dimming driving module ( That is, the output voltage of the dimming drive module, that is, the load voltage), according to different load voltages (such as different external loads, that is, the second voltage) and the ratio of the second voltage to the first voltage A preset value (the highest value of the duty cycle of the dimming drive module), adjusting the value of the first voltage output by the front-stage converter, so that the ratio of the second voltage to the first voltage Maintaining the preset value, thereby reducing the discharge period of the inductor in the dimming drive module, and also avoiding the probability that the change of the dimming signal falls within the discharge period of the inductor, thereby reducing the setback in the dimming process, Improved user experience.

The above is only a specific implementation of the application, but the scope of protection of the application is not limited thereto. Anyone familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the application. Should be covered within the protection scope of this application. Therefore, the protection scope of the present application should be determined by the protection scope of the claims. In addition, specific examples are used in the description to illustrate the principles and implementation methods of the present application. The descriptions of the above examples are only used to help understand the method and core idea of the present application, and the contents of this description should not be construed as limiting the application .

Claims (10)

1. A dimmable driver circuit, comprising:

a pre-converter (10) coupled to an external power source and outputting a first voltage (V1);

the dimming driving module (20) is coupled with the pre-converter (10) and an external load (70), receives the first voltage (V1), outputs a second voltage (V2), and drives the external load (70) to work;

a first detection circuit (30) coupled to the pre-converter (10), receiving the first voltage (V1), and outputting a first detection signal (ADC _ V1) indicative of the first voltage (V1);

a second detection circuit (40) coupled to the dimming driving module (20), receiving the second voltage (V2), and outputting a second detection signal (ADC _ V2) indicative of the second voltage (V2);

a main control module (50), coupled to the first detection circuit (30), the second detection circuit (40), and the pre-converter (10), for receiving the first detection signal (ADC _ V1) and the second detection signal (ADC _ V2), outputting an adjustment signal (DAC _ ADJ), sending the adjustment signal (DAC _ ADJ) to the pre-converter (10), wherein the pre-converter (10) adjusts the value of the first voltage (V1), and the ratio of the second voltage (V2) to the first voltage (V1) is maintained at a preset value.

2. A dimmable driver circuit according to claim 1, further comprising a voltage reference and feedback loop (60), wherein said voltage reference and feedback loop (60) is coupled to said main control module (50) and said pre-converter (10), for receiving said adjustment signal (DAC _ ADJ) outputted by said main control module (50) and generating a feedback signal (FB) to said pre-converter (10), and said pre-converter (10) adjusts the value of said first voltage (V1) according to said feedback signal (FB).

3. The dimmable driver circuit according to claim 1, wherein the main control module (50) comprises a main control chip (U5), the main control chip (U5) has a first pin as a power pin, and is coupled to an operating power supply; the main control chip (U5) is provided with a second pin which is a first detection pin (CS/PA 7), is coupled with the first detection circuit (30), and receives the first detection signal (ADC _ V1) output by the first detection circuit (30); the main control chip (U5) is provided with a third pin which is a second detection pin (TKS/PA 6), is coupled with the second detection circuit (40) and receives the second detection signal (ADC _ V2) output by the second detection circuit (40); the main control chip (U5) is provided with a third pin which is an adjusting signal output pin (RSTB/PA 5) and outputs the adjusting signal (DAC _ ADJ); the main control chip (U5) is provided with an eighth pin which is a grounding pin and is coupled with a Signal Ground (SGND).

4. The tunable optical driver circuit according to claim 3, wherein the main control chip (U5) has a seventh pin as a dimming signal output pin, and is coupled to the dimming driving module (20) for outputting the dimming signal to the dimming driving module (20).

5. The tunable light driving circuit according to claim 4, wherein the dimming driving module (20) comprises a dimming chip (U6), the dimming chip (U6) having a second pin as a dimming signal input pin and coupled to a Signal Ground (SGND) via a second resistor (R2); the dimming chip (U6) is provided with a third pin which is a power supply pin, is coupled with a Signal Ground (SGND) through a first capacitor (C1), is coupled with the pre-converter (10) through a first resistor (R1), and receives the first voltage (V1); the dimming chip (U6) has a fifth pin as a driving pin, and is coupled to the external load (70) through a second inductor (T2), and is coupled to the pre-converter (10) through a first diode (D1), an anode of the first diode (D1) is coupled to the first voltage (V1), and a cathode of the first diode (D1) is coupled to the fifth pin of the dimming chip (U6); the dimming chip (U6) has a seventh pin which is a ground pin and is coupled with a Signal Ground (SGND).

6. The tunable light driving circuit according to claim 5, wherein the dimming driving module (20) is a PWM chopping dimming driving circuit, and the dimming signal is a PWM signal.

7. The dimmable driver circuit according to claim 1, wherein the first detection circuit (30) comprises a ninth resistor (R9) and an eleventh resistor (R11) connected in series, a free end of the ninth resistor (R9) is coupled to the pre-converter (10) and receives the first voltage (V1), a free end of the eleventh resistor (R11) is coupled to a Signal Ground (SGND), and a coupling point of the ninth resistor (R9) and the eleventh resistor (R11) outputs the first detection signal (ADC _ V1); the second detection circuit (40) comprises a fourth resistor (R4) and a tenth resistor (R10) connected in series, a free end of the fourth resistor (R4) is coupled to the dimming driving module (20) to receive the second voltage (V2), a free end of the tenth resistor (R10) is coupled to a Signal Ground (SGND), and a coupling point of the fourth resistor (R4) and the tenth resistor (R10) outputs the second detection signal (ADC _ V2).

8. The dimmable driver circuit of claim 2, wherein said voltage reference and feedback loop (60) comprises a voltage reference chip (U2) and an optocoupler (U3), said voltage reference chip (U2) having a third pin being a ground pin, coupled to a Signal Ground (SGND); the reference voltage chip (U2) is provided with a second pin serving as a power supply pin, is coupled with the pre-converter (10) through a sixteenth resistor (R16) and a seventeenth resistor (R17) which are connected in series, and receives the first voltage (V1); the reference voltage chip (U2) has a first pin which is a regulation pin, is coupled with the main control module (50) through a twenty-third resistor (R23) and receives the regulation signal (DAC _ ADJ), and the first pin of the reference voltage chip (U2) is also coupled with a Signal Ground (SGND) through a twentieth resistor (R20), is also coupled with the pre-converter (10) through an eighteenth resistor (R18), and is also coupled with a second pin of the reference voltage chip (U2) through an eighth capacitor (C8) and a twenty-first resistor (R21) which are connected in series; the optocoupler (U3) is provided with a first pin and a second pin and is connected with two ends of the seventeenth resistor (R17) in parallel, the optocoupler is provided with a third pin and is coupled with a Power Ground (PGND), the optocoupler (U3) is provided with a fourth pin and is coupled with the pre-converter (10), outputs the feedback signal (FB) and sends the FB to the pre-converter (10).

9. The tunable optical drive circuit according to claim 8, wherein the pre-converter (10) comprises an auxiliary control chip (U1), a power transistor (Q1) and a transformer (T1), the auxiliary control chip (U1) has an eighth pin as a feedback pin, is coupled to the voltage reference and feedback loop (60), and receives a feedback signal (FB) provided by the voltage reference and feedback loop (60), and the eighth pin of the auxiliary control chip (U1) is further coupled to a Power Ground (PGND) via a third capacitor (C3); the auxiliary control chip (U1) is provided with a second pin serving as a power supply pin, and is coupled with the transformer (T1) through a sixth resistor (D6) and a third diode (D3) which are connected in series, and is also coupled with a power supply ground (PGND) through a third electrolytic capacitor (EC 3); the auxiliary control chip (U1) is provided with a seventh pin which is a grounding pin and is coupled with a Power Ground (PGND); the auxiliary control chip (U1) is provided with a fifth pin as a control pin and is coupled with the transformer (T1) through the power tube (Q1).

10. Dimmable driver circuit according to claim 9, wherein said pre-converter (10) further comprises a rectifier bridge (DB 1), an input terminal of said rectifier bridge (DB 1) is coupled to said external power source, and a first electrolytic capacitor (EC 1) is connected in parallel between two terminals of an output terminal of said rectifier bridge (DB 1) and is further coupled to said transformer (T1).

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