CN115763220A - Substrate processing method and semiconductor device manufacturing method - Google Patents

Abstract

The object of the present invention is to provide a method for processing a substrate and a method for manufacturing a semiconductor device. In the present invention, before the crystal rod is cut, the surface treatment agent is first used to carry out surface treatment on the side of the crystal rod, so that the crystal rod reacts with the surface treatment agent in the subsequent annealing process to form a modified layer. After cutting the surface treatment In order to obtain multiple substrates, the outer edge of each substrate includes a modified region. Due to the difference in the lattice and thermodynamic properties of the materials in the modified region and the middle region of the substrate, the substrate modified The range of the layer area will form a stable stress area, which can control the direction and degree of twisting/bending of the substrate, thereby optimizing the surface shape of the substrate and improving the processing quality and quality of the substrate.

Description

Substrate processing method and semiconductor device manufacturing method

technical field

The invention relates to the technical field of semiconductor manufacturing, in particular to a substrate processing method and a semiconductor device manufacturing method.

Background technique

In the manufacturing process of semiconductor devices, it is usually necessary to use a growth substrate to grow the epitaxial layer. For the growth substrate, substrate distortion/bending is the most important factor affecting the uniformity of epitaxy. In the prior art, the general crystal growth lump can reach more than 100kg, and the size is relatively large. The uniformity of the temperature field during the crystal growth process is not high, resulting in relatively large thermal stress on the crystal. Pulling out rods is to pull out crystal rods of various diameters from the crystal lump. Due to mechanical processing, huge mechanical stress will be generated around the crystal rods. Due to the existence of thermal stress and mechanical stress, which are random and uncontrollable, the stress of the final processed substrate will be uneven and twisted/bent, making the substrate present an asymmetric surface shape, and the substrate with an asymmetric surface shape will The convergence of the wavelength of the subsequently formed epitaxial layer is reduced. The uniformity of the wavelength of the epitaxial layer directly affects the yield of later devices.

Based on the above problems, it is necessary to provide a substrate processing method to improve the processing quality and quality of the substrate.

Contents of the invention

In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a method for processing a substrate and a method for manufacturing a semiconductor device. In the present invention, before the crystal rod is cut, the surface treatment agent is first used to carry out surface treatment on the side of the crystal rod, so that the crystal rod reacts with the surface treatment agent in the subsequent annealing process to form a modified layer. After cutting the surface treatment In order to obtain multiple substrates, the outer edge of each substrate includes a modified region. Due to the difference in lattice and thermodynamic properties between the modified region and the material in the middle region of the substrate, the substrate modified region The range will form a stable stress area, which can control the twist/bend direction and degree of the substrate, optimize the surface shape of the substrate, and improve the processing quality and quality of the substrate.

In order to achieve the above object and other related objects, an embodiment of the present invention provides a substrate processing method, the method includes the following steps:

Using a surface treatment agent to carry out surface treatment on the side of the ingot formed by the crystal growth;

annealing the surface-treated ingot, allowing the side of the ingot to react with the surface treatment agent to form a modified layer on the side of the ingot;

The ingot is cut to obtain a plurality of substrates, each of which includes a modified region at an outer peripheral edge portion.

Optionally, performing surface treatment on the ingot includes:

A surface treatment agent is coated on the side of the ingot, and the ingot is baked at a temperature of 100° C. to 200° C. for 0 to 2 hours.

Optionally, the coating amount of the surface treatment agent coated on the side of the ingot is 0.1 mg/cm ² -100 mg/cm ² .

Optionally, before carrying out the surface treatment on the ingot, the following steps are also included:

Provide modifiers, catalysts, dispersants and solvents;

The modifying agent, catalyst, dispersant and solvent are uniformly mixed to obtain a surface treatment agent.

Optionally, annealing the surface-treated ingot also includes the following steps:

Put the ingot coated with the surface treatment agent into the heating furnace;

The crystal ingot is annealed within a temperature range of 30° C. to 3000° C., and the annealing time is 0.1 h to 30 days.

Optionally, annealing the surface-treated ingot also includes the following steps:

Heating: raise the temperature of the heating furnace to 100-2000°C at a heating rate of 0.5-200°C/min;

Heat preservation: within the temperature range of 100-2000°C, heat preservation for 0.1h-500h;

Cooling: cool down the heating furnace to room temperature at a cooling rate of 0.5-200°C/min.

Optionally, the depth of the modified layer formed on the side of the ingot is greater than 0 and less than 2 mm.

Optionally, the modified region of the substrate is a ring extending inward from the edge of the outer circle of the substrate with the center of the substrate as the center, and the difference between the outer diameter and the inner diameter of the ring is greater than 0 and less than 200 μm.

Optionally, grinding the cut substrate;

The ground substrate is annealed, chamfered and polished.

Optionally, the chamfer of the substrate has a width greater than 200 μm.

A method for manufacturing a semiconductor device, comprising the steps of:

providing a substrate, the substrate is obtained by the above substrate processing method;

forming at least one semiconductor layer on the first surface or the second surface of the substrate;

The semiconductor layer is etched.

Optionally, forming at least one semiconductor layer on the first surface or the second surface of the substrate further includes the following steps:

forming a first semiconductor layer on the substrate;

forming an active layer over the first semiconductor layer;

A second semiconductor layer opposite in conductivity to the first semiconductor layer is formed over the active layer.

Optionally, the semiconductor device manufacturing method further includes forming a first electrode and a second electrode connected to the first semiconductor layer and the second semiconductor layer, respectively.

As mentioned above, the substrate processing method and the semiconductor device manufacturing method provided by the present invention have at least the following beneficial effects: In the method of the present invention, firstly, the side surface of the ingot is treated with a surface treatment agent, so that the ingot can be treated after subsequent annealing. During the process, it reacts with the surface treatment agent to form a modified layer, and cuts the surface-treated ingot to obtain multiple substrates. The outer edge of each substrate includes a modified area, because the modified area is closely related to the substrate Due to the differences in the lattice and thermodynamic properties of the material in the middle region, the thermal expansion coefficient of the modified region is different from that of the material in the middle region of the substrate. During the cooling process, the modified region will generate consistent stress, making the substrate form a convergent and controllable Twist/bend, the twist/bend direction and degree of multiple substrates tend to be the same, so the surface shape of multiple substrates tends to be consistent, which can improve the processing quality and quality of the substrate. It will be inverted into a web during the epitaxy process and will not negatively affect the electrical parameters in the subsequent epitaxy process.

The semiconductor device of the present invention uses the above method to process the substrate. Therefore, compared with the semiconductor device obtained by conventional substrate processing, the divergence of the wavelength of the epitaxial layer is reduced, the wavelength of the epitaxial layer is more convergent, and the yield rate of the semiconductor device Huge improvements.

Description of drawings

Figure 1 shows a flow chart for the processing of a conventional substrate.

FIG. 2 is a flow chart of substrate processing in an embodiment of the present invention.

FIG. 3 is a schematic side view of an ingot in an embodiment of the present invention.

Detailed ways

Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic concept of the present invention, although only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the shape, quantity, positional relationship and proportion of each component in actual implementation can be changed at will under the premise of realizing the technical solution of the party, and the layout of the components may also be more complicated. Accordingly, variations in the shapes of the illustrations, eg, due to manufacturing techniques and/or tolerances, are to be expected. Thus, example embodiments should not be construed as limited to the particular shapes of regions illustrated in the figures but may also include deviations in shapes that result, for example, from manufacturing. In the drawings, the length and size of some layers and regions may be exaggerated for clarity. Like reference numerals in the drawings indicate like parts. It will also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present.

The preparation of the substrate is a very important link in the manufacturing process of semiconductor devices, and the yield of the substrate directly affects the performance of the device. As shown in Figure 1, it is a processing flow chart of a conventional substrate. The substrate is generally a thin slice obtained by wire-cutting an ingot formed by growing crystals. Large, the uniformity of the temperature field during the crystal growth process is not high, resulting in a large thermal stress in the crystal. Pulling out rods is to pull out crystal rods of various diameters from the crystal lump. Due to mechanical processing, huge mechanical stress will be generated around the crystal rods. Due to the existence of thermal stress and mechanical stress, which are random and uncontrollable, the stress of the final processed substrate will be uneven and twisted/bent, making the substrate present an asymmetric surface shape, and the substrate with an asymmetric surface shape will The convergence of the wavelength of the subsequently formed epitaxial layer is reduced. The uniformity of the wavelength of the epitaxial layer directly affects the yield of later devices. The invention provides a substrate processing method and a semiconductor device preparation method.

As shown in Figure 2, it is a processing flowchart of the substrate in the present embodiment. In the present embodiment, the above-mentioned ingot can be any crystal used in the manufacture of semiconductor devices, for example, it can be glass, compound semiconductors, metals and alloys, Oxides, nitrides, III-V compounds, II-VI compounds, IV main group elements and compounds, halides, silicates, carbonates, etc. The crystal rod selected in this embodiment is a sapphire crystal rod, and the crystal growth process is usually as follows: first, the raw material Al2O3 is placed in a crucible, and the crucible and the Al2O3 in it are heated to a temperature above 2000 ° C. Make the aluminum oxide melt into a melt in a molten state; then perform seeding, stabilize the liquid surface temperature of the melt between 2050°C and 2060°C, put the sapphire seed crystal from directly above the liquid surface, and make the seed crystal and Contact with the liquid surface of the solution; then put shoulders: slowly pull the seed crystal, the weight of the crystal increases evenly, and the diameter of the crystal increases to a predetermined diameter; Isometric growth: pull the crystal at a uniform speed and make it grow with an equal diameter; cut off: The diameter of the crystal shrinks until it forms a sharp point and completely separates from the melt, and the temperature of the crystal after being separated from the solution is lowered to obtain a sapphire crystal.

Use the rod-removing machine and the rod-removing tool rotating at high speed to remove rods from the sapphire crystal along the direction parallel to the rod-removing surface of the sapphire crystal to obtain a sapphire crystal rod. At this time, due to the existence of thermal stress and mechanical stress during the processing of the sapphire crystal rod , will increase the defect density of the substrate obtained by direct processing, and the warpage will be larger.

Therefore, as shown in FIG. 3 , a layer of surface treatment agent is coated on the side 1 of the sapphire crystal rod to perform surface treatment on the sapphire crystal rod. In this embodiment, the surface treatment agent includes modifiers: aluminates, silicates, carbonates, hydroxides, oxides or halides, etc., catalysts: reducing materials (carbon, silicon, sulfide, Metal element, iodide, divalent iron salt and other low-valent compounds), oxidizing materials (potassium permanganate, dichromate, chlorate, nitrate, ferric salt, divalent copper salt and other high-valent compounds ), acid, alkali or ionic salt, dispersant: at least one of castor oil, triolein and phosphoric acid ester, solvent: alcohols, ketones, toluene, ethers, esters and other solvents, A mixed solvent of one or two of alcohols, ketones, or toluene may also be used. The modifier, catalyst, dispersant and solvent are evenly mixed and coated on the surface of the substrate. The thickness and concentration of the surface treatment agent can be determined according to the depth of surface treatment of the sapphire ingot. In this embodiment, the thickness of the surface treatment agent is greater than 0.1 mm, and the coating amount of the surface treatment agent is 0.1 mg/cm ² -100 mg/cm ² .

After coating the surface treatment agent on the side of the sapphire crystal rod, it is baked, for example, at a temperature range of 100° C. to 200° C. for 0 to 2 hours. During this baking process, the surface treatment agent reacts little or very little with the substrate. However, during this process, the surface treatment agent is preliminarily dried, so that it can be closely attached to the sapphire crystal rod, so as to facilitate the reaction with the sapphire crystal rod in the subsequent annealing process.

After the above surface treatment, the sapphire ingot with the surface treatment agent is put into a heating furnace for annealing process. In this embodiment, the annealing temperature ranges from 30° C. to 3000° C., and the annealing time ranges from about 0.1 hour to 30 days.

In an optional embodiment, the annealing process mainly includes: a heating stage, in which the temperature of the heating furnace is raised to 100° C. to 2000° C. at a heating rate of 0.5° C. to 200° C./min. Insulation stage: within the temperature range of 100°C to 2000°C, heat preservation for 0.1 to 500 hours; cooling stage: cooling at a cooling rate of 0.5 to 200°C/min until the heating furnace cools down to room temperature. In a more preferred embodiment, the heating furnace is heated to 1300-1800°C at a heating rate of 1-20°C/min, kept at 1300-1800°C for 1-100 hours, and then cooled at a rate of 1-20°C/min Rate of cooling down to room temperature.

In the above heat preservation stage, the surface treatment agent fully reacts with the sapphire crystal rod. In this embodiment, the surface treatment agent is calcium acetate ethanol solution as an example. In the heating stage, the calcium acetate solution will lose all ethanol, and the calcium acetate will be decomposed into acetone and calcium carbonate; in the high temperature stage, the calcium carbonate will decompose:

CaCO ₃ →CaO+CO ₂ ↑

The reaction product of the above decomposition reaction, CaO, has high reactivity and will react with the sapphire crystal rod under high temperature conditions. The specific reaction is as follows:

CaO+Al ₂ O ₃ →xCaO·yAl ₂ O ₃

The values of x and y in the above reaction formula are all greater than zero, and different combinations of x and y values represent different reaction products. Under the high temperature conditions of the heat preservation stage described in this embodiment, there will be multiple reaction products .

During the annealing process, the modifier in the surface treatment agent reacts from the surface of the side surface of the sapphire crystal rod under the action of the catalyst to form a modified layer. The surface diffuses to the inside, gradually reacting, and the thickness of the modified layer increases continuously. By controlling the heat preservation temperature and heat preservation time, the thickness of the modified layer can be controlled. For example, according to the requirements of the surface width in the subsequent chamfering process, the modified layer can be The thickness is controlled in the range of 0~200μm.

After the above surface treatment and annealing, the surface layer material on the side of the sapphire crystal rod will be modified. Such a modified structural lattice and thermodynamic properties are different from those of sapphire. The stress area of the modified area is compared with that of the sapphire substrate. more stable.

After the annealing, wire cutting, grinding, annealing, chamfering, copper polishing and polishing are carried out on the sapphire ingot. In this embodiment, the wire cutting and grinding processes are the same as those of conventional sapphire substrates. In this embodiment, the width of the chamfer of the sapphire substrate is greater than 200 μm. In the above processing method, the depth of the modified layer from the side surface of the sapphire crystal rod to the inside is 0-200 μm, so the sapphire substrate obtained after the sapphire crystal rod is cut, the modified area is centered on the sapphire substrate, from the sapphire The edge part of the outer ring of the substrate faces the ring at the center of the substrate. The difference between the outer diameter and the inner diameter of the ring is greater than 0 and less than 200 μm. Affect the electrical parameters of the sapphire substrate in the subsequent epitaxy process. The modified area is a structure obtained by high-temperature annealing. During the annealing process, atoms in the modified material enter the sapphire surface, causing the atoms to rearrange. Due to the difference in thermal expansion coefficient during the cooling process, the area will be in the modified area and A relatively stable stress difference is formed at the interface of the middle region of the substrate. Specifically, the stress generated in the modified region is much greater than the stress in the middle region of the substrate. Therefore, the stress in the modified region and the middle region of the substrate between multiple substrates The difference tends to be consistent, so that the stress difference between multiple substrates can be converged, and the direction and degree of twisting/bending of multiple substrates can be controlled to be the same, thereby optimizing the surface shape of the substrate and improving the substrate’s performance. Processing quality and quality.

Another embodiment of the present invention provides a semiconductor device manufacturing method, the method comprising the following steps:

Provide a substrate, the substrate is obtained by the above-mentioned substrate processing method, the substrate can also be any substrate suitable for semiconductor manufacturing, for example, can be glass, compound semiconductors and insulators, metals and alloys, oxides, nitrogen Compounds, Group III and V compounds, Group II and VI compounds, elemental substances and compounds of the fourth main group, halides, perovskite materials, silicates, carbonates, aluminates, etc.

Form at least one semiconductor layer on the first surface or the second surface of the substrate. In this embodiment, taking the formation of a semiconductor layer on a sapphire upper substrate as an example, forming the at least one semiconductor layer includes: first Forming a first semiconductor layer on a substrate, then forming an active layer over the first semiconductor layer, and then forming a second semiconductor layer over the above-mentioned active layer, the conductivity of the second semiconductor layer is the same as that of the first semiconductor layer. Sex is the opposite. It also includes forming a first electrode and a second electrode communicated with the first semiconductor layer and the second semiconductor layer respectively.

Etching the semiconductor layer, the first semiconductor layer can be an N-type semiconductor layer, and the second semiconductor layer can be a P-type semiconductor layer; the first semiconductor layer can be a P-type semiconductor layer, and the second semiconductor layer can be an N-type semiconductor layer The semiconductor layer, the above-mentioned active layer may be multiple quantum wells. Etching the at least one semiconductor layer to form a semiconductor light emitting structure in the at least one semiconductor layer.

In the above semiconductor device manufacturing method of the present invention, the above substrate processing method of the present invention is also used to process the substrate, which can improve the yield of the semiconductor device.

As mentioned above, the substrate processing method and the semiconductor device manufacturing method provided by the present invention have at least the following beneficial technical effects: In the method of the present invention, before cutting the crystal rod, the side surface of the crystal rod is first treated with a surface treatment agent. Surface treatment, so that the ingot reacts with the surface treatment agent in the subsequent annealing process to form a modified layer, and the surface-treated ingot is cut to obtain a plurality of substrates, and the outer edge of each substrate includes a modified layer. Due to the difference in the lattice and thermodynamic properties of the material in the modified area and the middle area of the substrate, the thermal expansion coefficient of the modified area is different from that of the material in the middle area of the substrate, and stress will be generated in the modified area during the cooling process. The stress is much greater than the stress in the middle region of the substrate, so a relatively stable stress difference is formed at the interface between the modified region and the middle region of the substrate, which can converge the stress difference between multiple substrates and control the occurrence of multiple substrates. The twist/bend direction and degree tend to be the same, thereby optimizing the surface shape of the substrate and improving the processing quality and quality of the substrate. The semiconductor device of the present invention uses the above method to process the substrate. Therefore, compared with the semiconductor device obtained by conventional substrate processing, the divergence of the wavelength of the epitaxial layer is reduced, the wavelength of the epitaxial layer is more convergent, and the yield rate of the semiconductor device Huge improvements.

The above-mentioned embodiments only illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and technical ideas disclosed in the present invention should still be covered by the claims of the present invention.

Claims (13)

1. A substrate processing method is characterized in that,

the method comprises the following steps:

carrying out surface treatment on the side surface of the crystal bar formed by the crystal growth by using a surface treatment agent;

annealing the surface-treated crystal bar to enable the side surface of the crystal bar to react with the surface treatment agent so as to form a modified layer on the side surface of the crystal bar;

and cutting the crystal bar to obtain a plurality of substrates, wherein the outer ring edge part of each substrate comprises a modified region.

2. The method of processing a substrate according to claim 1, wherein the surface treatment of the ingot comprises:

coating a surface treatment agent on the side surface of the crystal bar, and baking the crystal bar at the temperature of 100-200 ℃ for 0-2 h.

3. The method as set forth in claim 2, wherein the surface treatment agent is coated on the side surface of the ingot in an amount of 0.1mg/cm ² ~100mg/cm ² 。

4. The method of processing a substrate according to claim 1, further comprising, before the surface treatment of the ingot, the steps of:

providing a modifier, a catalyst, a dispersant and a solvent;

and uniformly mixing the modifier, the catalyst, the dispersant and the solvent to obtain the surface treating agent.

5. The method of processing a substrate according to claim 1, wherein annealing the surface-treated ingot further comprises:

putting the crystal bar coated with the surface treatment agent into a heating furnace;

annealing the crystal bar within the temperature range of 30-3000 ℃ for 0.1 h-30 days.

6. The method of claim 1, wherein annealing the surface treated ingot further comprises:

and (3) heating: heating the heating furnace to 100-2000 ℃ at a heating rate of 0.5-200 ℃/min;

and (3) heat preservation: keeping the temperature for 0.1 to 500 hours at the temperature of between 100 and 2000 ℃;

cooling: the heating furnace is cooled to the room temperature at the cooling rate of 0.5-200 ℃/min.

7. The method according to claim 1, wherein the modified layer formed on the side surface of the ingot has a depth of more than 0 mm and less than 2mm.

8. The method according to claim 1, wherein the modified region of the substrate is a ring extending inward from an outer edge of the substrate with a center of the substrate as a center, and a difference between an outer diameter and an inner diameter of the ring is greater than 0 and less than 200 μm.

9. A method of processing a substrate as recited in claim 1, further comprising the steps of: grinding the substrate obtained by cutting;

and annealing, chamfering and polishing the ground substrate.

10. A method of processing a substrate as recited in claim 9, wherein the substrate chamfer has a width greater than 200 μm.

11. A method for manufacturing a semiconductor device, comprising the steps of:

providing a substrate, wherein the substrate is obtained by the processing method of any one of claims 1 to 10;

forming at least one semiconductor layer on the first surface or the second surface of the substrate;

and etching the semiconductor layer.

12. The manufacturing method of a semiconductor device according to claim 11,

forming at least one semiconductor layer on the first surface or the second surface of the substrate further comprises:

forming a first semiconductor layer on the substrate;

forming an active layer over the first semiconductor layer;

forming a second semiconductor layer over the active layer having a conductivity opposite to that of the first semiconductor layer.

13. The manufacturing method of a semiconductor device according to claim 12, further comprising:

forming a first electrode and a second electrode in communication with the first semiconductor layer and the second semiconductor layer, respectively.

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