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CN115664368A - Capacitance matching method, device, equipment and readable storage medium - Google Patents

Capacitance matching method, device, equipment and readable storage medium Download PDF

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CN115664368A
CN115664368A CN202211229914.6A CN202211229914A CN115664368A CN 115664368 A CN115664368 A CN 115664368A CN 202211229914 A CN202211229914 A CN 202211229914A CN 115664368 A CN115664368 A CN 115664368A
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antenna
value
impedance
capacitance
resistance value
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Shenzhen Xhorse Electronics Co Ltd
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Shenzhen Xhorse Electronics Co Ltd
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Abstract

The capacitor matching method comprises the steps of obtaining an equivalent parallel impedance resistance value of an antenna under a target frequency and an inductance value of a series inductor in the antenna, and then inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, an optimal output impedance resistance value of a radio frequency power amplification circuit and the target frequency into a capacitor matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitor matching circuit under the target frequency; finally, the capacitance value of the first series capacitor is adjusted to the first capacitance value, and the capacitance value of the second series capacitor is adjusted to the second capacitance value, so that the impedance of the antenna radiation circuit end is matched with the impedance of the driving end, and the efficiency is higher compared with a field debugging mode.

Description

Capacitance matching method, device, equipment and readable storage medium
Technical Field
The present application relates to the field of radio frequency technologies, and in particular, to a method, an apparatus, a device, and a readable storage medium for capacitance matching.
Background
For the high impedance matching problem of the small loop antenna, a capacitor tap mode is usually adopted, and an original parallel resonance capacitor is split into a capacitor C1 and a capacitor C2, as shown in fig. 1, and impedance matching is realized by changing the voltage division of the capacitor C1 and the capacitor C2.
The capacitance values of the capacitor C1 and the capacitor C2 are usually adjusted in a field debugging mode in a traditional mode, so that impedance matching is achieved for input and output impedance, and signals reach the highest transmission power.
Disclosure of Invention
The application provides a capacitance matching method, a capacitance matching device, capacitance matching equipment and a readable storage medium, wherein the capacitance matching method, the capacitance matching device and the capacitance matching equipment can efficiently realize impedance matching.
A capacitance matching method is applied to an antenna radiation circuit, the antenna radiation circuit comprises an antenna and a capacitance matching circuit, and the method comprises the following steps:
obtaining an equivalent parallel impedance resistance value of an antenna at a target frequency and an inductance value of a series inductor in the antenna;
inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, the optimal output impedance resistance value of the radio frequency power amplifier circuit and the target frequency into a capacitor matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitor matching circuit under the target frequency;
adjusting the capacitance value of the first series capacitor to the first capacitance value and the capacitance value of the second series capacitor to the second capacitance value;
wherein the capacitance matching model is represented as:
Figure BDA0003881082800000011
Figure BDA0003881082800000021
R d is the optimal output impedance resistance value, R, of the radio frequency power amplifier circuit p Is the equivalent parallel impedance resistance value, C 1 Is the first capacitance value, C 2 Is the second capacitance value, f o And L is the inductance of the series inductor at the target frequency.
In one embodiment, the obtaining the equivalent parallel impedance resistance value of the antenna at the target frequency includes:
and acquiring a target impedance resistance value at two ends of the antenna under the target frequency measured by the measuring equipment to serve as the equivalent parallel impedance resistance value.
In one embodiment, the obtaining of the target impedance resistance values at the two ends of the antenna at the target frequency measured by the measuring device includes:
obtaining a mapping relation between impedance values at two ends of the antenna and working frequency measured by the measuring equipment;
and acquiring antenna impedance values of two ends of the corresponding antenna from the mapping relation based on the target frequency so as to obtain the target impedance resistance value.
In one embodiment, the obtaining the equivalent parallel impedance resistance value of the antenna at the target frequency includes:
determining a plurality of first reference frequencies;
acquiring a first reference impedance resistance value of the two ends of the antenna corresponding to each first reference frequency measured by measuring equipment;
inputting the target frequency, the plurality of first reference frequencies and the first reference impedance resistance value corresponding to the first reference frequency into an impedance correction model to obtain the equivalent parallel impedance resistance value; the impedance correction model is represented as:
R ci =(R s +j2πf ci L)//(1/j2πf ci C x )
R p =(2πf o L) 2 /R s +R s
R ci the first reference impedance resistance value R corresponding to the ith first reference frequency s Is the series resistance value, f ci Is the ith said first reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel sign.
In an embodiment, the obtaining, by the measurement device, a first reference impedance resistance value at two ends of the antenna corresponding to each first reference frequency includes:
obtaining a mapping relation between impedance values at two ends of the antenna and working frequency measured by the measuring equipment;
and acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the first reference frequencies to obtain the first reference impedance resistance value.
In one embodiment, the obtaining the inductance of the series inductance in the antenna comprises:
determining a plurality of second reference frequencies;
obtaining a second reference impedance resistance value of the two ends of the antenna corresponding to each second reference frequency measured by the measuring equipment;
inputting a plurality of second reference frequencies and the second reference impedance resistance values corresponding to the second reference frequencies into a resistance equivalent model to obtain the inductance of the series inductor;
the resistance equivalent model is represented as:
R dj =(R s +j2πf dj L)//(1/j2πf dj C x )
R dj a value of said second reference impedance resistance corresponding to a jth of said second reference frequencies, R s Is a series resistance value, f dj For the jth said second reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel sign.
In an embodiment, the obtaining a second reference impedance resistance value at two ends of the antenna corresponding to each second reference frequency measured by the measuring device includes:
obtaining a mapping relation between impedance values at two ends of the antenna and working frequency measured by the measuring equipment;
and acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the second reference frequencies to obtain the second reference impedance resistance value.
A capacitive matching apparatus for use in an antenna radiation circuit, the antenna radiation circuit including an antenna and a capacitive matching circuit, the apparatus comprising:
the antenna comprises an acquisition module, a detection module and a control module, wherein the acquisition module is used for acquiring an equivalent parallel impedance resistance value of an antenna under a target frequency and an inductance value of a series inductor in the antenna;
the matching module is used for inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, the optimal output impedance resistance value of the radio frequency power amplifier circuit and the target frequency into a capacitance matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitance matching circuit under the target frequency;
the adjusting module is used for adjusting the capacitance value of the first series capacitor to the first capacitance value and adjusting the capacitance value of the second series capacitor to the second capacitance value;
wherein the capacitance matching model is represented as:
Figure BDA0003881082800000041
Figure BDA0003881082800000042
R d is the optimal output impedance resistance value, R, of the radio frequency power amplifier circuit p Is the equivalent parallel impedance resistance value, C 1 Is the first capacitance value, C 2 Is the second capacitance value, f o And L is the inductance of the series inductor at the target frequency.
A capacitance matching apparatus comprising a memory storing a computer program and a processor, the processor implementing the steps of the method of any one of the above when executing the computer program in one embodiment.
A computer-readable storage medium, on which a computer program is stored which, in an embodiment, when being executed by a processor, carries out the steps of the method of any of the above.
The capacitance matching method comprises the steps of obtaining an equivalent parallel impedance resistance value of an antenna under a target frequency and an inductance value of a series inductor in the antenna, and then inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, an optimal output impedance resistance value of a radio frequency power amplification circuit and a target frequency into a capacitance matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitance matching circuit under the target frequency; finally, the capacitance value of the first series capacitor is adjusted to the first capacitance value, and the capacitance value of the second series capacitor is adjusted to the second capacitance value, so that the impedance of the antenna radiation circuit is matched with the impedance of the radio frequency power amplifier circuit, and the efficiency is higher compared with a field debugging mode.
Drawings
Fig. 1 is a schematic flow chart illustrating a capacitance matching method according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of an antenna radiation circuit according to an embodiment of the present application;
FIG. 3 is a schematic diagram of an antenna radiation circuit after series-parallel conversion according to an embodiment of the present application;
FIG. 4 is a schematic diagram of an equivalent circuit at two ends of an antenna during a measurement process according to an embodiment of the present application;
FIG. 5 is a simplified schematic diagram of an equivalent circuit at two ends of an antenna during a measurement process according to an embodiment of the present application;
fig. 6 is an internal structural view of the apparatus according to an embodiment of the present application.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without any inventive step are within the scope of protection of the present application.
It should be noted that all directional indicators (such as up, down, left, right, front, back, 8230; \8230;) in the embodiments of the present application are only used to explain the relative positional relationship between the components, the movement, etc. in a specific posture (as shown in the attached drawings), and if the specific posture is changed, the directional indicators are changed accordingly, and the connection may be a direct connection or an indirect connection.
Furthermore, descriptions in this application as to "first," "second," etc. are for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature. In addition, technical solutions between the embodiments may be combined with each other, but must be based on the realization of the technical solutions by a person skilled in the art, and when the technical solutions are contradictory to each other or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope claimed in the present application.
Fig. 1 is a schematic flowchart of a capacitance matching method according to an embodiment, where the capacitance matching method is applied to an antenna radiation circuit, as shown in fig. 2, the antenna radiation circuit includes an antenna 101 and a capacitance matching circuit 102, and the capacitance matching method includes steps S110 to S130.
Step S110, obtaining the equivalent parallel impedance resistance value of the antenna under the target frequency and the inductance value of the series inductor in the antenna.
The target frequency is one of the working frequencies of the antenna, and the target frequency can be the working frequency of the expected antenna in the working process; the equivalent parallel impedance resistance value is a radiation resistor R connected in series in the antenna rad And loss resistance R loss Parallel equivalent resistance R obtained after series-parallel conversion P The resistance value of (1); the equivalent parallel impedance resistance value can be obtained by calculation or measured by a vector network analyzer.
Specifically, the capacitance matching circuit includes a first series capacitor C1 and a second series capacitor C2 connected in series, one end of the radio frequency power amplifier circuit 100 is connected to ground, and the other end is connected to the first series capacitor C1 and the second series capacitor C2 respectivelyC2 connected to transmit drive signal to antenna radiation circuit, wherein the impedance R D The resistance value of the optimal output impedance at the end of the radio frequency power amplifier circuit is obtained; the circuit model of the antenna may be formed by series-connected radiation resistors R rad Loss resistance R loss And a series inductor Ls, the specific connection relationship of which is shown in FIG. 2, and the series radiation resistor R can be converted in series and parallel rad And loss resistance R loss Converted into a parallel equivalent resistance R connected in parallel with the series inductance Ls P As shown in FIG. 3, the equivalent resistance R is connected in parallel at the target frequency P Is called the equivalent parallel resistance value.
In addition, the inductance of the series inductance Ls can be calculated according to the structure of the antenna or measured by a vector network analyzer.
Step S120, inputting the equivalent parallel impedance resistance value, the inductance of the series inductor, the optimal output impedance resistance value of the radio frequency power amplifier circuit, and the target frequency into the capacitance matching model, and obtaining a first capacitance value of the first series capacitor C1 and a second capacitance value of the second series capacitor C2 in the capacitance matching circuit at the target frequency.
Wherein the capacitance matching model is represented as:
Figure BDA0003881082800000061
Figure BDA0003881082800000062
R d is the optimal output impedance resistance value, R, of the radio frequency power amplifier circuit p Is an equivalent parallel impedance resistance value, C 1 Is a first capacitance value, C 2 Is a second capacitance value, f o At the target frequency, L is the inductance of the series inductor Ls.
Specifically, the capacitance matching model may be composed of the above formula (1) and formula (2), and the first capacitance value and the second capacitance value may be obtained through the formula (1) and the formula (2). Parallel equivalent resistance R P The antenna can be obtained by calculation conversionThe input impedance of the radiation circuit end is equal to the optimal output impedance resistance R of the radio frequency power amplifier circuit for realizing impedance matching d
In step S130, the capacitance of the first series capacitor is adjusted to a first capacitance, and the capacitance of the second series capacitor is adjusted to a second capacitance.
After the first capacitance value and the second capacitance value are obtained, the value of the first series capacitor is adjusted to be the first capacitance value, and the value of the second series capacitor is adjusted to be the second capacitance value.
The capacitance matching method comprises the steps of obtaining an equivalent parallel impedance resistance value of an antenna under a target frequency and an inductance value of a series inductor in the antenna, and then inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, an optimal output impedance resistance value of a radio frequency power amplification circuit and the target frequency into a capacitance matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitance matching circuit under the target frequency; finally, the capacitance value of the first series capacitor is adjusted to the first capacitance value, and the capacitance value of the second series capacitor is adjusted to the second capacitance value, so that the impedance of the antenna radiation circuit end is matched with the impedance of the driving end, and the efficiency is higher compared with a field debugging mode.
In one embodiment, obtaining an equivalent parallel impedance resistance value of the antenna at a target frequency comprises: and obtaining a target impedance resistance value at two ends of the antenna under the target frequency measured by the measuring equipment to serve as an equivalent parallel impedance resistance value.
It is understood that the impedance value at both ends of the antenna at the target frequency can be measured by a measuring device, the real part of the impedance value can be referred to as an impedance resistance value, i.e. a target impedance resistance value, and then the target impedance resistance value is taken as an equivalent parallel impedance resistance value, and the measuring device can be, for example, a vector network analyzer.
After the impedance resistance values of the two ends of the antenna are measured by the measuring equipment under the target frequency, the equivalent parallel impedance resistance value can be directly equal to the measured impedance resistance value; in one embodiment, since the measuring device may introduce a parasitic capacitance, a parasitic resistance, and a parasitic resistance during the measurement process, the measured resistance value may be further corrected to obtain a real target impedance resistance value.
In one embodiment, obtaining a target impedance resistance value across the antenna at a target frequency measured by the measurement device includes: obtaining a mapping relation between impedance values of two ends of the antenna and working frequency measured by measuring equipment; and acquiring the antenna impedance values of the two ends of the corresponding antenna from the mapping relation based on the target frequency so as to obtain the target impedance resistance value.
It will be appreciated that the measurement device may be, for example, a vector network analyzer. The measuring equipment can directly measure the obtained impedance value at the two ends of the antenna, and the real part of the impedance value is an impedance resistance value. Under each working frequency, the impedance values of the two ends of the antenna are measured through the measuring equipment, so that the mapping relation between the impedance values of the two ends of the antenna and the working frequency is obtained, then the impedance values of the two ends of the antenna corresponding to the target frequency are obtained from the mapping relation and serve as the impedance values of the antenna, and further the impedance values of the target are obtained. Wherein the target impedance resistance value may be equal to a real part of the antenna impedance value; in one embodiment, after the antenna impedance value is obtained, the antenna impedance value may be corrected to further obtain the target resistance value.
In one embodiment, obtaining an equivalent parallel impedance resistance value of the antenna at a target frequency comprises:
determining a plurality of first reference frequencies; acquiring first reference impedance resistance values of two ends of the antenna corresponding to each first reference frequency measured by measuring equipment; inputting the target frequency, the plurality of first reference frequencies and a first reference impedance resistance value corresponding to the first reference frequencies into an impedance correction model to obtain an equivalent parallel impedance resistance value; the impedance correction model is represented as:
R ci =(R s +j2πf ci L)//(1/j2πf ci C x ) Formula (3)
R p =(2πf o L) 2 /R s +R s Formula (4)
R ci A first reference impedance resistance value R corresponding to the ith first reference frequency s Is a series resistance value, f ci Is the ith first reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel sign.
It will be appreciated that if the series resistance value R is s Unknown, the impedance can be calculated according to the impedance resistance value measured by the measuring equipment. The measuring device may introduce parasitic capacitance, parasitic conductance, parasitic resistance and parasitic inductance during the measurement process, and the equivalent circuit may be as shown in fig. 4, wherein the parasitic conductance G x Parasitic resistance R x And parasitic inductance L x Has negligible effect on the circuit and can therefore be simplified to include only the parasitic capacitance C X As shown in fig. 5.
The first reference frequency may be a certain frequency of the operating frequencies, since the parasitic capacitance of the measuring device does not change with the operating frequencies, and the parasitic capacitance C X Parasitic capacitance value and series resistance value R of s Unknown, therefore, a plurality of first reference frequencies can be determined, then the first reference impedance resistance value corresponding to each first reference frequency measured by the same measuring equipment is obtained, and finally each first reference frequency and the corresponding first reference impedance resistance value are input into the first resistance equivalent model to obtain the series resistance value R s Further obtain the equivalent parallel resistance R p . Wherein the first reference impedance resistance value may be equal to a real part of an impedance value measured across the antenna by the measurement device at the first reference frequency. The "/" symbol indicates that two parameters before and after the symbol need to be calculated by parallel calculation formulas.
The number of the first reference frequencies can be determined according to the inductance L of the series inductor in the first resistance equivalent model. For example, due to parasitic capacitance C x And a series resistance value R s If the inductance L of the series inductor is known, only two parameters are unknown in the model, and at this time, the series resistance R can be solved by at least two groups of first reference frequencies and first reference impedance resistance values s Specifically, each set of the first reference frequency and the first reference impedance is electrically connectedSubstituting the resistance value into a formula (3) in the model to obtain two groups of binary equations, and combining the two equations to solve to obtain two unknown parameters; wherein the series resistance of the antenna may be equal to the radiation resistance R of the antenna circuit rad And loss resistance R loss Sum of, wherein the radiation resistance R rad And loss resistance R loss And the calculation can be respectively carried out according to the structural size of the antenna.
If the inductance L of the series inductor is unknown, three parameters are unknown in the model, and at least three groups of first reference frequencies and first reference impedance resistance values are needed to solve the series resistance value R s Specifically, each set of the first reference frequency and the first reference impedance resistance value is substituted into a formula (3) in the model to obtain three sets of ternary equations, and three unknown parameters can be obtained by combining the three equations to solve. In order to improve the accuracy of the equivalent parallel impedance resistance, in one embodiment, the inductance L of the series inductor may be regarded as an unknown parameter, and the number of the first reference frequencies is three. In one embodiment, obtaining the first reference impedance resistance values at the two ends of the antenna corresponding to the first reference frequencies measured by the measuring device includes: obtaining a mapping relation between impedance values at two ends of the antenna and working frequency measured by measuring equipment; and acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the first reference frequencies so as to obtain a first reference impedance resistance value.
It can be understood that, after obtaining the mapping relationship between the impedance values at the two ends of the antenna measured by the measuring device and the operating frequency and determining the plurality of first reference frequencies, the impedance values at the two ends of the antenna may be obtained from the mapping relationship based on each first reference frequency, and then the real parts of the impedance values at the two ends of the antenna are used as the first reference impedance resistance values.
In one embodiment, obtaining the inductance of the series inductance in the antenna comprises: determining a plurality of second reference frequencies; acquiring second reference impedance resistance values of two ends of the antenna corresponding to each second reference frequency measured by the measuring equipment; inputting the plurality of second reference frequencies and second reference impedance resistance values corresponding to the second reference frequencies into a resistance equivalent model to obtain inductance values of the series inductors; the resistance equivalent model is expressed as:
R dj =(R s +j2πf dj L)//(1/j2πf dj C x )
R dj a second reference impedance resistance value R corresponding to the jth second reference frequency s Is a series resistance value, f dj Is the jth second reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel symbol.
It can be understood that if the inductance of the series inductor is unknown, the inductance can be calculated according to the impedance resistance measured by the measuring equipment. The measuring device may introduce parasitic capacitance, parasitic conductance, parasitic resistance, parasitic inductance, etc. during the measurement process, and the equivalent circuit may be as shown in fig. 4, wherein the parasitic conductance G x Parasitic resistance R x And parasitic inductance L x Has negligible influence on the circuit, and thus can be simplified to include only the parasitic capacitance C X As shown in fig. 5.
The second reference frequency can be a certain frequency in the working frequency, since the inductance of the series inductor does not change with the change of the working frequency, and the parasitic capacitance C X The parasitic capacitance value and the inductance of the series inductor are unknown, so that a plurality of second reference frequencies can be determined, then a second reference impedance resistance value corresponding to each second reference frequency measured by the same measuring equipment is obtained, and finally each second reference frequency and the corresponding second reference impedance resistance value are input into a resistance equivalent model to obtain the inductance of the series inductor.
Wherein the number of the second reference frequencies is determined by the series resistance R in the resistance equivalent model s And (4) determining. For example, inductance L and parasitic capacitance C due to series inductance x If not known, the series resistance R s If known, only two parameters are unknown in the model, at this time, the inductance L of the series inductor can be solved by at least two sets of the second reference frequency and the second reference impedance resistance value, specifically, each set of the second reference frequency and the second reference impedance resistance value are brought into the model to obtain two sets of binary equations,two unknown parameters can be obtained by combining two equations for solving; if series resistance value R s And if the three parameters are unknown, the three parameters are unknown in the model, at least three groups of second reference frequencies and second reference impedance resistance values are needed to solve the inductance L of the series inductor, each group of second reference frequencies and second reference impedance resistance values are brought into the model to obtain three groups of ternary equations, and the three equations are combined to solve to obtain the three unknown parameters. To improve the accuracy of the inductance L of the series inductor, in one embodiment, the series resistance R may be set s The number of second reference frequencies, considered as unknown parameters, is three.
Wherein the first reference frequency and the second reference frequency can be the same reference frequency when the series resistance value R S Unknown, when the inductance of the series inductance is obtained by using the resistance equivalent model, the series resistance R can be obtained at the same time S Further, an equivalent parallel impedance resistance value can be obtained based on a formula (4) in the impedance correction model; similarly, when the inductance of the series inductor is unknown, the inductance of the series inductor can be obtained simultaneously when the impedance correction model is used for obtaining the equivalent parallel impedance resistance value.
In one embodiment, the obtaining of the second reference impedance resistance values at the two ends of the antenna corresponding to the second reference frequencies measured by the measuring device includes: obtaining a mapping relation between impedance values of two ends of the antenna and working frequency measured by measuring equipment; and acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the second reference frequencies to obtain a second reference impedance resistance value.
It can be understood that, after obtaining the mapping relationship between the impedance value at the two ends of the antenna measured by the measuring device and the operating frequency and determining the plurality of second reference frequencies, the impedance value at the two ends of the antenna may be obtained from the mapping relationship based on each second reference frequency, and then the real part of the impedance value at the two ends of the antenna is taken as the second reference impedance resistance value.
Theoretically, the inductance of the series inductor in the antenna can be obtained by the following calculation formula:
Figure BDA0003881082800000101
wherein, mu o In order to obtain the magnetic conductivity of the antenna, a1 is the length of the antenna, a2 is the width of the antenna, t is the thickness of the metal conductor of the antenna, and w is the trace width of the metal conductor of the antenna.
It can be understood that the inductance of the series inductor is calculated according to the parameters measured by the measuring device by using the equivalent resistance model described in the above embodiment, and then verified by calculating according to the antenna structure parameters, so as to determine whether the inductance of the series inductor measured and calculated by using the measuring device is in a reasonable range.
The embodiment of the invention also provides a capacitance matching method which is applied to an antenna radiation circuit, wherein the antenna radiation circuit comprises an antenna and a capacitance matching circuit, and the method comprises the steps (a), (b 1) to (b 2), (c 1) to (c 3), (d 1) to (d 4) and (e 1) to (e 2).
And (a) obtaining a mapping relation between the impedance values of the two ends of the antenna and the working frequency measured by the measuring equipment.
And (b 1) acquiring antenna impedance values of two ends of the corresponding antenna from the mapping relation based on the target frequency so as to obtain a target impedance resistance value.
And (b 2) taking the target impedance resistance value as an equivalent parallel impedance resistance value.
Step (c 1), determining a plurality of first reference frequencies.
And (c 2) acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the first reference frequencies to obtain a first reference impedance resistance value.
Step (c 3), inputting the target frequency, the plurality of first reference frequencies and first reference impedance resistance values corresponding to the first reference frequencies into an impedance correction model to obtain equivalent parallel impedance resistance values; the impedance correction model is represented as:
R ci =(R s +j2πf ci L)//(1/j2πf ci C x )
R p =(2πf o L) 2 /R s +R s
R ci a first reference impedance resistance value, R, corresponding to the ith first reference frequency s Is a series resistance value, C x Is the parasitic capacitance value, f ci At the ith first reference frequency, L is the inductance of the series inductor and "/" is the parallel symbol.
And (d 1) determining a plurality of second reference frequencies.
And (d 2) obtaining the mapping relation between the impedance values of the two ends of the antenna and the working frequency measured by the measuring equipment.
And (d 3) acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the second reference frequencies to obtain a second reference impedance resistance value.
Step (d 4), inputting the plurality of second reference frequencies and second reference impedance resistance values corresponding to the second reference frequencies into a resistance equivalent model to obtain inductance values of the series inductors; the resistance equivalent model is expressed as:
R dj =(R s +j2πf dj L)//(1/j2πf dj C x )
R dj a second reference impedance resistance value R corresponding to the jth second reference frequency s Is a series resistance value, f dj Is the jth second reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel symbol.
Step (e 1), inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, the optimal output impedance resistance value of the radio frequency power amplifier circuit and the target frequency into a capacitor matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitor matching circuit under the target frequency;
adjusting the capacitance value of the first series capacitor to a first capacitance value, and adjusting the capacitance value of the second series capacitor to a second capacitance value; wherein the capacitance matching model is represented as:
Figure BDA0003881082800000121
Figure BDA0003881082800000122
R d is the optimal output impedance resistance value, R, of the radio frequency power amplifier circuit p Is an equivalent parallel impedance resistance value, C 1 Is a first capacitance value, C 2 Is a second capacitance value, f o For the target frequency, L is the inductance of the series inductor.
The steps (b 1) to (b 2) and the steps (c 1) to (c 3) are performed in a manner of obtaining an equivalent parallel resistance value, and may be performed alternatively. It should be understood that, although the respective steps in the flowchart of fig. 1 described above are sequentially displayed as indicated by arrows, and the respective steps in the step (a), the step (b 1) to the step (b 2), the step (c 1) to the step (c 3), the step (d 1) to the step (d 4), and the step (e 1) to the step (e 2) are sequentially displayed as indicated by reference numerals, these steps are not necessarily performed sequentially in the order indicated by arrows or numerals. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 1 may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of performing the steps or stages is not necessarily sequential, but may be performed alternately or in alternation with other steps or at least a portion of the other steps or stages.
An embodiment of the present invention further provides a capacitive matching apparatus, which is applied to an antenna radiation circuit, where the antenna radiation circuit includes an antenna and a capacitive matching circuit, and the apparatus may adopt a software module or a hardware module, or a combination of the two modules to form a part of a computer device, and the apparatus specifically includes: the device comprises an acquisition module, a matching module and an adjusting module, wherein: the acquisition module is used for acquiring the equivalent parallel impedance resistance value of the antenna under the target frequency and the inductance value of the series inductor in the antenna; the matching module is used for inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, the optimal output impedance resistance value of the radio frequency power amplifier circuit and the target frequency into the capacitor matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitor matching circuit under the target frequency; the adjusting module is used for adjusting the capacitance value of the first series capacitor to a first capacitance value and adjusting the capacitance value of the second series capacitor to a second capacitance value; wherein the capacitance matching model is represented as:
Figure BDA0003881082800000123
Figure BDA0003881082800000124
R d is the optimal output impedance resistance value, R, of the radio frequency power amplifier circuit p Is an equivalent parallel impedance resistance value, C 1 Is a first capacitance value, C 2 Is a second capacitance value, f o For the target frequency, L is the inductance of the series inductor.
In an embodiment, the obtaining module is further configured to obtain a target impedance resistance value at two ends of the antenna at the target frequency measured by the measuring device, as the equivalent parallel impedance resistance value.
In one embodiment, the obtaining module is further configured to obtain a mapping relationship between impedance values at two ends of the antenna measured by the measuring device and the operating frequency; and acquiring the antenna impedance values of the two ends of the corresponding antenna from the mapping relation based on the target frequency so as to obtain the target impedance resistance value.
In one embodiment, the acquisition module is further configured to determine a plurality of first reference frequencies; acquiring first reference impedance resistance values of two ends of the antenna corresponding to each first reference frequency measured by measuring equipment; inputting the target frequency, the plurality of first reference frequencies and a first reference impedance resistance value corresponding to the first reference frequencies into an impedance correction model to obtain an equivalent parallel impedance resistance value; the impedance correction model is represented as:
R ci =(R s +j2πf ci L)//(1/j2πf ci C x )
R p =(2πf o L) 2 /R s +R s
R ci a first reference impedance resistance value, R, corresponding to the ith first reference frequency s Is a series resistance value, f ci Is the ith first reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel sign.
In one embodiment, the obtaining module is further configured to obtain a mapping relationship between impedance values at two ends of the antenna measured by the measuring device and the operating frequency; and acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the first reference frequencies to obtain a first reference impedance resistance value.
In one embodiment, the acquisition module is further configured to determine a plurality of second reference frequencies; acquiring second reference impedance resistance values of two ends of the antenna corresponding to each second reference frequency measured by the measuring equipment; inputting the plurality of second reference frequencies and second reference impedance resistance values corresponding to the second reference frequencies into the resistance equivalent model to obtain inductance values of the series inductors;
the resistance equivalent model is expressed as:
R dj =(R s +j2πf dj L)//(1/j2πf dj C x )
R dj a second reference impedance resistance value, R, corresponding to the jth second reference frequency s Is a series resistance value, f dj Is the jth second reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel symbol.
In one embodiment, the obtaining module is further configured to obtain a mapping relationship between impedance values at two ends of the antenna measured by the measuring device and the operating frequency; and acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the second reference frequencies to obtain a second reference impedance resistance value.
For the specific definition of the capacitance matching device, reference may be made to the above definition of the capacitance matching method, which is not described herein again. The various modules in the capacitive matching apparatus described above may be implemented in whole or in part by software, hardware, and combinations thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
In one embodiment, a capacitive matching device is provided, which may be a terminal device, the internal structure of which may be as shown in fig. 6. The capacitance matching device comprises a processor, a memory, a communication interface, a display screen and an input device which are connected through a system bus. Wherein the processor of the capacitive matching device is used to provide computational and control capabilities. The capacitance-matched memory comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The communication interface of the capacitance matching device is used for carrying out wired or wireless communication with an external terminal, and the wireless communication can be realized through WIFI, an operator network, NFC (near field communication) or other technologies. The computer program is executed by a processor to implement a method of capacitance matching.
It will be understood by those skilled in the art that the structure shown in fig. 6 is a block diagram of only a portion of the structure relevant to the present application, and does not constitute a limitation on the capacitive matching device to which the present application is applied, and a particular capacitive matching device may include more or less components than shown in the drawings, or combine certain components, or have a different arrangement of components.
In an embodiment, a capacitance matching device is provided, comprising a memory in which a computer program is stored and a processor which, when executing the computer program, carries out the steps of the above-mentioned method embodiments.
In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored which, when being executed by a processor, carries out the steps of the above-mentioned method embodiments.
In one embodiment, a computer program product or computer program is provided that includes computer instructions stored in a computer-readable storage medium. The computer instructions are read by a processor of the computer device from the computer-readable storage medium, and the computer instructions are executed by the processor to cause the computer device to perform the steps in the above-described method embodiments.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above may be implemented by hardware related to instructions of a computer program, which may be stored in a non-volatile computer-readable storage medium, and when executed, may include the processes of the embodiments of the methods described above. Any reference to memory, storage, database or other medium used in the embodiments provided herein can include at least one of non-volatile and volatile memory. Non-volatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, or the like. Volatile Memory can include Random Access Memory (RAM) or external cache Memory. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), among others.
The above description is only a preferred embodiment of the present application, and not intended to limit the scope of the present application, and all the equivalent structures or equivalent processes that can be directly or indirectly applied to other related technical fields by using the contents of the specification and the drawings of the present application are also included in the scope of the present application.

Claims (10)

1. A capacitive matching method applied to an antenna radiation circuit including an antenna and a capacitive matching circuit, the method comprising:
obtaining an equivalent parallel impedance resistance value of an antenna at a target frequency and an inductance value of a series inductor in the antenna;
inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, the optimal output impedance resistance value of the radio frequency power amplifier circuit and the target frequency into a capacitor matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitor matching circuit under the target frequency;
adjusting the capacitance value of the first series capacitor to the first capacitance value and the capacitance value of the second series capacitor to the second capacitance value;
wherein the capacitance matching model is represented as:
Figure FDA0003881082790000011
Figure FDA0003881082790000012
R d is the optimal output impedance resistance value, R, of the radio frequency power amplifier circuit p Is the equivalent parallel impedance resistance value, C 1 Is the first capacitance value, C 2 Is the second capacitance value, f o And L is the inductance of the series inductor at the target frequency.
2. The method of claim 1, wherein obtaining an equivalent parallel impedance resistance value of the antenna at a target frequency comprises:
and acquiring a target impedance resistance value at two ends of the antenna under the target frequency measured by the measuring equipment to serve as the equivalent parallel impedance resistance value.
3. The capacitance matching method according to claim 2, wherein the obtaining of the target impedance resistance value across the antenna at the target frequency measured by the measurement device comprises:
obtaining a mapping relation between impedance values at two ends of the antenna and working frequency measured by the measuring equipment;
and acquiring corresponding antenna impedance values at two ends of the antenna from the mapping relation based on the target frequency so as to obtain the target impedance resistance value.
4. The method of claim 1, wherein obtaining an equivalent parallel impedance resistance value of the antenna at a target frequency comprises:
determining a plurality of first reference frequencies;
acquiring a first reference impedance resistance value of the two ends of the antenna corresponding to each first reference frequency measured by measuring equipment;
inputting the target frequency, the plurality of first reference frequencies and the first reference impedance resistance value corresponding to the first reference frequency into an impedance correction model to obtain the equivalent parallel impedance resistance value; the impedance correction model is represented as:
R ci =(R s +j2πf ci L)//(1/j2πf ci C x )
R p =(2πf o L) 2 /R s +R s
R ci a value of said first reference impedance resistance, R, corresponding to the ith said first reference frequency s Is a series resistance value, f ci Is the ith said first reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel sign.
5. The capacitance matching method according to claim 4, wherein the obtaining of the first reference impedance resistance values at the two ends of the antenna corresponding to the first reference frequencies by the measurement device comprises:
obtaining a mapping relation between impedance values at two ends of the antenna and working frequency measured by the measuring equipment;
and acquiring impedance values of two ends of the corresponding antenna from the mapping relation based on the first reference frequencies to obtain the first reference impedance resistance value.
6. The capacitance matching method according to claim 1, wherein the obtaining the inductance of the series inductor in the antenna comprises:
determining a plurality of second reference frequencies;
acquiring second reference impedance resistance values of two ends of the antenna corresponding to the second reference frequencies measured by the measuring equipment;
inputting the plurality of second reference frequencies and the second reference impedance resistance values corresponding to the second reference frequencies into a resistance equivalent model to obtain the inductance of the series inductor;
the resistance equivalent model is represented as:
R dj =(R s +j2πf dj L)//(1/j2πf dj C x )
R dj a value of said second reference impedance resistance, R, corresponding to a jth of said second reference frequency s Is a series resistance value, f dj For the jth said second reference frequency, L is the inductance of the series inductor, C x For parasitic capacitance values, "/" is the parallel sign.
7. The capacitance matching method according to claim 6, wherein the obtaining of the second reference impedance resistance values at the two ends of the antenna corresponding to the second reference frequencies measured by the measuring device includes:
obtaining a mapping relation between the impedance values of the two ends of the antenna and the working frequency measured by the measuring equipment;
and acquiring impedance values of two ends of the corresponding antenna from a mapping relation based on the second reference frequencies to obtain the second reference impedance resistance value.
8. A capacitive matching apparatus for use in an antenna radiating circuit comprising an antenna and a capacitive matching circuit, the apparatus comprising:
the antenna comprises an acquisition module, a detection module and a control module, wherein the acquisition module is used for acquiring an equivalent parallel impedance resistance value of an antenna under a target frequency and an inductance value of a series inductor in the antenna;
the matching module is used for inputting the equivalent parallel impedance resistance value, the inductance value of the series inductor, the optimal output impedance resistance value of the radio frequency power amplifier circuit and the target frequency into a capacitance matching model to obtain a first capacitance value of a first series capacitor and a second capacitance value of a second series capacitor in the capacitance matching circuit under the target frequency;
the adjusting module is used for adjusting the capacitance value of the first series capacitor to the first capacitance value and adjusting the capacitance value of the second series capacitor to the second capacitance value;
wherein the capacitance matching model is represented as:
Figure FDA0003881082790000031
Figure FDA0003881082790000032
R d is the optimal output impedance resistance value, R, of the radio frequency power amplifier circuit p Is the equivalent parallel impedance resistance value, C 1 Is the first capacitance value, C 2 Is the second capacitance value, f o And L is the inductance of the series inductor at the target frequency.
9. A capacitance matching device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor realizes the steps of the method of any of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 7.
CN202211229914.6A 2022-10-08 2022-10-08 Capacitance matching method, device, equipment and readable storage medium Pending CN115664368A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116148584A (en) * 2023-04-18 2023-05-23 紫光同芯微电子有限公司 Wireless charging parameter testing method, device, equipment and medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116148584A (en) * 2023-04-18 2023-05-23 紫光同芯微电子有限公司 Wireless charging parameter testing method, device, equipment and medium
CN116148584B (en) * 2023-04-18 2023-09-01 紫光同芯微电子有限公司 Wireless charging parameter testing method, device, equipment and medium

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