CN115602121A - Control system, method, display device and storage medium of display panel - Google Patents

Abstract

Embodiments of the present application provide a control system, a method, a display device, and a storage medium for a display panel. The display panel includes a display area, and the display area includes M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; The system includes: a detection circuit, the detection circuit is used to obtain the working status parameters of the M partitions, the working status parameters are used to feed back the working status of the partitions, and determine the voltage adjustment parameters of the M partitions according to the working status parameters of the M partitions; The chip is electrically connected to the detection circuit, and is used to determine the voltage value of the target voltage signal corresponding to each of the M partitions according to the voltage adjustment parameters of the M partitions, and send the voltage value to the M partition according to the voltage value of the target voltage signal corresponding to each of the M partitions. The pixel circuits in each partition provide target voltage signals. The embodiments of the present application can reduce the power consumption of the display panel.

Description

Control system, method, display device and storage medium of display panel

technical field

The present application belongs to the field of display technology, and in particular relates to a control system, method, display device and storage medium of a display panel.

Background technique

With the development of display technology, the application of display panels is becoming more and more extensive, and the corresponding requirements for display panels are also getting higher and higher. The display panel includes a plurality of pixel circuits, and the signal lines connected to the pixel circuits can provide the pixel circuits with voltage signals meeting the working requirements of the pixel circuits, so that the pixel circuits can normally drive the light-emitting elements to emit light.

However, the inventors of the present application found that the current power supply solution has a problem of high power consumption when supplying power to multiple pixel circuits of the display panel.

Contents of the invention

Embodiments of the present application provide a control system and method for a display panel, a display device, and a storage medium, which can reduce power consumption of the display panel.

In the first aspect, an embodiment of the present application provides a control system for a display panel. The display panel includes a display area, and the display area includes M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the control system includes : detection circuit, the detection circuit is used to obtain the working status parameters of M partitions, the working status parameters are used to feed back the working status of the partitions, and determine the voltage adjustment parameters of the M partitions according to the working status parameters of the M partitions; the driver chip, It is electrically connected with the detection circuit, and is used to determine the voltage value of the target voltage signal corresponding to each of the M partitions according to the voltage adjustment parameters of the M partitions, and to send the voltage value to the M partitions according to the voltage value of the target voltage signal corresponding to each of the M partitions. The pixel circuit in provides the target voltage signal.

In the second aspect, the embodiment of the present application provides a control method of a display panel, the display panel includes a display area, and the display area includes M partitions, each of which includes at least one pixel circuit, and M is greater than 1 Integer; the control method includes: obtaining the working status parameters of the M partitions, the working status parameters are used to feed back the working status of the partitions; according to the working status parameters of the M partitions, determine the M Voltage adjustment parameters of the M partitions; according to the voltage adjustment parameters of the M partitions, determine the voltage values of the target voltage signals corresponding to the M partitions; according to the voltage values of the target voltage signals corresponding to the M partitions, The target voltage signal is provided to the pixel circuits in the M partitions.

In a third aspect, an embodiment of the present application provides a display device, and the display device includes the control system for a display panel as provided in the first aspect.

In a fourth aspect, the embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method for controlling a display panel as provided in the second aspect are implemented.

The control system, method, display device, and storage medium of the display panel in the embodiment of the present application divide the display area of the display panel into M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; The circuit obtains the working state parameters of the M partitions, and determines the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions; the driver chip determines the corresponding target voltage signals of the M partitions according to the voltage adjustment parameters of the M partitions According to the voltage value of the target voltage signal corresponding to each of the M partitions, the target voltage signal is provided to the pixel circuits in the M partitions, so as to realize the dynamic adjustment of the voltage value of the target voltage signal of each partition and reduce the display voltage. The effect of the power consumption of the panel.

Description of drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the accompanying drawings that need to be used in the embodiments of the present application. Additional figures can be derived from these figures.

FIG. 1 is a schematic structural diagram of a control system of a display panel provided by an embodiment of the present application;

FIG. 2 is a schematic diagram of the corresponding partition distribution in various display modes of the display panel;

FIG. 3 is another schematic structural diagram of a control system of a display panel provided by an embodiment of the present application;

Fig. 4 is another schematic structural diagram of the control system of the display panel provided by the embodiment of the present application;

Fig. 5 is another schematic structural diagram of the control system of the display panel provided by the embodiment of the present application;

FIG. 6 is a schematic circuit diagram of a pixel circuit in a display panel provided by an embodiment of the present application;

FIG. 7 is a schematic cross-sectional view of a display panel provided by an embodiment of the present application;

FIG. 8 is a schematic flowchart of a method for controlling a display panel provided by an embodiment of the present application;

FIG. 9 is another schematic flowchart of a method for controlling a display panel provided by an embodiment of the present application;

FIG. 10 is a schematic flowchart of S803 in the control method of the display panel in FIG. 8;

FIG. 11 is a schematic flowchart of S803 in the control method of the display panel in FIG. 8;

FIG. 12 shows a schematic diagram of a hardware structure of an electronic device provided by an embodiment of the present application.

detailed description

The characteristics and exemplary embodiments of various aspects of the application will be described in detail below. In order to make the purpose, technical solution and advantages of the application clearer, the application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described here are only intended to explain the present application rather than limit the present application. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by showing examples of the present application.

It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is a relationship between these entities or operations. There is no such actual relationship or order between them. Furthermore, the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article or apparatus comprising a set of elements includes not only those elements, but also includes elements not expressly listed. other elements of or also include elements inherent in such a process, method, article, or device. Without further limitations, an element defined by the statement "comprising..." does not exclude the presence of additional same elements in the process, method, article or device comprising said element.

It should be understood that the term "and/or" used herein is only an association relationship describing associated objects, which means that there may be three relationships, for example, A and/or B, which may mean that A exists alone, and A and B exist simultaneously. B, there are three situations of B alone. In addition, the character "/" in this article generally indicates that the contextual objects are an "or" relationship.

It should be noted that the transistors in the embodiments of the present application may be N-type transistors or P-type transistors, except for the cases that are emphasized. For an N-type transistor, the on-level is a high level, and the off-level is a low level. That is, when the gate of the N-type transistor is at a high level, the first electrode and the second electrode are turned on, and when the gate of the N-type transistor is at a low level, the first electrode and the second electrode are turned off. For a P-type transistor, the on-level is low level, and the off-level is high level. That is, when the control level of the P-type transistor is very low, the connection between the first pole and the second pole is conducted, and when the control terminal of the P-type transistor is high level, the connection between the first pole and the second pole is turned off. In specific implementation, the gates of the above-mentioned transistors are used as their control electrodes, and, according to the signals and types of the gates of each transistor, the first pole can be used as a source, the second pole can be used as a drain, or its The first pole is used as the drain, and the second pole is used as the source, and no distinction is made here. In addition, the on-level and off-level in the embodiments of the present invention are general references, and the on-level refers to any level that can turn on the transistor. The cut-off level refers to any level that can turn off/off the transistor.

In the embodiment of the present application, the term "electrically connected" may refer to a direct electrical connection between two components, or may refer to an electrical connection between two components via one or more other components.

In the embodiment of the present application, the first node is only defined for the convenience of describing the circuit structure, and the first node is not an actual circuit unit.

It will be apparent to those skilled in the art that various modifications and changes can be made in the application without departing from the spirit or scope of the application. Therefore, the present application intends to cover the modifications and changes of the present application falling within the scope of the corresponding claims (technical solutions to be protected) and their equivalents. It should be noted that, the implementation manners provided in the embodiments of the present application may be combined with each other if there is no contradiction.

Before explaining the technical solutions provided by the embodiments of the present application, in order to facilitate the understanding of the embodiments of the present application, the present application first specifically explains the problems existing in the related technologies:

The display panel includes a plurality of pixel circuits, and the signal lines connected to the pixel circuits can provide the pixel circuits with voltage signals meeting the working requirements of the pixel circuits, so that the pixel circuits can normally drive the light-emitting elements to emit light.

When a user uses an electronic device equipped with a display panel, sometimes only a part of the display area of the display panel (called the target area) may be required to display content, while non-target areas in the display area other than the target area may not display content. The content or brightness is lower than that of the target area.

However, the inventors of the present application found that the current power supply scheme is to share a set of voltage signals for the display area of the entire display panel, so that the non-target area must also share the same voltage setting as the target area, resulting in unnecessary power supply. The power loss of the display panel makes the power consumption of the display panel larger.

In view of the above research findings of the inventors, the embodiments of the present application provide a display panel control system, method, display device, and storage medium, which can solve the technical problem of high power consumption of the display panel in the related art.

The technical idea of the embodiment of the present application is to divide the display area of the display panel into M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the working state parameters of the M partitions are obtained through the detection circuit, And according to the working state parameters of the M partitions, determine the voltage adjustment parameters of the M partitions; the driver chip determines the voltage value of the target voltage signal corresponding to each of the M partitions according to the voltage adjustment parameters of the M partitions, and according to the respective Corresponding to the voltage value of the target voltage signal, the target voltage signal is provided to the pixel circuits in the M partitions, so as to realize the dynamic adjustment of the voltage value of the target voltage signal of each partition, such as making the voltage value of the target voltage signal in the non-target area less than The voltage value of the target voltage signal in the target area achieves the effect of reducing the power consumption of the display panel.

The control system of the display panel provided by the embodiment of the present application will firstly be introduced below.

FIG. 1 is a schematic structural diagram of a control system for a display panel provided by an embodiment of the present application. As shown in FIG. 1 , the display panel may include a display area AA, and the display area AA may include M partitions a, where M is an integer greater than 1. That is, the display area AA may include a plurality of partitions a. Each subregion a may include at least one pixel circuit (not shown in the figure). Exemplarily, the pixel circuits include but are not limited to 2T1C pixel circuits, 7T1C pixel circuits, 7T2C pixel circuits, 8T1C pixel circuits, or 9T1C pixel circuits. The 2T1C pixel circuit, that is, the pixel circuit includes two thin film transistors (Thin Film Transistor, TFT) and a storage capacitor. The 7T2C pixel circuit, that is, the pixel circuit includes 7 TFTs and 2 storage capacitors. Other types of pixel circuits are deduced by analogy, which will not be repeated here.

The control system 10 of the display panel may include a detection circuit 101 and a driving chip 102 . The detection circuit 101 can be electrically connected to the M partitions a, respectively, and used to acquire the working state parameters of the M partitions a. Wherein, the working state parameter is a parameter that can be used to feed back the working state of the partition. Exemplarily, the working state parameter includes but not limited to the voltage value of the data voltage signal, the driving current of the pixel circuit, the refresh rate or the touch capacitance value and the like. The detection circuit 101 can also be used to determine the voltage adjustment parameter k of the M subregions a according to the working state parameters of the M subregions a. Wherein, the voltage adjustment parameter k may be a value greater than 0, such as 0.2, 1.5 or other values. The voltage adjustment parameter k can be used to adjust the voltage value of the target voltage signal. Exemplarily, the target voltage signal includes but not limited to a reference voltage signal, a first power supply voltage signal and/or a second power supply voltage signal, and each signal will be described in detail below.

The driving chip 102 can be electrically connected with the detection circuit 101, and the driving chip 102 can be used to determine the voltage value of the target voltage signal corresponding to each of the M partitions a according to the voltage adjustment parameter k of the M partitions a. That is, through the voltage adjustment parameter k of each zone a, the voltage value of the target voltage signal corresponding to each zone a is adjusted. The driving chip 102 can also be used to provide target voltage signals to the pixel circuits in the M subregions a according to the voltage values of the target voltage signals corresponding to the M subregions a. That is, for any i-th partition a, the driver chip 102 can be used to provide the pixel circuit in the i-th partition a with a target voltage corresponding to the voltage value according to the voltage value of the target voltage signal corresponding to the i-th partition a Signal, i is a positive integer.

In this way, the embodiment of the present application divides the display area of the display panel into M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the working state parameters of the M partitions are obtained through the detection circuit, and According to the working state parameters of the M partitions, determine the voltage adjustment parameters of the M partitions; the driver chip determines the voltage values of the target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions, and determines the voltage values of the corresponding target voltage signals according to the M partitions. The voltage value of the target voltage signal is provided to the pixel circuits in the M partitions, so as to realize the dynamic adjustment of the voltage value of the target voltage signal of each partition.

For example, the voltage value of the target voltage signal of the partition corresponding to the non-target area (hereinafter referred to as the non-target partition) can be reduced, so that the non-target partition no longer adopts the voltage of the same target voltage signal as that of the partition corresponding to the target area (hereinafter referred to as the target partition). value, but is smaller than the voltage value of the target voltage signal of the target partition, so as to achieve the effect of reducing the power consumption of the display panel.

The inventors of the present application realized that when the number of partitions a is large, the detection circuit 101 needs to transmit numerous voltage adjustment parameters to the driver chip 102 . The driver chip 102 needs to calculate each voltage adjustment parameter one by one to obtain the voltage values of the target voltage signals of multiple partitions. Whether it is data transmission or data calculation, it takes a certain amount of time.

In view of this, according to some embodiments of the present application, optionally, the detection circuit 101 may also be configured to generate a voltage adjustment parameter matrix K according to the voltage adjustment parameters k of the M partitions a. Exemplarily, the voltage adjustment parameter matrix K may be, for example:

Among them, k ₁ represents the voltage regulation parameter k of the first partition a, k _M represents the voltage regulation parameter k of the Mth partition a, and so on.

The driver chip 102 can be specifically configured to obtain a voltage value matrix V according to the voltage adjustment parameter matrix K. The voltage value matrix V may include the voltage values of the target voltage signals corresponding to the M partitions. Exemplarily, the voltage value matrix V can be, for example:

Among them, V represents the reference voltage value of the target voltage signal, k ₁ represents the voltage regulation parameter k of the first partition a, k _M represents the voltage regulation parameter k of the M-th partition a, and Vk ₁ represents the voltage corresponding to the first partition a. The voltage value of the target voltage signal, Vk _M represents the voltage value of the target voltage signal corresponding to the Mth partition a, and so on.

The driving chip 102 can also be used to provide target voltage signals to the pixel circuits in the M partitions according to the voltage value matrix V.

In this way, by generating the voltage adjustment parameter matrix K and the voltage value matrix V, the calculation and transmission of data can be facilitated, and the calculation time and transmission time can be effectively shortened.

According to some embodiments of the present application, optionally, the detection circuit 101 may specifically determine the voltage adjustment parameters of each partition through the following steps.

The detection circuit 101 can specifically be used to determine the voltage of the i-th partition for any i-th partition in the M partitions, according to the pre-established correspondence between the working state parameters and the voltage adjustment parameters and the working state parameters of the i-th partition Adjustment parameter, i is a positive integer.

For example, the corresponding voltage adjustment parameter k under different working state parameters can be obtained through experiments, simulations or model training in advance, that is, the corresponding relationship between the working state parameters and the voltage adjustment parameter k can be obtained. Then, the corresponding relationship between the working state parameter and the voltage adjustment parameter k is stored in the detection circuit 101 , the driving chip 102 or other storage modules.

After obtaining the working state parameters of the i-th partition, the voltage adjustment parameter k corresponding to the working state parameters of the i-th partition can be queried according to the corresponding relationship between the working state parameters and the voltage adjustment parameter k, so as to determine the i-th The voltage adjustment parameter k of the partition.

Taking the working state parameter as the refresh rate as an example, the voltage adjustment parameter k corresponding to different refresh rates can be obtained through experiments, simulations or model training in advance, that is, the corresponding relationship between the refresh rate and the voltage adjustment parameter k. Then, the corresponding relationship between the refresh rate and the voltage adjustment parameter k is stored in the detection circuit 101 , the driving chip 102 or other storage modules.

After obtaining the refresh rate of the i-th partition, the voltage adjustment parameter k corresponding to the refresh rate of the i-th partition can be queried according to the corresponding relationship between the refresh rate and the voltage adjustment parameter k, so as to determine the voltage of the i-th partition Tuning parameter k.

When the working state parameter is the voltage value of the data voltage signal, the driving current of the pixel circuit, or the touch capacitance value, the process corresponding to the above-mentioned refresh rate is similar and will not be repeated here.

In this way, the corresponding relationship between the working state parameter and the voltage adjustment parameter is established in advance, and stored in the detection circuit 101 , the driving chip 102 or other storage modules. After obtaining the working state parameters of each partition, you can find out the voltage adjustment parameter k of each partition according to the corresponding relationship between the working state parameters and the voltage adjustment parameters, which greatly reduces the amount of data calculation and shortens the time for determining each partition. The time of the voltage adjustment parameter k improves the data processing efficiency.

According to other embodiments of the present application, optionally, different display modes may also be preset, and the voltage adjustment parameter k corresponding to each partition may be preset for different display modes. During subsequent use, as long as it is determined which display mode the display panel is currently in, the voltage adjustment parameter k corresponding to each partition in the display mode can be directly determined.

Specifically, the display panel can be set in various display modes. Exemplarily, the multiple display modes may include a normal display mode, a browsing mode, and an always-on display mode. Each display mode is correspondingly set with voltage adjustment parameters k of multiple partitions.

The detection circuit 101 can specifically be used to: determine the target display mode of the display panel according to the working state parameters of the M partitions, and the target display mode is one of multiple display modes; The voltage adjustment parameters of multiple partitions determine the voltage adjustment parameters of M partitions.

Let’s take the working state parameter as the driving current of the pixel circuit as an example. In the off-screen display mode, for example, the driving current of the pixel circuit in the partition corresponding to the edge area of the display area is small, and the driving current of the pixel circuit in the partition corresponding to the central area of the display area is small. The driving current of the pixel circuit is relatively large. Therefore, it can be determined by judging whether the driving current of the pixel circuits in the multiple partitions corresponding to the edge area of the display area is less than the first preset threshold value, and whether the driving current of the pixel circuits in the multiple partitions corresponding to the central area of the display area is greater than The second preset threshold is used to determine whether the display panel is in the always-on display mode. Wherein, the second preset threshold is greater than the first preset threshold. The first preset threshold and the second preset threshold may be flexibly adjusted according to actual conditions, which is not limited in this embodiment of the present application.

When it is determined that the display panel is in the off-screen display mode, the voltage adjustment parameters of the M subregions may be determined according to the pre-set voltage adjustment parameters of the plurality of subregions corresponding to the off-screen display mode.

In this way, different display modes are preset, and the voltage adjustment parameter k corresponding to each partition can be preset for different display modes. During subsequent use, as long as it is determined which display mode the display panel is currently in, the voltage adjustment parameter k corresponding to each partition in the display mode can be directly determined. On the one hand, the amount of data calculation is greatly reduced, the time for determining the voltage adjustment parameter k of each partition is shortened, and the data processing efficiency is improved. On the other hand, setting different display modes meets the display requirements of the display panel in different scenarios.

According to some embodiments of the present application, optionally, different display modes may be divided into different partitions. Moreover, when the display mode is switched, the partitions in the display area may change, for example, the original m1 smaller partitions become m2 larger partitions. Among them, m2 is smaller than m1.

Specifically, the display panel may at least include a first display mode and a second display mode. In the first display mode, the display area is divided into M1 partitions a, in the second display mode, the display area is divided into M2 partitions a, M1 and M2 are both integers greater than 1, and M1 may not be equal to M2.

The detection circuit 101 can be specifically configured to determine the target display mode of the display panel according to the working state parameters of the M partitions. The detection circuit 101 can also be used to: when the target display mode is the first display mode, determine the voltage adjustment parameters of the M1 subregions according to the preset voltage adjustment parameters of the M1 subregions corresponding to the first display mode. The driver chip 102 can be used to determine the voltage value of the target voltage signal corresponding to each of the M1 partitions according to the voltage adjustment parameter k of the M1 partitions, and send the voltage value to the M1 partitions according to the voltage value of the target voltage signal corresponding to each of the M1 partitions. The pixel circuit provides the target voltage signal.

The detection circuit 101 can also be used to: when the target display mode is the second display mode, determine the voltage adjustment parameters of the M2 subregions according to the preset voltage adjustment parameters of the M2 subregions corresponding to the second display mode. The driver chip 102 can be used to determine the voltage value of the target voltage signal corresponding to each of the M2 partitions according to the voltage adjustment parameter k of the M2 partitions, and to send the voltage value to the M2 partitions according to the voltage value of the target voltage signal corresponding to each of the M2 partitions. The pixel circuit provides the target voltage signal.

FIG. 2 is a schematic diagram of the distribution of corresponding partitions in various display modes of the display panel. As shown in FIG. 2 , the display modes of the display panel include a normal display mode A, a browsing mode B and an off-screen display mode C as an example. For example, in the normal display mode A, it can be set that multiple partitions a in the central area A1 of the display area can share the same voltage adjustment parameter k4, and the edge area of the display area can be divided into three larger ones according to different positions. For the partition a, the voltage adjustment parameters corresponding to the three larger partitions a may be k1, k2 and k3 respectively. For example, in browsing mode B, the display area can be equally divided into multiple partitions a arranged in sequence along the column direction, such as five partitions a, and the voltage adjustment parameters corresponding to the five partitions a can be k1', k2 respectively ', k3', k4' and k5'. For example, in the off-screen display mode C, it can be set that the central area A1 of the display area only includes one partition a, and the corresponding voltage adjustment parameter is k1", while multiple partitions a in the edge area of the display area can share the same Voltage regulation parameter k2".

It should be noted that the distribution of corresponding partitions in each display mode shown in FIG. 2 is only for illustration, and does not constitute a limitation to the embodiment of the present application.

According to some embodiments of the present application, optionally, when setting the partitions of the display panel, the regions where each touch channel is located may be reused.

FIG. 3 is another schematic structural diagram of a control system of a display panel provided by an embodiment of the present application. As shown in FIG. 3 , according to some embodiments of the present application, optionally, the display area AA may include a plurality of touch channels TP. A partition a may include a touch channel TP, that is, a partition a multiplexes an area where a touch channel TP is located.

In some embodiments, the driver chip 102 may be a touch driver chip that integrates a touch function and a driver function. The driver chip 102 may be specifically configured to receive touch sensing signals sent by the touch channels TP in the M partitions, and process the touch sensing signals to obtain touch data of the touch channels TP in the M partitions. The detection circuit 101 can be specifically configured to determine the touch states of the touch channels TP in the M partitions according to the touch data of the touch channels TP in the M partitions. Exemplarily, the touch data includes but not limited to a touch capacitance value. The touch status can be used to represent whether the touch channel TP is touched or not. For example, when the touch data corresponding to the i-th partition is greater than or equal to a preset threshold, it may be determined that the touch state of the touch channel TP in the i-th partition is touched. When the touch data corresponding to the i-th partition is less than the preset threshold, it can be determined that the touch state of the touch channel TP in the i-th partition is not touched.

The detection circuit 101 can also determine the voltage adjustment parameter k of the M partitions according to the touch states of the touch channels TP in the M partitions. Wherein, the corresponding voltage adjustment parameter when the touch state is that the touch channel is touched is different from the corresponding voltage adjustment parameter when the touch state is that the touch channel is not touched. For example, the voltage adjustment parameter corresponding to the touched partition a may be k1, and the voltage adjustment parameter corresponding to the untouched partition a may be k2, where k1≠k2.

In this way, by multiplexing the area where each touch channel TP is located as each partition, and using the touch data of the touch channel TP in each partition to determine the voltage adjustment parameters corresponding to each partition a, not only can realize the control of each partition The dynamic adjustment of the voltage value of the target voltage signal is equivalent to using the original touch wiring to collect the working state parameters of each partition, which can reduce the wiring of the detection circuit 101 in the display area, which is conducive to saving wiring space and reducing the display area. Panel production costs.

FIG. 4 is another schematic structural diagram of a control system of a display panel provided by an embodiment of the present application. As shown in FIG. 4 , different from the embodiment shown in FIG. 3 , according to other embodiments of the present application, optionally, the control system 10 of the display panel may also include a touch chip 103 , and the touch chip 103 may communicate with The touch channels TP in the M partitions are electrically connected, and the touch chip 103 can specifically receive touch sensing signals sent by the touch channels TP in the M partitions, and process the touch sensing signals to obtain M partitions The touch data of the touch channel TP in the That is, the collection and processing of the touch sensing signal is realized through a separate touch chip 103 .

The detection circuit 101 can be electrically connected to the touch chip 103, and the detection circuit 101 can be specifically used to determine the touch state of the touch channel TP in the M partitions according to the touch data of the touch channel TP in the M partitions; and According to the touch states of the touch channels TP in the M partitions, the voltage adjustment parameter k of the M partitions is determined. The driver chip 102 can be used to determine the voltage value of the target voltage signal corresponding to each of the M partitions according to the voltage adjustment parameter k of the M partitions, and send the voltage value to the M partitions according to the voltage value of the target voltage signal corresponding to each of the M partitions. The pixel circuit provides the target voltage signal.

In this way, by multiplexing the area where each touch channel TP is located as each partition, and using the touch data of the touch channel TP in each partition to determine the voltage adjustment parameters corresponding to each partition, not only the goal of each partition can be achieved The dynamic adjustment of the voltage value of the voltage signal is equivalent to using the original touch wiring to collect the working state parameters of each partition, which can reduce the wiring of the detection circuit 101 in the display area, which is conducive to saving wiring space and reducing the display panel. production cost.

It should be noted that, in the embodiment of the present application, the display panel can be either a self-capacitive touch display panel or a mutual-capacitive touch display panel. When the display panel is a self-capacitive touch display panel, one touch channel TP can be one touch electrode. When the display panel is a mutual capacitive touch display panel, the touch channel TP may be a receiving channel (or called a sensing electrode).

According to some embodiments of the present application, optionally, when the detection circuit 101 obtains the working state parameters of each partition, for any i-th partition in the M partitions, the working state of a pixel circuit in the i-th partition can be obtained. Status parameter, get the working status parameter of the i-th partition, i is a positive integer. That is, the working state parameter of any pixel circuit in the i-th subregion is used as the working state parameter of the i-th subregion.

The inventors of the present application realized that a partition may include multiple pixel circuits, and different pixel circuits have different driving currents or data voltages. Therefore, in order to ensure the accuracy of voltage regulation, in some other embodiments, the average value of the working state parameters of multiple pixel circuits in a partition can be calculated, and the average value can be used as the working state parameter of the partition.

Specifically, for any i-th partition in the M partitions, the working state parameters of multiple pixel circuits in the i-th partition can be obtained, and the function of the working state parameters of the multiple pixel circuits in the i-th partition can be calculated The average value is used to obtain the working status parameters of the i-th partition. That is, the average value of the operating state parameters of the plurality of pixel circuits in the i-th subregion is used as the operating state parameter of the i-th subregion.

FIG. 5 is another schematic structural diagram of the control system of the display panel provided by the embodiment of the present application. As shown in FIG. 5 , according to some embodiments of the present application, optionally, the pixel circuit 50 may be electrically connected to the scanning signal line S, and the scanning signal line S may be used to provide a scanning signal to control the switching unit in the pixel circuit 50 on or off. Exemplarily, for example, the scanning signal line S may include the first scanning signal line S1 or the second scanning signal line S2 shown in FIG. 6 .

The pixel circuit 50 can be electrically connected to the data signal line data, and the data signal line data can be used to provide a data signal (also called a data voltage signal), and the data signal can be used to control the driving current provided by the pixel circuit 50 .

In some examples, the detection circuit 101 may be electrically connected to the pixel circuit 50 in each subregion a, and the working state parameter may include a current value of the driving current. For example, the detection circuit 101 may be electrically connected to the output terminal (such as the drain) of the driving transistor in the pixel circuit 50 to collect the current value of the driving current output by the driving transistor.

In some other examples, the detection circuit 101 may be electrically connected to the scanning signal line S correspondingly connected to the pixel circuit 50 in each partition a, and correspondingly, the working state parameter may include the refresh rate of the partition, that is, the scanning signal line S corresponding to the partition a The frequency of the output sweep signal.

In still some examples, the detection circuit 101 may be electrically connected to the data signal line data correspondingly connected to the pixel circuit 50 in each subregion a, and correspondingly, the working state parameter may include the voltage value of the data signal.

It should be noted that, FIG. 5 shows an example in which the detection circuit 101 is electrically connected to the data signal line data correspondingly connected to the pixel circuit 50 in each partition a.

The target voltage signal of the embodiment of the present application will be illustrated below in combination with a 7T1C pixel circuit.

FIG. 6 is a schematic circuit diagram of a pixel circuit in a display panel provided by an embodiment of the present application. As shown in FIG. 6 , according to some embodiments of the present application, optionally, the pixel circuit 50 may be electrically connected to the first electrode of the light emitting element D. As shown in FIG. The pixel circuit 50 may be electrically connected to the first power voltage signal line PVDD. The second pole of the light emitting element D may be electrically connected to the second power voltage signal line PVEE. The first power voltage signal line PVDD can be used to transmit the first power voltage signal, and the first power voltage signal can be a forward voltage signal. The second power voltage signal line PVEE can be used to transmit the second power voltage signal, and the second power voltage signal can be a negative voltage signal. The first pole of the light emitting element D may be an anode, and the second pole of the light emitting element D may be a cathode.

The pixel circuit 50 may include a first reset module 501, the control end of the first reset module 501 is electrically connected to the first scanning signal line S1, the first end of the first reset module 501 is electrically connected to the first reference voltage signal line Vref1, and the first reset module 501 is electrically connected to the first reference voltage signal line Vref1. A second end of a reset module 501 is electrically connected to the first pole of the light emitting element D. The first reset module 501 is configured to be turned on in response to the conduction level provided by the first scanning signal line S1, and transmit the first reference voltage signal provided by the first reference voltage signal line Vref1 to the first pole of the light emitting element D, To reset the first pole of the light emitting element D.

Wherein, the target voltage signal may include at least one of the first reference voltage signal, the first power supply voltage signal and the second power supply voltage signal. That is to say, in the embodiment of the present application, the voltage values of the first reference voltage signal output by the first reference voltage signal line Vref1 corresponding to the pixel circuits in different partitions may be different. And/or, the voltage values of the first power voltage signal output by the first power voltage signal line PVDD corresponding to the pixel circuits in different partitions may be different. And/or, the voltage value of the second power supply voltage signal output by the second power supply voltage signal line PVEE corresponding to the pixel circuits in different partitions may be different.

Continuing to refer to FIG. 6, in some specific embodiments, optionally, the first reset module 501 may include a first transistor M1, the gate of the first transistor M1 is electrically connected to the first scanning signal line S1, and the first transistor M1 The first pole of the first transistor M1 is electrically connected to the first reference voltage signal line Vref1, and the second pole of the first transistor M1 is electrically connected to the first pole of the light emitting element D.

The pixel circuit 50 may further include a second transistor M2 (ie, a driving transistor), and the gate of the second transistor M2 is electrically connected to the first node N1.

The pixel circuit 50 may further include a third transistor M3, the gate of the third transistor M3 is electrically connected to the second scanning signal line S2, the first electrode of the third transistor M3 is electrically connected to the data signal line data, and the third electrode of the third transistor M3 The two poles are electrically connected to the first pole of the second transistor M2, and the third transistor M3 is used for writing data signals in response to the control of the second scanning signal line S2.

The pixel circuit 50 may further include a fourth transistor M4, the gate of the fourth transistor M4 is electrically connected to the second scanning signal line S2, the first electrode of the fourth transistor M4 is electrically connected to the first node N1, and the first electrode of the fourth transistor M4 is electrically connected to the first node N1. The two poles are electrically connected to the second pole of the second transistor M2, and the fourth transistor M4 is used for realizing threshold compensation of the second transistor M2 in response to the control of the second scanning signal line S2.

The pixel circuit 50 may further include a fifth transistor M5, the gate of the fifth transistor M5 is electrically connected to the first scanning signal line S1, the first pole of the fifth transistor M5 is electrically connected to the second reference voltage signal terminal Vref2, and the fifth transistor M5 The second pole of M5 is electrically connected to the first node N1, and the fifth transistor M5 is used to transmit the second reference voltage signal of the second reference voltage signal terminal Vref2 to the first node N1 in response to the control of the first scanning signal line S1 , to reset the first node N1.

The pixel circuit 50 may further include a sixth transistor M6, the gate of the sixth transistor M6 is electrically connected to the light emission control signal line EM, the first pole of the sixth transistor M6 is electrically connected to the first power supply voltage signal line PVDD, and the sixth transistor M6 The second pole of the second transistor M2 is electrically connected to the first pole of the second transistor M2.

The pixel circuit 50 may further include a seventh transistor M7, the gate of the seventh transistor M7 is electrically connected to the light emission control signal line EM, the first pole of the seventh transistor M7 is electrically connected to the second pole of the second transistor M2, and the seventh transistor M7 The second pole of M7 is electrically connected to the first pole of the light emitting element D1.

The pixel circuit 50 may further include a storage capacitor Cst, the first plate of the storage capacitor Cst is electrically connected to the first power supply voltage signal line PVDD, and the second plate of the storage capacitor Cst is electrically connected to the first node N1 for maintaining the first Potential of node N1.

FIG. 7 is a schematic cross-sectional view of a display panel provided by an embodiment of the present application. As shown in FIG. 7 , according to some embodiments of the present application, optionally, the display panel 70 may be electrically connected to a flexible circuit board 71 (Flexible Printed Circuit, FPC), and the detection circuit 101 may be integrated on the flexible circuit board 71 . Exemplarily, the driving chip may be bound on the flexible circuit board 71, or may be directly bound on the display panel 70, which is not limited in this embodiment of the present application.

In this way, by integrating the detection circuit 101 on the flexible circuit board 71, on the one hand, the detection circuit 101 will not occupy too much space of the display panel 70, which is conducive to the realization of thinner and lighter display panel 70; on the other hand, due to the detection circuit 101 is integrated on the flexible circuit board 71, so during the use of the display device where the display panel 70 is located, the voltage value of the target voltage signal of each partition can be dynamically adjusted to reduce the power consumption of the display device during use.

Based on the same technical concept as the control system of the display panel provided in the above embodiment, correspondingly, the present application also provides a control method of the display panel, and the control method of the display panel can be applied to the display panel provided in the above embodiment. control system 10.

As shown in FIG. 1 , the display panel may include a display area AA, and the display area AA may include M partitions a. Each subregion a may include at least one pixel circuit, and M is an integer greater than 1.

FIG. 8 is a schematic flowchart of a method for controlling a display panel provided by an embodiment of the present application.

As shown in FIG. 8, the method for controlling a display panel provided in the embodiment of the present application may include the following steps:

S801. Obtain working state parameters of M partitions, and the working state parameters are used to feed back the working states of the partitions;

S802. Determine the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions;

S803. Determine the voltage values of the target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions;

S804. According to the voltage values of the target voltage signals corresponding to the M subregions, provide the target voltage signals to the pixel circuits in the M subregions.

The specific implementation process of the above steps S801 to S804 has been described in detail in the control system 10 of the display panel, and for the sake of brevity, details are not repeated here.

In the method for controlling a display panel provided in the embodiment of the present application, the display area of the display panel is divided into M partitions, each partition includes at least one pixel circuit, and M is an integer greater than 1; the working state parameters of the M partitions are obtained, And according to the working state parameters of the M partitions, determine the voltage adjustment parameters of the M partitions; according to the voltage adjustment parameters of the M partitions, determine the voltage values of the target voltage signals corresponding to the M partitions, and determine the corresponding The voltage value of the target voltage signal provides the target voltage signal to the pixel circuits in the M partitions, so as to realize the dynamic adjustment of the voltage value of the target voltage signal of each partition, and achieve the effect of reducing the power consumption of the display panel.

FIG. 9 is another schematic flowchart of a method for controlling a display panel provided by an embodiment of the present application. As shown in FIG. 9, according to some embodiments of the present application, optionally, before S803, according to the voltage adjustment parameters of the M partitions, before determining the voltage values of the target voltage signals corresponding to the M partitions, the control method of the display panel The following steps may also be included:

S901. Generate a voltage adjustment parameter matrix according to the voltage adjustment parameters of the M partitions.

Correspondingly, S803, according to the voltage adjustment parameters of the M partitions, determine the voltage values of the target voltage signals corresponding to the M partitions, which may specifically include the following steps:

According to the voltage adjustment parameter matrix, a voltage value matrix is obtained, and the voltage value matrix includes the voltage values of the target voltage signals corresponding to the M partitions.

Correspondingly, S804, according to the voltage values of the target voltage signals corresponding to the M partitions, provide the target voltage signals to the pixel circuits in the M partitions, which may specifically include the following steps:

According to the matrix of voltage values, target voltage signals are provided to the pixel circuits in the M partitions.

In this way, by generating the voltage adjustment parameter matrix K and the voltage value matrix V, the calculation and transmission of data can be facilitated, and the calculation time and transmission time can be effectively shortened.

FIG. 10 is a schematic flowchart of S803 in the method for controlling the display panel in FIG. 8 . As shown in FIG. 10 , according to some embodiments of the present application, optionally, S803, determining the voltage adjustment parameters of M partitions according to the working state parameters of M partitions may include the following steps:

S1001. Determine the target display mode of the display panel according to the working state parameters of the M partitions;

S1002. Determine voltage adjustment parameters for M subregions according to preset voltage adjustment parameters for multiple subregions corresponding to the target display mode.

In this way, different display modes are preset, and the voltage adjustment parameter k corresponding to each partition can be preset for different display modes. During subsequent use, as long as it is determined which display mode the display panel is currently in, the voltage adjustment parameter k corresponding to each partition in the display mode can be directly determined. On the one hand, the amount of data calculation is greatly reduced, the time for determining the voltage adjustment parameter k of each partition is shortened, and the data processing efficiency is improved. On the other hand, setting different display modes meets the display requirements of the display panel in different scenarios.

According to some other embodiments of the present application, optionally, S803. Determine the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions, which may include the following steps:

For any i-th partition in the M partitions, according to the pre-established corresponding relationship between the working state parameters and the voltage adjustment parameters and the working state parameters of the i-th partition, determine the voltage adjustment parameters of the i-th partition, where i is a positive integer .

In this way, the corresponding relationship between the working state parameter and the voltage adjustment parameter is established in advance, and stored in the detection circuit 101 , the driving chip 102 or other storage modules. After obtaining the working state parameters of each partition, you can find out the voltage adjustment parameter k of each partition according to the corresponding relationship between the working state parameters and the voltage adjustment parameters, which greatly reduces the amount of data calculation and shortens the time for determining each partition. The time of the voltage adjustment parameter k improves the data processing efficiency.

According to some embodiments of the present application, optionally, M may include M1 or M2. The display panel includes at least a first display mode and a second display mode. In the first display mode, the display area is divided into M1 partitions, in the second display mode, the display area is divided into M2 partitions, and both M1 and M2 are integers greater than 1.

S803. Determine the voltage adjustment parameters of the M partitions according to the working state parameters of the M partitions, which may include the following steps:

Step 1. Determine the target display mode of the display panel according to the working state parameters of the M partitions;

Step 2. When the target display mode is the first display mode, determine the voltage adjustment parameters of the M1 subregions according to the preset voltage adjustment parameters of the M1 subregions corresponding to the first display mode;

Step 3. When the target display mode is the second display mode, determine the voltage adjustment parameters of the M2 subregions according to the preset voltage adjustment parameters of the M2 subregions corresponding to the second display mode.

According to some embodiments of the present application, optionally, the display area may include multiple touch channels, and one partition may include one touch channel. The working state parameters of the M partitions may include touch data of the touch channels in the M partitions.

FIG. 11 is a schematic flowchart of S803 in the control method of the display panel in FIG. 8 . As shown in FIG. 11 , according to some embodiments of the present application, optionally, S803, determining the voltage adjustment parameters of M partitions according to the working state parameters of M partitions may include the following steps:

S1101. According to the touch data of the touch channels in the M partitions, determine the touch status of the touch channels in the M partitions, where the touch status is used to represent whether the touch channel is touched or not;

S1102. Determine the voltage adjustment parameters of the M partitions according to the touch states of the touch channels in the M partitions;

Wherein, the corresponding voltage adjustment parameter when the touch state is that the touch channel is touched is different from the corresponding voltage adjustment parameter when the touch state is that the touch channel is not touched.

In this way, by multiplexing the area where each touch channel TP is located as each partition, and using the touch data of the touch channel TP in each partition to determine the voltage adjustment parameters corresponding to each partition a, not only can realize the control of each partition The dynamic adjustment of the voltage value of the target voltage signal is equivalent to using the original touch wiring to collect the working state parameters of each partition, which can reduce the wiring of the detection circuit 101 in the display area, which is conducive to saving wiring space and reducing the display area. Panel production costs.

It should be noted that, the specific implementation process of the above steps has been described in detail in the control system 10 of the display panel, and will not be repeated here for the sake of brevity. The control method of the display panel can achieve the same or corresponding technical effect as that of the control system 10 of the display panel, which is described briefly and will not be repeated here.

Based on the control system 10 of the display panel provided in the above embodiment, the embodiment of the present application further provides a display device, which may include the control system 10 of the display panel provided in the above embodiment.

Exemplarily, the display device includes but not limited to an organic light-emitting diode (Organic Light-Emitting Diode, OLED) display device.

Based on the method for controlling a display panel provided in the foregoing embodiments, correspondingly, the present application also provides a specific implementation manner of an electronic device. See the examples below.

FIG. 12 shows a schematic diagram of a hardware structure of an electronic device provided by an embodiment of the present application.

The electronic device may include a processor 1201 and a memory 1202 storing computer program instructions.

Specifically, the above-mentioned processor 1201 may include a central processing unit (Central Processing Unit, CPU), or a specific integrated circuit (Application Specific Integrated Circuit, ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application .

Memory 1202 may include mass storage for data or instructions. By way of example and not limitation, the memory 1202 may include a hard disk drive (Hard Disk Drive, HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a Universal Serial Bus (Universal Serial Bus, USB) drive or two or more Combinations of multiple of the above. In one example, memory 1202 may include removable or non-removable (or fixed) media, or memory 1202 may be a non-volatile solid-state memory. The storage 1202 can be inside or outside the comprehensive gateway disaster recovery device.

In one example, the memory 1202 may be a read only memory (Read Only Memory, ROM). In one example, the ROM can be mask programmed ROM, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), electrically rewritable ROM (EAROM), or flash memory or both A combination of one or more of the above.

Memory 1202 may include read only memory (ROM), random access memory (RAM), magnetic disk storage media devices, optical storage media devices, flash memory devices, electrical, optical, or other physical/tangible memory storage devices. Thus, in general, memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software comprising computer-executable instructions, and when the software is executed (e.g., by one or multiple processors) operable to perform the operations described with reference to the method according to an aspect of the present application.

The processor 1201 reads and executes the computer program instructions stored in the memory 1202 to implement the methods/steps in the above-mentioned method embodiments, and achieve the corresponding technical effects achieved by executing the methods/steps in the above-mentioned method embodiments, which are briefly described in This will not be repeated here.

In one example, the electronic device may further include a communication interface 1203 and a bus 1210 . Wherein, as shown in FIG. 12 , a processor 1201 , a memory 1202 , and a communication interface 1203 are connected through a bus 1210 to complete mutual communication.

The communication interface 1203 is mainly used to realize the communication between various modules, devices, units and/or devices in the embodiments of the present application.

The bus 1210 includes hardware, software, or both, and couples the components of the electronic device to each other. By way of example and not limitation, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Super Transmission (Hyper Transport, HT) interconnect, Industry Standard Architecture (ISA) bus, InfiniBand interconnect, Low Pin Count (LPC) bus, memory bus, Micro Channel Architecture (MCA) bus, peripheral component interconnect (PCI) bus, PCI-Express (PCI-X) bus, Serial Advanced Technology Attachment (SATA) bus, Video Electronics Standards Association Local (VLB) bus, or other suitable bus or a combination of two or more of these . Bus 1210 may comprise one or more buses, where appropriate. Although the embodiments of this application describe and illustrate a particular bus, this application contemplates any suitable bus or interconnect.

In addition, in combination with the method for controlling the display panel in the foregoing embodiments, the embodiments of the present application may provide a computer-readable storage medium for implementation. Computer program instructions are stored on the computer-readable storage medium; when the computer program instructions are executed by a processor, any method for controlling a display panel in the above-mentioned embodiments is implemented. Examples of computer readable storage media include non-transitory computer readable storage media such as electronic circuits, semiconductor memory devices, ROM, random access memory, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disk.

It is to be understood that the application is not limited to the specific configurations and processes described above and shown in the figures. For conciseness, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art may make various changes, modifications and additions, or change the order of the steps after understanding the spirit of the present application.

The functional blocks shown in the structural block diagrams described above may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), appropriate firmware, a plug-in, a function card, and the like. When implemented in software, the elements of the present application are the programs or code segments employed to perform the required tasks. Programs or code segments can be stored in machine-readable media, or transmitted over transmission media or communication links by data signals carried in carrier waves. "Machine-readable medium" may include any medium that can store or transmit information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, Radio Frequency (RF) links, etc. . Code segments may be downloaded via a computer network such as the Internet, an Intranet, or the like.

It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, the present application is not limited to the order of the above steps, that is, the steps may be performed in the order mentioned in the embodiment, or may be different from the order in the embodiment, or several steps may be performed simultaneously.

Aspects of the present application are described above with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the present application. It will be understood that each block of the flowchart and/or block diagrams, and combinations of blocks in the flowchart and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine such that execution of these instructions via the processor of the computer or other programmable data processing apparatus enables Implementation of the functions/actions specified in one or more blocks of the flowchart and/or block diagrams. Such processors may be, but are not limited to, general purpose processors, special purpose processors, application specific processors, or field programmable logic circuits. It can also be understood that each block in the block diagrams and/or flowcharts and combinations of blocks in the block diagrams and/or flowcharts can also be realized by dedicated hardware for performing specified functions or actions, or can be implemented by dedicated hardware and Combination of computer instructions to achieve.

The above is only a specific implementation of the present application, and those skilled in the art can clearly understand that for the convenience and brevity of the description, the specific working process of the above-described systems, modules and units can refer to the foregoing method embodiments The corresponding process in , will not be repeated here. It should be understood that the protection scope of the present application is not limited thereto, and any person familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the application, and these modifications or replacements should cover all Within the protection scope of this application.

Claims (17)

1. A control system of a display panel, wherein the display panel comprises a display area, the display area comprises M partitions, each partition comprises at least one pixel circuit, M is an integer greater than 1;

the control system includes:

the detection circuit is used for acquiring working state parameters of the M subareas, feeding back the working states of the subareas and determining voltage regulation parameters of the M subareas according to the working state parameters of the M subareas;

and the driving chip is electrically connected with the detection circuit and used for determining the voltage values of the target voltage signals corresponding to the M subareas according to the voltage regulation parameters of the M subareas and providing the target voltage signals for the pixel circuits in the M subareas according to the voltage values of the target voltage signals corresponding to the M subareas.

2. The control system of claim 1, wherein the detection circuit is further configured to generate a voltage adjustment parameter matrix based on the voltage adjustment parameters for the M zones;

the driving chip is specifically configured to obtain a voltage value matrix according to the voltage adjustment parameter matrix, where the voltage value matrix includes voltage values of target voltage signals corresponding to the M partitions, respectively; and providing the target voltage signals to the pixel circuits in the M partitions according to the matrix of voltage values.

3. The control system of claim 1, wherein the detection circuit is specifically configured to:

and for any ith partition in the M partitions, determining the voltage regulating parameter of the ith partition according to the pre-established corresponding relation between the working state parameter and the voltage regulating parameter and the working state parameter of the ith partition, wherein i is a positive integer.

4. The control system according to claim 1, wherein the display panel comprises a plurality of display modes, and each display mode is provided with a plurality of voltage regulation parameters of the subareas;

the detection circuit is specifically configured to:

determining a target display mode in which the display panel is located according to the working state parameters of the M partitions, wherein the target display mode is one of the multiple display modes;

and determining the voltage regulating parameters of the M subareas according to preset voltage regulating parameters of a plurality of subareas corresponding to the target display mode.

5. The control system of claim 1, wherein M comprises M1 or M2, the display panel comprises at least a first display mode in which the display area is divided into M1 of the partitions and a second display mode in which the display area is divided into M2 of the partitions, M1 and M2 each being an integer greater than 1;

the detection circuit is specifically configured to:

determining a target display mode of the display panel according to the working state parameters of the M partitions;

when the target display mode is the first display mode, determining voltage adjusting parameters of M1 partitions according to preset voltage adjusting parameters of M1 partitions corresponding to the first display mode;

and when the target display mode is the second display mode, determining the voltage adjusting parameters of the M2 subareas according to the preset voltage adjusting parameters of the M2 subareas corresponding to the second display mode.

6. The control system of claim 1, wherein the display area includes a plurality of touch channels, one of the partitions including one of the touch channels;

the driving chip is specifically configured to receive touch sensing signals sent by the touch channels in the M partitions, and process the touch sensing signals to obtain touch data of the touch channels in the M partitions;

the detection circuit is specifically configured to determine, according to the touch data of the touch channels in the M partitions, touch states of the touch channels in the M partitions, where the touch states are used to represent whether the touch channels are touched or not touched; determining voltage adjusting parameters of the M partitions according to the touch states of the touch channels in the M partitions;

the voltage adjusting parameter corresponding to the touch state that the touch channel is touched is different from the voltage adjusting parameter corresponding to the touch state that the touch channel is not touched.

7. The control system of claim 1, wherein the pixel circuit is electrically connected to a scan signal line, and the scan signal line is configured to provide a scan signal to control the switching unit in the pixel circuit to be turned on or off;

the pixel circuit is electrically connected with a data signal line, the data signal line is used for providing a data signal, and the data signal is used for controlling the driving current provided by the pixel circuit;

the detection circuit is electrically connected with the pixel circuit in each partition, and the working state parameter comprises the current value of the driving current; or,

the detection circuit is electrically connected with the scanning signal line correspondingly connected with the pixel circuit in each partition, and the working state parameter comprises the refresh rate of the partition; or,

the detection circuit is electrically connected with the data signal line correspondingly connected with the pixel circuit in each partition, and the working state parameter comprises a voltage value of the data signal.

8. The control system of claim 1, wherein the detection circuit is configured to:

for any ith partition in the M partitions, acquiring a working state parameter of one pixel circuit in the ith partition to obtain the working state parameter of the ith partition, wherein i is a positive integer; or,

and acquiring working state parameters of a plurality of pixel circuits in the ith partition, and calculating the average value of the working state parameters of the plurality of pixel circuits in the ith partition to obtain the working state parameters of the ith partition.

9. The control system according to claim 1, wherein the pixel circuit is electrically connected to a first pole of a light emitting element, the pixel circuit is electrically connected to a first power supply voltage signal line, a second pole of the light emitting element is electrically connected to a second power supply voltage signal line, the first power supply voltage signal line is configured to transmit a first power supply voltage signal, and the second power supply voltage signal line is configured to transmit a second power supply voltage signal;

the pixel circuit includes: a first reset module, a control terminal of which is electrically connected to a first scan signal line, a first terminal of which is electrically connected to a first reference voltage signal line, a second terminal of which is electrically connected to a first pole of the light emitting element, the first reset module being configured to be turned on in response to a turn-on level provided by the first scan signal line, and transmit a first reference voltage signal provided by the first reference voltage signal line to the first pole of the light emitting element to reset the first pole of the light emitting element;

the target voltage signal includes at least one of a first reference voltage signal, a first supply voltage signal, and a second supply voltage signal.

10. The control system of claim 1, wherein the display panel is electrically connected to a flexible circuit board, and the detection circuit is integrated on the flexible circuit board.

11. The control method of a display panel is characterized in that the display panel comprises a display area, the display area comprises M subareas, each subarea comprises at least one pixel circuit, and M is an integer greater than 1;

the control method comprises the following steps:

obtaining working state parameters of the M partitions, wherein the working state parameters are used for feeding back the working states of the partitions;

determining voltage regulating parameters of the M subareas according to the working state parameters of the M subareas;

determining voltage values of target voltage signals corresponding to the M subareas according to the voltage adjusting parameters of the M subareas;

and providing the target voltage signals to the pixel circuits in the M subareas according to the voltage values of the target voltage signals corresponding to the M subareas respectively.

12. The control method according to claim 11, before determining the voltage values of the target voltage signals corresponding to the M sections, respectively, according to the voltage adjustment parameters of the M sections, the control method further comprising:

generating a voltage regulation parameter matrix according to the voltage regulation parameters of the M subareas;

the determining the voltage values of the target voltage signals corresponding to the M partitions according to the voltage adjustment parameters of the M partitions includes:

obtaining a voltage value matrix according to the voltage regulation parameter matrix, wherein the voltage value matrix comprises voltage values of target voltage signals corresponding to the M subareas;

the providing the target voltage signals to the pixel circuits in the M partitions according to the voltage values of the target voltage signals corresponding to the M partitions, respectively, includes:

providing the target voltage signals to the pixel circuits in the M partitions according to the matrix of voltage values.

13. The control method of claim 11, wherein said determining voltage regulation parameters for said M zones based on operating state parameters for said M zones comprises:

for any ith partition in the M partitions, determining a voltage regulation parameter of the ith partition according to a pre-established corresponding relation between a working state parameter and the voltage regulation parameter and the working state parameter of the ith partition, wherein i is a positive integer; or,

determining a target display mode of the display panel according to the working state parameters of the M subareas;

and determining the voltage regulating parameters of the M subareas according to preset voltage regulating parameters of a plurality of subareas corresponding to the target display mode.

14. The control method according to claim 11, wherein M comprises M1 or M2, the display panel comprises at least a first display mode in which the display area is divided into M1 of the partitions and a second display mode in which the display area is divided into M2 of the partitions, M1 and M2 each being an integer greater than 1;

the determining the voltage regulation parameters of the M subareas according to the working state parameters of the M subareas comprises the following steps:

determining a target display mode of the display panel according to the working state parameters of the M partitions;

when the target display mode is the first display mode, determining voltage adjusting parameters of M1 partitions according to preset voltage adjusting parameters of M1 partitions corresponding to the first display mode;

and when the target display mode is the second display mode, determining the voltage regulating parameters of the M2 subareas according to the preset voltage regulating parameters of the M2 subareas corresponding to the second display mode.

15. The control method according to claim 11, wherein the display area includes a plurality of touch channels, one of the partitions includes one of the touch channels;

the working state parameters of the M partitions comprise touch data of the touch channels in the M partitions;

the determining the voltage regulation parameters of the M subareas according to the working state parameters of the M subareas comprises the following steps:

determining the touch states of the touch channels in the M partitions according to the touch data of the touch channels in the M partitions, wherein the touch states are used for representing whether the touch channels are touched or not touched;

determining voltage adjusting parameters of the M partitions according to the touch states of the touch channels in the M partitions;

the voltage adjusting parameter corresponding to the touch state when the touch channel is touched is different from the voltage adjusting parameter corresponding to the touch state when the touch channel is not touched.

16. A display device characterized by comprising a control system of the display panel according to any one of claims 1 to 10.

17. A computer-readable storage medium, characterized in that a computer program is stored thereon, which computer program, when being executed by a processor, carries out the steps of a method of controlling a display panel according to any one of claims 11 to 15.

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