CN115576877A

CN115576877A - Charging method, terminal device and storage medium

Info

Publication number: CN115576877A
Application number: CN202110684978.4A
Authority: CN
Inventors: 李志杰
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2021-06-21
Filing date: 2021-06-21
Publication date: 2023-01-06

Abstract

The embodiment of the application discloses a charging method, terminal equipment and a storage medium, wherein the method comprises the following steps: when the connection with the external equipment is established, determining the type of a connecting line of the connecting line between the external equipment and the external equipment; if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting the pin of the USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer; disabling control of the pin of the USB interface by the PMIC after the run time of the first timer is exceeded; the adapter is activated to establish the fast charge communication.

Description

Charging method, terminal device and storage medium

Technical Field

The present invention relates to the field of charging technologies, and in particular, to a charging method, a terminal device, and a storage medium.

Background

Based on a mode of realizing rapid charging by a Micro Controller Unit (MCU), a Printed Circuit Board (PCB) is provided with an external rapid charging control chip, which is called a rapid charging MCU for short, and the MCU is used for controlling the logic realization of the rapid charging. In a high-traffic 8350 platform, a charging control module is transplanted to an Analog Digital signal processing chip (ADSP) subsystem, in order to save cost, a chip of an MCU (microprogrammed control Unit) needs to be removed, and a hardware transceiving logic of quick charging communication data is realized by a VOOCPHY (Voltage optical programmable logic) physical layer integrated to a PM 8350B.

However, although the fast charging mode based on the combination of the ADSP and the VOOCPHY can save cost, the change of the hardware scheme causes the DEBUG line to interfere with the fast charging communication, so that the DEBUG line cannot support the fast charging function, and the charging performance and the charging efficiency are reduced.

Disclosure of Invention

The embodiment of the application provides a charging method, terminal equipment and a storage medium, which can ensure the successful establishment of a voice service and improve the reliability of the voice service.

The technical scheme of the embodiment of the application is realized as follows:

in a first aspect, an embodiment of the present application provides a charging method, where the method includes:

when connection with external equipment is established, determining the type of a connecting line of the connecting line between the external equipment and the external equipment;

if the connecting line type is a debugging line and the equipment type of the external equipment is an adapter, setting a pin of a USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer;

disabling control of a pin of the USB interface by a PMIC after a run time of the first timer is exceeded;

activating the adapter to establish the fast charge communication.

In a second aspect, an embodiment of the present application provides a terminal device, where the terminal device includes: a determination unit, a setting unit, a disabling unit, an activating unit,

the determining unit is used for determining the type of a connecting line of the connecting line between the external equipment and the external equipment when the external equipment is connected;

the setting unit is used for setting the pin of the USB interface to be in a high-impedance state to prohibit the USBPHY from controlling the pin of the USB interface if the type of the connecting line is a debugging line and the type of the external equipment is an adapter; simultaneously starting a first timer;

the forbidding unit is used for forbidding the PMIC to control the pin of the USB interface after the running time of the first timer is exceeded;

the activation unit is used for activating the adapter to establish the quick charging communication.

In a third aspect, an embodiment of the present application provides a terminal device, where the terminal device includes a processor and a memory storing instructions executable by the processor, and when the instructions are executed by the processor, the charging method according to the first aspect is implemented.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a program is stored, and when the program is executed by a processor, the program implements the charging method according to the first aspect.

The embodiment of the application provides a charging method, terminal equipment and a storage medium, wherein when the charging method is connected with external equipment, the type of a connecting line of the connecting line with the external equipment is determined; if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting the pin of the USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer; disabling control of the pin of the USB interface by the PMIC after the run time of the first timer is exceeded; the adapter is activated to establish the fast charge communication. Therefore, in the embodiment of the application, the terminal can determine the device type and the connection line type corresponding to the external device, so that whether the control of the USBPHY and the PMIC on the D + and the D-is forbidden can be further determined according to the device type and the connection line type. Specifically, external equipment is determined to be an adapter, the external equipment is connected with the terminal through a DEBUG line, and after wireless charging is not performed, the terminal can choose to forbid USBPHY and PMIC to control D + and D-, and only VOOCPHY can control D + and D-, so that interference of the DEBUG line on fast charging communication can be avoided, the requirement of supporting the use of the DEBUG line for fast charging can be met, and charging performance and charging efficiency are greatly improved.

Drawings

Fig. 1 is a schematic diagram of a fast charging communication flow in an embodiment of the present application;

FIG. 2 is a schematic diagram of a principle of implementing fast charging in an MCU manner;

FIG. 3 is a schematic diagram illustrating a principle of fast charging implemented by combining ADSP and VOOCPHY;

fig. 4 is a first schematic flow chart illustrating an implementation process of a charging method according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a TYPE-C pin interface;

FIG. 6 is a schematic diagram of a resistive connection;

fig. 7 is a schematic flow chart illustrating an implementation process of a charging method according to an embodiment of the present application;

fig. 8 is a schematic flow chart illustrating an implementation process of the charging method according to the embodiment of the present application;

fig. 9 is a schematic flow chart illustrating an implementation process of the charging method according to the embodiment of the present application;

fig. 10 is a schematic flow chart illustrating an implementation process of the charging method according to the embodiment of the present application;

fig. 11 is a schematic flow chart illustrating a sixth implementation process of the charging method according to the embodiment of the present application;

fig. 12 is a first schematic structural diagram of a terminal device according to an embodiment of the present application;

fig. 13 is a schematic structural diagram of a terminal device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant application and are not limiting of the application. It should be noted that, for the convenience of description, only the parts related to the related applications are shown in the drawings.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of the present application only and is not intended to be limiting of the application.

In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict. It should also be noted that reference to the terms "first \ second \ third" in the embodiments of the present application is only used for distinguishing similar objects and does not represent a specific ordering for the objects, and it should be understood that "first \ second \ third" may be interchanged with a specific order or sequence where possible so that the embodiments of the present application described herein can be implemented in an order other than that shown or described herein.

At present, the common fast charging technologies mainly include VOOC3.0 flash charging technology of 5V/6A, super VOOC2.0 fast charging technology of 65W, and fast charging technology (PPS) based on 125W.

When the terminal is charged quickly, the flash charging function needs to be realized through a customized adapter and a battery, and generally, a Micro Control Unit (MCU) intelligent chip is configured in the adapter for flash charging, so that the adapter is an upgraded intelligent charger.

Further, in an embodiment of the present application, fig. 1 is a schematic diagram of a fast charging communication flow in the embodiment of the present application, as shown in fig. 1. The adapter can mainly comprise the following five stages in the process of rapidly charging the terminal:

stage 1: the terminal detects the type of the adapter, the adapter starts handshake communication between the adapter and the terminal, the adapter sends an instruction to inquire whether the terminal starts a quick charging mode, and after the terminal agrees to start quick charging, a quick charging communication flow enters a stage 2.

The terminal may detect the type of the adapter through D + and D-, and when it is detected that the adapter is a charging device not passing through a Universal Serial Bus (USB), the current absorbed by the terminal may be greater than a preset current value I2. When the adapter detects that the output current of the adapter is greater than or equal to I2 within the preset time, the adapter considers that the type identification of the terminal for the adapter is completed, the adapter starts handshake communication between the adapter and the terminal, and the adapter sends an instruction to inquire whether the terminal starts a quick charging mode. When the adapter receives the reply instruction of the terminal and indicates that the terminal does not agree with the start of the quick charging mode, the adapter detects the output current of the adapter again, when the output current of the adapter is still larger than or equal to I2, the adapter initiates a request again to inquire whether the terminal starts the quick charging mode, and the step of the stage 1 is repeated until the terminal answers to agree with the start of the quick charging mode or the output current of the adapter does not meet the condition that the output current of the adapter is larger than or equal to I2 any more.

And (2) stage: the adapter sends a further instruction to the terminal asking if the output voltage of the adapter matches, and after the terminal replies to the adapter that its output voltage is higher, lower or matches, the adapter adjusts the output voltage until it is appropriate.

The adapter can send an instruction to the terminal to inquire whether the output voltage of the adapter is suitable for being used as the charging voltage in the quick charging mode or not, if the adapter receives feedback that the output voltage of the adapter is higher or lower, the adapter adjusts the output voltage of the adapter by one step, and sends an instruction to the terminal again to inquire whether the output voltage of the adapter of the terminal is matched or not again.

And (3) stage: the adapter sends a further command to the terminal asking for the maximum charging current currently supported by the terminal, which replies to the adapter and enters stage 4.

And (4) stage: the adapter can set the output current to the maximum charging current currently supported by the terminal, entering the constant current phase, i.e. phase 5.

And (5) stage: when entering the constant current phase, the adapter may send another instruction at intervals to inquire about the current voltage of the terminal battery, the terminal may feed back the current voltage of the terminal battery to the adapter, and the adapter may determine whether the contact is good and whether the current charging current value of the terminal needs to be reduced according to the feedback of the terminal about the current voltage of the terminal battery.

It should be noted that the constant current phase does not mean that the output current of the adapter is kept constant in the phase 5, and the constant current is a segmented constant current, that is, the constant current is kept constant for a period of time.

The fast charging scheme based on the MCU has two-stage switches, and the hardware cuts off the path of the USBPHY controlling D + and D-, so when the DEBUG line is connected, the fast charging can be performed without special Processing, wherein fig. 2 is a schematic diagram of the principle of the MCU mode for realizing fast charging, as shown in fig. 2, a Central Processing Unit (CPU) directly controls a platform Power Management IC (Power Management IC, PMIC) to charge: the CPU directly operates a register of a PMIC (System Power Management Interface, SPMI) of a platform through a System Power Management Interface (SPMI) bus to control general charging, only an audio module is arranged in an Analog Digital Signal processing chip (ADSP), and data are exchanged with the GLINK bus of the ADSP communication link and the CPU through an Application Processor (AP).

When the quick charging is realized in the MCU mode, when an adapter is not connected, namely VBUS =0, the switch 1 controls SW1 to be connected to SW2 by default, and the switch 2 controls SW2 to be connected to the serial port controller during software initialization, so that a serial port log can be output from D + and D-by default when a terminal is directly connected with a serial port line; when the adapter is powered on, the fast switch 1 controls the SW1 to be switched to the PMIC of the platform, when the ASPD identifies a special Charging Port (DCP) with a charger type of BC1.2 (Battery Charging v 1.2), the switch 1 is arranged on software to control the SW1 to be switched to the SW2, and the switch 2 is arranged to control the SW2 to be switched to the MCU, so that the MCU < - - > SW2< - - > SW1< - - > adapter directly communicates through D + and D-direct connection, because the fast Charging switch 1 controls the SW1 to be switched to the SW2, the PMIC and the USBPHY cannot interfere with the fast Charging communication, and meanwhile, the switch 2 controls the SW2 to be switched to the MCU, and therefore, the serial Port output cannot interfere with the fast Charging communication.

Based on the MCU type quick charging scheme, the PCB is provided with an external quick charging control chip, which is called a quick charging MCU for short, and the MCU is used for controlling the logic realization of the quick charging. In a high-traffic 8350 platform, a charging control module is transplanted to an ADSP subsystem, in order to save cost, a MCU chip needs to be removed, and a hardware transceiving logic of fast charging communication data is realized by a VOOCPHY physical layer integrated to a PM 8350B.

Fig. 3 is a schematic diagram illustrating a principle that the ADSP and VOOCPHY are combined to realize quick charging, and as shown in fig. 3, the ADSP subsystem directly controls the charging module, specifically, the ADSP subsystem controls the charging logic related to the PM8350B, the PM8350, the VOOCPHY, and the USBPHY are all integrated on the ADSP, and the ADSP interacts the charging status information and the USB related status information through the global link bus. Compared with the MCU type quick charging scheme, the hardware switch of the quick charging scheme combining ADSP and VOOCPHY only has a switch 1, namely, the switch is connected to a serial port module when VBUS is not electrified, and the switch is connected to a port shared by PM8350, VOOCPHY and USBPHY when VBUS is electrified. The logic architecture leads the PMIC and the USBPHY to control D + and D-data communication even in quick charging, if the DEBUG line is connected, because the hardware is not disconnected, the DEBUG line interferes with the quick charging communication, information sent by the adapter through the D + and the D-is interfered to be half high level, and the VOOCPHY cannot perform quick charging because the data received by the VOOCPHY are incorrect.

Therefore, although the fast charging mode combining the ADSP and the VOOCPHY can reduce the setting of a hardware switch and save the cost, the change of the hardware scheme causes the problem that the DEBUG line interferes with the fast charging communication, so that the DEBUG line cannot support the fast charging function, and the charging performance and the charging efficiency are reduced.

In order to solve the above problem, in the embodiment of the present application, the terminal may determine a device type and a connection type corresponding to the external device, so as to further determine whether to prohibit the USBPHY and the PMIC from controlling the D +, D-according to the device type and the connection type. Specifically, external device is the adapter in the affirmation, and external device passes through the DEBUG line with the terminal and is connected, and not for wireless after charging, the terminal can select forbid USBPHY and PMIC control D +, D-, guarantee only VOOCPHY can control D +, D-, thereby can avoid DEBUG line interference to fill communication soon, can satisfy the demand that supports to use the DEBUG line to carry out the quick charge, improved charging performance and charge efficiency greatly.

That is to say, because the fast charging hardware scheme is changed remarkably, for the DEBUG line, the terminal can support the fast charging function when recognizing the DEBUG line by adapting on software, and then can realize the fast charging scheme based on the physical logic module VOOCPHY that receives and sends VOOC fast charging information.

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

An embodiment of the present application provides a charging method, fig. 4 is a schematic view illustrating an implementation flow of the charging method provided in the embodiment of the present application, and as shown in fig. 4, in the embodiment of the present application, a method for charging a terminal may include the following steps:

step 101, when the connection with the external equipment is established, determining the type of the connection line between the external equipment and the external equipment.

In the embodiment of the application, when the terminal establishes connection with the external device, the type of the connection line between the terminal and the external device may be determined first. The connection line TYPE of the connection line can be a DEBUG line (DEBUG line) or a TYPE-C line.

It should be noted that, in the embodiment of the present application, the terminal may be any terminal device having communication and storage functions, for example: a tablet Computer, a mobile phone, an electronic reader, a remote controller, a Personal Computer (PC), a notebook Computer, a vehicle-mounted device, a network tv, a wearable device, a Personal Digital Assistant (PDA), a Portable Media Player (PMP), a navigation device, and other terminal devices.

It should be noted that, in the embodiment of the present application, the terminal may be configured with an analog-digital signal processing chip ADSP and an application processor AP, where a communication link between the ADSP and the AP is global.

It is understood that in the embodiments of the present application, the terminal may support a normal charging mode and a fast charging mode, wherein a charging current of the fast charging mode is greater than a charging current of the normal charging mode, i.e., a charging speed of the fast charging mode is greater than a charging speed of the normal charging mode.

Optionally, in an embodiment of the present application, the external device may be a device for charging the terminal, and specifically, the external device may wirelessly charge the terminal by establishing a wireless connection with the terminal, or may perform wired charging to the terminal by establishing a physical connection with the terminal. For example, the external device may be an adapter, a power supply, or the like, and the external device may also be a charging cradle, or the like.

Optionally, in an embodiment of the present application, the external device may also be a device that communicates with the terminal.

Further, in the embodiment of the present application, the terminal and the external device may be connected through a Universal Serial Bus (USB) interface, where the USB interface may be a common USB interface, or may also be a micro USB interface or a USB interface. The power line in the USB interface is used for charging the terminal by using an external device, wherein the power line in the USB interface may be a VBus line and/or a ground line in the USB interface. The data line in the USB interface is used for bidirectional communication between the external device and the terminal, and the data line may be a D + line and/or a D-line in the USB interface.

It should be noted that, in the embodiment of the present application, the USB interface has three interfaces with different appearances, that is, type-A, type-B, type-C, and Type-C has a much smaller volume than both Type-a and Type-B, and is the latest USB interface appearance standard. In addition, type-C is an interface Type that can be applied to both a PC (master device) and an external device (slave device, such as a mobile phone). Wherein, type-C mouth has 4 pairs of send (TX)/Receive (RX) separated lines, 2 pairs of USB D +/D-, a pair of SBU,2 CC (CC 1, CC 2), in addition have 4 VBUS and 4 ground wires.

For example, in the present application, fig. 5 is a schematic diagram of a TYPE-C pin interface, and as shown in fig. 5, in the TYPE-C pin interface diagram, pin is symmetrical, so that it supports forward and backward insertion. TYPE-C supports protocols such as USB, DP, etc., with symmetrical CC1 and CC2 pins for identifying connected devices. The CC pin needs to have a pull-up/pull-down resistor inside a Downstream Port (DPF) DPF and a UFP (Upstream switching Port, UFP), respectively, to identify their respective functions. Load information can be confirmed based on different pull-up and pull-down resistance detections. CC is pulled up to the power supply through a different pull-up resistor Rp inside the DFP and pulled down to Ground (GND) through a 5.1K resistor inside the UFP. The DFP is a downstream port, and can be considered as a HOST device, a power adapter, and the like; the UFP may be considered a slave DEVICE, a usb disk, a powered DEVICE, etc.

Wherein, the resistance conditions of CC1 and CC2 in different TYPE-C lines or OTG (On-The-Go) lines are different, fig. 6 is a schematic diagram of The resistance connection condition, and for example, assuming that The mobile phone is used as DFP, the condition of connecting The usb disk through The OTG line is as shown in fig. 6.

When the terminal is connected with the adapter through a Standard TYPE-C line, only one pull-up resistor is arranged on the Standard TYPE-C line CC, the other CC is OPEN, when the adapter end which is used as HOST is seen, the CC1 and the CC2 are respectively in the states of OPEN and RD, the terminal is used as SINK equipment, the Standard TYPE-C line is connected, and when the charger TYPE is identified as a Standard Downstream Port (SDP)/Charging Downstream Port (CDP) through BC1.2, the ADSP can inform the AP to pull up D + to 3.3V to enumerate the equipment; when the terminal is connected with a non-standard TYPE-C line, both the two CCs are provided with pull-up resistors, when viewed from an adapter end serving as HOST, the CC1 and the CC2 are in the state of RD and can be identified as DEBUG Access Mode attached, and once the DEBUG line is identified, the ADSP immediately informs the AP to pull up D + for enumeration, namely the AP end controls the USBPHY to act on the high level of D + 3.3V.

It can be understood that, in the embodiment of the present application, after the terminal establishes a connection with the external device through the connection line, a specific connection line type of the connection line may be determined first, so that whether to establish the fast charging communication may be further determined based on the connection line type.

Optionally, in this application, when the terminal establishes a connection with an external device, the Type of the connection line may be determined by triggering Type-C interrupt. The connection line TYPE may be a DEBUG line (DEBUG line) or a TYPE-C line.

For example, in the embodiment of the present application, when an external device is plugged in, the terminal may first perform TYPE-C interrupt triggering. Specifically, after the Type-C interrupt is triggered, in the interrupt processing function, whether the connection line corresponding to the inserted external device is a standard Type-C line or a DEBUG line can be determined by reading a corresponding Type-C register, and if the connection line is a DEBUG line, the ADSP can send a notify message to the AP through the global bus to inform the AP that the connection line corresponding to the external device inserted at this time is a DEBUG line.

Step 102, if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting the pin of the USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously, a first timer is started.

In the embodiment of the application, when the terminal is connected with the external device, after the type of the connecting line between the terminal and the external device is determined, if the type of the connecting line corresponding to the external device is a debugging line, and if the type of the external device is an adapter, the terminal can select to set the pin of the USB interface to be in a high-impedance state, so that the USB phy can be prohibited from controlling the pin of the USB interface; meanwhile, the terminal can also select to start the first timer, so that the control of the PMIC on the pin of the USB interface can be determined to be forbidden according to the running time of the first timer.

It should be noted that, in the embodiment of the present application, if the connection line type of the connection line between the terminal and the external device is a DEBUG line, and the device type of the external device is an adapter, then, in order to prevent the ADSP from notifying the AP to pull up D + to enumerate the device, that is, to prevent the AP end from controlling the USB phy to act on the high level of D +3.3V, the terminal needs to set the pin of the USB interface to a high-impedance state, so as to prohibit the USB phy from controlling the pin of the USB interface, and further solve the problem that the DEBUG line does not support fast charging under the condition based on ADSP + vophy at present.

It is understood that in the embodiment of the present application, the pins of the USB interface are D +, D-. Correspondingly, when the connecting line between the terminal and the adapter is identified as a DEBUG line, the AP end can control the USBPHY to act on the high level of D +3.3V, so that the information sent by the adapter through D + and D-can be interfered into a half high level, and the quick charging cannot be carried out. Accordingly, in order to avoid the DEBUG line interfering with the quick charging communication, the terminal can directly choose to ignore the communication of the USBPHY when determining that the terminal is connected with the adapter through the DEBUG line, so as to forbid the control of the USBPHY on the D +, D-.

It should be noted that, in the embodiment of the present application, the high-impedance state may be a state capable of performing wired-AND with other states, wherein wired-AND logic, that is, two output terminals (including more than two) are directly interconnected to implement a logic function of "AND". The other states may represent other states that control D +, D-, and may specifically include a low-high state of 01 for VOOCPHY and adapter loading on D +, D-.

Optionally, in an embodiment of the present application, after it is determined that the external device is an adapter and the connection line between the terminal and the external device is a DEBUG line, the AP in the terminal may act on the USBPHY of the ADSP through GLINK, so as to set the states of D + and D-to a high-impedance state, thereby prohibiting the USBPHY from controlling D + and D-.

Further, in an embodiment of the present application, fig. 7 is a schematic view illustrating an implementation flow of a charging method provided in the embodiment of the present application, and as shown in fig. 7, after determining a connection type of a connection line between the external device and the terminal when the external device is connected, that is, after step 101, and after the running time of the first timer is exceeded, before the PMIC is prohibited from controlling the pin of the USB interface, that is, before step 103, the method for charging the terminal may further include the following steps:

step 105, if the connection line type is a debugging line, the equipment type is the adapter, and the charging mode is wired charging, setting the pin of the USB interface to be in a high-impedance state to prohibit the USBPHY from controlling the pin of the USB interface; simultaneously starting the first timer.

In the embodiment of the application, the terminal may further determine the charging mode, and then further determine whether to prohibit the USB phy from controlling the pins of the USB interface according to the charging mode, the type of the connection line, and the type of the device.

It is understood that in the present application, the charging mode may include wireless charging and wired charging.

Accordingly, in the embodiment of the application, when the terminal determines that the connection line type of the connection line with the external device is the debugging line, the device type of the external device is the adapter, and the charging mode is wired charging, the terminal may choose to ignore the communication of the usb phy. Specifically, the terminal can set the pin of the USB interface to a high-impedance state, so as to prohibit the USB phy from controlling D +, D-, and further avoid the DEBUG line (DEBUG line) from interfering with the fast charging communication.

It can be understood that, in the present application, since the wireless charging is coupled to the VBUS through the wireless coil, an action similar to the wired charging charger type identification is also generated, and therefore, the terminal can also eliminate the misidentification under the wireless charging through the confirmation of the charging mode.

Step 103, after the running time of the first timer is exceeded, the control of the pin of the USB interface by the PMIC is forbidden.

In the embodiment of the application, if the connection line type corresponding to the external device is a debug line, and if the device type of the external device is an adapter, after the terminal starts the first timer, the terminal may prohibit the PMIC from controlling the pin of the USB interface after the running time of the first timer is exceeded.

It should be noted that, in the embodiment of the present application, the terminal may set the operation time of the first timer in advance, for example, the time for which the first timer operates may be set to 800ms. The running time of the first timer may be a conversion time for converting between wireless charging and wired charging, and accordingly, the running time of the first timer may be used to determine an opportunity for starting the VOOCPHY for fast charging communication.

Optionally, in an embodiment of the present application, when the wired fast charging is connected after the wireless reverse charging, the OTG mode of the wireless reverse charging operation is quasi-switched to the general charging mode, that is, the wireless charging is switched to the wired charging, and the PMIC needs to have a certain switching time, so that after the terminal determines that the external device is an adapter and a connection line between the terminal and the external device is a debug line, the VOOCPHY is not immediately started to perform the fast charging communication, and the PMIC is not immediately prohibited to control the pin of the USB interface, but needs to start and operate through the first timer, and after it is ensured that the conversion between the wireless charging and the wired charging is completed, the PMIC is prohibited to control the pin of the USB interface.

That is, in the embodiment of the present application, after the running time of the first timer is exceeded, it may be considered that the wireless charging to wired charging conversion process is completed, and at this time, the terminal may choose to disable the PMIC from controlling the pin of the USB interface.

Optionally, in an embodiment of the present application, the terminal may implement the requirement of disabling the PMIC from controlling D + and D-by disabling the High Voltage Differentiated Charging Port (HVDCP) and the identification function of BC 1.2.

For example, in the present application, the ADSP in the terminal may start the first timer with the operation time of 800ms after the connection line between the terminal and the adapter is identified as the DEBUG line, and when the operation time of 800ms of the first timer is exceeded, and also to avoid the PMIC controlling D +, D-, the terminal may directly disable the identification of the HVDCP and BC1.2, and thus may disable the PMIC from controlling D +, D-.

Further, in the embodiment of the present application, the terminal may further determine whether to disable the PMIC from controlling the pin of the USB interface according to the charging mode, the connection type, and the device type.

Specifically, in the present application, when the terminal determines that the connection line type of the connection line with the external device is the debug line, the device type of the external device is the adapter, and the charging mode is wired charging (i.e., wired charging), the terminal may selectively disable the identification functions of the HVDCP and BC1.2, thereby disabling the PMIC from controlling D + and D-.

Therefore, in the embodiment of the application, after the external device is determined to be the adapter and the external device is connected with the terminal through the debugging line, the terminal can choose to forbid the USBPHY to control the D +, D-, or choose to forbid the PMIC to control the D +, D-, at the same time, only the VOOCPHY can control the D +, D-, so that the debugging line (DEBUG line) can be prevented from interfering with the fast-charging communication.

Step 104, activating the adapter to establish the fast charge communication.

In the embodiment of the application, after the terminal finishes the process of forbidding the USBPHY and the PMIC to control the D + and the D-, the terminal can activate the adapter, so that the quick charging communication can be established with the adapter.

Optionally, in an embodiment of the present application, the terminal may select to activate the adapter by sending a pulse string through an enable level shift function, and after activating the adapter, establish normal fast charging communication through a debug line between the terminal and the adapter.

In summary, according to the charging method proposed in the above steps 101 to 104, after the terminal determines that the external device is an adapter, the external device is connected to the terminal through a DEBUG line, and the external device and the terminal are not wirelessly charged, the control of D + and D-by the usb phy may be prohibited by setting D + and D-to a high-impedance state, and the control of D + and D-by the PMIC may be prohibited by prohibiting the identification functions of the HVDCP and BC1.2, thereby ensuring the establishment of the fast charging communication. That is to say, for the fast charging mode combining ADSP and VOOCPHY, when the DEBUG line is identified, the terminal can choose to forbid USBPHY and PMIC to control D +, D-, and ensure that only VOOCPHY can control D +, D-, so as to avoid interference of DEBUG line on the fast charging communication, and can meet the requirement of supporting fast charging using DEBUG line.

Therefore, the charging method provided by the application can meet the requirement that the DEBUG line can support quick charging based on the mode that ADSP is combined with VOOCPHY. Compared with the MCU-based quick charging scheme, the method has the advantages that a hardware switch is removed while the DEBUG line is ensured to support the quick charging function, and the cost is saved.

It should be noted that the charging method provided by the application is also suitable for a subsequent MCU scheme, and the MCU mode realizes a quick charging scheme for reference, and can save the cost by saving hardware switches.

The embodiment of the application provides a charging method, which is characterized in that when connection with external equipment is established, the type of a connecting line of the connecting line with the external equipment is determined; if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting the pin of the USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer; disabling control of a pin of the USB interface by the PMIC after exceeding a run time of the first timer; the adapter is activated to establish the fast charge communication. Therefore, in the embodiment of the application, the terminal can determine the device type and the connection line type corresponding to the external device, so that whether the control of the USBPHY and the PMIC on the D + and the D-is forbidden can be further determined according to the device type and the connection line type. Specifically, external equipment is determined to be an adapter, the external equipment is connected with the terminal through a DEBUG line, and after wireless charging is not performed, the terminal can choose to forbid USBPHY and PMIC to control D + and D-, and only VOOCPHY can control D + and D-, so that interference of the DEBUG line on fast charging communication can be avoided, the requirement of supporting the use of the DEBUG line for fast charging can be met, and charging performance and charging efficiency are greatly improved.

Based on the foregoing embodiment, a further embodiment of the present application provides a charging method, fig. 8 is a schematic flow chart illustrating an implementation of the charging method provided in the embodiment of the present application, and as shown in fig. 8, after determining a connection line type of a connection line between the terminal and an external device when a connection is established with the external device, that is, after step 101, the method for charging the terminal may further include the following steps:

and step 106, determining the device type of the external device.

In the embodiment of the application, when the terminal establishes connection with the external device, after the connection type of the connection line between the terminal and the external device is determined, the terminal can also determine the device type of the external device, that is, determine whether the external device is an adapter.

It should be noted that, in the embodiment of the present application, before determining whether to establish the fast charging communication, the terminal needs to determine the device type of the external device. The device type of the external device may be an adapter or a non-adapter.

Specifically, in an embodiment of the present application, a method for a terminal to determine a device type of an external device may include the following steps:

step 106a, after triggering the Type-C interrupt, starting a second timer.

In an embodiment of the application, the terminal may start the second timer after determining the connection line Type of the connection line by triggering a Type-C interrupt.

It should be noted that, in the embodiment of the present application, the terminal may set the operation time of the second timer in advance, for example, the time for which the second timer operates may be set to 200ms. Wherein the running time of the second timer can be used to determine the trigger timing of the APSD interrupt.

And 106b, after the running time of the second timer is exceeded, determining the port information corresponding to the external equipment by triggering APSD interrupt.

In the embodiment of the application, after the terminal starts the two timers and the running time of the second timer is exceeded, the terminal may further determine the port information corresponding to the external device by triggering an APSD interrupt.

It should be noted that, in the embodiment of the present application, when the running time of the second timer is reached after the Type-C interrupt is triggered, the terminal may select to trigger the APSD interrupt, where the APSD interrupt may perform, through a BC1.2 (Battery Charging v 1.2) charger Type identification protocol, acquisition of port information corresponding to the external device.

Wherein, BC1.2 is a protocol established by BC (Battery Charging) group under USB-IF, mainly for specifying the requirement of Battery Charging, and the protocol was originally implemented based on USB2.0 protocol.

Specifically, the three ports of BC1.2 mainly include a standard downlink port SDP, a DCP, and a charging downlink port CDP. Wherein the D + and D-lines of the SDP such port have 15k Ω pull-down resistors. The restriction value is as discussed above: 2.5mA when suspended, 100mA when connected, and 500mA when connected and configured for higher power. DCP, a port that does not support any data transfer, but can supply currents above 1.5A. The D + and D-lines of the port are shorted. This type of port supports higher charging capability wall and in-vehicle chargers without enumeration. The CDP port supports both high current charging and data transmission that is fully compatible with USB 2.0. The port has the 15k omega pull-down resistors necessary for D + and D-communications, as well as internal circuitry for the charger detection phase switching. The internal circuitry allows the portable device to distinguish the CDP from other types of ports.

And 106c, determining the equipment type according to the port information.

In the embodiment of the application, after the terminal exceeds the running time of the second timer and determines the port information corresponding to the external device by triggering APSD interrupt, the device type of the external device can be further determined according to the port information.

For example, in the present application, if the port information corresponding to the external device is a DCP, the terminal may determine that the device type is an adapter.

Further, in an embodiment of the present application, fig. 9 is a schematic view illustrating an implementation flow of a charging method provided in the embodiment of the present application, and as shown in fig. 9, after determining a connection type of a connection line between the terminal and an external device when the terminal is connected to the external device, that is, after step 101, the method for charging the terminal may further include the following steps:

and 107, if the Type of the connecting line is a Type-C line and the Type of the external equipment is an adapter, activating the adapter to establish the quick charging communication.

In the embodiment of the application, when the terminal is connected with the external equipment, after the connecting line Type of the connecting line between the external equipment is determined, if the connecting line Type corresponding to the external equipment is a standard Type-C line, and meanwhile, if the equipment Type of the external equipment is an adapter, the terminal can select direct activation of the adapter, so that quick charging communication can be established through the Type-C line.

Optionally, in an embodiment of the present application, after determining that the external device is an adapter and a connection line between the terminal and the external device is a standard Type-C line, it may be determined that the VOOCPHY controls D +, D-, and at this time, the terminal may send a pulse train to activate the adapter through an enable level shift function, so that normal fast charging communication may be established with the adapter after activating the adapter.

Further, in the embodiment of the present application, after determining the connection type of the connection line between the terminal and the external device when establishing connection with the external device, that is, after step 101, the method for charging the terminal may further include the following steps:

and 108, when the external equipment is disconnected, closing the first timer and the second timer, and initializing the connecting line identifier, the first control identifier and the second control identifier.

In the embodiment of the application, after the terminal is connected with the external device, when the terminal is disconnected from the external device, the first timer and the second timer can be selectively closed, and meanwhile, the terminal can also initialize the connection line identifier, the first control identifier and the second control identifier.

It should be noted that, in the embodiment of the present application, if the terminal is disconnected from the external device, the terminal does not need to disable the PMIC to control the pin of the USB interface, and therefore, the switching time for switching between the wireless charging and the wired charging does not need to be monitored, and further, the first timer may be selectively turned off.

Accordingly, in the embodiment of the application, if the terminal is disconnected from the external device, the terminal does not need to determine the device type of the external device by triggering the APSD interrupt, and therefore the trigger time of the APSD interrupt does not need to be determined, and the second timer can be selected to be turned off.

Further, in embodiments of the present application, the connection line identification may be used to determine the data line type. In particular, the connection line identification may be used to determine whether it is a DEBUG line.

Exemplarily, in the present application, a variable DEBUG _ flag may be used to represent the connection line identifier. When the value of the DEBUG _ flag is 1 or true, the data line is represented as a DEBUG line; when the value of DEBUG _ flag is 0 or false, the data line is not a DEBUG line.

Correspondingly, in the embodiment of the application, when the terminal establishes connection with the external device, after the connection line type of the connection line between the terminal and the external device is determined, if the connection line type corresponding to the external device is a debugging line, the terminal can set the value of the connection line identifier as the first value. Wherein the first value may be 1 or true.

Further, in embodiments of the present application, the first control flag may be used to determine whether to disable the USBPHY control D +, D-prior to charging.

For example, in the present application, the variable USB _ roll may be used to represent the first control flag. When the value of the USB _ ROLE is NONE, the USBPHY communication needs to be ignored, namely the USBPHY is forbidden to control the D +, D-.

Further, in embodiments of the present application, the second control flag may be used to determine whether to disable the usb phy control D +, D-before and during charging.

For example, in the present application, the variable align _ usb _ flag may be used to represent the second control flag. When the value of the align _ USB _ flag is 1 or true, the USB is neglected to be in the HOST or DEVICE state, the control right of the USBPHY to the D + and the D-is released before the quick charging, and the control right of the USBPHY to the D + and the D-is forbidden in the subsequent charging process of the connection; when the value of the align _ usb _ flag is 0 or false, the usb phy is allowed to control D +, D-before and during charging.

Correspondingly, in the embodiment of the application, the terminal may select to set the value of the first control identifier to a second value, and/or set the value of the second control identifier to a third value, so that the USB phy may be prohibited from controlling the pin of the USB interface. Wherein, the second value may be NONE, and the third value may be 1 or true.

The embodiment of the application provides a charging method, which is characterized in that when connection with external equipment is established, the type of a connecting line of the connecting line with the external equipment is determined; if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting the pin of the USB interface into a high-impedance state to prohibit the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer; disabling control of the pin of the USB interface by the PMIC after the run time of the first timer is exceeded; the adapter is activated to establish the fast charge communication. Therefore, in the embodiment of the application, the terminal can determine the device type and the connection line type corresponding to the external device, so that whether the control of the USBPHY and the PMIC on the D + and the D-is prohibited can be further determined according to the device type and the connection line type. Specifically, external equipment is determined to be an adapter, the external equipment is connected with the terminal through a DEBUG line, and after wireless charging is not performed, the terminal can choose to forbid USBPHY and PMIC to control D + and D-, and only VOOCPHY can control D + and D-, so that interference of the DEBUG line on fast charging communication can be avoided, the requirement of supporting the use of the DEBUG line for fast charging can be met, and charging performance and charging efficiency are greatly improved.

Based on the foregoing embodiment, another embodiment of the present application provides a charging method, where the charging method is applied to a terminal, where the terminal may be configured with an analog-digital signal processing chip ADSP and an application processor AP, and a communication link between the ADSP and the AP is global. Fig. 10 is a schematic view of an implementation flow of the charging method provided in the embodiment of the present application, and as shown in fig. 10, the method for charging the terminal may further include the following steps:

step 201, establishing connection with an external device.

Step 202, triggering TYPE-C interruption, and determining the TYPE of the connecting line.

Step 203, determining whether the connection type is a DEBUG line, if so, performing step 204 and step 205, otherwise, performing step 215.

In the embodiment of the application, after the terminal establishes connection with the external device through the connection line, the specific connection line type of the connection line may be determined first, so that whether the establishment of the fast charging communication is performed may be further determined based on the connection line type. In particular, the terminal may determine the connection line Type of the connection line by triggering a Type-C interrupt. The connection line TYPE may be a DEBUG line (DEBUG line) or a TYPE-C line.

For example, in the present application, when an external device is inserted, the terminal may first have a TYPE-C interrupt trigger, where in the interrupt processing function, the corresponding TYPE-C register is read to determine whether the inserted TYPE-C line is a standard TYPE-C line or a DEBUG line.

Step 204, start timer 1.

And step 205, setting the value of the connecting line identifier to true.

In the embodiment of the application, after determining that the connection line type is the DEBUG line, the terminal may start the timer 1 first, and may set the value of the connection line identifier to true at the same time.

For example, in the present application, if the terminal is connected to the external device through the DEBUG line, the ADSP may send a notify message to the AP through the GLINK bus to notify the AP that the currently inserted connection line is the DEBUG line, and accordingly, the AP may set the value of the connection line identifier DEBUG _ flag to true, that is, set DEBUG _ flag = true.

And step 206, when the running time of the timer 1 is reached, triggering APSD interrupt and determining the type of the equipment.

Step 207, determine whether the device type is an adapter, if yes, execute step 208, otherwise execute step 215.

Step 208, start timer 2.

In the embodiment of the present application, after the running time of the timer 1 is reached, the terminal may determine the device type of the external device by triggering an APSD interrupt. If the device type is determined to be an adapter, the terminal selects to start timer 2. The running time of the timer 1 is used for determining the trigger time of the APSD interrupt.

Optionally, in the present application, the terminal may choose to trigger an APSD interrupt after a certain time (reaching the running time of the timer 1, such as several hundred ms) after the TYPE-C interrupt, where the APSD interrupt is the result of the BC1.2 charger TYPE identification protocol. When the DCP is identified, it indicates that the device type of the external device is the adapter at this time, and therefore the APSD needs to send a notify message to the AP again through the GLINK bus to inform the AP that the currently inserted external device is the adapter.

Further, in the present application, the ADSP may start the timer 2 having an operation time of 800ms, so that the completion of the conversion process from the wireless charging to the wired charging may be ensured.

Step 209, determining whether the conditions for prohibiting control of D + and D-are satisfied, if so, executing step 210, step 211, step 2012 and step 2013, otherwise, executing step 215.

Step 210, set D +, D-to a high impedance state.

And step 211, setting the value of the first control identifier as NONE.

And step 212, setting the value of the second control identifier as true.

When the running time of the timer 2 is reached, the recognition functions of PMIC and BC1.2 are disabled, step 213.

In the embodiment of the application, the terminal may determine whether conditions for prohibiting control of D + and D-are satisfied, and if so, the terminal may select to set the D + and D-in a high-impedance state, set the value of the first control identifier to NONE, set the value of the second control identifier to true, and prohibit the recognition functions of PMIC and BC1.2 after the running time of the timer 2 is reached. The terminal can further determine whether the control of the D + and the D-is required to be forbidden according to the charging mode, the connecting line type and the equipment type.

Specifically, when the terminal determines that the type of the connecting line between the terminal and the external device is a debugging line, the type of the external device is an adapter, and the charging mode is wired charging, the terminal can set the D + and the D-to be in a high-impedance state, so that the control of the USBPHY on the D + and the D-is forbidden. Then, after the running time of the timer 2 is exceeded, the control of D +, D-by the PMIC is disabled.

For example, in the present application, an AP in a terminal may determine whether a condition for prohibiting control of D + and D-is satisfied by combining an already obtained connection line type, a device type, and a charging mode, and when DEBUG _ flag = true, an external device is an adapter, and wireless charging is not performed, the AP may determine that communication of USB phy needs to be ignored at this time, so that the AP may directly set a value of the first control identifier USB _ roll to NONE, and then may act on the USB phy of ADSP through GLINK, that is, set the D + and D-to a high-impedance state.

In the present application, since wireless charging is coupled to vbus via a wireless coil, an operation similar to the wired charging that identifies the type of the charger occurs, and therefore, it is necessary to eliminate the charging mode of wireless charging.

It is understood that in this application, a high impedance state means that this state can be wired to other states controlling D +, D-that are 01 low high states loaded on D +, D-by the VOOCPHY and adapter.

Further, in the embodiment of the present application, in order to disable the USBPHY control D +, D-during the fast charging process, the terminal may further set a second control flag, where the second control flag ignore _ USB _ flag is a flag indicating that the state of setting USB to HOST or DEVICE will be ignored. Correspondingly, when the connecting line is a DEBUG line, the right of controlling D + and D-by the USBPHY is released before the quick charging is carried out, and meanwhile, the subsequent USBPHY connected at this time is marked by the second control identifier ignore _ usb _ flag to be prohibited from controlling D + and D-, so that the requirement that the DEBUG line supports the quick charging can be met.

It should be noted that, in the embodiment of the present application, when the wired fast charging is connected after the wireless reverse charging, the OTG mode of the wireless reverse charging operation is switched to the general charging mode, that is, the wireless charging is switched to the wired charging, and the PMIC needs to have a certain switching time, so that the terminal selects to disable the identification functions of the PMIC and BC1.2 after the terminal reaches the running time of the timer 2.

Optionally, in this application, ADSP may enable VOOCPHY for fast-charge communication after starting timer 2 with a running time of 800ms. When the running time of the timer 2 is reached, the identification of the HVDCP and BC1.2 can be directly disabled, so that the control of D +, D-by the PMIC can be avoided.

That is to say, in the present application, after determining that the external device is an adapter and the external device is connected to the terminal through the DEBUG line, the terminal may choose to prohibit the usb phy from controlling D +, D-, or may choose to prohibit the PMIC from controlling D +, D-, at the same time, only the VOOCPHY may control D +, D-, so as to avoid the DEBUG line (DEBUG line) from interfering with the fast-charging communication.

Step 214, activating the adapter and establishing the fast charging communication.

Optionally, in the application, the terminal may select an enable level shift function, send a pulse train to deactivate the adapter, and activate the fast charging adapter to enable normal fast charging communication.

Step 215, not disabling USBPHY and PMIC from controlling D +, D-.

Further, in an embodiment of the present application, fig. 11 is a schematic view illustrating a sixth implementation flow of a charging method provided in the embodiment of the present application, as shown in fig. 11, after connection is established with an external device, that is, after step 201, the method for charging the terminal may further include the following steps:

and step 216, after the connection with the external equipment is disconnected, closing the timer 1 and the timer 2.

Step 207, initializing a connecting line identifier, a first control identifier and a second control identifier.

In the embodiment of the application, after the external device is disconnected from the terminal, the terminal can select to close the timer 1 and the timer 2, and also can select to initialize the connection line identifier, the first control identifier and the second control identifier, that is, during the disconnection, the terminal can select to remove the USB _ roll, the DEBUG _ flag, the ignore _ USB _ flag and the timer, and returns to the most initial state.

Based on the foregoing embodiment, in another embodiment of the present application, fig. 12 is a schematic diagram of a composition structure of a terminal device according to an embodiment of the present application, and as shown in fig. 12, a terminal device 10 according to an embodiment of the present application may include a determining unit 11, a setting unit 12, a disabling unit 13, an activating unit 14,

the determining unit 11 is configured to determine a connection type of a connection line between the external device and the determining unit when connection is established with the external device;

the setting unit 12 is configured to set a pin of the USB interface to a high-impedance state to prohibit the USB phy from controlling the pin of the USB interface if the connection line type is a debug line and the device type of the external device is an adapter; simultaneously starting a first timer;

the disabling unit 13 is configured to disable control of the pin of the USB interface by the PMIC after the running time of the first timer is exceeded;

the activating unit 14 is configured to activate the adapter to establish the fast charging communication.

In an embodiment of the present application, further, fig. 13 is a schematic diagram of a composition structure of a terminal device provided in the embodiment of the present application, as shown in fig. 13, the terminal device 10 provided in the embodiment of the present application may further include a processor 15 and a memory 16 storing executable instructions of the processor 15, and further, the terminal device 10 may further include a communication interface 17, and a bus 18 for connecting the processor 15, the memory 16, and the communication interface 17.

In an embodiment of the present Application, the Processor 15 may be at least one of an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), a ProgRAMmable Logic Device (PLD), a Field ProgRAMmable Gate Array (FPGA), a Central Processing Unit (CPU), a controller, a microcontroller, and a microprocessor. It is understood that the electronic devices for implementing the above processor functions may be other devices, and the embodiments of the present application are not limited in particular. The terminal device 10 may further comprise a memory 16, which memory 16 may be connected to the processor 15, wherein the memory 16 is adapted to store executable program code comprising computer operating instructions, and wherein the memory 16 may comprise a high speed RAM memory and may further comprise a non-volatile memory, such as at least two disk memories.

In the embodiment of the present application, the bus 18 is used to connect the communication interface 17, the processor 15, and the memory 16 and the intercommunication among these devices.

In an embodiment of the present application, the memory 16 is used for storing instructions and data.

Further, in an embodiment of the present application, the processor 15 is configured to determine a connection type of a connection line between the external device and the external device when establishing a connection with the external device; if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting a pin of a USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer; disabling control of a pin of the USB interface by a PMIC after the run time of the first timer is exceeded; activating the adapter to establish the fast charge communication.

In practical applications, the Memory 16 may be a volatile Memory (volatile Memory), such as a Random-ACCess Memory (RAM); or a non-volatile Memory (non-volatile Memory), such as a Read-Only Memory (ROM), a flash Memory (flash Memory), a Hard Disk Drive (HDD) or a Solid-State Drive (SSD); or a combination of the above types of memories and provides instructions and data to the processor 15.

In addition, each functional module in this embodiment may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware or a form of a software functional module.

Based on the understanding that the technical solutions of the present embodiment substantially or partially contribute to the prior art, or all or part of the technical solutions may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to execute all or part of the steps of the method of the present embodiment. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read Only Memory (ROM), a Random ACCess Memory (RAM), a magnetic disk, or an optical disk.

The embodiment of the application provides a terminal device, which determines the type of a connecting line of the connecting line with an external device when the terminal device is connected with the external device; if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting the pin of the USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer; disabling control of the pin of the USB interface by the PMIC after the run time of the first timer is exceeded; the adapter is activated to establish the fast charge communication. Therefore, in the embodiment of the application, the terminal can determine the device type and the connection line type corresponding to the external device, so that whether the control of the USBPHY and the PMIC on the D + and the D-is forbidden can be further determined according to the device type and the connection line type. Specifically, external equipment is determined to be an adapter, the external equipment is connected with the terminal through a DEBUG line, and after wireless charging is not performed, the terminal can choose to forbid USBPHY and PMIC to control D + and D-, and only VOOCPHY can control D + and D-, so that interference of the DEBUG line on fast charging communication can be avoided, the requirement of supporting the use of the DEBUG line for fast charging can be met, and charging performance and charging efficiency are greatly improved.

An embodiment of the present application provides a computer-readable storage medium on which a program is stored, which when executed by a processor implements the charging method as described above.

Specifically, the program instructions corresponding to a charging method in the present embodiment may be stored on a storage medium such as an optical disc, a hard disc, a usb disk, or the like, and when the program instructions corresponding to a charging method in the storage medium are read or executed by an electronic device, the method includes the following steps:

if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting a pin of a USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer;

disabling control of a pin of the USB interface by a PMIC after the run time of the first timer is exceeded;

activating the adapter to establish the fast charge communication.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of implementations of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart block or blocks and/or flowchart block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks in the flowchart and/or block diagram block or blocks.

The above description is only a preferred embodiment of the present application, and is not intended to limit the scope of the present application.

Claims

1. A method of charging, the method comprising:

if the type of the connecting line is a debugging line and the type of the external equipment is an adapter, setting a pin of a Universal Serial Bus (USB) interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting a first timer;

activating the adapter to establish fast charge communication.

2. The method according to claim 1, wherein the determining a connection line type of a connection line with an external device when establishing a connection with the external device comprises:

when the external equipment is connected, the Type of the connecting line is determined by triggering Type-C interruption.

3. The method according to claim 1 or 2, wherein after determining the connection line type of the connection line between the external device and the external device when the connection is established with the external device, the method further comprises:

if the Type of the connecting line is a Type-C line and the Type of the external equipment is an adapter, activating the adapter to establish quick charging communication.

4. The method according to claim 2, wherein after determining the connection line type of the connection line with the external device when the connection is established with the external device, the method further comprises:

determining the device type of the external device.

5. The method of claim 4, wherein the determining the device type of the external device comprises:

starting a second timer after triggering the Type-C interrupt;

after the running time of the second timer is exceeded, determining port information corresponding to the external equipment by triggering APSD interruption;

and determining the equipment type according to the port information.

6. The method of claim 5, wherein the determining the device type according to the port information comprises:

and if the port information is a special charging port (DCP), determining that the equipment type is the adapter.

7. The method according to claim 5, wherein after determining the connection line type of the connection line with the external device when establishing the connection with the external device, the method further comprises:

and when the external equipment is disconnected, closing the first timer and the second timer, and initializing a connecting line identifier, a first control identifier and a second control identifier.

8. The method of claim 7, further comprising:

and if the type of the connecting line is a debugging line, setting the value of the connecting line identification as a first value.

9. The method of claim 7, further comprising:

and setting the value of the first control identifier as a second value, and/or setting the value of the second control identifier as a third value to forbid the USBPHY from controlling the pin of the USB interface.

10. The method of claim 1, further comprising:

if the connection line type is a debugging line, the equipment type is the adapter, and the charging mode is wired charging, setting the pin of the USB interface to be in a high-impedance state so as to forbid the USBPHY from controlling the pin of the USB interface; simultaneously starting the first timer.

11. A terminal device, characterized in that the terminal device comprises: a determining unit, a setting unit, a disabling unit, an activating unit,

the disabling unit is used for disabling the PMIC from controlling the pin of the USB interface after the running time of the first timer is exceeded;

12. A terminal device comprising a processor, a memory storing instructions executable by the processor, the instructions when executed by the processor implementing the method of any one of claims 1 to 10.

13. A computer-readable storage medium, on which a program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-10.