CN115529745A - Circuit board and method for manufacturing the same - Google Patents
Circuit board and method for manufacturing the same Download PDFInfo
- Publication number
- CN115529745A CN115529745A CN202110711077.XA CN202110711077A CN115529745A CN 115529745 A CN115529745 A CN 115529745A CN 202110711077 A CN202110711077 A CN 202110711077A CN 115529745 A CN115529745 A CN 115529745A
- Authority
- CN
- China
- Prior art keywords
- conductive
- circuit
- layer
- insulating layer
- conductive part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Diaphragms For Electromechanical Transducers (AREA)
Abstract
A circuit board and its preparation method, the circuit board includes the first circuit base plate and second circuit base plate, the first circuit base plate includes the first circuit layer, first insulating layer and second circuit layer, the first circuit base plate also includes at least two spaced conductive blocks exposed from interval of the first circuit layer and interval of the second circuit layer, each conductive block includes the first conductive part and second conductive part; the second conductive part is embedded in the first insulating layer, and two surfaces of the second conductive part are respectively flush with two sides of the first insulating layer; the first conductive part protrudes from the surface of the second conductive part, which is far away from the second circuit layer, and the width of the first conductive part is smaller than that of the second conductive part; the second circuit substrate is combined with the first circuit layer, the first insulating layer exposed from the first circuit layer and the conductive block through a second insulating layer; the circuit board further comprises a conductive column which is embedded in the second insulating layer and corresponds to each conductive block, the first conductive part is embedded in the conductive column, and the conductive column is electrically connected with the conductive blocks and the second circuit substrate.
Description
Technical Field
The invention relates to a circuit board and a manufacturing method thereof.
Background
In the market trend of portable electronic products, the circuit boards applied to the electronic products are also developed toward high density and high precision integration. However, when an electronic component is mounted on a circuit board, the flatness of the circuit board is poor, which may cause unstable electrical connection between the electronic component and the circuit board and poor electrical conduction.
Disclosure of Invention
Accordingly, it is desirable to provide a method for manufacturing a circuit board that is advantageous for improving flatness.
It is also necessary to provide a circuit board which is advantageous in improving flatness.
A method of manufacturing a circuit board, comprising the steps of:
providing a double-sided metal substrate, which comprises a first metal foil, a first insulating layer and a second metal foil which are sequentially stacked;
forming at least two spaced stepped blind holes on the double-sided metal substrate, wherein each stepped blind hole comprises a first portion penetrating through the first metal foil along the stacking direction and a second portion penetrating through the first insulating layer along the stacking direction, the first portion is communicated with the second portion, and the width of the first portion in each stepped blind hole is smaller than that of the second portion on any cross section along the stacking direction;
filling conductive paste into each stepped blind hole to form a conductive block corresponding to each stepped blind hole, wherein each conductive block comprises a first conductive part filling the first part and a second conductive part filling the second part;
carrying out circuit manufacturing on the first metal foil provided with the first conductive part so as to correspondingly form a first circuit layer;
arranging second insulating layers on the first circuit layer and the first insulating layers and the conductive blocks exposed from the first circuit layer, patterning the second insulating layers to form a first opening corresponding to each conductive block, wherein the first opening is formed around the first conductive part to expose the first conductive part and at least part of the second conductive part; and
and forming a conductive column for filling the first opening corresponding to each first opening, forming a circuit substrate on the patterned second insulating layer, and performing circuit manufacturing on the second copper foil to form a second circuit layer correspondingly, wherein the conductive column is electrically connected with the circuit substrate, and the second circuit layer forms at least one second opening corresponding to the conductive block.
A circuit board comprises a first circuit substrate and a second circuit substrate which are arranged in a stacked mode, wherein the first circuit substrate comprises a first circuit layer, a first insulating layer and a second circuit layer which are sequentially stacked along the stacking direction, the first circuit substrate further comprises at least two spaced conductive blocks exposed from a gap of the first circuit layer and a gap of the second circuit layer, and each conductive block comprises a first conductive part and a second conductive part; the second conductive part is embedded in the first insulating layer, and two surfaces of the second conductive part spaced along the stacking direction are flush with two sides of the first insulating layer spaced along the stacking direction respectively; the first conductive part protrudes from the surface of the second conductive part, which is far away from the second circuit layer, and the width of the first conductive part is smaller than that of the second conductive part on any section along the stacking direction; the second circuit substrate is combined with the first circuit layer, the first insulating layer exposed from the first circuit layer and the conductive block through a second insulating layer; the circuit board further comprises at least two spaced conductive columns embedded in the second insulating layer, each conductive column corresponds to one of the conductive blocks, the first conductive part is embedded in the conductive column, and the conductive blocks are electrically connected with the second circuit substrate through the conductive columns.
In the circuit board and the manufacturing method thereof, because each of the conductive blocks, one side of the second conductive part deviating from the first circuit layer and one side of the first insulating layer deviating from the first circuit layer are parallel and level, the flatness of the circuit board is improved, and the stability and the effectiveness of electric connection with an electronic element are favorably improved when the electronic element is electrically connected in the subsequent process. And the first conductive part is embedded in the conductive column, which is beneficial to improving the stability of the electric connection between the circuit layers in the circuit board.
Drawings
Fig. 1 to 10 illustrate a method for manufacturing a circuit board according to an embodiment of the present invention.
Fig. 11 is a circuit board according to an embodiment of the present invention.
Description of the main elements
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Some embodiments of the invention are described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
Referring to fig. 1 to 10, a method for manufacturing a circuit board according to an embodiment of the present invention includes the following steps:
step S1, please refer to fig. 1, providing a double-sided metal substrate 10, where the double-sided metal substrate 10 includes a first metal foil 11, a first insulating layer 13, and a second metal foil 15 stacked in sequence.
The first insulating layer 13 may include, but is not limited to, at least one of a Polyimide (PI) film, a Liquid Crystal Polymer (LCP) film, a Polyethylene Terephthalate (PET) film, and a Polyethylene Naphthalate (PEN) film.
The material of the first metal foil 11 and the second metal foil 15 may be, but not limited to, at least one of metals such as copper, silver, nickel, gold, and alloys thereof.
In this embodiment, the double-sided metal substrate 10 may be a double-sided copper-clad plate.
Step S2, referring to fig. 2, at least two stepped blind holes 16 are formed on the double-sided metal substrate 10, wherein each stepped blind hole 16 includes a first portion 161 penetrating the first metal foil 11 along the stacking direction and a second portion 163 penetrating the first insulating layer 13 along the stacking direction. The first portion 161 is communicated with the second portion 163, and the width of the first portion 161 in each stepped blind hole 16 is smaller than that of the second portion 163 in any cross section along the stacking direction.
Preferably, each stepped blind hole 16 has a substantially inverted T-shaped cross section along any cross section of the stacking direction. More preferably, the central axis of the first portion 161 and the central axis of the second portion 163 in each stepped blind hole 16 may coincide.
Specifically, the stepped blind hole 16 can be formed by, but is not limited to, the following method:
first, referring to fig. 3, the first metal foil 11 is etched to form at least two first portions 161 penetrating the first metal foil 11 along the stacking direction.
Second, referring to fig. 2, the first insulating layer 13 is etched through each of the first portions 161 to form a second portion 163 penetrating the first insulating layer 13 along the stacking direction. In any cross section along the stacking direction, the width of the first portion 161 is smaller than the width of the corresponding second portion 163.
Since the first metal foil 11 and the first insulating layer 13 are made of different materials, the first portion 161 and the second portion 163 can be formed by selecting different etching solutions, and the formed first portion 161 is not affected when the second portion 163 is formed.
In step S3, referring to fig. 4, a conductive paste is filled into each stepped blind hole 16 to form a conductive block 20 corresponding to each stepped blind hole 16. Wherein each of the conductive blocks 20 includes a first conductive portion 21 filling the first portion 161 and a second conductive portion 23 filling the second portion 163. The shape of each conductive block 20 is consistent with the shape of the corresponding stepped blind hole 16.
Preferably, the conductive paste may be a silver paste. The conductive paste may be filled in the stepped blind hole 16 by, but not limited to, printing.
Step S4, referring to fig. 5, a circuit is formed on the first metal foil 11 provided with the first conductive portion 21, so that a first circuit layer 110 is correspondingly formed on the first metal foil 11.
When the circuit in the first circuit layer 110 is electrically connected to the conductive block 20, due to the structural particularity of the conductive block 20, the circuit can be directly disposed on the surface of the second conductive portion 21 of the conductive block 20 to realize electrical connection without forming a ring, which is beneficial to saving wiring space and increasing wiring density. In some embodiments, in order to further improve the stability of the electrical connection between the circuit and the conductive block 20, the circuit may further contact the first conductive portion 23 and even surround the first conductive portion 23.
In step S5, referring to fig. 6 and 7, a second insulating layer 30 is disposed on the first circuit layer 110, the first insulating layer 13 exposed from the first circuit layer 110, and the conductive bumps 20, and the second insulating layer 30 is patterned to form a first opening 301 corresponding to each conductive bump 20. The first opening 301 is opened around the first conductive portion 21 to expose the first conductive portion 21 and a portion of the second conductive portion 23.
In the present embodiment, it is preferable that the thickness of the second insulating layer 30 in the stacking direction be larger than the height of the first conductive portion 21. In some embodiments, the thickness of the second insulating layer 30 may also be less than or equal to the height of the first conductive portion 21 in the stacking direction.
In step S6, referring to fig. 8, a conductive pillar 35 filling the first opening 301 is formed corresponding to each first opening 301, a circuit substrate 50 is formed on a side of the patterned second insulating layer 30 away from the first insulating layer 13, and the second metal foil 15 is subjected to circuit fabrication to form a second circuit layer 150 correspondingly. The conductive pillar 35 is electrically connected to the circuit substrate 50, and the second circuit layer 150 forms at least one second opening 151 corresponding to the conductive bump 20.
Specifically, a groove 350 is formed by recessing the surface of each conductive pillar 35 facing the corresponding second conductive portion 23 in a direction away from the second conductive portion 23, and the corresponding first conductive portion 21 is embedded in the groove 350.
At least one of the conductive bumps 20 is exposed from one of the second openings 151. In this embodiment, the conductive bumps 20 are disposed at intervals, and a plurality of the conductive bumps 20 are exposed from one of the second openings 151. The surface of the second conductive part 23 of each conductive block 20 facing away from the first conductive part 21 is flush with the side of the first insulating layer 13 facing away from the first circuit layer 110.
In the present embodiment, the circuit substrate 50 may be a single-layer circuit substrate including a circuit layer 53. The conductive post 35 is electrically connected to the circuit layer 53. In some embodiments, the circuit substrate 50 may also be a double-layer circuit substrate or a multi-layer circuit layer substrate, i.e., the circuit substrate 50 includes at least two circuit layers that are spaced and stacked. The conductive posts 35 electrically connect the adjacent circuit layers.
In step S7, referring to fig. 9, a first passivation layer 61 is covered on the circuit substrate 50, and a second passivation layer 63 is covered on the second circuit layer 150. The second protection layer 63 includes at least one window 630, and at least one conductive bump 20 is exposed from one of the windows 630.
In this embodiment, a plurality of the conductive bumps 20 are exposed from one of the windows 630.
Step S8, referring to fig. 10, at least one electronic component 70 is mounted in the window 630, and each electronic component 70 is electrically connected to at least two of the conductive bumps 20.
Specifically, each of the electronic components 70 may include at least two spaced connection pads 71, and each connection pad 71 is electrically connected to a surface of the second conductive portion 23 of the conductive block 20 facing away from the first conductive portion 21.
Each of the electronic components 70 and each of the conductive bumps 20 can be electrically connected and fixed by, but not limited to, an anisotropic conductive adhesive or a solder paste (not shown).
In some embodiments, step S8 may be omitted. In some embodiments, steps S7 and S8 may be omitted.
Referring to fig. 11, a circuit board 100 according to an embodiment of the present invention includes a first circuit substrate 10a and a second circuit substrate 40 stacked together. The first wiring board 10a includes a first wiring layer 110, a first insulating layer 13, and a second wiring layer 150 laminated in this order in the above-described lamination direction. The first circuit substrate 10a further includes at least two spaced conductive blocks 20 exposed from the gap of the first circuit layer 110 and the gap of the second circuit layer 150, and each conductive block 20 includes a first conductive portion 21 and a second conductive portion 23. The second conductive portions 23 are embedded in the first insulating layer 13, and two surfaces of the second conductive portions 23 spaced along the stacking direction are flush with two sides of the first insulating layer 13 spaced along the stacking direction. The first conductive part 21 protrudes from the surface of the second conductive part 23 away from the second circuit layer 150, and the width of the first conductive part 21 is smaller than the width of the second conductive part 23 on any cross section along the stacking direction. The second circuit substrate 40 is coupled to the first circuit layer 110, the first insulating layer 13 exposed from the first circuit layer 110, and the conductive bump 20 through a second insulating layer 30. The circuit board 100 further includes at least two spaced conductive pillars 35 embedded in the second insulating layer 30, each conductive pillar 35 is disposed corresponding to one of the conductive blocks 20, and the first conductive portion 21 is embedded in the conductive pillar 35. The conductive pillar 35 electrically connects the conductive bump 20 and the second circuit substrate 40.
In the present embodiment, the height of the first conductive portion 21 and the thickness of the first circuit layer 110 may be matched in the stacking direction.
Preferably, the conductive block 20 may be a silver block.
Preferably, each of the conductive bumps 20 has a substantially inverted T-shaped cross section in any cross section along the stacking direction. More preferably, a central axis of the first conductive part 21 in the stacking direction in each of the conductive blocks 20 and a central axis of the second conductive part 23 in the stacking direction may coincide with each other.
Preferably, the thickness of the second insulating layer 30 may be larger than the height of the first conductive portion 21 in the stacking direction. In some embodiments, the thickness of the second insulating layer 30 may also be less than or equal to the height of the first conductive portion 21 in the stacking direction.
In some embodiments, the circuit board 100 may further include a first protective layer 61 and a second protective layer 63. The first protective layer 61 covers the second circuit substrate 40, the second protective layer 63 covers the second circuit layer 150, and the second protective layer 63 includes at least one window 630 to expose the conductive block 20.
In some embodiments, the circuit board 100 may further include at least one electronic component 70 mounted in the window 630, and each electronic component 70 is electrically connected to the conductive block 20.
Specifically, each of the electronic components 70 may include at least two spaced connection pads 71, and each connection pad 71 is electrically connected to a surface of the second conductive portion 23 of one of the conductive blocks 20, which faces away from the first conductive portion 21.
Each electronic component 70 and each conductive block 20 can be electrically connected and fixed by, but not limited to, anisotropic conductive adhesive or solder paste.
In the circuit board and the manufacturing method thereof, because each of the conductive blocks 20 has one side of the second conductive part 23 deviating from the first circuit layer 110 and one side of the first insulating layer 13 deviating from the first circuit layer 110, the flatness of the circuit board is improved, so that the stability and effectiveness of the electrical connection with the electronic element 70 are improved when the electronic element 70 is electrically connected in the subsequent process. The first conductive portion 21 is embedded in the conductive column 35, which is beneficial to improving the stability of the electrical connection between the circuit layers in the circuit board.
Further, conducting block 20 is formed through silver thick liquid, is favorable to reducing conducting block 20's contact resistance, and then is favorable to guaranteeing the integrality of circuit board signal, and conducting block 20 that silver thick liquid formed need not to carry out surface treatment simultaneously, but follow-up direct electric connection electronic component is favorable to reducing processing procedure and cost.
Although the present invention has been described with reference to the above preferred embodiments, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A method of manufacturing a circuit board, comprising the steps of:
providing a double-sided metal substrate, which comprises a first metal foil, a first insulating layer and a second metal foil which are sequentially stacked;
forming at least two spaced stepped blind holes on the double-sided metal substrate, wherein each stepped blind hole comprises a first portion penetrating through the first metal foil along the stacking direction and a second portion penetrating through the first insulating layer along the stacking direction, the first portion is communicated with the second portion, and the width of the first portion in each stepped blind hole is smaller than that of the second portion on any cross section along the stacking direction;
filling conductive paste into each stepped blind hole to form a conductive block corresponding to each stepped blind hole, wherein each conductive block comprises a first conductive part filling the first part and a second conductive part filling the second part;
carrying out circuit manufacturing on the first metal foil provided with the first conductive part so as to correspondingly form a first circuit layer;
arranging second insulating layers on the first circuit layer and the first insulating layers and the conductive blocks exposed from the first circuit layer, patterning the second insulating layers to form a first opening corresponding to each conductive block, wherein the first opening is formed around the first conductive part to expose the first conductive part and at least part of the second conductive part; and
and forming a conductive column for filling the first opening corresponding to each first opening, forming a circuit substrate on the patterned second insulating layer, and carrying out circuit manufacturing on the second copper foil to correspondingly form a second circuit layer, wherein the conductive column is electrically connected with the circuit substrate, and the second circuit layer forms at least one second opening corresponding to the conductive block.
2. The method of manufacturing a circuit board according to claim 1, wherein each of the stepped blind holes has an inverted T-shaped cross section in any cross section along the stacking direction.
3. The method of claim 1, wherein the conductive paste is silver paste.
4. The method for manufacturing a circuit board according to claim 1, further comprising:
and covering a first protective layer on one side of the circuit substrate, which is far away from the first circuit layer, and covering a second protective layer on the second circuit layer, wherein the second protective layer comprises at least one window to expose the conductive block.
5. The method for manufacturing a circuit board according to claim 4, wherein at least one electronic component is mounted in the window, each of the electronic components being electrically connected to at least two of the conductive bumps.
6. The method of claim 5, wherein each of the electronic components is electrically connected and fixed to each of the conductive bumps by an anisotropic conductive adhesive or solder paste.
7. A circuit board comprises a first circuit substrate and a second circuit substrate which are arranged in a stacked mode, wherein the first circuit substrate comprises a first circuit layer, a first insulating layer and a second circuit layer which are sequentially stacked along the stacking direction, the first circuit substrate further comprises at least two spaced conductive blocks exposed from a gap of the first circuit layer and a gap of the second circuit layer, and each conductive block is characterized by comprising a first conductive part and a second conductive part; the second conductive part is embedded in the first insulating layer, and two surfaces of the second conductive part spaced along the stacking direction are flush with two sides of the first insulating layer spaced along the stacking direction respectively; the first conductive part protrudes from the surface of the second conductive part, which is far away from the second circuit layer, and the width of the first conductive part is smaller than that of the second conductive part on any section along the stacking direction; the second circuit substrate is combined with the first circuit layer, the first insulating layer exposed from the first circuit layer and the conductive block through a second insulating layer; the circuit board further comprises at least two spaced conductive columns embedded in the second insulating layer, each conductive column is arranged corresponding to one conductive block, the first conductive part is embedded in the conductive column, and the conductive blocks are electrically connected with the second circuit substrate through the conductive columns.
8. The circuit board according to claim 7, wherein a cross section of each of the conductive bumps is an inverted T-shape in any cross section along the stacking direction; the conductive block is a silver block.
9. The circuit board of claim 7, further comprising a first protective layer and a second protective layer, wherein the first protective layer is disposed on a side of the second circuit substrate facing away from the first circuit substrate, the second protective layer covers the second circuit layer, and the second protective layer comprises at least one window to expose the conductive bumps.
10. The circuit board of claim 9, further comprising at least one electronic component mounted in the window, wherein each electronic component is electrically connected and fixed to each conductive block by anisotropic conductive adhesive or solder paste.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110711077.XA CN115529745A (en) | 2021-06-25 | 2021-06-25 | Circuit board and method for manufacturing the same |
TW110128610A TWI782651B (en) | 2021-06-25 | 2021-08-03 | Circuit board and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110711077.XA CN115529745A (en) | 2021-06-25 | 2021-06-25 | Circuit board and method for manufacturing the same |
Publications (1)
Publication Number | Publication Date |
---|---|
CN115529745A true CN115529745A (en) | 2022-12-27 |
Family
ID=84693567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110711077.XA Pending CN115529745A (en) | 2021-06-25 | 2021-06-25 | Circuit board and method for manufacturing the same |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN115529745A (en) |
TW (1) | TWI782651B (en) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI487444B (en) * | 2013-05-07 | 2015-06-01 | Unimicron Technology Corp | Carrier substrate and manufacturing method thereof |
CN109788661B (en) * | 2017-11-10 | 2021-08-24 | 宏启胜精密电子(秦皇岛)有限公司 | Flexible circuit board and preparation method thereof |
CN110545625B (en) * | 2018-05-29 | 2021-11-02 | 鹏鼎控股(深圳)股份有限公司 | Flexible circuit board and manufacturing method thereof |
CN111343802B (en) * | 2018-12-19 | 2022-02-22 | 庆鼎精密电子(淮安)有限公司 | Circuit board and manufacturing method thereof |
-
2021
- 2021-06-25 CN CN202110711077.XA patent/CN115529745A/en active Pending
- 2021-08-03 TW TW110128610A patent/TWI782651B/en active
Also Published As
Publication number | Publication date |
---|---|
TW202301930A (en) | 2023-01-01 |
TWI782651B (en) | 2022-11-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5084509B2 (en) | Interconnect element for interconnecting terminals exposed on the outer surface of an integrated circuit chip and method for manufacturing the same, multilayer interconnect substrate including a plurality of interconnect elements, method for manufacturing the same, and method for manufacturing multilayer interconnect substrate | |
US8099865B2 (en) | Method for manufacturing a circuit board having an embedded component therein | |
EP2768291B1 (en) | Component built-in board and method of manufacturing the same, and mounting body | |
US9024203B2 (en) | Embedded printed circuit board and method for manufacturing same | |
CN114267664B (en) | Packaging circuit structure and manufacturing method thereof | |
WO2012137548A1 (en) | Multilayer substrate with integrated chip component and method for manufacturing same | |
US9899235B2 (en) | Fabrication method of packaging substrate | |
JP2003264253A (en) | Semiconductor device and method of manufacturing the same | |
US10813209B2 (en) | Multilayer substrate, electronic device, and a method for manufacturing a multilayer substrate | |
CN112151459B (en) | Package circuit structure and manufacturing method thereof | |
US12356556B2 (en) | Component-incorporated substrate and method for manufacturing same | |
US9362248B2 (en) | Coreless package structure and method for manufacturing same | |
CN115000135B (en) | Display substrate and preparation method thereof, and display module | |
JPH10163595A (en) | Printed wiring board, electronic apparatus having the printed wiring board and manufacture of printed wiring board | |
JP2006510233A5 (en) | ||
CN115529745A (en) | Circuit board and method for manufacturing the same | |
US9433108B2 (en) | Method of fabricating a circuit board structure having an embedded electronic element | |
CN202940236U (en) | Package substrate structure | |
CN108550531B (en) | Method for manufacturing package substrate | |
CN113747655B (en) | Circuit board and manufacturing method thereof | |
CN113747661B (en) | Circuit board with embedded electronic element and manufacturing method thereof | |
CN114391304B (en) | Board-to-board connection structure and manufacturing method thereof | |
JP2008124260A (en) | Multilayer wiring board and manufacturing method thereof | |
JP4385482B2 (en) | Film carrier manufacturing method | |
KR20150142936A (en) | Package board and package using the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |