CN115514455A - Coding and modulation method, demodulation and decoding method, device, system, medium and equipment - Google Patents

Abstract

The method divides a bit sequence to be coded into a plurality of target sub-segments to be coded under the condition of not changing the code length of a polar code, and maps the target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel, thereby realizing the balance of the modulation sub-channels and improving the transmission reliability.

Description

Coding and modulation method, demodulation and decoding method, device, system, medium and equipment

technical field

The present application relates to the field of encoding and decoding technology, in particular, to an encoding and modulation method, a demodulation and decoding method, an encoding and modulation device, a demodulation and decoding device, a system for encoding, modulation and demodulation and decoding, and a computer Readable storage media and electronic devices.

Background technique

Communication systems usually use channel coding to improve the reliability of data transmission, and polar code (Polar Code) is a coding method proposed based on channel polarization. Channel polarization is divided into two phases, namely channel combination and channel splitting. Through channel combination and splitting, the symmetrical capacity of each sub-channel will show a trend of two-stage differentiation: with the increase of the code length N, some sub-channels The capacity tends to 1, while the capacities of the remaining subchannels tend to 0. Polar Code uses this phenomenon of channel polarization to transmit message bits on K subchannels whose capacity tends to be 1, and transmit frozen bits (that is, fixed bits known to both the sender and receiver, usually set to all zeros) on the remaining subchannels. ). The resulting code is Polar Code, with a code rate of K/N.

As a block code, the Polar Code can be used as a component code of a block coded modulation (Block Coded Modulation, BCM) code to form a multi-layer polar coded modulation (MLPC). The total code length of MLPC is multiple times of the polar code length, which will lead to longer processing delay and higher hardware complexity compared with traditional polar code coding. By shortening the polar code length by multiple times, although the total code length can be kept the same as the conventional polar code length, a shorter polar code means worse decoding performance.

It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the application, and therefore may include information that does not constitute an existing solution known to those of ordinary skill in the art.

Contents of the invention

The purpose of this application is to provide a coding and modulation method, a demodulation and decoding method, a coding and modulation device, a demodulation and decoding device, a system for coding and modulation and demodulation and decoding, a computer-readable storage medium and electronic equipment, Without changing the code length of the polar code, the bit sequence to be encoded is divided into multiple target subsections to be encoded, and the multiple target subsections to be encoded are mapped to specific subsections to be encoded corresponding to each modulation subchannel, In this way, the equalization of the modulation sub-channel is realized, and the transmission reliability is improved.

Other features and advantages of the present application will become apparent from the following detailed description, or in part, be learned by practice of the present application.

According to an aspect of the present application, there is provided a coding and modulation method, the method is performed by the sending end, and the method includes:

Dividing the bit sequence to be encoded to obtain multiple target sub-segments to be encoded;

Mapping a plurality of target subsections to be encoded into specific subsections to be encoded corresponding to each modulation subchannel according to the modulation channel information;

performing sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments;

The corresponding coding sub-segments are respectively modulated into modulation signals through each modulation sub-channel, and the modulation signals are sent to the receiving end.

In an exemplary embodiment of the present application, the bit sequence to be coded is divided to obtain multiple target subsections to be coded, including:

Dividing the bit sequence to be coded to obtain multiple reference sub-segments to be coded;

Subsection transformation is performed on multiple reference subsections to be coded to obtain multiple target subsections to be coded.

In an exemplary embodiment of the present application, the bit sequence to be coded corresponds to a first preset length, and the first preset length is equal to an integer power of 2; The coding sub-sections all correspond to a second preset length and a first preset number, and the second preset length is equal to an integer power of 2; the first preset length is the first preset number of the second preset length.

In an exemplary embodiment of the present application, subsection transformation is performed on multiple reference subsections to be coded to obtain multiple target subsections to be coded, including:

determining a specific bit set for generating each target subsection to be encoded from each reference subsection to be encoded according to the first subsection transformation rule;

Execute an exclusive OR operation within the set on at least one specific bit set to obtain multiple target sub-sections to be encoded;

Among them, the first subsection transformation rule is used to limit the XOR operation involving only frozen bits to obtain a constant 0 bit, the XOR operation only involving information bits to obtain pure information bits, and the XOR operation involving frozen bits and information bits Get mixed bits.

In an exemplary embodiment of the present application, sub-segment encoding is performed on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments, including:

Perform polar code coding on each specific sub-segment to be coded to obtain multiple polar codes as multiple coded sub-segments.

In an exemplary embodiment of the present application, the reference subsection to be coded contains information bits and frozen bits, and the target subsection to be coded contains at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bit.

In an exemplary embodiment of the present application, the target subsection to be coded includes a check code, and the check code is used as information bits and/or pure information bits; the check code includes at least one of the following: cyclic redundancy check code , Parity check code.

In an exemplary embodiment of the present application, the modulation channel information includes the capacity of each modulation subchannel, and according to the modulation channel information, multiple target subsections to be encoded are mapped to specific subsections to be encoded corresponding to each modulation subchannel, including:

Determine the code rate of each specific sub-section to be encoded according to the capacity of each modulation sub-channel;

Determine the first mapping rule of the specific sub-segment to be encoded corresponding to each modulated sub-channel based on the code rate of each specific sub-segment to be encoded;

According to the first mapping rule, determine a second mapping rule between the bits in the multiple target subsections to be encoded and the bits in the multiple specific subsections to be encoded;

There is a positive correlation between the capacity of each modulation sub-channel and the code rate of each specific sub-segment to be encoded.

In an exemplary embodiment of the present application, the modulation channel information includes equivalent bit channel reliability information, and according to the modulation channel information, multiple target subsections to be encoded are mapped to specific subsections to be encoded corresponding to each modulation subchannel, include:

Determine the number of unreliable equivalent bit channels in each modulation subchannel according to the equivalent bit channel reliability information;

Determine the number of constant 0 bits and/or the number of frozen bits that need to be allocated to each specific sub-segment to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel;

The specific to-be-coded sub-segment corresponding to each modulated sub-channel is determined based on the number of constant 0 bits and/or the number of frozen bits of each specific to-be-coded sub-segment.

In an exemplary embodiment of the present application, the modulation sub-channel corresponds to the second preset number, and the multiple target sub-segments to be encoded are mapped to specific sub-segments to be encoded corresponding to each modulation sub-channel according to the modulation channel information, including :

When the first preset number is consistent with the second preset number, according to the modulation channel information, a plurality of target sub-segments to be encoded are mapped to specific sub-segments to be encoded that correspond to each modulation sub-channel;

When the first preset number is equal to a plurality of second preset numbers, mapping a plurality of target subsections to be encoded into specific subsections to be encoded that have a many-to-one relationship with each modulation subchannel according to the modulation channel information; Wherein, a plurality of specific sub-segments to be encoded correspond to a modulation sub-channel;

When the multiple first preset numbers are equal to the second preset number, according to the modulation channel information, the multiple target subsections to be encoded are mapped to specific subsections to be encoded that have a one-to-many relationship with each modulation subchannel; wherein , a specific sub-segment to be coded corresponds to multiple modulation sub-channels.

According to one aspect of the present application, a demodulation and decoding method is provided, the method is executed by the receiving end, and the method includes:

Demodulate the modulated signal sent by the transmitting end through each modulated sub-channel to obtain a sequence to be decoded;

The sequence to be decoded is divided into multiple sub-segments to be decoded, and the multiple sub-segments to be decoded are respectively decoded by a plurality of sub-segment decoders according to the coding rules to obtain the decoded sub-segments of each sub-segment to be decoded part;

determining a plurality of target decoding sub-segments according to each decoding sub-segment;

Sub-segment transformation and sub-segment merging are performed on multiple target decoding sub-segments to obtain a decoded bit sequence.

In an exemplary embodiment of the present application, the sub-segment decoder and the sub-segments to be decoded correspond to a first preset number, and each sub-segment to be decoded corresponds to a second preset length.

In an exemplary embodiment of the present application, a plurality of sub-segments to be decoded are respectively decoded according to coding rules by a plurality of sub-segment decoders to obtain decoded sub-segments of each sub-segment to be decoded, including:

Perform non-SCL decoding of non-continuous deletion lists on multiple sub-segments to be decoded to obtain multiple merging paths;

A plurality of decoding sub-segments are determined according to a plurality of merging paths.

In an exemplary embodiment of the present application, nonSCL decoding is performed on multiple sub-segments to be decoded to obtain multiple merging paths, including:

Carrying out continuous deletion list SCL decoding to each sub-segment to be decoded respectively, to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded;

performing path splitting between sub-segments on each first decoding path to obtain a plurality of incomplete second decoding paths;

Performing a freeze bit constraint test on the second decoding path, and determining the path that passes the test as the third decoding path;

Selecting the path with the largest path probability value from the third decoding path as the fourth decoding path; wherein, the number of the fourth decoding paths is less than or equal to the first preset threshold;

Carrying out sub-segment division for each fourth decoding path to obtain the first decoding path queue of each sub-segment to be decoded;

When it is detected that the number of paths with different probability values in the first decoding path queue is less than or equal to a second preset threshold, the paths with different probability values in the first decoding path queue are used as alternative decoding paths;

When it is detected that the number of paths with different probability values in the first decoding path queue is greater than a second preset threshold, selecting paths with different probability values by the second preset threshold number as alternative decoding paths;

Continue to perform non-SCL decoding on each sub-segment to be decoded based on the alternative decoding path;

When the length of the second decoding path satisfies the first preset length, multiple merging paths are determined based on each candidate decoding path.

In an exemplary embodiment of the present application, each fourth decoding path is divided into sub-segments to obtain the first decoding path queue of each sub-segment to be decoded, including:

Arranging each fourth decoding path according to the path probability value from large to small to obtain a second decoding path queue;

Divide the paths in the second decoding path queue into sub-segments and keep the order of the queues unchanged to obtain the first decoding path queue of each sub-segment to be decoded.

In an exemplary embodiment of the present application, determining multiple decoding sub-segments according to multiple merging paths includes:

Verifying each merging path based on a preset verification method, and determining the merging path that passes the verification and has the highest probability as the decoding path;

The decoding path is divided into sub-sections to obtain multiple decoding sub-sections.

In an exemplary embodiment of the present application, a plurality of target decoding subsections are determined according to each decoding subsection, including:

Map each decoding subsection to a target decoding subsection according to a third mapping rule to obtain a plurality of target decoding subsections; wherein, the target decoding subsection and the decoding subsection correspond to a first preset number;

Wherein, the third mapping rule and the first mapping rule on the encoding side are mutually inverse processing;

mapping bits in each decoding subsection to bits in a target decoding subsection according to a fourth mapping rule;

Wherein, the fourth mapping rule and the second mapping rule on the encoding side are mutually inverse processing.

In an exemplary embodiment of the present application, sub-segment transformation and sub-segment merging are performed on multiple target decoding sub-segments to obtain a decoded bit sequence, including:

Select target bits from each target decoding sub-section, and transform the target bits into final bits according to the second sub-section transformation rule; wherein, the second sub-section transformation rule and the first sub-section transformation rule on the encoding side are inverse processing each other ;

determining each final decoded sub-segment based on the final bits;

Merge the final decoded sub-segments to obtain the decoded bit sequence.

In an exemplary embodiment of the present application, performing a freeze bit constraint check on the second decoding path includes:

When the final bit is a frozen bit, based on the third subsection transformation rule and the fourth mapping rule, it is checked whether the XOR operation result of the corresponding bits in the multiple second decoding paths is consistent with the frozen bit.

According to an aspect of the present application, a coded modulation device is provided, the device comprising:

A sub-segment acquisition unit, configured to divide the bit sequence to be encoded to obtain multiple target sub-segments to be encoded;

A subsection mapping unit, configured to map a plurality of target subsections to be encoded into specific subsections to be encoded corresponding to each modulation subchannel according to the modulation channel information;

A sub-segment encoding unit, configured to perform sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments;

The modulating sending unit is configured to respectively modulate the corresponding coded sub-segments into modulated signals through each modulated sub-channel and send the modulated signals to the receiving end.

In an exemplary embodiment of the present application, the subsection obtaining unit divides the bit sequence to be coded to obtain multiple target subsections to be coded, including:

Dividing the bit sequence to be coded to obtain multiple reference sub-segments to be coded;

Subsection transformation is performed on multiple reference subsections to be coded to obtain multiple target subsections to be coded.

In an exemplary embodiment of the present application, the bit sequence to be coded corresponds to a first preset length, and the first preset length is equal to an integer power of 2; The coding sub-sections all correspond to a second preset length and a first preset number, and the second preset length is equal to an integer power of 2; the first preset length is the first preset number of the second preset length.

In an exemplary embodiment of the present application, the subsection acquisition unit performs subsection transformation on multiple reference subsections to be coded to obtain multiple target subsections to be coded, including:

determining a specific bit set for generating each target subsection to be encoded from each reference subsection to be encoded according to the first subsection transformation rule;

Execute an exclusive OR operation within the set on at least one specific bit set to obtain multiple target sub-sections to be encoded;

Among them, the first subsection transformation rule is used to limit the XOR operation involving only frozen bits to obtain a constant 0 bit, the XOR operation only involving information bits to obtain pure information bits, and the XOR operation involving frozen bits and information bits Get mixed bits.

In an exemplary embodiment of the present application, the sub-segment encoding unit performs sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments, including:

Perform polar code coding on each specific sub-segment to be coded to obtain multiple polar codes as multiple coded sub-segments.

In an exemplary embodiment of the present application, the reference subsection to be coded contains information bits and frozen bits, and the target subsection to be coded contains at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bit.

In an exemplary embodiment of the present application, the target subsection to be coded includes a check code, and the check code is used as information bits and/or pure information bits; the check code includes at least one of the following: cyclic redundancy check code , Parity check code.

In an exemplary embodiment of the present application, the modulation channel information includes the capacity of each modulation subchannel, and the subsection mapping unit maps a plurality of target subsections to be encoded into specific subsections to be encoded corresponding to each modulation subchannel according to the modulation channel information. section, including:

Determine the code rate of each specific sub-section to be encoded according to the capacity of each modulation sub-channel;

Determine the first mapping rule of the specific sub-segment to be encoded corresponding to each modulated sub-channel based on the code rate of each specific sub-segment to be encoded;

According to the first mapping rule, determine a second mapping rule between the bits in the multiple target subsections to be encoded and the bits in the multiple specific subsections to be encoded;

There is a positive correlation between the capacity of each modulation sub-channel and the code rate of each specific sub-segment to be encoded.

In an exemplary embodiment of the present application, the modulation channel information includes equivalent bit channel reliability information, and the subsection mapping unit maps a plurality of target subsections to be coded into specific to-be-coded subsections corresponding to each modulation subchannel according to the modulation channel information. Encoding subsections, including:

Determine the number of unreliable equivalent bit channels in each modulation subchannel according to the equivalent bit channel reliability information;

Determine the number of constant 0 bits and/or the number of frozen bits that need to be allocated to each specific sub-segment to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel;

The specific to-be-coded sub-segment corresponding to each modulated sub-channel is determined based on the number of constant 0 bits and/or the number of frozen bits of each specific to-be-coded sub-segment.

In an exemplary embodiment of the present application, the modulation sub-channel corresponds to the second preset number, and the sub-segment mapping unit maps a plurality of target sub-segments to be encoded into specific to-be-encoded sub-segments corresponding to each modulation sub-channel according to the modulation channel information. subsections, including:

When the first preset number is consistent with the second preset number, according to the modulation channel information, a plurality of target sub-segments to be encoded are mapped to specific sub-segments to be encoded that correspond to each modulation sub-channel;

When the first preset number is equal to a plurality of second preset numbers, mapping a plurality of target subsections to be encoded into specific subsections to be encoded that have a many-to-one relationship with each modulation subchannel according to the modulation channel information; Wherein, a plurality of specific sub-segments to be encoded correspond to a modulation sub-channel;

When the multiple first preset numbers are equal to the second preset number, according to the modulation channel information, the multiple target subsections to be encoded are mapped to specific subsections to be encoded that have a one-to-many relationship with each modulation subchannel; wherein , a specific sub-segment to be coded corresponds to multiple modulation sub-channels.

According to an aspect of the present application, a demodulation and decoding device is provided, the device comprising:

The receiving demodulation unit is used to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain the sequence to be decoded;

The first decoding unit is used to divide the sequence to be decoded into a plurality of sub-segments to be decoded, and respectively decode the plurality of sub-segments to be decoded by a plurality of sub-segment decoders according to the encoding rules to obtain each to-be-decoded sub-segment a decoding subsection of a decoding subsection;

The second decoding unit is configured to determine a plurality of target decoding sub-segments according to each decoding sub-segment;

The third decoding unit is configured to perform sub-segment transformation and sub-segment combination on multiple target decoding sub-segments to obtain a decoded bit sequence.

In an exemplary embodiment of the present application, the sub-segment decoder and the sub-segments to be decoded correspond to a first preset number, and each sub-segment to be decoded corresponds to a second preset length.

In an exemplary embodiment of the present application, the first decoding unit uses a plurality of sub-segment decoders to respectively decode a plurality of sub-segments to be decoded according to coding rules to obtain the decoding of each sub-segment to be decoded subsections, including:

Perform non-SCL decoding of non-continuous deletion lists on multiple sub-segments to be decoded to obtain multiple merging paths;

A plurality of decoding sub-segments are determined according to a plurality of merging paths.

In an exemplary embodiment of the present application, the first decoding unit performs non-SCL decoding on multiple sub-segments to be decoded to obtain multiple merging paths, including:

Carrying out continuous deletion list SCL decoding to each sub-segment to be decoded respectively, to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded;

performing path splitting between sub-segments on each first decoding path to obtain a plurality of incomplete second decoding paths;

Performing a freeze bit constraint test on the second decoding path, and determining the path that passes the test as the third decoding path;

Selecting the path with the largest path probability value from the third decoding path as the fourth decoding path; wherein, the number of the fourth decoding paths is less than or equal to the first preset threshold;

Carrying out sub-segment division for each fourth decoding path to obtain the first decoding path queue of each sub-segment to be decoded;

When it is detected that the number of paths with different probability values in the first decoding path queue is less than or equal to a second preset threshold, the paths with different probability values in the first decoding path queue are used as alternative decoding paths;

When it is detected that the number of paths with different probability values in the first decoding path queue is greater than a second preset threshold, selecting paths with different probability values by the second preset threshold number as alternative decoding paths;

Continue to perform non-SCL decoding on each sub-segment to be decoded based on the alternative decoding path;

When the length of the second decoding path satisfies the first preset length, multiple merging paths are determined based on each candidate decoding path.

In an exemplary embodiment of the present application, the first decoding unit divides each fourth decoding path into sub-segments to obtain the first decoding path queue of each sub-segment to be decoded, including:

Arranging each fourth decoding path according to the path probability value from large to small to obtain a second decoding path queue;

Divide the paths in the second decoding path queue into sub-segments and keep the order of the queues unchanged to obtain the first decoding path queue of each sub-segment to be decoded.

In an exemplary embodiment of the present application, the first decoding unit determines multiple decoding sub-segments according to multiple merging paths, including:

Verifying each merging path based on a preset verification method, and determining the merging path that passes the verification and has the highest probability as the decoding path;

The decoding path is divided into sub-sections to obtain multiple decoding sub-sections.

In an exemplary embodiment of the present application, the second decoding unit determines a plurality of target decoding subsections according to each decoding subsection, including:

Map each decoding subsection to a target decoding subsection according to a third mapping rule to obtain a plurality of target decoding subsections; wherein, the target decoding subsection and the decoding subsection correspond to a first preset number;

Wherein, the third mapping rule and the first mapping rule on the encoding side are mutually inverse processing;

mapping bits in each decoding subsection to bits in a target decoding subsection according to a fourth mapping rule;

Wherein, the fourth mapping rule and the second mapping rule on the encoding side are mutually inverse processing.

In an exemplary embodiment of the present application, the third decoding unit performs sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoded bit sequence, including:

Select target bits from each target decoding sub-section, and transform the target bits into final bits according to the second sub-section transformation rule; wherein, the second sub-section transformation rule and the first sub-section transformation rule on the encoding side are inverse processing each other ;

determining each final decoded sub-segment based on the final bits;

Merge the final decoded sub-segments to obtain the decoded bit sequence.

In an exemplary embodiment of the present application, the first decoding unit performs a freeze bit constraint check on the second decoding path, including:

When the final bit is a frozen bit, based on the third subsection transformation rule and the fourth mapping rule, it is checked whether the XOR operation result of the corresponding bits in the multiple second decoding paths is consistent with the frozen bit.

According to one aspect of the present application, a system for encoding, modulation, demodulation and decoding is provided, the system includes a sending end and a receiving end, wherein:

The sending end is used to divide the bit sequence to be encoded to obtain multiple target subsections to be encoded; map the multiple target subsections to be encoded into specific subsections to be encoded corresponding to each modulation subchannel according to the modulation channel information; Performing sub-segment encoding on a specific sub-segment to be encoded to obtain a plurality of encoded sub-segments; respectively modulating the corresponding encoded sub-segments into modulated signals through each modulation sub-channel and sending the modulated signals to the receiving end;

The receiving end is used to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain the sequence to be decoded; divide the sequence to be decoded into a plurality of sub-segments to be decoded, and pass through a plurality of sub-segment decoders Decode a plurality of sub-segments to be decoded respectively according to coding rules to obtain decoding sub-segments of each sub-segment to be decoded; determine a plurality of target decoding sub-segments according to each decoding sub-segment; decode a plurality of targets The sub-sections are transformed and merged to obtain a decoded bit sequence.

According to one aspect of the present application, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, any one of the above-mentioned methods is implemented.

According to an aspect of the present application, there is provided an electronic device, including: a processor; and a memory for storing executable instructions of the processor; wherein, the processor is configured to perform any one of the above-mentioned methods by executing the executable instructions .

Exemplary embodiments of the present application may have some or all of the following beneficial effects:

In the coding and modulation method provided in an exemplary embodiment of the present application, the bit sequence to be coded can be divided to obtain multiple target subsections to be coded; the multiple target subsections to be coded are mapped to each modulation channel information according to the modulation channel information Specific sub-segments to be encoded corresponding to the sub-channels; performing sub-segment encoding on each specific sub-segment to be encoded to obtain multiple encoded sub-segments; respectively modulating the corresponding encoded sub-segments into modulated signals through each modulation sub-channel and sending the modulated signals to the receiving end. In the encoding and modulation method provided in an exemplary embodiment of the present application, the modulated signal sent by the transmitting end through each modulation sub-channel can be demodulated to obtain a sequence to be decoded; the sequence to be decoded is divided into multiple code sub-section, and decode a plurality of sub-sections to be decoded respectively according to coding rules by a plurality of sub-section decoders to obtain the decoding sub-sections of each sub-section to be decoded; determine multiple sub-sections according to each decoding sub-section The target decoding sub-segment: performing sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoded bit sequence. In this way, the bit sequence to be encoded can be divided into multiple target subsections to be encoded without changing the code length of the polar code, and the multiple target subsections to be encoded can be mapped to specific subsections to be encoded corresponding to each modulation subchannel segment, so as to realize the equalization of the modulation sub-channel and improve the transmission reliability. In addition, the sequence to be decoded can be divided into multiple sub-segments to be decoded and decoded by means corresponding to the encoding side, and then multiple target decoding sub-segments are determined according to each decoding sub-segment, and through the sub-segments The decoding bit sequence is obtained by transforming and combining the sub-segments, so that when the sink outputs the bit sequence in serial, the processing time for encoding and decoding is not increased, and the decoding performance is improved. In addition, since a plurality of sub-segments to be decoded can be respectively decoded according to the encoding rules by a plurality of sub-segment decoders, on the basis of improving the encoding flexibility on the encoding side, it is also realized on the decoding side Improved coding flexibility.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.

Description of drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description serve to explain the principles of the application. Apparently, the drawings in the following description are only some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creative efforts.

FIG. 1 schematically shows a flow chart of a coded modulation method according to an embodiment of the present application;

FIG. 2 schematically shows a flow chart of a coding and modulation method according to another embodiment of the present application;

FIG. 3 schematically shows a flow chart of a demodulation and decoding method according to an embodiment of the present application;

FIG. 4 schematically shows a flowchart of a demodulation and decoding method according to another embodiment of the present application;

FIG. 5 schematically shows a system architecture diagram for encoding, modulation, demodulation and decoding according to an embodiment of the present application;

FIG. 6 schematically shows an architecture diagram of a coded modulation system according to an embodiment of the present application;

FIG. 7 schematically shows a demodulation and decoding system architecture diagram according to an embodiment of the present application;

FIG. 8 schematically shows a structural block diagram of a coding and modulating device according to an embodiment of the present application;

FIG. 9 schematically shows a structural block diagram of a demodulation and decoding device according to an embodiment of the present application;

FIG. 10 schematically shows a schematic structural diagram of a computer system suitable for implementing the electronic device of the embodiment of the present application.

detailed description

Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be thorough and complete, and will fully convey the concepts of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided in order to give a thorough understanding of embodiments of the present application. However, those skilled in the art will appreciate that the technical solutions of the present application can be practiced without one or more of the specific details, or other methods, components, devices, steps, etc. can be used. In other instances, well-known technical solutions have not been shown or described in detail to avoid obscuring aspects of the application.

Furthermore, the drawings are merely schematic illustrations of the application and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software, or in one or more hardware modules or integrated circuits, or in different network and/or processor means and/or microcontroller means.

Wherein, the technical solutions of the embodiments of the present invention can be applied to various communication systems. For example, 5G communication system, Global System of Mobile communication (GSM for short) system, Code Division Multiple Access (CDMA for short) system, Wideband Code Division Multiple Access (Wideband Code Division Multiple Access, “WCDMA” for short) system, General Packet Radio Service (GPRS for short), Long Term Evolution (LTE for short) system, Frequency Division Duplex for LTE (FDD for short) ) system, LTE Time Division Duplex (Time Division Duplex, “TDD” for short), Universal Mobile Telecommunications System (Universal Mobile Telecommunication System, “UMTS” for short), etc.

Please refer to FIG. 1 . FIG. 1 schematically shows a flowchart of a coding and modulation method according to an embodiment of the present application. The method is executed by a sending end, which may be an access network device or a terminal device, or other devices that need to perform channel coding, which is not limited in this embodiment of the present application. Wherein, the access network equipment can provide communication coverage for a specific geographical area, and can communicate with terminal equipment located in the coverage area, and the access network equipment can support communication protocols of different standards, or can support different communication modes . For example, the access network device may be an evolved base station (evolutional node B, eNB or eNodeB) in an LTE system, or a radio network controller in a cloud radio access network (cloud radio access network, CRAN), or may be a 5G The access network equipment in the network, such as gNB, may be a small cell, a micro cell, or a transmission reception point (TRP), or a relay station, an access point, or a public land mobile network (public land mobile network) that will evolve in the future. Mobile network, PLMN) access network equipment, or various forms of equipment in the future to undertake the function of the base station, etc. Wherein, the terminal equipment may refer to an access terminal, a user equipment (user equipment, UE), a subscriber unit, a subscriber station, a mobile station, a mobile station, a remote station, a remote terminal, a mobile terminal, a user terminal, a terminal, a wireless communication device, a user agent or user device. An access terminal can be a cellular phone, a cordless phone, a session initiation protocol (SIP) phone, a wireless local loop (WLL) station, a personal digital assistant (PDA), a Functional handheld devices, computing devices or other processing devices connected to wireless modems, vehicle-mounted devices, wearable devices, terminal devices in the Internet of Things, virtual reality devices, terminal devices in 5G networks or future communication networks, or future evolved public Terminal equipment in a land mobile network (public land mobile network, PLMN), etc.

As shown in FIG. 1 , the encoding and modulation method may include: step S110 to step S140.

Step S110: Divide the bit sequence to be coded to obtain multiple target sub-segments to be coded.

Step S120: Map multiple target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel according to modulation channel information.

Step S130: Perform sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments.

Step S140: Modulate the corresponding coded sub-segments into modulated signals through each modulated sub-channel, and send the modulated signals to the receiving end.

Wherein, the bit sequence to be encoded corresponds to the first preset length N, and the first preset length is equal to an integer power of 2; the reference subsection to be encoded, the target subsection to be encoded, and the specific subsection to be encoded all correspond to the second preset length. Assuming length n and the first preset number m, the second preset length is equal to an integer power of 2; the first preset length N is the first preset number m of the second preset length n; wherein, N, n, m are all positive integers.

By implementing the method shown in Figure 1, the bit sequence to be coded can be divided into multiple target subsections to be coded without changing the code length of the polar code, and the multiple target subsections to be coded can be mapped into modulation subsections The channel corresponds to a specific sub-segment to be encoded, so as to realize the equalization of the modulation sub-channel and improve the transmission reliability.

Next, the above-mentioned steps of this exemplary embodiment will be described in more detail.

In step S110, the bit sequence to be coded is divided to obtain multiple target sub-segments to be coded.

Specifically, the bit sequence to be encoded may include a plurality of bits corresponding to the first preset length, for example, N=1024 bits. Multiple target subsections to be encoded are used to form the bit sequence to be encoded, the first preset number of target subsections to be encoded is m=2, and the second preset length of target subsections to be encoded is n=512.

As an optional embodiment, dividing the bit sequence to be encoded to obtain multiple target subsections to be encoded includes: dividing the bit sequence to be encoded to obtain multiple reference subsections to be encoded; The sub-section is subjected to sub-section transformation to obtain multiple target sub-sections to be coded. In this way, flexible coding can be realized and decoding performance can be guaranteed by dividing the bit sequence to be coded.

Specifically, multiple reference subsections to be coded can be expressed as m reference subsections to be coded, for example, can be expressed as follows:

v ₁ =[v ₁₁ v ₁₂ v ₁₃ ... v _1n-1 v _1n ]

v ₂ =[v ₂₁ v ₂₂ v ₂₃ ...v _2n-1 v _2n ]

...

v _m ＝[v _m1 v _m2 v _m3 ... v _mn-1 v _mn ]

And, multiple target subsections to be coded can be expressed as m target subsections to be coded, for example, can be expressed as follows:

a ₁ =[a ₁₁ a ₁₂ a ₁₃ ...a _1n-1 a _1n ]

a ₂ =[a ₂₁ a ₂₂ a ₂₃ ... a _2n-1 a _2n ]

...

a _m =[a _m1 a _m2 a _m3 ... a _mn-1 a _mn ]

As an optional embodiment, subsection transformation is performed on multiple reference subsections to be coded to obtain multiple target subsections to be coded, including: To generate a specific bit set of each target sub-section to be encoded; perform an XOR operation in the set for at least one specific bit set to obtain a plurality of target sub-sections to be encoded; wherein, the first sub-section transformation rule is used to limit only by freezing The XOR operation involving bits can obtain constant 0 bits, the XOR operation involving only information bits can obtain pure information bits, and the XOR operation involving frozen bits and information bits can obtain mixed bits. In this way, the transformation of the to-be-encoded subsegment can be realized through the first subsegment transformation rule, which is beneficial to improve coding flexibility.

Specifically, according to the first sub-segment transformation rule, the specific bit set used to generate each target sub-segment to be encoded can be determined. For example, the specific bit set used to generate a _1j includes [v _1j , v _2j , v _3j ,  … , v _(m-2)j , v _(m-1)j , v _mj ], the specific bit set used to generate a _2j includes [v _2j , v _4j , v _6j ,..., v _(m-4)j , v _(m-2)j , v _mj ].

In addition, performing an in-set XOR operation on at least one specific bit set to obtain multiple target subsections to be encoded includes: performing an in-set XOR operation on at least one specific bit set based on the following expression to obtain multiple target The sub-section to be coded; where the frozen bit a _mj is obtained directly from the frozen bit v _mj , and the information bit a _{mj is directly obtained from the information bit v mj .}

In step S120, the multiple target sub-segments to be coded are mapped to specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information.

Specifically, the modulation channel information includes but is not limited to at least one of the following: modulation subchannel capacity, and equivalent bit channel reliability information. The modulation subchannel capacity is used to indicate the capacity of the modulation subchannel, and different modulation subchannels may correspond to different capacities or may correspond to the same capacity, which is not limited in this embodiment of the present application. The equivalent bit channel reliability information is used to limit information such as the number of unreliable equivalent bit channels, which is not limited in this embodiment of the present application. In addition, the number of modulation sub-channels can be expressed as p, where p is a positive integer.

As an optional embodiment, the modulation channel information includes the capacity of each modulation subchannel, and mapping multiple target subsections to be encoded into specific subsections to be encoded corresponding to each modulation subchannel according to the modulation channel information includes: according to each modulation Determine the code rate of each specific subsection to be encoded corresponding to the subchannel capacity; determine the first mapping rule of the specific subsection to be encoded corresponding to each modulated subchannel based on the code rate of each specific subsection to be encoded; according to the first mapping rule, determine multiple A second mapping rule between bits in a target subsection to be encoded and bits in a plurality of specific subsections to be encoded; wherein, there is a positive correlation between the capacity of each modulation subchannel and the code rate of each corresponding specific subsection to be encoded. In this way, based on the capacity of each modulation sub-channel, the specific sub-segments to be encoded with different code rates can be corresponding to the modulation sub-channels with different channel capacities, so that the specific sub-segments to be encoded with a large code rate correspond to the modulation sub-channels with a large capacity, and the code rate Small specific sub-segments to be coded correspond to modulation sub-channels with small capacity, which realizes equalization of modulation sub-channels and improves transmission reliability.

Wherein, the first mapping rule is used to determine the mapping relationship between subsections and modulation subchannels. The second mapping rule is used to determine the mapping relationship between bits in all target subsections to be encoded and all specific subsection bits to be encoded, that is, the mapping relationship of bits is across subsections, and is based on the entire target bit sequence to be encoded and The entire specific bit sequence to be coded.

Specifically, capacity refers to the maximum transmission rate that can be achieved by error-free transmission on a channel. Code rate=information bit length/code length. Wherein, according to the capacity of each modulation sub-channel to determine the code rate of each specific sub-section to be encoded can be as follows: the number of constant 0 bits and/or frozen bits of each specific sub-section to be encoded is determined as x, according to the expression [( Code length L1-x1)/code length L1]/[(code length L2-x2)/code length L2]=C1/C2, x1+x2=W, determine the code rate of each specific subsection to be encoded; wherein, W is a known constant, and C1 and C2 are the capacity of the corresponding modulation subchannel.

In addition, the full sub-segment code rate is the ratio of the sum of the number of constant 0 bits and the number of frozen bits in the m target sub-segments to be encoded to the first preset length.

As an optional embodiment, the modulation channel information includes equivalent bit channel reliability information, and mapping multiple target subsections to be encoded into specific subsections to be encoded corresponding to each modulation subchannel according to the modulation channel information includes: according to The equivalent bit channel reliability information determines the number of unreliable equivalent bit channels in each modulation sub-channel; according to the number of unreliable equivalent bit channels in each modulation sub-channel, determine the constant 0 bits that need to be allocated to the corresponding specific sub-segments to be encoded Quantity and/or number of frozen bits; determine the specific sub-segment to be encoded corresponding to each modulated sub-channel based on the number of constant 0 bits and/or the number of frozen bits of each specific sub-segment to be encoded. In this way, based on the preset equivalent bit channel reliability information, specific sub-segments to be encoded with different code rates can be mapped to modulated sub-channels with different channel capacities, so that the specific sub-segments to be encoded with high code rates can correspond to the capacity more efficiently. Large modulation sub-channels, specific sub-segments to be coded with small code rates correspond to modulation sub-channels with small capacity, which realizes the equalization of modulation sub-channels and improves transmission reliability.

Wherein, the number of equivalent bit channels of the modulation sub-channel may be expressed as N/p, where p is the second preset number corresponding to the modulation sub-channel.

Specifically, based on the number of constant 0 bits and/or the number of frozen bits of each specific subsection to be encoded, determining the specific subsection to be encoded corresponding to each modulation subchannel includes: based on the number of constant 0 bits of each specific subsection to be encoded and/or Or freeze the number of bits for bit configuration to obtain specific sub-segments to be encoded corresponding to each modulation sub-channel.

As an optional embodiment, the modulation sub-channel corresponds to the second preset number p, and the multiple target sub-segments to be encoded are mapped to specific sub-segments to be encoded corresponding to each modulation sub-channel according to the modulation channel information, including: when When the first preset number is consistent with the second preset number, a plurality of target subsections to be encoded are mapped to specific subsections to be encoded that correspond to each modulation subchannel according to the modulation channel information; when the first preset number is equal to When there are multiple second preset numbers, multiple target subsections to be encoded are mapped to specific subsections to be encoded that have a many-to-one relationship with each modulation subchannel according to the modulation channel information; wherein, multiple specific subsections to be encoded The sub-section corresponds to a modulation sub-channel; when multiple first preset numbers are equal to the second preset number, a plurality of target sub-sections to be coded are mapped to exist one-to-many with each modulation sub-channel according to the modulation channel information The specific to-be-encoded subsection of the relationship; wherein, one specific to-be-encoded subsection corresponds to multiple modulation subchannels. In this way, an appropriate corresponding manner can be selected based on the first preset number and the second preset number, which is beneficial to improving modulation flexibility and transmission reliability for modulated sub-channels.

Specifically, the first preset number is consistent with the second preset number, which can be understood as m=p; the first preset number is equal to multiple second preset numbers, which can be understood as m=kp; multiple first presets The quantity is equal to the second preset quantity, which can be understood as km=p. k is a positive integer.

When m=p, multiple target subsections to be encoded can be mapped to specific subsections to be encoded that correspond to each modulation subchannel according to the modulation channel information, so that the specific subsection to be encoded and each modulation subchannel The relationship is positively correlated, that is, a large-capacity modulation sub-channel corresponds to a specific coded sub-segment with a large code rate, and a small-capacity modulation sub-channel corresponds to a small code-rate specific sub-segment to be coded. When m=kp, specific subsections to be coded can be combined, and k specific subsections to be coded are divided into one group to obtain p specific subsection groups to be coded, so that each specific subsection group to be coded can be Corresponding to a modulation subchannel, the code rate of each specific subsection group to be encoded is different, so that the relationship between the code rate of a specific subsection group to be encoded and each modulation subchannel is positively correlated, that is, the large-capacity modulation subchannel corresponds to A specific sub-segment group to be encoded with a large code rate, and a small-capacity modulation sub-channel corresponds to a specific sub-segment group to be encoded with a small code rate, and each specific sub-segment group to be encoded is encoded with a polar code to obtain a polar code. When km=p, k modulation sub-channels can be divided into one group to obtain m modulation sub-channel groups, so that each modulation sub-channel group can correspond to a specific sub-section to be encoded, so that each modulation sub-channel group The relationship between the capacity and the code rate of the specific sub-segment to be encoded is positively correlated, that is, the modulation sub-channel group with large capacity corresponds to the specific sub-segment to be encoded with large code rate, and the modulation sub-channel group with small capacity corresponds to the specific sub-segment with small code rate. The subsection to be encoded.

In step S130, sub-segment encoding is performed on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments.

As an optional embodiment, performing sub-segment encoding on each specific sub-segment to be encoded to obtain multiple encoded sub-segments includes: performing polar code encoding on each specific to-be-encoded sub-segment to obtain multiple polar codes, as multiple encoded subsections. In this way, polar code coding based on sequence segmentation can be realized, and the flexibility of polar code coding can be improved.

Wherein, the reference to-be-coded subsection includes information bits and frozen bits, and the target to-be-coded subsection includes at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits. In addition, the target to-be-encoded subsection includes a check code, which is used as information bits and/or pure information bits; the check code includes but is not limited to at least one of the following: cyclic redundancy check code, parity check code.

Specifically, there is a one-to-one correspondence relationship between specific subsections to be coded and coded subsections, and polar code coding is performed on each specific subsection to be coded to obtain multiple polar codes as multiple coded subsections, including: An encoder corresponding to a specific sub-segment to be encoded performs polar code encoding to obtain a plurality of polar codes as a plurality of encoded sub-segments. Among them, multiple encoders can implement parallel encoding.

In step S140, the corresponding coded sub-segments are modulated into modulated signals through each modulated sub-channel, and the modulated signals are sent to the receiving end.

Wherein, the receiving end is used for demodulating and decoding the modulated signal of the sending end.

Please refer to FIG. 2 . FIG. 2 schematically shows a flowchart of a coding and modulation method according to another embodiment of the present application. As shown in FIG. 2 , the encoding and modulation method may include: step S210 to step S270.

Step S210: Divide the bit sequence to be coded to obtain multiple reference sub-segments to be coded.

Step S220: According to the first sub-section transformation rule, determine the specific bit set used to generate each target sub-section to be coded from each reference sub-section to be coded; wherein, the first sub-section transformation rule is used to limit only frozen bits to participate XOR operation to obtain constant 0 bits, XOR operation involving only information bits to obtain pure information bits, XOR operation involving frozen bits and information bits to obtain mixed bits; and, referring to the subsection to be encoded contains information bits and frozen bits , the target subsection to be encoded contains at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits; the target subsection to be encoded contains a check code, and the check code is used as an information bit and/or pure information Bit; check code includes but not limited to at least one of the following: cyclic redundancy check code, parity check code.

Step S230: Execute an in-set XOR operation on at least one specific bit set to obtain multiple target sub-segments to be encoded. When the modulation channel information includes the capacity of each modulation subchannel, execute step S240; when the modulation channel information includes equivalent bit channel reliability information, execute step S250.

Step S240: Determine the code rate of each specific subsection to be encoded according to the capacity of each modulation subchannel; determine the first mapping rule of the specific subsection to be encoded corresponding to each modulation subchannel based on the code rate of each specific subsection to be encoded; according to the first A mapping rule, determining a second mapping rule between bits in a plurality of target subsections to be encoded and bits in a plurality of specific subsections to be encoded; wherein, the capacity of each modulation subchannel and the corresponding code rate of each specific subsection to be encoded There is a positive correlation between them. Furthermore, step S260 is executed.

Step S250: Determine the number of unreliable equivalent bit channels in each modulation sub-channel according to the reliability information of the equivalent bit channels; determine the number of unreliable equivalent bit channels in each modulation sub-channel to be assigned to the corresponding specific sub-segments to be encoded The number of constant 0 bits and/or the number of frozen bits; determine the specific subsection to be encoded corresponding to each modulation subchannel based on the number of constant 0 bits and/or the number of frozen bits of each specific subsection to be encoded. Furthermore, step S260 is executed.

Step S260: Perform polar code coding on each specific sub-segment to be encoded to obtain multiple polar codes as a plurality of encoded sub-segments.

Step S270: Modulate the corresponding coded sub-segments into modulated signals through each modulated sub-channel, and send the modulated signals to the receiving end.

It should be noted that steps S210 to S270 correspond to the steps and their embodiments shown in FIG. 1 . For the specific implementation of steps S210 to S270 , please refer to the steps and their embodiments shown in FIG. 1 . I won't repeat them here.

It can be seen that implementing the method shown in Figure 2 can divide the bit sequence to be encoded into multiple target subsections to be encoded without changing the code length of the polar code, and map the multiple target subsections to be encoded into each The specific to-be-encoded sub-segment corresponding to the modulated sub-channel realizes equalization of the modulated sub-channel and improves transmission reliability.

Please refer to FIG. 3 , which schematically shows a flowchart of a demodulation and decoding method according to an embodiment of the present application. The method is executed by a receiving end, which may be an access network device or a terminal device, or other devices that need to perform channel coding, which is not limited in this embodiment of the present application. As shown in FIG. 3 , the demodulation and decoding method may include: step S310 to step S340.

Step S310: Demodulate the modulated signal sent by the transmitting end through each modulated sub-channel to obtain a sequence to be decoded.

Step S320: Divide the sequence to be decoded into multiple sub-segments to be decoded, and decode the multiple sub-segments to be decoded by a plurality of sub-segment decoders according to the coding rules to obtain the sub-segments to be decoded Decode the subsection.

Step S330: Determine a plurality of target decoding sub-segments according to each decoding sub-segment.

Step S340: Perform sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoded bit sequence.

Wherein, the sub-segment decoder and the sub-segments to be decoded correspond to a first preset number m, and each sub-segment to be decoded corresponds to a second preset length n.

To implement the method shown in Figure 3, the sequence to be decoded can be divided into a plurality of sub-segments to be decoded and decoded in a manner corresponding to the encoding side, and then a plurality of target decoding sub-segments can be determined according to each decoding sub-segment segment, and the decoded bit sequence is obtained through sub-segment conversion and sub-segment merging, so that when the sink outputs the bit sequence in serial, the processing time for encoding and decoding is not increased, and the decoding performance is improved. In addition, since a plurality of sub-segments to be decoded can be respectively decoded according to the encoding rules by a plurality of sub-segment decoders, on the basis of improving the encoding flexibility on the encoding side, it is also realized on the decoding side Improved coding flexibility.

Next, the above-mentioned steps of this exemplary embodiment will be described in more detail.

In step S310, demodulate the modulated signal sent by the transmitting end through each modulated sub-channel to obtain a sequence to be decoded.

Specifically, the sequence to be decoded may correspond to a first preset length.

In step S320, the sequence to be decoded is divided into a plurality of sub-segments to be decoded, and the plurality of sub-segments to be decoded are respectively decoded by a plurality of sub-segment decoders according to the coding rules to obtain each sub-segment to be decoded The decoding subsection of the section.

As an optional embodiment, a plurality of sub-segments to be decoded are respectively decoded according to coding rules by a plurality of sub-segment decoders to obtain decoded sub-segments of each sub-segment to be decoded, including: The non-SCL decoding of the sub-segments to be decoded is performed with a non-continuous deletion list to obtain multiple merging paths; and multiple decoding sub-segments are determined according to the multiple merging paths. In this way, nonSCL decoding based on the non-sequential erasure list can be implemented for multiple sub-segments to be decoded to obtain multiple decoded sub-segments, which is beneficial to improve decoding flexibility.

As an optional embodiment, non-SCL decoding is performed on multiple sub-segments to be decoded to obtain multiple merging paths, including: respectively performing SCL decoding on each sub-segment to be decoded, Obtaining a first path probability set of incomplete first decoding paths of each sub-segment to be decoded; performing path splitting between sub-segments on each first decoding path to obtain a plurality of incomplete second decoding paths; Performing a freeze bit constraint test on the second decoding path, and determining the path that passes the inspection as the third decoding path; selecting the path with the largest path probability value from the third decoding path as the fourth decoding path; wherein, The number of the fourth decoding paths is less than or equal to the first preset threshold; each fourth decoding path is divided into sub-segments to obtain the first decoding path queue of each sub-segment to be decoded; when the first decoding path is detected When the number of paths with different probability values in the path queue is less than or equal to the second preset threshold, the paths with different probability values in the first decoding path queue are used as alternative decoding paths; When the number of paths with different values is greater than the second preset threshold, select paths with different probability values of the previous second preset threshold number as alternative decoding paths; Continuous deletion list nonSCL decoding; when the length of the second decoding path satisfies the first preset length, multiple merging paths are determined based on each candidate decoding path. In this way, the sub-segment parallel CA-nonSCL decoding method can be realized, and the sub-segment to be decoded adopts two decoding methods of continuous deletion list SCL decoding and non-sequential deletion list nonSCL decoding at the same time, which improves decoding flexibility and decoding performance. Reduce hardware complexity and hardware power consumption.

Specifically, each sub-segment to be decoded 1, 2, ..., m can be decoded by continuous deletion list SCL to obtain the first path probability set of the incomplete first decoding path of each sub-segment to be decoded , different subsections to be decoded correspond to different first path probability sets, the first decoding path can be understood as a path corresponding to a part of bits in the subsection to be decoded, and the first path probability set can include multiple path probabilities . For example, if sub-segment 1 to be decoded is expressed as [bit a, bit b, bit c], the calculated probability that bit a is 1 is 0.8, and the calculated probability that bit a is 0 is 0.2, then, The probability set corresponding to bit a is: bit a-[0.8,0.2]. Similarly, if the probability set corresponding to bit b is: bit b-[0.2,0.8]. According to the arrangement order of [bit a, bit b, bit c], before the probability corresponding to bit c is calculated, the incomplete first decoding path corresponding to sub-segment 1 to be decoded can be determined, that is, bit a - 0.8 in [0.8,0.2] can be the first probability as path 1, 0.2 in bit b-[0.2,0.8] can be the second probability as path 1, path 1: 0.8-0.2. Similarly, path 2: 0.8-0.8, path 3: 0.2-0.2, path 4: 0.2-0.8 can be obtained. Path 1, path 2, path 3, and path 4 can be understood as incomplete first decoding paths corresponding to sub-segment 1 to be decoded, and the probability values corresponding to each path can be calculated based on the probability values corresponding to each path, for example, The probability of path 1 is 0.16, the probability of path 2 is 0.64, the probability of path 3 is 0.04, and the probability of path 1 is 0.16. The probability values of each path constitute the first path probability set corresponding to the subsegment to be decoded.

Furthermore, path splitting between sub-segments can be performed on each first decoding path to obtain a plurality of incomplete second decoding paths. Path splitting, for example, if sub-segment 1 to be decoded corresponds to path 1.1 and path 1.2, and if sub-segment 2 to be decoded corresponds to path 2.1 and path 2.2, the path splitting between sub-segments can be obtained as [path 1.1- Path 2.1], [Path 1.1-Path 2.2], [Path 1.2-Path 2.1], [Path 1.2-Path 2.2], as the second decoding path.

Furthermore, the frozen bit constraint test may be performed on the second decoding path, and the path that passes the test is determined as the third decoding path, such as [path 1.1-path 2.1], [path 1.1-path 2.2]. And, selecting the path with the highest path probability value from the third decoding path as the fourth decoding path; wherein, the number of the fourth decoding paths is less than or equal to the first preset threshold (eg, 10). Specifically, when the number of paths with the largest path probability value is less than or equal to the first preset threshold, the paths with the largest path probability value can be used as the fourth decoding path; when the number of paths with the largest path probability value is greater than the first preset threshold, The path with the highest probability value of the first preset threshold number of paths may be used as the fourth decoding path.

In an exemplary embodiment of the present application, checking the frozen bit constraint condition on the second decoding path includes: when the final bit is a frozen bit, based on the third sub-section transformation rule and the fourth mapping rule, checking Whether the XOR operation result of the corresponding bits in the plurality of second decoding paths is consistent with the frozen bit. This can improve decoding performance.

Wherein, the frozen bit may be expressed as any set value (eg, 0, 1, etc.) or an identifier, which is not limited in this embodiment of the present application.

For example, the first preset number is 2, the first bit of the first sub-segment in [path 1.1-path 2.1] of the decoding sub-segments is a ₁₁ , the first bit of the second sub-segment is a ₂₁ , The first bit of the first subsection in the target decoding subsection is b ₁₁ corresponding to a ₂₁ , the first bit of the second subsection in the target decoding subsection is b ₂₁ corresponding to a ₁₁ , and the final subsection The first bit of the first sub-section is c ₁₁ , the first bit of the second sub-section in the final sub-section is c ₂₁ , if c ₁₁ is a frozen bit (the frozen bit is preset to 0), since b ₁₁ The XOR operation result of b 21 and b ₂₁ is equal to c ₁₁ , so when the XOR operation result of b ₁₁ and b ₂₁ is equal to 0, the frozen bit constraint is satisfied, and since b ₁₁ corresponds to a ₂₁ , and b ₂₁ corresponds to a ₁₁ , therefore The frozen bit constraint is satisfied when the XOR operation result of a ₁₁ and a ₂₁ is equal to 0, that is, when the XOR operation result of a ₁₁ and a ₂₁ is equal to 0, [Path 1.1-Path 2.1] satisfies the frozen bit constraint condition. Conversely, if the XOR operation result of a ₁₁ and a ₂₁ is not equal to 0, [path 1.1-path 2.1] does not satisfy the frozen bit constraint, [path 1.1-path 2.1] will be deleted and cannot be reserved as an alternative decoding path.

In an exemplary embodiment of the present application, each fourth decoding path is divided into sub-segments to obtain the first decoding path queue of each sub-segment to be decoded, including: Arrange the probability values from large to small to obtain the second decoding path queue; divide the paths in the second decoding path queue into sub-segments and keep the order of the queue unchanged to obtain the first decoding path of each sub-segment to be decoded path queue. This can help improve decoding performance.

For example, if there is a fourth decoding path [path 1.1-path 2.1], [path 1.1-path 2.2], [path 1.2-path 2.1], [path 1.2-path 2.2], for each fourth decoding path Arranged according to the path probability values from large to small, the second decoding path queue {[path 1.2-path 2.1], [path 1.2-path 2.2], [path 1.1-path 2.1], [path 1.1-path 2.2] can be obtained ]}. Divide the paths in the second decoding path queue into sub-segments and keep the order of the queues unchanged to obtain the first decoding path queue of each sub-segment to be decoded, for example, the first decoding path of the sub-segment to be decoded 1 Path queue [path 1.2, path 1.2, path 1.1, path 1.1], the first decoding path queue [path 2.1, path 2.2, path 2.1, path 2.2] of sub-segment 2 to be decoded.

On the one hand, when it is detected that the number (e.g., 2) of paths with different probability values in the first decoding path queue (e.g., [path 1.2, path 1.2, path 1.1, path 1.1, path 1.1, path 1.1]) is less than or When it is equal to the second preset threshold (for example, 3), the paths [path 1.2, path 1.1] with different probability values in the first decoding path queue are used as candidate decoding paths.

On the other hand, when it is detected that the number (eg, 11) of paths with different probability values in the first decoding path queue (eg, [path 1.2, path 1.2, path 1.1, path 1.1, path 1.3, path 1.4]) is greater than When the second preset threshold (eg, 3), select paths [path 1.2, path 1.1, path 1.3] with different probability values at most before the second preset threshold (eg, 3) as alternative decoding paths.

Furthermore, based on the alternative decoding path, non-SCL decoding of each sub-segment to be decoded can be continued until the decoding of the entire sub-segment to be decoded is completed, and the second sub-segment whose length satisfies the first preset length is obtained. Based on the decoding path, multiple merging paths can be determined according to each candidate decoding path.

As an optional embodiment, determining multiple decoding sub-segments according to multiple merging paths includes: checking each merging path based on a preset checking method, and determining the merging path that passes the verification and has the highest probability As a decoding path; dividing the decoding path into subsections to obtain multiple decoding subsections. In this way, efficient screening of decoding paths can be achieved, a single decoding path can be obtained, the correctness of the decoding path can be improved, and the sub-segment division of the decoding path can be realized more simply, so as to improve decoding performance.

Specifically, the preset check mode may include but not limited to cyclic redundancy check and parity check. Among them, the cyclic redundancy check code is used to generate according to the mixed bits and pure information bits/information bits in the sub-section to be encoded, and the check code bit can be set on the pure information bits/information bits in the sub-section to be encoded . If multiple check code schemes are used, multiple check codes can be generated according to the corresponding mixed bits and pure information bits/information bits in the subsection to be encoded, and the bits of multiple check codes can be set in the subsection to be encoded The pure information bits/information bits.

In step S330, a plurality of target decoding sub-segments are determined according to each decoding sub-segment.

As an optional embodiment, determining a plurality of target decoding sub-sections according to each decoding sub-section includes: mapping each decoding sub-section to a target decoding sub-section according to a third mapping rule to obtain multiple target decoding sub-sections code sub-section; wherein, the target decoding sub-section and the decoding sub-section correspond to the first preset quantity; wherein, the third mapping rule and the first mapping rule on the encoding side are mutually inverse processing; according to the fourth mapping rule, the Bits in each decoding subsection are mapped to bits in a target decoding subsection; wherein, the fourth mapping rule and the second mapping rule on the encoding side are inverse processes. In this way, the mapping to the decoding sub-segment can be realized, which is beneficial to obtaining an accurate decoding bit sequence.

Specifically, map each decoding subsection to a target decoding subsection according to the third mapping rule to obtain a plurality of target decoding subsections, including: based on the mapping method corresponding to the encoding side, mapping each decoding subsection according to the third mapping rule The subsections are mapped to target decoding subsections to obtain multiple target decoding subsections.

In step S340, sub-segment transformation and sub-segment merging are performed on multiple target decoding sub-segments to obtain a decoded bit sequence.

As an optional embodiment, performing sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoding bit sequence includes: selecting target bits from each target decoding sub-segment, and according to the second sub-segment The segment conversion rule transforms the target bit into the final bit; wherein, the second sub-segment conversion rule and the first sub-segment conversion rule on the encoding side are inverse processing; each final decoding sub-segment is determined based on the final bit; each final decoding sub-segment is combined sub-section to obtain the decoded bit sequence. In this way, sub-segment transformation and sub-segment merging can be performed on the target decoding sub-segment obtained through decoding, so that the final decoding bit sequence can be obtained more flexibly.

Specifically, the decoded bit sequence corresponds to a first preset length N. The second sub-segment transformation rule and the first sub-segment transformation rule on the encoding side are mutually inverse processing, which can be understood as follows: based on the constant 0 bit, it can be determined that the frozen bit participates in the XOR operation, and based on the pure information bit, it can be determined that it is It is obtained by participating in the XOR operation of the information bits, and based on the mixed bits, it can be determined that it is obtained by participating in the XOR operation of the frozen bits and the information bits. The frozen bits are obtained directly from the frozen bits, and the information bits are obtained directly from the information bits. .

Please refer to FIG. 4 , which schematically shows a flowchart of a demodulation and decoding method according to another embodiment of the present application. As shown in FIG. 4 , the demodulation and decoding method may include: step S410 to step S460.

Step S410: Demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded, and divide the sequence to be decoded into a plurality of sub-segments to be decoded.

Step S420: Perform consecutive deletion list SCL decoding on each sub-segment to be decoded to obtain the first path probability set of the incomplete first decoding path of each sub-segment to be decoded; Splitting paths between sub-sections to obtain multiple incomplete second decoding paths; performing a frozen bit constraint test on the second decoding path, and determining the path that passes the inspection as the third decoding path; starting from the third decoding path Selecting the path with the largest path probability value in the coding path as the fourth decoding path; wherein, the number of the fourth decoding paths is less than or equal to the first preset threshold; for each fourth decoding path, the path probability value is from large to small Arranging to obtain the second decoding path queue; dividing the paths in the second decoding path queue into subsections and keeping the queue order unchanged, obtaining the first decoding path queue of each subsection to be decoded; when detecting When the number of paths with different probability values in the first decoding path queue is less than or equal to the second preset threshold, the paths with different probability values in the first decoding path queue are used as alternative decoding paths; when the first decoding path is detected When the number of paths with different probability values in the path queue is greater than the second preset threshold, select paths with different probability values of the previous second preset threshold number as alternative decoding paths; Non-SCL decoding is performed on the sub-segments; when the length of the second decoding path satisfies the first preset length, multiple merging paths are determined based on each candidate decoding path.

Step S430: Verify each merging path based on the preset verification method, and determine the merging path that passes the verification and has the highest probability as the decoding path; divide the decoding path into sub-segments to obtain multiple decoding sub-segments .

Step S440: Map each decoding subsection to a target decoding subsection according to the third mapping rule to obtain a plurality of target decoding subsections; wherein, the target decoding subsection and the decoding subsection all correspond to the first preset Quantity; wherein, the third mapping rule and the first mapping rule on the encoding side are inverse processing; according to the fourth mapping rule, the bits in each decoding sub-section are mapped to the bits in the target decoding sub-section; wherein, the fourth The mapping rule and the second mapping rule on the encoding side are mutually inverse processing.

Step S450: select target bits from each target decoding sub-section, and transform the target bits into final bits according to the second sub-section transformation rule; for inverse processing.

Step S460: Determine each final decoded sub-section based on the final bit; combine each final decoded sub-section to obtain a decoded bit sequence.

It should be noted that steps S410 to S460 correspond to the steps and their embodiments shown in FIG. 3 . For the specific implementation of steps S410 to S460 , please refer to the steps and their embodiments shown in FIG. 3 . I won't repeat them here.

It can be seen that to implement the method shown in Figure 4, the sequence to be decoded can be divided into multiple sub-segments to be decoded and decoded in a manner corresponding to the encoding side, and then multiple target decoding targets can be determined according to each decoding sub-segment. The code sub-segment, and the decoded bit sequence obtained through sub-segment transformation and sub-segment combination, so as not to increase the processing time for encoding and decoding when the sink outputs the bit sequence in serial. In addition, since a plurality of sub-segments to be decoded can be respectively decoded according to the encoding rules by a plurality of sub-segment decoders, on the basis of improving the encoding flexibility on the encoding side, it is also realized on the decoding side Improved coding flexibility.

Please refer to FIG. 5 , which schematically shows a system architecture diagram for encoding, modulation, demodulation and decoding according to an embodiment of the present application. As shown in Figure 5, a system 500 for encoding, modulation, demodulation and decoding includes a sending end 510 and a receiving end 520, wherein:

The transmitting end 510 is configured to divide the bit sequence to be encoded to obtain multiple target subsections to be encoded; map the multiple target subsections to be encoded into specific subsections to be encoded corresponding to each modulation subchannel according to the modulation channel information; Perform sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments; respectively modulate the corresponding encoded sub-segments into modulation signals through each modulation sub-channel and send the modulation signals to the receiving end 520;

The receiving end 520 is used to demodulate the modulated signal sent by the transmitting end 510 through each modulation sub-channel to obtain the sequence to be decoded; divide the sequence to be decoded into a plurality of sub-segments to be decoded, and decode the sequence through the plurality of sub-segments The encoder decodes a plurality of subsections to be decoded according to the coding rules respectively, and obtains the decoding subsections of each subsection to be decoded; determines a plurality of target decoding subsections according to each decoding subsection; The decoding sub-segment performs sub-segment transformation and sub-segment merging to obtain a decoded bit sequence.

It can be seen that implementing the method shown in Figure 5 can divide the bit sequence to be encoded into multiple target subsections to be encoded without changing the code length of the polar code, and map the multiple target subsections to be encoded into each The specific to-be-encoded sub-segment corresponding to the modulated sub-channel realizes equalization of the modulated sub-channel and improves transmission reliability. In addition, the sequence to be decoded can be divided into multiple sub-segments to be decoded and decoded by means corresponding to the encoding side, and then multiple target decoding sub-segments are determined according to each decoding sub-segment, and through the sub-segments The decoding bit sequence is obtained by transforming and combining the sub-segments, so that when the sink outputs the bit sequence in serial, the processing time for encoding and decoding is not increased, and the decoding performance is improved. In addition, since a plurality of sub-segments to be decoded can be respectively decoded according to the encoding rules by a plurality of sub-segment decoders, on the basis of improving the encoding flexibility on the encoding side, it is also realized on the decoding side Improved coding flexibility.

Referring to FIG. 6 , FIG. 6 schematically shows an architecture diagram of a coding and modulation system according to an embodiment of the present application. As shown in Figure 6, the coding and modulation system includes: segmentation module 610, subsection transformation module 620, subsection mapping module 630, subsection encoder 641, subsection encoder 642, ..., subsection encoder 643, channel Mapper 650 , modulation subchannel 661 , modulation subchannel 662 , . . . , modulation subchannel 663 , channel 670 .

The segmentation module 610 can be used to divide the bit sequence to be coded to obtain multiple target sub-segments to be coded.

The subsection transformation module 620 may be configured to determine from each reference subsection to be coded a specific bit set used to generate each target subsection to be coded according to the first subsection transformation rule, and to perform at least one specific bit set within the set. OR operation to obtain multiple target sub-sections to be encoded.

The subsection mapping module 630 can be used to determine the number of unreliable equivalent bit channels in each modulation subchannel according to the reliability information of the equivalent bit channels; determine the number of unreliable equivalent bit channels that need to be allocated to the corresponding The number of constant 0 bits and/or the number of frozen bits of a specific subsection to be encoded; the specific subsection to be encoded corresponding to each modulated subchannel is determined based on the number of constant 0 bits and/or the number of frozen bits of each specific subsection to be encoded. Or, determine the code rate of each specific subsection to be encoded according to the capacity of each modulation subchannel; determine the first mapping rule of the specific subsection to be encoded corresponding to each modulation subchannel based on the code rate of each specific subsection to be encoded; according to the first The mapping rule determines the second mapping rule between bits in multiple target subsections to be encoded and bits in multiple specific subsections to be encoded; wherein, the ratio between the capacity of each modulation subchannel and the code rate of each specific subsection to be encoded is There is a positive correlation between them.

The sub-segment encoder 641 , the sub-segment encoder 642 , . . . , the sub-segment encoder 643 can respectively perform polar code encoding on each specific sub-segment to be encoded to obtain multiple polar codes as a plurality of encoded sub-segments.

The channel mapper 650 may be configured to map a plurality of target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information when the first preset number is consistent with the second preset number ; When the first preset number is equal to a plurality of second preset numbers, according to the modulation channel information, multiple target subsections to be encoded are mapped to specific subsections to be encoded that have a many-to-one relationship with each modulation subchannel ; Wherein, a plurality of specific subsections to be encoded correspond to a modulation subchannel; when a plurality of first preset numbers are equal to a second preset number, a plurality of target subsections to be encoded are mapped to each modulated subsection according to modulation channel information There is a one-to-many relationship between the subchannels and specific subsections to be coded; wherein, one specific subsection to be coded corresponds to multiple modulation subchannels.

The modulation sub-channel 661 , the modulation sub-channel 662 , .

It can be seen that implementing the system shown in Figure 6 can divide the bit sequence to be encoded into multiple target subsections to be encoded without changing the code length of the polar code, and map the multiple target subsections to be encoded into each The specific to-be-encoded sub-segment corresponding to the modulated sub-channel realizes equalization of the modulated sub-channel and improves transmission reliability.

Please refer to FIG. 7 , which schematically shows an architecture diagram of a demodulation and decoding system according to an embodiment of the present application. As shown in Figure 7, the demodulation and decoding system includes: a demodulator 710, a channel mapper 720, a sub-segment SCL decoder 731, a sub-segment SCL decoder 732, ..., a sub-segment SCL decoder 733, Subsection concatenation/L alternative path selection/verification module 740 , subsection mapper 750 , subsection transformation module 760 , and subsection merging module 770 .

The demodulator 710 may be configured to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded, and divide the sequence to be decoded into a plurality of sub-segments to be decoded.

The channel mapper 720 may be configured to map sub-segments to be decoded to corresponding sub-segment SCL decoders according to a channel mapping manner.

The sub-segment SCL decoder 731, the sub-segment SCL decoder 732, ..., the sub-segment SCL decoder 733 can be used to respectively perform consecutive deletion list SCL decoding on each sub-segment to be decoded, to obtain each to-be-decoded A set of first path probabilities of the incomplete first decoding path of the sub-segment.

The sub-segment concatenation/L alternative path selection/verification module 740 can be used to perform path splitting between sub-segments for each first decoding path to obtain a plurality of incomplete second decoding paths; The coding path is checked for the frozen bit constraint condition, and the path that passes the inspection is determined as the third decoding path; the path with the largest path probability value is selected from the third decoding path as the fourth decoding path; wherein, the fourth decoding path The number of paths is less than or equal to the first preset threshold; each fourth decoding path is arranged according to the path probability value from large to small to obtain a second decoding path queue; sub-decoding the paths in the second decoding path queue The segment is divided and the order of the queue remains unchanged to obtain the first decoding path queue of each sub-segment to be decoded; when it is detected that the number of paths with different probability values in the first decoding path queue is less than or equal to the second preset threshold, Taking paths with different probability values in the first decoding path queue as alternative decoding paths; when it is detected that the number of paths with different probability values in the first decoding path queue is greater than the second preset threshold, select the previous second preset A threshold number of paths with different probability values are used as alternative decoding paths.

In addition, the sub-segment SCL decoder 731, the sub-segment SCL decoder 732, ..., the sub-segment SCL decoder 733 can also be used to continuously delete the sub-segments to be decoded based on the alternative decoding path List of nonSCL decodes.

In addition, the sub-segment concatenation/L candidate path selection/verification module 740 can be used to determine multiple merging paths based on each candidate decoding path when the length of the second decoding path satisfies the first preset length; Each combination path is verified based on a preset verification method, and the combination path that passes the verification and has the highest probability is determined as a decoding path; the decoding path is divided into sub-segments to obtain multiple decoding sub-segments.

The subsection mapper 750 can be used to map each decoding subsection to a target decoding subsection according to a third mapping rule to obtain a plurality of target decoding subsections; wherein, the third mapping rule and the first mapping rule on the encoding side Inverse processing; mapping bits in each decoding subsection to bits in a target decoding subsection according to a fourth mapping rule; wherein, the fourth mapping rule and the second mapping rule on the encoding side are inverse processing.

The sub-section transformation module 760 can be used to select target bits from each target decoding sub-section, and convert the target bits into final bits according to the second sub-section transformation rule, and determine each final decoding sub-section based on the final bits; wherein, the first The conversion rule of the second sub-segment and the conversion rule of the first sub-segment at the encoding side are inverse processing.

The sub-segment merging module 770 may be used for merging the final decoded sub-segments to obtain a decoded bit sequence.

It can be seen that to implement the system shown in Figure 7, the sequence to be decoded can be divided into multiple sub-segments to be decoded and decoded in a manner corresponding to the encoding side, and then multiple target decodings can be determined according to each decoding sub-segment The code sub-segment, and the decoded bit sequence obtained by sub-segment transformation and sub-segment combination, in order to improve the decoding performance without increasing the processing time for encoding and decoding when the sink outputs the bit sequence in serial. In addition, since a plurality of sub-segments to be decoded can be respectively decoded according to the encoding rules by a plurality of sub-segment decoders, on the basis of improving the encoding flexibility on the encoding side, it is also realized on the decoding side Improved coding flexibility.

Referring to FIG. 8 , FIG. 8 schematically shows a structural block diagram of a coding and modulating apparatus according to an embodiment of the present application. The encoding and modulating device 800 corresponds to the method shown in FIG. 1, and as shown in FIG. 8, the encoding and modulating device 800 includes:

A subsection obtaining unit 801, configured to divide the bit sequence to be coded to obtain multiple target subsections to be coded;

A subsection mapping unit 802, configured to map multiple target subsections to be encoded into specific subsections to be encoded corresponding to each modulation subchannel according to the modulation channel information;

A sub-segment encoding unit 803, configured to perform sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments;

The modulation sending unit 804 is configured to respectively modulate the corresponding coded sub-segments into modulation signals through each modulation sub-channel and send the modulation signals to the receiving end.

Wherein, the bit sequence to be encoded corresponds to a first preset length, and the first preset length is equal to an integer power of 2; the reference subsection to be encoded, the target subsection to be encoded, and the specific subsection to be encoded all correspond to the second preset The length and the first preset number, the second preset length is equal to an integral power of 2; the first preset length is the first preset number of the second preset length.

It can be seen that implementing the device shown in Figure 8 can divide the bit sequence to be encoded into multiple target subsections to be encoded without changing the code length of the polar code, and map the multiple target subsections to be encoded into each The specific to-be-encoded sub-segment corresponding to the modulated sub-channel realizes equalization of the modulated sub-channel and improves transmission reliability.

In an exemplary embodiment of the present application, the subsection obtaining unit 801 divides the bit sequence to be coded to obtain multiple target subsections to be coded, including:

Dividing the bit sequence to be coded to obtain multiple reference sub-segments to be coded;

Subsection transformation is performed on multiple reference subsections to be coded to obtain multiple target subsections to be coded.

It can be seen that implementing this optional embodiment can realize high-efficiency coding and ensure decoding performance by dividing the bit sequence to be coded.

In an exemplary embodiment of the present application, the subsection obtaining unit 801 performs subsection transformation on multiple reference subsections to be coded to obtain multiple target subsections to be coded, including:

determining a specific bit set for generating each target subsection to be encoded from each reference subsection to be encoded according to the first subsection transformation rule;

Execute an exclusive OR operation within the set on at least one specific bit set to obtain multiple target sub-sections to be encoded;

Among them, the first subsection transformation rule is used to limit the XOR operation involving only frozen bits to obtain a constant 0 bit, the XOR operation only involving information bits to obtain pure information bits, and the XOR operation involving frozen bits and information bits Get mixed bits.

Wherein, the reference to-be-coded subsection includes information bits and frozen bits, and the target to-be-coded subsection includes at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and mixed bits.

Wherein, the target to-be-encoded subsection includes a check code, which is used as information bits and/or pure information bits; the check code includes at least one of the following: cyclic redundancy check code, parity check code.

It can be seen that by implementing this optional embodiment, the sub-segment to be encoded can be transformed through the first sub-segment transformation rule, which is beneficial to improve coding flexibility.

In an exemplary embodiment of the present application, the sub-segment encoding unit 803 performs sub-segment encoding on each specific sub-segment to be encoded to obtain a plurality of encoded sub-segments, including:

Perform polar code coding on each specific sub-segment to be coded to obtain multiple polar codes as multiple coded sub-segments.

It can be seen that implementing this optional embodiment can implement polar code coding based on sequence segmentation, and can improve the flexibility of polar code coding.

In an exemplary embodiment of the present application, the modulation channel information includes the capacity of each modulation subchannel, and the subsection mapping unit 802 maps a plurality of target subsections to be coded into specific coded subsections corresponding to each modulation subchannel according to the modulation channel information. subsections, including:

Determine the code rate of each specific sub-section to be encoded according to the capacity of each modulation sub-channel;

Determine the first mapping rule of the specific sub-segment to be encoded corresponding to each modulated sub-channel based on the code rate of each specific sub-segment to be encoded;

According to the first mapping rule, determine a second mapping rule between the bits in the multiple target subsections to be encoded and the bits in the multiple specific subsections to be encoded;

There is a positive correlation between the capacity of each modulation sub-channel and the code rate of each specific sub-segment to be encoded.

It can be seen that, implementing this optional embodiment, specific sub-segments to be encoded with different code rates can be mapped to modulated sub-channels with different channel capacities based on the capacity of each modulation sub-channel, so that the specific sub-segment to be encoded with a large code rate corresponds to The modulated sub-channel with large capacity and the specific sub-segment to be encoded with small code rate correspond to the modulated sub-channel with small capacity, which realizes the equalization of the modulated sub-channel and improves the transmission reliability.

In an exemplary embodiment of the present application, the modulation channel information includes equivalent bit channel reliability information, and the subsection mapping unit 802 maps a plurality of target subsections to be coded into specific subsections corresponding to each modulation subchannel according to the modulation channel information. Subsections to be coded, including:

Determine the number of unreliable equivalent bit channels in each modulation subchannel according to the equivalent bit channel reliability information;

Determine the number of constant 0 bits and/or the number of frozen bits that need to be allocated to each specific sub-segment to be encoded according to the number of unreliable equivalent bit channels in each modulation sub-channel;

The specific to-be-coded sub-segment corresponding to each modulated sub-channel is determined based on the number of constant 0 bits and/or the number of frozen bits of each specific to-be-coded sub-segment.

It can be seen that by implementing this optional embodiment, specific sub-segments to be encoded with different code rates can be mapped to modulated sub-channels with different channel capacities based on the preset equivalent bit channel reliability information, so that the code rate can be increased more efficiently. The specific to-be-encoded sub-segment corresponds to a modulation sub-channel with a large capacity, and the specific to-be-encoded sub-segment with a small code rate corresponds to a small-capacity modulation sub-channel, which realizes the balance of the modulation sub-channel and improves transmission reliability.

In an exemplary embodiment of the present application, the modulation sub-channel corresponds to the second preset number, and the sub-segment mapping unit 802 maps a plurality of target sub-segments to be encoded into specific to-be-encoded sub-segments corresponding to each modulation sub-channel according to the modulation channel information. Encoding subsections, including:

When the first preset number is consistent with the second preset number, according to the modulation channel information, a plurality of target sub-segments to be encoded are mapped to specific sub-segments to be encoded that correspond to each modulation sub-channel;

When the first preset number is equal to a plurality of second preset numbers, mapping a plurality of target subsections to be encoded into specific subsections to be encoded that have a many-to-one relationship with each modulation subchannel according to the modulation channel information; Wherein, a plurality of specific sub-segments to be encoded correspond to a modulation sub-channel;

When the multiple first preset numbers are equal to the second preset number, according to the modulation channel information, the multiple target subsections to be encoded are mapped to specific subsections to be encoded that have a one-to-many relationship with each modulation subchannel; wherein , a specific sub-segment to be coded corresponds to multiple modulation sub-channels.

It can be seen that, implementing this optional embodiment, an appropriate corresponding manner can be selected based on the first preset number and the second preset number, which is beneficial to improving modulation flexibility and transmission reliability for modulation sub-channels.

Since each functional module of the coded modulation device in the example embodiment of the present application corresponds to the steps of the above example embodiment of the coded modulation method, for details not disclosed in the device embodiment of the present application, please refer to the coded modulation method described above in the present application the embodiment.

Referring to FIG. 9 , FIG. 9 schematically shows a structural block diagram of a demodulation and decoding device according to an embodiment of the present application. The demodulation and decoding device 900 corresponds to the method shown in FIG. 3, and as shown in FIG. 9, the demodulation and decoding device 900 includes:

The receiving demodulation unit 901 is configured to demodulate the modulated signal sent by the transmitting end through each modulation sub-channel to obtain a sequence to be decoded;

The first decoding unit 902 is configured to divide the sequence to be decoded into a plurality of sub-segments to be decoded, and use a plurality of sub-segment decoders to respectively decode the plurality of sub-segments to be decoded according to the coding rules to obtain each the decoding sub-segment of the sub-segment to be decoded;

The second decoding unit 903 is configured to determine a plurality of target decoding sub-segments according to each decoding sub-segment;

The third decoding unit 904 is configured to perform sub-segment transformation and sub-segment combination on multiple target decoding sub-segments to obtain a decoded bit sequence.

Wherein, the sub-segment decoder and the sub-segments to be decoded correspond to a first preset number, and each sub-segment to be decoded corresponds to a second preset length.

It can be seen that, implementing the device shown in Figure 9, the sequence to be decoded can be divided into multiple sub-segments to be decoded and decoded in a manner corresponding to the encoding side, and then multiple target decoding targets can be determined according to each decoding sub-segment. The code sub-segment, and the decoded bit sequence obtained by sub-segment transformation and sub-segment combination, in order to improve the decoding performance without increasing the processing time for encoding and decoding when the sink outputs the bit sequence in serial. In addition, since a plurality of sub-segments to be decoded can be respectively decoded according to the encoding rules by a plurality of sub-segment decoders, on the basis of improving the encoding flexibility on the encoding side, it is also realized on the decoding side Improved coding flexibility.

In an exemplary embodiment of the present application, the first decoding unit 902 uses a plurality of sub-segment decoders to respectively decode a plurality of sub-segments to be decoded according to coding rules, and obtains the decoding of each sub-segment to be decoded Code subsections, including:

Perform non-SCL decoding of non-continuous deletion lists on multiple sub-segments to be decoded to obtain multiple merging paths;

A plurality of decoding sub-segments are determined according to a plurality of merging paths.

It can be seen that, by implementing this optional embodiment, multiple sub-segments to be decoded can be decoded based on the non-SCL non-sequential deletion list to obtain multiple decoded sub-segments, which is beneficial to improve decoding flexibility.

In an exemplary embodiment of the present application, the first decoding unit 902 performs non-SCL decoding on multiple sub-segments to be decoded to obtain multiple merging paths, including:

Carrying out continuous deletion list SCL decoding to each sub-segment to be decoded respectively, to obtain a first path probability set of an incomplete first decoding path of each sub-segment to be decoded;

performing path splitting between sub-segments on each first decoding path to obtain a plurality of incomplete second decoding paths;

Performing a freeze bit constraint test on the second decoding path, and determining the path that passes the test as the third decoding path;

Selecting the path with the largest path probability value from the third decoding path as the fourth decoding path; wherein, the number of the fourth decoding paths is less than or equal to the first preset threshold;

Carrying out sub-segment division for each fourth decoding path to obtain the first decoding path queue of each sub-segment to be decoded;

When it is detected that the number of paths with different probability values in the first decoding path queue is less than or equal to a second preset threshold, the paths with different probability values in the first decoding path queue are used as alternative decoding paths;

When it is detected that the number of paths with different probability values in the first decoding path queue is greater than a second preset threshold, selecting paths with different probability values by the second preset threshold number as alternative decoding paths;

Continue to perform non-SCL decoding on each sub-segment to be decoded based on the alternative decoding path;

When the length of the second decoding path satisfies the first preset length, multiple merging paths are determined based on each candidate decoding path.

It can be seen that implementing this optional embodiment can realize the optimal method of sub-segment parallel CA-SCL-all sub-segments, and simultaneously adopt two kinds of decoding of continuous deletion list SCL decoding and non-sequential deletion list nonSCL decoding for sub-segments to be decoded Encoding mode improves decoding flexibility and reduces hardware complexity and hardware power consumption.

In an exemplary embodiment of the present application, the first decoding unit divides each fourth decoding path into sub-segments to obtain the first decoding path queue of each sub-segment to be decoded, including:

Arranging each fourth decoding path according to the path probability value from large to small to obtain a second decoding path queue;

Divide the paths in the second decoding path queue into sub-segments and keep the order of the queues unchanged to obtain the first decoding path queue of each sub-segment to be decoded.

It can be seen that the implementation of this optional embodiment can help improve the decoding performance.

In an exemplary embodiment of the present application, the first decoding unit 902 determines multiple decoding sub-segments according to multiple merging paths, including:

Verifying each merging path based on a preset verification method, and determining the merging path that passes the verification and has the highest probability as the decoding path;

The decoding path is divided into sub-sections to obtain multiple decoding sub-sections.

It can be seen that by implementing this optional embodiment, efficient screening of decoding paths can be achieved, a single decoding path can be obtained, the correctness of the decoding path can be improved, and the sub-segment division of the decoding path can be realized more simply. to improve decoding performance.

In an exemplary embodiment of the present application, the second decoding unit 903 determines multiple target decoding sub-segments according to each decoding sub-segment, including:

Map each decoding subsection to a target decoding subsection according to a third mapping rule to obtain a plurality of target decoding subsections; wherein, the target decoding subsection and the decoding subsection correspond to a first preset number;

Wherein, the third mapping rule and the first mapping rule on the encoding side are mutually inverse processing;

mapping bits in each decoding subsection to bits in a target decoding subsection according to a fourth mapping rule;

Wherein, the fourth mapping rule and the second mapping rule on the encoding side are mutually inverse processing.

It can be seen that implementing this optional embodiment can realize the mapping for decoding sub-segments, which is beneficial to obtain an accurate decoding bit sequence.

In an exemplary embodiment of the present application, the third decoding unit 904 performs sub-segment transformation and sub-segment merging on multiple target decoding sub-segments to obtain a decoded bit sequence, including:

Select target bits from each target decoding sub-section, and transform the target bits into final bits according to the second sub-section transformation rule; wherein, the second sub-section transformation rule and the first sub-section transformation rule on the encoding side are inverse processing each other ;

determining each final decoded sub-segment based on the final bits;

Merge the final decoded sub-segments to obtain the decoded bit sequence.

It can be seen that by implementing this optional embodiment, sub-segment transformation and sub-segment merging can be performed on the target decoding sub-segment obtained by efficient decoding, so that the final decoding bit sequence can be obtained more flexibly.

In an exemplary embodiment of the present application, the first decoding unit performs a freeze bit constraint check on the second decoding path, including:

When the final bit is a frozen bit, based on the third subsection transformation rule and the fourth mapping rule, it is checked whether the XOR operation result of the corresponding bits in the multiple second decoding paths is consistent with the frozen bit.

It can be seen that implementing this optional embodiment can improve decoding performance.

Since each functional module of the demodulation and decoding device in the exemplary embodiment of the present application corresponds to the steps of the exemplary embodiment of the above-mentioned demodulation and decoding method, for details not disclosed in the device embodiment of the present application, please refer to the above-mentioned An embodiment of the demodulation and decoding method.

It should be noted that although several modules or units of the device for action execution are mentioned in the above detailed description, this division is not mandatory. Actually, according to the embodiment of the present application, the features and functions of two or more modules or units described above may be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided to be embodied by a plurality of modules or units.

Please refer to FIG. 10 . FIG. 10 shows a schematic structural diagram of a computer system suitable for implementing an electronic device according to an embodiment of the present application.

It should be noted that the computer system 1000 of the electronic device shown in FIG. 10 is only an example, and should not limit the functions and scope of use of the embodiments of the present application.

As shown in FIG. 10 , a computer system 1000 includes a central processing unit (CPU) 1001, which can operate according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage section 1008 into a random access memory (RAM) 1003 Instead, various appropriate actions and processes are performed. In RAM 1003, various programs and data necessary for system operation are also stored. The CPU 1001 , ROM 1002 , and RAM 1003 are connected to each other via a bus 1004 . An input/output (I/O) interface 1005 is also connected to the bus 1004 .

The following components are connected to the I/O interface 1005: an input section 1006 including a keyboard, a mouse, etc.; an output section 1007 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker; a storage section 1008 including a hard disk, etc. and a communication section 1009 including a network interface card such as a LAN card, a modem, or the like. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to the I/O interface 1005 as needed. A removable medium 1011, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is mounted on the drive 1010 as necessary so that a computer program read therefrom is installed into the storage section 1008 as necessary.

In particular, according to the embodiments of the present application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, the embodiments of the present application include a computer program product, which includes a computer program carried on a computer-readable medium, where the computer program includes program codes for executing the methods shown in the flowcharts. In such an embodiment, the computer program may be downloaded and installed from a network via communication portion 1009 and/or installed from removable media 1011 . When the computer program is executed by a central processing unit (CPU) 1001, various functions defined in the method and apparatus of the present application are performed.

As another aspect, the present application also provides a computer-readable medium. The computer-readable medium may be included in the electronic device described in the above-mentioned embodiments; or it may exist independently without being assembled into the electronic device. middle. The above-mentioned computer-readable medium carries one or more programs, and when the above-mentioned one or more programs are executed by an electronic device, the electronic device is made to implement the methods described in the above-mentioned embodiments.

It should be noted that the computer-readable medium shown in this application may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. A computer readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to, electrical connections with one or more wires, portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable Programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this application, however, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, in which computer-readable program codes are carried. Such propagated data signals may take many forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the foregoing. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device. . Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in a flowchart or block diagram may represent a module, program segment, or portion of code that includes one or more logical functions for implementing specified executable instructions. It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or they may sometimes be executed in the reverse order, depending upon the functionality involved. It should also be noted that each block in the block diagrams or flowchart illustrations, and combinations of blocks in the block diagrams or flowchart illustrations, can be implemented by a dedicated hardware-based system that performs the specified function or operation, or can be implemented by a A combination of dedicated hardware and computer instructions.

The units described in the embodiments of the present application may be implemented by software or by hardware, and the described units may also be set in a processor. Wherein, the names of these units do not constitute a limitation of the unit itself under certain circumstances.

Other embodiments of the present application will be readily apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application intends to cover any modification, use or adaptation of the application, and these modifications, uses or adaptations follow the general principles of the application and include common knowledge or conventional technical means in the field not disclosed in the application. The specification and examples are to be considered exemplary only, with a true scope and spirit of the application indicated by the preceding claims.

Claims (24)

1. A code modulation method, wherein the method is performed by a transmitting end, and wherein the method comprises:

dividing a bit sequence to be coded to obtain a plurality of target subsegments to be coded;

mapping the target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel according to modulation channel information;

performing sub-segment coding on each specific sub-segment to be coded to obtain a plurality of coded sub-segments;

and respectively modulating the corresponding coding subsegments into modulation signals through each modulation subchannel and transmitting the modulation signals to a receiving end.

2. The method according to claim 1, wherein dividing the bit sequence to be coded to obtain a plurality of target sub-segments to be coded comprises:

dividing a bit sequence to be coded to obtain a plurality of reference subsegments to be coded;

and performing sub-segment transformation on the plurality of reference sub-segments to be coded to obtain a plurality of target sub-segments to be coded.

3. The method according to claim 2, characterized in that said sequence of bits to be coded corresponds to a first preset length equal to an integral power of 2; the reference sub-segments to be coded, the target sub-segments to be coded and the specific sub-segments to be coded all correspond to a second preset length and a first preset number, wherein the second preset length is equal to the integral power of 2; the first preset length is the first preset number of the second preset length.

4. The method according to claim 2, wherein performing sub-segment transform on the plurality of reference sub-segments to be encoded to obtain a plurality of target sub-segments to be encoded, comprises:

determining a specific bit set used for generating each target sub-segment to be coded from each reference sub-segment to be coded according to a first sub-segment transformation rule;

performing XOR operation in the set on at least one specific bit set to obtain a plurality of target subsections to be coded;

the first subsection transformation rule is used for limiting that only XOR operation involving the frozen bits obtains constant 0 bits, only XOR operation involving the information bits obtains pure information bits, and XOR operation involving the frozen bits and the information bits obtains mixed bits.

5. The method of claim 1, wherein performing sub-segment coding on each specific sub-segment to be coded to obtain a plurality of coded sub-segments comprises:

and carrying out polarization code coding on each specific sub-segment to be coded to obtain a plurality of polarization codes as a plurality of coding sub-segments.

6. The method according to any of claims 2, 4 and 5, wherein the reference sub-segment to be encoded contains information bits and frozen bits, and the target sub-segment to be encoded contains at least one of the following: frozen bits, information bits, constant 0 bits, pure information bits, and hybrid bits.

7. The method according to claim 6, wherein the target sub-segment to be encoded contains a check code as information bits and/or pure information bits; the check code includes at least one of: cyclic redundancy check codes, parity check codes.

8. The method according to claim 1, wherein the modulation channel information includes capacity of each modulation subchannel, and mapping the plurality of target sub-segments to be coded to specific sub-segments to be coded corresponding to each modulation subchannel according to the modulation channel information comprises:

determining the corresponding specific sub-segment code rate to be coded according to the capacity of each modulation sub-channel;

determining a first mapping rule of a specific sub-segment to be coded corresponding to each modulation sub-channel based on the code rate of each specific sub-segment to be coded;

determining a second mapping rule between bits in the target subsections to be coded and bits in a plurality of specific subsections to be coded according to the first mapping rule;

and the capacity of each modulation sub-channel and the code rate of each specific sub-segment to be coded form a positive correlation relationship.

9. The method according to claim 1, wherein the modulation channel information includes equivalent bit channel reliability information, and mapping the plurality of target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel according to the modulation channel information comprises:

determining the number of unreliable equivalent bit channels in each modulation sub-channel according to the reliability information of the equivalent bit channels;

determining the number of constant 0 bits and/or the number of frozen bits which need to be distributed to each corresponding specific sub-segment to be coded according to the number of unreliable equivalent bit channels in each modulation sub-channel;

and determining the specific sub-segments to be coded corresponding to each modulation sub-channel based on the constant 0 bit quantity and/or the frozen bit quantity of each specific sub-segment to be coded.

10. The method according to claim 2, wherein the mapping of the plurality of target sub-segments to be encoded to specific sub-segments to be encoded corresponding to each modulation sub-channel according to the modulation channel information, the modulation sub-channels corresponding to the second preset number, comprises:

when the first preset number is consistent with the second preset number, mapping the multiple target sub-segments to be coded into specific sub-segments to be coded, which correspond to the modulation sub-channels one by one, according to modulation channel information;

when the first preset number is equal to a plurality of second preset numbers, mapping the plurality of target sub-segments to be coded into specific sub-segments to be coded, which have a many-to-one-many relationship with each modulation sub-channel, according to the modulation channel information; wherein, a plurality of special sub-segments to be coded correspond to a modulation sub-channel;

when the first preset number is equal to the second preset number, mapping the target sub-segments to be coded into specific sub-segments to be coded, which have one-to-many relation with each modulation sub-channel, according to the modulation channel information; wherein a particular sub-segment to be coded corresponds to a plurality of modulation sub-channels.

11. A demodulation and decoding method, wherein the method is performed by a receiving end, and the method comprises:

demodulating the modulation signals sent by the sending end through each modulation sub-channel to obtain a sequence to be decoded;

dividing the sequence to be decoded into a plurality of subsegments to be decoded, and respectively decoding the plurality of subsegments to be decoded through a plurality of subsegment decoders according to the coding rule to obtain the decoding subsegment of each subsegment to be decoded;

determining a plurality of target decoding subsegments according to each decoding subsegment;

and performing sub-segment conversion and sub-segment combination on the target decoding sub-segments to obtain a decoding bit sequence.

12. The method of claim 11, wherein the sub-segment decoder and the sub-segments to be decoded each correspond to a first predetermined number, and each sub-segment to be decoded corresponds to a second predetermined length.

13. The method according to claim 11, wherein decoding the plurality of subsections to be decoded by a plurality of subsegment decoders according to an encoding rule to obtain the decoded subsegment of each subsegment to be decoded comprises:

performing non-continuous deletion list non SCL decoding on the plurality of subsections to be decoded to obtain a plurality of merging paths;

and determining a plurality of decoding subsegments according to the plurality of merging paths.

14. The method according to claim 13, wherein performing non-consecutive erasure list non scl decoding on the plurality of subsegments to be decoded to obtain a plurality of merging paths comprises:

performing continuous deletion list SCL decoding on each subsection to be decoded to obtain a first path probability set of a non-complete first decoding path of each subsection to be decoded;

performing path splitting between subsections on each first decoding path to obtain a plurality of incomplete second decoding paths;

performing frozen bit constraint condition inspection on the second decoding path, and determining the path passing the inspection as a third decoding path;

selecting a path with a maximum path probability value from the third coding paths as a fourth coding path; wherein the number of the fourth decoding paths is less than or equal to a first preset threshold;

sub-segment division is carried out on each fourth decoding path to obtain a first decoding path queue of each sub-segment to be decoded;

when detecting that the number of paths with different probability values in a first decoding path queue is smaller than or equal to a second preset threshold value, taking the paths with different probability values in the first decoding path queue as alternative decoding paths;

when the condition that the number of paths with different probability values in the first decoding path queue is larger than the second preset threshold value is detected, selecting the paths with different probability values in the number of the second preset threshold values as alternative decoding paths;

continuously decoding each subsection to be decoded by a non-continuous deletion list (nonSCL) based on the alternative decoding path;

and when the length of the second decoding path meets a first preset length, determining a plurality of merging paths based on the alternative decoding paths.

15. The method of claim 14, wherein the sub-segment dividing of each fourth decoding path to obtain the first decoding path queue of each sub-segment to be decoded comprises:

arranging the fourth decoding paths from large to small according to the path probability values to obtain a second decoding path queue;

and dividing the path in the second decoding path queue into subsegments and keeping the sequence of the queue unchanged to obtain the first decoding path queue of each subsegment to be decoded.

16. The method of claim 13, wherein determining a plurality of decoding subsegments according to the plurality of combining paths comprises:

verifying each merging path based on a preset verification mode, and determining the merging path which passes the verification and has the maximum probability as a decoding path;

and dividing the decoding path into subsegments to obtain a plurality of decoding subsegments.

17. The method of claim 11, wherein determining a plurality of target decoding subsegments based on each decoding subsegment comprises:

mapping each decoding sub-segment into a target decoding sub-segment according to a third mapping rule to obtain a plurality of target decoding sub-segments; wherein, the target decoding subsegment and the decoding subsegment both correspond to a first preset number; the third mapping rule and the first mapping rule at the encoding side are processed in an inverse way;

mapping the bits in each decoding subsegment into the bits in the target decoding subsegment according to a fourth mapping rule; and the fourth mapping rule and the second mapping rule at the encoding side are processed in an inverse manner.

18. The method according to claim 11, wherein performing sub-segment transform and sub-segment merging on the plurality of target decoding sub-segments to obtain a decoded bit sequence comprises:

selecting target bits from each target decoding subsection, and converting the target bits into final bits according to a second subsection conversion rule; the second subsegment transformation rule and the first subsegment transformation rule on the encoding side are processed in an inverse manner;

determining the final decoded subsections based on the final bits;

and merging the final decoding subsections to obtain a decoding bit sequence.

19. The method of claim 14, wherein performing a frozen bit constraint check on the second decoding path comprises:

and when the final bit is the frozen bit, checking whether the exclusive or operation result of the corresponding bits in the plurality of second decoding paths is consistent with the frozen bit based on the third subsection transformation rule and the fourth mapping rule.

20. An apparatus for coded modulation, the apparatus comprising:

the sub-segment obtaining unit is used for dividing the bit sequence to be coded so as to obtain a plurality of target sub-segments to be coded;

a sub-segment mapping unit, configured to map the multiple target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel according to modulation channel information;

the sub-segment coding unit is used for carrying out sub-segment coding on each specific sub-segment to be coded to obtain a plurality of coded sub-segments;

and the modulation sending unit is used for modulating the corresponding coding sub-segments into modulation signals through each modulation sub-channel and sending the modulation signals to a receiving end.

21. A demodulation and decoding apparatus, characterized in that the apparatus comprises:

the receiving demodulation unit is used for demodulating the modulation signals sent by the sending end through each modulation sub-channel to obtain a sequence to be decoded;

the first decoding unit is used for dividing the sequence to be decoded into a plurality of subsegments to be decoded and respectively decoding the plurality of subsegments to be decoded through a plurality of subsegment decoders according to an encoding rule to obtain a decoding subsegment of each subsegment to be decoded;

a second decoding unit for determining a plurality of target decoding subsections according to each decoding subsection;

and the third decoding unit is used for carrying out sub-segment conversion and sub-segment combination on the target decoding sub-segments to obtain a decoding bit sequence.

22. A system for performing code modulation and demodulation decoding, the system comprising a transmitting end and a receiving end, wherein:

the transmitting end is used for dividing the bit sequence to be coded so as to obtain a plurality of target subsegments to be coded; mapping the target sub-segments to be coded into specific sub-segments to be coded corresponding to each modulation sub-channel according to modulation channel information; performing sub-segment coding on each specific sub-segment to be coded to obtain a plurality of coding sub-segments; respectively modulating the corresponding coding subsegments into modulation signals through each modulation subchannel and sending the modulation signals to the receiving end;

the receiving end is used for demodulating the modulation signals sent by the sending end through each modulation sub-channel to obtain a sequence to be decoded; dividing the sequence to be decoded into a plurality of subsections to be decoded, and decoding the plurality of subsections to be decoded respectively through a plurality of subsection decoders according to coding rules to obtain decoding subsections of each subsections to be decoded; determining a plurality of target decoding subsections according to each decoding subsection; and performing sub-segment transformation and sub-segment combination on the target decoding sub-segments to obtain a decoding bit sequence.

23. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, implements the code modulation method according to any one of claims 1 to 10 or the demodulation and decoding method according to any one of claims 11 to 19.

24. An electronic device, comprising:

a processor; and

a memory for storing executable instructions of the processor;

wherein the processor is configured to perform the encoding modulation method of any one of claims 1-10 or the demodulation decoding method of any one of claims 11-19 via execution of the executable instructions.

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