CN115514426A - A High Sampling Rate Single Acquisition Channel Vector Network Analysis Implementation Method and System - Google Patents

Abstract

The present invention discloses a high sampling rate single acquisition channel vector network analysis implementation method and system. The implementation method includes the following process: (1) when the signal is collected, the channel switch is switched to one of the three intermediate frequency signals of R, A, and B. One way; (2) Sampling is performed by the ADC, and one of the intermediate frequency signals is collected and mixed with an externally input digital local oscillator NCO, and the mixed signal is low-pass filtered, and then stored after data processing; (3) After reaching the set sampling time or storage capacity, switch from the channel switch to another IF signal, and perform step (2); (4) switch from the channel switch to the last IF signal, and perform step (2); (5) Finally, Calculate the corresponding amplitude and phase information based on the three-way data. The implementation method and system disclosed in the invention can effectively remove the noise in the band, improve the signal-to-noise ratio of the entire test system, and reduce resource usage.

Description

A High Sampling Rate Single Acquisition Channel Vector Network Analysis Implementation Method and System

technical field

The invention relates to the field of vector network analysis, in particular to a method and system for realizing vector network analysis with a single acquisition channel at a high sampling rate.

Background technique

With the development of modern technology, the test indicators and functions are becoming more and more diversified, and higher requirements are put forward for the high integration and miniaturization of test instruments. Test instruments with simultaneous transceiver systems, such as vector signal transceivers, have already It not only performs the traditional signal sending and receiving function, but also combines with the RF front end to realize the vector network analysis function. Many signal transceivers only have a single acquisition channel and cannot use the conventional vector network analysis implementation method. Therefore, it is necessary to study the implementation method of vector network analysis with a single acquisition channel.

At present, the traditional implementation method of single-acquisition-channel vector network analysis based on the integrated hardware structure of signal transmission and reception is that a single ADC samples R, A, and B three-way intermediate frequency signals in time-sharing, and sequentially collects R, A, and B three-way IF signals at fixed time intervals throughout the process. A single data point of the intermediate frequency signal of the channel is cyclically switched for multiple rounds until the number of data points required by each channel is collected, and then data processing is performed. The specific implementation method is shown in Figure 1. The time-sharing sampler performs counting control according to the data clock provided by the ADC, and generates a switch control signal to switch R, A, and B intermediate frequency signals according to a fixed counting interval. In the fixed counting interval, it is necessary to ensure that the signal is stable after the channel switching is completed, and then The sampling value of each channel point is obtained at each fixed moment, and this process is repeated several times to obtain the acquisition signals of R, A, and B respectively. The three acquisition signals are respectively mixed with three digital local oscillator NCOs. The three digital local oscillator NCOs need to ensure that the initial phase is the same. With the enablement of each signal, the phases are superimposed, which can ensure the accuracy of the phase measurement. After the frequency mixing is completed, the data enters the low-pass filter to remove the high-frequency signal brought by the frequency mixing, and the subsequent data processing performs decimation and filtering according to the needs, and finally obtains the R, A, and B three-way intermediate-frequency processed data, according to the three-way The corresponding amplitude and phase information can be calculated from the data.

The above method is not suitable for the vector signal transceiver system of large bandwidth channels. The sampling period of the three channels in this technology is an integer multiple of the ADC sampling period. The sampling period includes channel switching, stabilization time and signal acquisition time, and the sampling period will be much larger. at the sampling period of the ADC. For the vector signal transceiver system with large bandwidth channels, the anti-aliasing analog filter bandwidth at the front end of the ADC is very large, often reaching hundreds of MHz or even higher. Using this method will introduce broadband channel noise into the signal bandwidth, resulting in aliasing Overlap, affect the test indicators. Moreover, the above method requires frequent and repeated switching of switches, which requires high channel switching time and system stability. Moreover, the data processing link in the prior art is complicated. Considering the real-time requirement, the three-way data processing link cannot be reused, and three independent channels such as digital local oscillator NCO and decimation filter are required, and the circuit structure is relatively complicated.

Contents of the invention

In order to solve the above technical problems, the present invention provides a high sampling rate single acquisition channel vector network analysis implementation method and system to achieve effective removal of in-band noise, improve the signal-to-noise ratio of the entire test system, and reduce resource usage Purpose.

To achieve the above object, the technical scheme of the present invention is as follows:

A high sampling rate single acquisition channel vector network analysis implementation method, including the following process:

(1) When the signal is collected, the channel switch is switched to one of the three intermediate frequency signals of R, A, and B;

(2) Sampling is carried out by the ADC, and one of the intermediate frequency signals collected is mixed with an externally input digital local oscillator NCO, and the mixed signal is low-pass filtered, and then stored after data processing;

(3) After the set sampling time or storage capacity is reached, the channel switch is switched to another intermediate frequency signal, and step (2) is performed;

(4) After the set sampling time or storage capacity is reached, the acquisition of the second intermediate frequency signal is completed, and the channel switch is switched to the last intermediate frequency signal, and step (2) is performed, thus completing the acquisition of the three intermediate frequency signals;

(5) Finally, calculate the corresponding amplitude and phase information according to the three channels of data.

In the above solution, the three IF signals of R, A, and B all maintain a fixed phase difference with the ADC acquisition clock, and also maintain a fixed phase difference with the ADC digital output clock.

In the above solution, the three intermediate frequency signals of R, A, and B also maintain a fixed phase difference with the digital local oscillator NCO constructed by using the ADC digital output clock.

In the above solution, the data processing in step (2) includes decimation and filtering.

In the above solution, the digital local oscillator NCO keeps running during the whole process of step (1)-step (5).

In the above solution, the controller generates a switch control signal to control the switching of the channel switch according to the data storage situation and the sampling time.

A high-sampling-rate single-acquisition channel vector network analysis implementation system, including a channel switch, an ADC, a mixer, a low-pass filter, a data processor, and a data memory connected in sequence, and the mixer is also connected to a digital book The vibration NCO, the channel switch is connected to the radio frequency front end, and the controller is connected to the data memory and the channel switch.

Through the above technical solution, the method and system for implementing vector network analysis with a high sampling rate single acquisition channel provided by the present invention have the following beneficial effects:

1. The present invention does not need to frequently collect R, A, and B three-way intermediate frequency signals at a fixed time, but uses ADCs to collect and complete the three-way signals in sequence. After subsequent data processing, the in-band noise can be effectively removed, and the entire test can be improved. The signal-to-noise ratio of the system.

2. Since the present invention sequentially uses the ADC to sequentially collect the three-way signals, the three-way data is multiplexed and mixed with the subsequent data processor based on the pipeline structure, which can reduce the usage of resources.

3. The present invention can be applied to a large-bandwidth signal transceiver integrated hardware system, and the data rate of the three-way intermediate frequency acquisition is consistent with the sampling rate of the ADC, which can effectively remove in-band noise.

4. The present invention completes the processing process at one time, and the channel switch only needs to be switched three times without frequent switching, which improves the stability of the system.

Description of drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the description of the embodiments or the prior art.

Fig. 1 is the flow chart of the implementation method of vector network analysis in the prior art;

Fig. 2 is a flow chart of a method for implementing vector network analysis with a single acquisition channel at a high sampling rate disclosed in an embodiment of the present invention.

detailed description

The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention.

The present invention provides a high sampling rate single acquisition channel vector network analysis implementation method, as shown in Figure 2, including the following process:

(1) When the signal is collected, the channel switch is switched to one of the three intermediate frequency signals of R, A, and B;

(2) Sampling is carried out by the ADC, and one of the intermediate frequency signals collected is mixed with an externally input digital local oscillator NCO. After the mixed signal is low-pass filtered, it is stored after data processing such as extraction and filtering;

(3) After the set sampling time or storage capacity is reached, the channel switch is switched to another intermediate frequency signal, and step (2) is performed;

(4) After the set sampling time or storage capacity is reached, the acquisition of the second intermediate frequency signal is completed, and the channel switch is switched to the last intermediate frequency signal, and step (2) is performed, thus completing the acquisition of the three intermediate frequency signals;

(5) Finally, calculate the corresponding amplitude and phase information according to the three channels of data.

In the present invention, the R, A, and B intermediate frequency signals all maintain a fixed phase difference with the ADC acquisition clock, and also maintain a fixed phase difference with the ADC digital output clock. The three intermediate frequency signals of R, A, and B also maintain a fixed phase difference with the digital local oscillator NCO constructed by using the ADC digital output clock.

During the whole process of step (1)-step (5), the digital local oscillator NCO keeps running and cannot be interrupted, so as to ensure the correctness of the phase test.

In the present invention, the controller generates a switch control signal to control the switch of the channel switch according to the data storage situation and the sampling time. In the present invention, there is no need to switch the switch frequently, and only need to switch three times to complete one processing process.

A high-sampling-rate single-acquisition channel vector network analysis implementation system, including channel switches, ADCs, mixers, low-pass filters, data processors and data memory connected in sequence, and the mixer is also connected to a digital local oscillator NCO , the channel switch is connected to the radio frequency front end, and the controller is connected to the data memory and the channel switch.

The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention will not be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (7)

1. A method for realizing vector network analysis of a single acquisition channel with high sampling rate is characterized by comprising the following processes:

(1) When the signal is collected, the channel switch is switched to one of the three intermediate frequency signals of R, A and B;

(2) Sampling by an ADC (analog to digital converter), mixing one path of collected intermediate frequency signal with an externally input digital local oscillator NCO, performing low-pass filtering on the mixed signal, performing data processing and storing;

(3) After the set sampling time or the storage amount is reached, switching to another path of intermediate frequency signal by a channel switch, and executing the step (2);

(4) After the set sampling time or the storage amount is reached, the second path of intermediate frequency signal is acquired, the channel switch is switched to the last path of intermediate frequency signal, and the step (2) is executed, so that the acquisition of three paths of intermediate frequency signals is completed;

(5) And finally, calculating corresponding amplitude and phase information according to the three paths of data.

2. The method as claimed in claim 1, wherein the three intermediate frequency signals R, a, and B are all kept at a fixed phase difference from the ADC acquisition clock, and also kept at a fixed phase difference from the ADC digital output clock.

3. The method as claimed in claim 2, wherein the R, a, B three intermediate frequency signals and the digital local oscillator NCO constructed by the ADC digital output clock also maintain a fixed phase difference.

4. The method of claim 1, wherein the data processing in step (2) comprises decimation and filtering.

5. The method for realizing the vector network analysis of the single acquisition channel with the high sampling rate according to claim 1, wherein in the whole process from the step (1) to the step (5), the digital local oscillator NCO keeps running all the time.

6. The method of claim 1, wherein the controller generates the switch control signal to control the switching of the channel switch according to the data storage condition and the sampling time.

7. The system is characterized by comprising a channel switch, an ADC (analog to digital converter), a mixer, a low-pass filter, a data processor and a data memory which are sequentially connected, wherein the mixer is also connected with a digital local oscillator NCO, the channel switch is connected with a radio frequency front end, and a controller is connected with the data memory and the channel switch.

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