CN115514390B - Method, device and storage medium for generating frame structure of high-speed frequency hopping system - Google Patents

Abstract

The application discloses a design method, a device and a storage medium of a frame structure of a high-speed frequency hopping system, relates to the technical field of frequency hopping communication, and solves the problems that in the prior art, the probability of successful frame synchronization of a receiving end is low, and the complexity of a synchronization algorithm corresponding to a transmitting end frame structure is high. The method comprises the following steps: modulating a transmission signal to obtain transmission data; performing differential coding on the original PN sequence, and recombining the PN sequence subjected to differential coding according to rules to determine a recombination code; and inserting the recombination codes into the transmission data according to the frequency hopping frame structure to determine a transmission sequence. The method realizes the effects of low complexity of the frame synchronization algorithm, high synchronization processing efficiency, and strong anti-interference capability under the condition of serious human interference.

Description

High-speed frequency hopping system frame structure generation method, device and storage medium

Technical field

The present application relates to the field of frequency hopping communication technology, and in particular to a method, device and storage medium for generating a frame structure of a high-speed frequency hopping system.

Background technique

Frequency hopping spread spectrum technology is a spread spectrum method that discretely jumps the carrier frequency of a traditional narrowband modulation signal under the control of a pseudo-random sequence to achieve spectrum expansion. With the development of frequency hopping technology, the electromagnetic environment it faces becomes more and more complex, and the frequency and degree of interference of communication systems have greatly increased. High-speed frequency hopping technology is an effective measure to combat interference. High-speed frequency hopping technology refers to On the basis of the original frequency hopping system, the frequency hopping rate is increased so that the dwell time of each hop is less than the sum of the jammer's processing forwarding time and propagation delay, thereby avoiding malicious interference.

However, while the high-speed frequency hopping system requires high frequency modulation, it also puts forward higher requirements for the fine transmission rate and the data processing speed of the receiving end. Currently, existing methods only rely on detecting the correlation peaks of synchronization sequences to determine synchronization. Once the sequence is targeted and interfered, its correlation characteristics will be severely damaged, and the probability of successful synchronization at the receiving end will be significantly reduced, leading to communication interruption.

Contents of the invention

By providing a method, device, and storage medium for generating a frame structure of a high-speed frequency hopping system, the embodiments of the present application solve the problem of the low probability of successful frame synchronization at the receiving end and the high complexity of the synchronization algorithm corresponding to the frame structure at the transmitting end in the prior art. problem, the frame synchronization algorithm has low complexity and high synchronization processing efficiency. In the case of serious human interference, frame synchronization can still be achieved and the effect of strong anti-interference ability is achieved.

In a first aspect, embodiments of the present invention provide a method for generating a high-speed frequency hopping system frame structure. The method includes:

Modulate the sent signal to obtain the transmission data;

Perform differential encoding on the original PN sequence, recombine the differentially encoded PN sequence according to rules, and determine the recombination code;

The reassembly code is inserted into the transmission data according to the frequency hopping frame structure to determine the transmission sequence.

Combined with the first aspect, in a possible implementation, the modulating the transmission signal includes:

The transmission signal is encoded using a low code rate channel;

Perform random interleaving on the entire frame of the encoded transmission signal;

The interleaved transmission signals are mapped to determine the transmission data.

Combined with the first aspect, in a possible implementation, the original PN sequence is differentially encoded according to the following formula: where d _k represents the differentially encoded PN code, c _k represents the original PN code,/> Represents exclusive OR.

In conjunction with the first aspect, in one possible implementation, inserting the reassembly code into the transmission data according to a frequency hopping frame structure includes: dividing the reassembly code into equal lengths, and periodically Insert into the transmitted data.

With reference to the first aspect, in a possible implementation, the frequency hopping frame structure includes: time hopping, power control, synchronization sequence and the transmission data.

In a second aspect, embodiments of the present invention provide a device for generating a high-speed frequency hopping system frame structure, which is characterized by including:

The sending signal processing module is used to modulate the sending signal and obtain the transmission data;

The PN sequence processing module is used to differentially encode the original PN sequence, and recombine the differentially encoded PN sequence according to rules to determine the recombination code;

An output module is used to insert the recombination code into the transmission data according to the frequency hopping frame structure to determine the transmission sequence.

Combined with the second aspect, in a possible implementation, the transmission signal processing module is used to:

The transmission signal is encoded using a low code rate channel;

Perform random interleaving on the entire frame of the encoded transmission signal;

The interleaved transmission signals are mapped to determine the transmission data.

Combined with the second aspect, in a possible implementation, the PN sequence processing module differentially encodes the original PN sequence according to the following formula: where d _k represents the differentially encoded PN code, c _k represents the original PN code,/> Represents exclusive OR.

In conjunction with the second aspect, in a possible implementation manner, the output module divides the reassembly code into equal lengths and periodically inserts it into the transmission data.

Combined with the second aspect, in a possible implementation, the frequency hopping frame structure in the output module includes: time hopping, power control, synchronization sequence and the transmission data.

In a third aspect, embodiments of the present invention provide a wireless communication device, which includes a memory and a processor;

The memory is used to store computer-executable instructions;

The processor is configured to execute the computer-executable instructions to implement the first aspect and the method described in any one of the first aspects.

In a fourth aspect, embodiments of the present invention provide a computer-readable storage medium that stores executable instructions. When a computer executes the executable instructions, it can implement the first aspect and any of the first aspects. method described in one item.

One or more technical solutions provided in the embodiments of the present invention have at least the following technical effects or advantages:

The embodiment of the present invention adopts a method, device and storage medium for generating the frame structure of a high-speed frequency hopping system. The method includes modulating the transmission signal to obtain the transmission data; performing differential coding on the original PN sequence, and performing differential coding according to rules. The encoded PN sequence is reorganized to determine the reorganization code; the reorganization code is inserted into the transmission data according to the frequency hopping frame structure to determine the transmission sequence. Perform a differential operation on the original PN code, and the receiving end needs to perform a corresponding differential operation when synchronizing, making the synchronization algorithm insensitive to frequency offset and phase shift. At the same time, timing synchronization and information carrier information can be shared, without the need for additional frequency offset estimation. The algorithm has low complexity and high synchronization processing efficiency. In the above method, a multi-dimensional joint anti-interference technology that combines frequency domain, code domain and time domain is used for the transmission sequence. High-speed frequency hopping is used in the frequency domain, high-performance low code rate channel coding is used in the code domain, and random is used in the time domain. Interleaver, strong anti-interference ability. This method effectively solves the problem in the existing technology that the probability of successful frame synchronization at the receiving end is low and the synchronization algorithm corresponding to the frame structure at the transmitting end is highly complex. It achieves low complexity of the frame synchronization algorithm and high synchronization processing efficiency, which can be used in areas with serious human interference. In this case, frame synchronization and strong anti-interference ability can still be achieved.

Description of the drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that need to be used in describing the embodiments of the present invention or the prior art will be briefly introduced below. Obviously, the drawings in the following description These are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without exerting creative efforts.

Figure 1 is a flow chart of method steps provided by an embodiment of the present application;

Figure 2 is a flow chart of synchronization sequence generation provided by the embodiment of the present application;

Figure 3 is a schematic diagram of a device for generating a high-speed frequency hopping system frame structure provided by an embodiment of the present application;

Figure 4 is a schematic diagram of a wireless communication device provided by an embodiment of the present application.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

Frequency hopping spread spectrum technology is a spread spectrum method that discretely jumps the carrier frequency of a traditional narrowband modulation signal under the control of a pseudo-random sequence to achieve spectrum expansion. As frequency hopping technology is used more and more widely, the electromagnetic environment it faces becomes more and more complex. The probability and degree of interference in the communication system have greatly increased. It is necessary to focus on how to combat various malicious interferences and ensure the normal application of communication links. .

High-speed frequency hopping technology is an effective measure against malicious interference. It refers to increasing the frequency hopping rate based on the original frequency hopping system so that the residence time of each hop is less than the sum of the interfering jammer's processing forwarding time and propagation delay. In this way, when the interference signal arrives, the frequency hopping receiver has already started to receive the next hop, thus avoiding malicious interference.

High-speed frequency hopping systems not only require high frequency hopping frequencies, but also put forward higher requirements for information transmission rate and data processing speed at the receiving end. Most of the frame structures currently used are composed of pilots and data. When the number of hops of the signal is determined, the information transmission rate depends on the amount of information carried by each hop and the transmission efficiency. How to obtain better performance with as few pilots as possible is actually a question of how to design a frame structure with superior performance for high-speed frequency hopping systems. In a high-speed frequency hopping system, the frequency hopping rate is greater than 1000 hops/s, which requires that all signal processing for each hop at the receiving end must be completed within 1ms. The data processing time is very limited, which puts forward computational speed requirements for the synchronization algorithm. . Therefore, it is necessary to reduce the complexity of timing synchronization as much as possible, reduce the time-consuming synchronization processing, and thereby increase the processing speed of the receiving end.

The synchronization method based on training sequences is a timing synchronization method widely used in frequency hopping communications. This method takes advantage of the sharp autocorrelation curve and low cross-correlation of the training sequence to achieve precise synchronization of the received signal. Moreover, due to the good pseudo-randomness of the training sequence, this method can better resist broadband interference. However, this method only relies on detecting the correlation peak of the synchronization sequence to determine synchronization. Once the sequence is targeted and interfered, its original correlation characteristics will be severely damaged, and the probability of successful synchronization at the receiving end will be significantly reduced, leading to communication interruption.

Therefore, it is necessary to find a frame design for a high-speed frequency hopping communication system suitable for electronic countermeasures environments, and the synchronization algorithm corresponding to this frame structure is required to have low complexity.

In view of the problems existing in the existing technology, embodiments of the present invention provide a method for generating a frame structure of a high-speed frequency hopping system. The method includes the following steps S101 to S103. Figure 1 shows a schematic flow chart of the steps of this method. Figure 2 shows a flow chart of synchronization sequence generation provided by this application.

S101, modulate the transmission signal and obtain the transmission data.

S102: Perform differential encoding on the original PN sequence, reorganize the differentially encoded PN sequence according to rules, and determine the reorganization code.

S103. Insert the reassembly code into the transmission data according to the frequency hopping frame structure to determine the transmission sequence.

The method provided by this application is a frame structure of a decentralized synchronization method. The receiving end combines each hop to complete timing synchronization. In the case of severe artificial interference, frame synchronization can still be achieved and normal communication between the sending and receiving parties can be completed. When generating a synchronization sequence, a differential operation is performed on the original PN code. When synchronizing at the receiving end, a corresponding differential operation is required, making the synchronization algorithm insensitive to frequency offset and phase shift. At the same time, timing synchronization and information carrier synchronization information can be shared, without the need for additional frequency offset estimation. The algorithm has low complexity, high synchronization processing efficiency, and is suitable for various high-speed frequency hopping systems. The transmission signal adopts multi-dimensional joint anti-interference technology that combines the frequency domain, code domain and time domain. It adopts high-speed frequency hopping in the frequency domain, uses high-performance low code rate channel coding in the code domain, and uses a random interleaver in the time domain to improve its anti-interference capability. powerful.

Suppose the total length of the communication frame is L, the hop length is L1, and the power control length is L2, then the total length used to send the synchronization sequence and data part is N*Lblock, N is the total number of hops used for synchronization and data transmission, Lblock is the length of each hop. Each hop consists of frequency hopping switching and M-segment pilot blocks inserted into data blocks at regular intervals, Lblock=Lswitch+M*Ls+(M-1)*Ld. Lswitch is the length of frequency hopping switching, Ls is a short pilot length, and Ld is a short data length.

In step S101, the transmission signal is modulated, including: encoding the transmission signal using a low code rate channel; randomly interleaving the encoded transmission signal throughout the frame; mapping the interleaved transmission signal to determine transmission data. The total length of the sent signal is (M-1)*Ld*N.

Low code rate channel coding of the transmitted signal can realize channel adaptive equalization, diversity and frequency hopping functions. The modulated transmitted signal can ensure the normal operation of the mobile communication system under multipath and fading channel conditions.

In step S102, for the original PN code with a length of (M-1)*Ld*N, the reference bit d0 is set to 0, and the original PN code is differentially encoded bit by bit. The original PN sequence is differentially encoded according to the following formula: where d _k represents the differentially encoded PN code, c _k represents the original PN code,/> Represents exclusive OR.

In step S103, inserting the reassembly code into the transmission data according to the frequency hopping frame structure includes: dividing the reassembly code into equal lengths and inserting it into the transmission data periodically. The differentially encoded PN codes are reorganized according to rules. The reorganization rule is that M bits form a group, and the last bit of the previous group is the same as the first bit of the next group, that is, the beginning and the end are the same, which is expressed as:

A PN code of length Ls is generated as a spreading code, and the recombinant sequence of length M*N is spread by Ls times to obtain a synchronization sequence of length Ls*M*N.

Periodically adjusting the transmission data makes the synchronization algorithm insensitive to frequency offset and phase shift, and at the same time realizes the sharing of timing synchronization information carrier information. There is no need to perform additional frequency offset estimation, the complexity of the algorithm is greatly reduced, time for information processing is saved, and synchronization processing efficiency is high.

Although this application provides method operation steps as described in the embodiments or flow charts, more or less operation steps may be included based on conventional or non-inventive efforts. The sequence of steps listed in this embodiment is only one way of executing the sequence of many steps, and does not represent the only execution sequence. When the actual device or client product is executed, it may be executed sequentially or in parallel (for example, in a parallel processor or multi-threaded processing environment) according to the method shown in this embodiment or the accompanying drawings.

An embodiment of the present invention provides a device 300 for generating a high-speed frequency hopping system frame structure. As shown in Figure 3, the device includes: a transmission signal processing module 301, a PN sequence processing module 302, and an output module 303.

The transmission signal processing module 301 is used to modulate the transmission signal and obtain transmission data. The transmission signal processing module 301 is used to: encode the transmission signal using a low code rate channel; randomly interleave the encoded transmission signal throughout the frame; map the interleaved transmission signal to determine transmission data.

The PN sequence processing module 302 is used to perform differential encoding on the original PN sequence, reassemble the differentially encoded PN sequence according to rules, and determine the reorganization code. The PN sequence processing module 302 differentially encodes the original PN sequence according to the following formula: where d _k represents the differentially encoded PN code, c _k represents the original PN code,/> Represents exclusive OR.

The output module 303 is used to insert the reassembly code into the transmission data according to the frequency hopping frame structure to determine the transmission sequence. The output module 303 divides the recombination code into equal lengths and inserts it into the transmission data periodically. The frequency hopping frame structure includes: time hopping, power control, synchronization sequence and transmission data.

In the device provided by this application, the transmission signal is first transmitted to the transmission signal processing module 301, and the transmission data is encoded according to a specific frame structure. The transmission data generated after encoding is insensitive to frequency offset and phase shift, and Able to operate normally under multipath and fading channel conditions. In the PN sequence processing module 302, differential encoding and direct sequence spreading are first performed on the original PN sequence to generate a synchronization sequence. In the output module 303, the synchronization sequence is divided into equal lengths and inserted into the transmission data.

The devices or modules described in the above embodiments may be implemented by computer chips or entities, or by products with certain functions. For the convenience of description, when describing the above device, the functions are divided into various modules and described separately. When implementing this application, the functions of each module can be implemented in the same or multiple software and/or hardware. Of course, a module that implements a certain function can also be implemented by a combination of multiple sub-modules or sub-units.

The methods, devices or modules described in this application may be implemented in the form of computer readable program codes by a controller in any appropriate manner. For example, the controller may take the form of a microprocessor or processor and the storage may be provided by the (micro)processor. Computer-readable media, logic gates, switches, application-specific integrated circuits (English: Application Specific Integrated Circuit; abbreviation: ASIC), programmable logic controllers and embedded microcontrollers that execute computer-readable program code (such as software or firmware) In the form of a controller, examples of controllers include but are not limited to the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicone Labs C8051F320. The memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art also know that in addition to implementing the controller in the form of pure computer-readable program code, the controller can be completely programmed with logic gates, switches, application-specific integrated circuits, programmable logic controllers and embedded logic by logically programming the method steps. Microcontroller, etc. to achieve the same function. Therefore, this kind of controller can be considered as a hardware component, and the devices included therein for implementing various functions can also be considered as structures within the hardware component. Or even, the means for implementing various functions can be considered as structures within hardware components as well as software modules implementing the methods.

Some modules of the apparatus described herein may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, classes, etc. that perform specific tasks or implement specific abstract data types. The present application may also be practiced in distributed computing environments where tasks are performed by remote processing devices connected through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including storage devices.

An embodiment of the present invention provides a wireless communication device. As shown in Figure 4, the device includes a memory 401 and a processor 402; the memory 401 is used to store computer-executable instructions; the processor 402 is used to execute computer-executable instructions to implement A method for designing a frame structure of a high-speed frequency hopping system and a method for designing a frame structure of a high-speed frequency hopping system.

Embodiments of the present invention provide a computer-readable storage medium. The computer-readable storage medium stores executable instructions. When the computer executes the executable instructions, a design method for the frame structure of a high-speed frequency hopping system and a method for designing the frame structure of a high-speed frequency hopping system are provided. A method for any of the design methods.

The above storage media include but are not limited to random access memory (English: Random Access Memory; referred to as: RAM), read-only memory (English: Read-Only Memory; referred to as: ROM), cache (English: Cache), hard disk (English: Hard Disk Drive (abbreviation: HDD) or memory card (English: Memory Card). The memory may be used to store computer program instructions.

From the above description of the embodiments, those skilled in the art can clearly understand that the present application can be implemented by means of software plus necessary hardware. Based on this understanding, the essence of the technical solution of this application or the part that contributes to the existing technology can be embodied in the form of a software product, or can also be embodied in the implementation process of data migration. The computer software product can be stored in a storage medium, such as ROM/RAM, magnetic disk, optical disk, etc., and includes a number of instructions to cause a computer device (which can be a personal computer, mobile terminal, server, or network device, etc.) to execute the software product. Apply methods described in various embodiments or parts of embodiments.

Each embodiment in this specification is described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on its differences from other embodiments. This application may be used in whole or in part in any number of general or special purpose computer system environments or configurations. For example: personal computers, server computers, handheld devices or portable devices, tablet devices, mobile communication terminals, multi-processor systems, microprocessor-based systems, programmable electronic devices, network PCs, minicomputers, mainframe computers, including Distributed computing environment for any of the above systems or devices, etc.

The above embodiments are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments. The technical solution may be modified, or some or all of the technical features thereof may be equivalently replaced; and these modifications or substitutions shall not cause the essence of the corresponding technical solution to depart from the scope of the technical solution of this application.

Claims (5)

1. A method for generating a high-speed frequency hopping system frame structure, which is characterized by including: Modulate the transmission signal to obtain transmission data; the modulation of the transmission signal includes: The transmission signal is encoded using a low code rate channel; the encoded transmission signal is randomly interleaved throughout the frame; the interleaved transmission signal is mapped to determine the transmission data; The original PN sequence is differentially encoded, and the differentially encoded PN sequence is reorganized according to the rules to determine the recombination code; the reorganization rule is that M bits form a group, and the last bit of the previous group and the next group The first bit is the same; M represents the number of pilot blocks per hop; The original PN sequence is differentially encoded according to the following formula: Where _dk represents the differentially encoded PN code, _ck represents the original PN code,/> Represents exclusive OR; Inserting the reassembly code into the transmission data according to the frequency hopping frame structure to determine the transmission sequence; inserting the reassembly code into the transmission data according to the frequency hopping frame structure includes: performing equal-length processing of the reassembly code Evenly divided and periodically inserted into the transmission data. 2. The method according to claim 1, characterized in that the frequency hopping frame structure includes: time hopping, power control, synchronization sequence and the transmission data. 3. A device for generating a high-speed frequency hopping system frame structure, which is characterized by including: The transmission signal processing module is used to modulate the transmission signal and obtain the transmission data; the transmission signal processing module is used to: encode the transmission signal using a low code rate channel; and process the encoded transmission signal into the whole frame. Randomly interleave; map the interleaved transmission signals to determine the transmission data; The PN sequence processing module is used to differentially encode the original PN sequence, and recombine the differentially encoded PN sequence according to rules to determine the recombination code; the recombination rule is that M bits form a group, and the last bit of the previous group One bit is the same as the first bit of the next group; M represents the number of pilot blocks per hop; the PN sequence processing module differentially encodes the original PN sequence according to the following formula: Where _dk represents the differentially encoded PN code, _ck represents the original PN code,/> Represents exclusive OR; An output module is used to insert the recombination code into the transmission data according to the frequency hopping frame structure and determine the transmission sequence. The output module divides the reorganization code into equal lengths and inserts the transmission data periodically. middle. 4. A wireless communication device, characterized by including a memory and a processor; The memory is used to store computer-executable instructions; The processor is configured to execute the computer-executable instructions to implement the method according to any one of claims 1-2. 5. A computer-readable storage medium, characterized in that the computer-readable storage medium stores executable instructions, and when the computer executes the executable instructions, the method according to any one of claims 1-2 can be implemented. .