CN115483108A - In (I) 2 O 3 In-Sm-O heterojunction thin film transistor device and preparation method thereof - Google Patents

Abstract

An In disclosed In the present invention ₂ O ₃ the/In-Sm-O heterojunction thin film transistor device and the preparation method thereof adopt the aqueous solution method to prepare In ₂ O ₃ In-Sm-O heterojunction such that In ₂ O ₃ The interface of/In-Sm-O is continuous and smooth, no pinholes or hillocks exist In the film, and the atomic arrangement is very regular; and In ₂ O ₃ The growth of the In-Sm-O film on the film can reduce lattice mismatch, so that In ₂ O ₃ the/In-Sm-O film exhibited a better crystalline state. Meanwhile, sm doping can effectively reduce In ₂ O ₃ V of film _o Concentration, low V _o The In-Sm-O concentration acts as a passivation layer as a back channel layer to reduce interaction between the conductive channel and the atmosphereUsed for self-passivation. In is effectively promoted by the In-Sm-O self-passivation layer ₂ O ₃ Bias stability of/In-Sm-O TFT under bias action of 30min, V _TH Is within 0.8V, compared with the undoped In of the upper layer ₂ O ₃ The TFT (-11V) is significantly improved.

Description

A kind of In2O3/In-Sm-O heterojunction thin film transistor device and its preparation method

technical field

The invention relates to the technical field of thin film transistor devices, in particular to an In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device and a preparation method thereof.

Background technique

Thin-film transistors (TFTs) are key components in flat-panel display (FPD) applications, including active-matrix liquid crystal displays (AMLCDs) and active-matrix organic light-emitting diodes (AMOLEDs). In recent years, the increasing demand for higher resolution, larger screen size, and lower power consumption of FPDs has pushed conventional amorphous Si (a-Si) TFT technology to its limit.

Obviously, with the development of the times, people's demand for flat panel displays with higher resolution, larger screen size, better viewing effect and lower power consumption is increasing, and the traditional a-Si TFT technology can no longer meet the requirements of the device. performance requirements. TFTs made of metal oxide semiconductors hold great promise in future display technologies due to their high mobility, good transparency, and scalability. Commercial metal oxides are grown by physical vapor deposition techniques, but solution-based methods have received much attention in recent years. Compared with conventional vacuum techniques, solution processing has additional advantages, including cost-effectiveness, fabrication under atmospheric conditions, large-area fabrication, and easy tuning of film composition.

However, how to reduce defect states and improve electrical performance and stability is an urgent challenge for solution-based metal oxide TFTs. In order to solve the above problems, researchers have adopted a variety of methods, such as doping, component modification, using additives and novel post-processing, etc. However, these defect-prone oxides still affect the electron transport properties.

Therefore, the prior art still needs to be improved and developed.

Contents of the invention

In view of the above deficiencies in the prior art, the object of the present invention is to provide an In ₂ O ₃ /In-Sm-O heterojunction thin-film transistor device and its preparation method, aiming to solve the problems of metal oxide semiconductors produced by the existing methods. Defects are prone to occur, leading to the problem of low electron mobility of thin film transistor devices.

Technical scheme of the present invention is as follows:

A method for preparing an In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, comprising the steps of:

[In(NO ₃ ) ₃ ·xH ₂ O] and [Sm(NO ₃ ) ₃ ·xH ₂ O] were dissolved in water to prepare In-Sm-O precursor solution;

providing a substrate, and ultrasonically cleaning and drying the substrate;

cleaning the dried substrate with plasma, then coating the substrate with an In(NO ₃ ) ₃ solution, and performing the first annealing treatment to obtain an In ₂ O ₃ layer;

Plasma cleaning the In ₂ O ₃ layer, then coating the In-Sm-O precursor solution on the In ₂ O ₃ layer, and performing a second annealing treatment to obtain In-Sm -O layer;

On the In-Sm-O layer, two metal electrodes arranged at intervals are evaporated to prepare an In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device.

In the preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, the concentration of the In-Sm-O precursor solution is 0.02-0.2M.

The preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, wherein, the doping amount x of the Sm element in the In-Sm-O precursor solution is 0<x≤50 %.

The preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, wherein the substrate is composed of a silicon substrate and a SiO ₂ layer grown on the surface of the silicon substrate; The In(NO ₃ ) ₃ solution is coated on the side of the SiO ₂ layer away from the silicon substrate.

In the preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, the plasma is O ₂ plasma or H ₂ plasma.

The preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, wherein, the coating method is spin coating, and the rotation speed of the spin coating is 3000-4500rpm; the spin coating The duration is 20-40s.

The preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, wherein the annealing temperatures of the first annealing treatment and the second annealing treatment are both 250-400°C, The annealing time is 1~2h.

The preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, wherein the steps of ultrasonically cleaning and drying the substrate include:

The substrate was ultrasonically cleaned with acetone, ethanol, and deionized water for 10-15 min in sequence, and then dried with nitrogen.

In the preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, the metal electrode is an Al electrode, and the thickness of the Al electrode is 80-120 nm.

An In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device is prepared by using the preparation method of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device.

Beneficial effects: the present invention provides an In ₂ O ₃ /In-Sm-O heterojunction thin-film transistor device and its preparation method. The In ₂ O ₃ /In-Sm-O heterojunction is prepared by an aqueous solution method, so that In The interface of ₂ O ₃ /In-Sm-O is continuous and smooth, there are no pinholes or hillocks in the film, and the atoms are arranged very neatly; and growing In-Sm-O films on In ₂ O ₃ films can reduce lattice mismatch, This makes the In ₂ O ₃ /In-Sm-O thin film show better crystalline state. At the same time, Sm doping can effectively reduce the V _o concentration of the In ₂ O ₃ film, and the In-Sm-O with low V _o concentration acts as a passivation layer as the back channel layer to reduce the gap between the conductive channel and the atmosphere. The interaction acts as a self-passivation function. The In-Sm-O self-passive layer effectively improves the bias stability of In ₂ O ₃ /In-Sm-O TFT. Under the bias of 30min, the offset of V _TH is within 0.8V, compared with the upper layer Undoped In ₂ O ₃ TFT (~11V) has a significant improvement.

Description of drawings

FIG. 1 is a schematic diagram of the structure of the In ₂ O ₃ /In-Sm-O heterojunction TFT according to Example 1 of the present invention;

Fig. 2 is a GIXRD diffraction pattern diagram of In ₂ O ₃ /In-Sm-O thin films with different Sm doping amounts in Example 1 of the present invention;

(a) in Figure 3 is a TEM image of In ₂ O ₃ /In-Sm-O (20%) thin film; (b) in Figure 3 is a high-resolution In ₂ O ₃ /In-Sm-O (20% ) film TEM image;

4 is an XRR diagram of In ₂ O ₃ /In-Sm-O films with different Sm doping amounts in Example 1 of the present invention;

Figure 5 is the AFM images of In ₂ O ₃ /In-Sm-O with Sm doping amounts of 0%, 10%, 20%, and 30%;

(a) in Figure 6 is the transmission spectrum of In-Sm-O thin films with different Sm doping amounts; (b) in Figure 6 is the optical bandgap of In-Sm-O thin films with different Sm doping amounts picture;

(a) in Fig. 7 is the UPS spectrum of In ₂ O ₃ , In ₂ O ₃ /In-Sm-O (HJ representation) (20%) and In-Sm-O (20%); in Fig. 7 ( b) In ₂ O ₃ , In ₂ O ₃ /In-Sm-O (20%) and In-Sm-O (20%) partial enlarged view of the high binding energy cut-off edge; (c) in Figure 7 is In ₂ O ₃ , In ₂ O ₃ /In-Sm-O (20%) and In-Sm-O (20%) partial enlarged view of the low binding energy cut-off edge;

Fig. 8 is an energy band structure diagram of In ₂ O ₃ /In-Sm-O (20%) in Example 1 of the present invention;

Figure 9 is the transfer curve of In-Sm-O single-layer TFT with different Sm doping amounts;

(a) in Figure 10 is the In ₂ O ₃ /In-Sm-O TFT transfer characteristic curve of different Sm doping amounts in Example 1 of the present invention; (b)-(e) in Figure 10 is the implementation of the present invention The output characteristic curves corresponding to the Sm doping amounts of 0, 10%, 20%, and 30% in Example 1;

(a) in Fig. 11 is the mobility histogram of In ₂ O ₃ /In-Sm-O TFTs with different Sm doping amounts; (b) in Fig. 11 is In ₂ O ₃ /In-Sm-O TFTs with different Sm doping amounts The subthreshold swing histogram of In-Sm-O TFT; (c) in Figure 11 is the threshold voltage histogram of In ₂ O ₃ /In-Sm-O TFT with different Sm doping amounts;

Fig. 12 is the change of the field effect mobility of In ₂ O ₃ and In ₂ O ₃ /In-Sm-OTFT with the gate voltage and the fitting curve in Example 1 of the present invention;

(a) in Figure 13 is the surface carrier density and Hall mobility of In ₂ O ₃ /In-Sm-O versus temperature; (b) in Figure 13 is the carrier of In ₂ O ₃ Curves of areal density and Hall mobility versus temperature;

Fig. 14 is a schematic diagram of the volume packing model of In ₂ O ₃ /In-Sm-O (20%) TFT in Example 1 of the present invention;

Fig. 15 is a graph showing the change of the transfer curve of In ₂ O ₃ /In-Sm-OTFT with different Sm contents under the condition of PBS and the change of threshold voltage (ΔV _TH ) with the change of bias time;

Fig. 16 is a graph showing the change of the transfer curve of In ₂ O ₃ /In-Sm-OTFT with different Sm contents under NBS conditions and the relationship between the change of threshold voltage (ΔV _TH ) and the change of bias time.

detailed description

The present invention provides an In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device and its preparation method. In order to make the purpose, technical solution and effect of the present invention clearer and clearer, the present invention will be further described in detail below. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

In the embodiments and claims, unless the article is specifically limited, "a", "an", "the" and "the" may also include plural forms. If there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. Significance or implicitly indicates the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include at least one of these features.

It should be further understood that the word "comprising" used in the description of the present invention refers to the presence of said features, integers, steps, operations, elements and/or components, but does not exclude the presence or addition of one or more other features, Integers, steps, operations, elements, components, and/or groups thereof. The expression "and/or" used herein includes all or any elements and all combinations of one or more associated listed items.

Those skilled in the art can understand that, unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which this invention belongs. It should also be understood that terms, such as those defined in commonly used dictionaries, should be understood to have meanings consistent with their meaning in the context of the prior art, and unless specifically defined as herein, are not intended to be idealized or overly Formal meaning to explain.

Metal oxide TFTs are considered to be one of the most promising technologies for next-generation display technologies due to their high saturation mobility, good transparency, excellent uniformity, and reasonable electrical stability. Compared with conventional amorphous silicon (a-Si), metal oxide TFTs have higher saturation mobility and better long-term stability. Compared with low-temperature polysilicon (LTPS) TFTs, oxide TFTs have better large-area uniformity and lower manufacturing costs. Oxide TFT has the following advantages: (1) low processing temperature, even at room temperature; (2) high saturation mobility (10-50cm ² /Vs); (3) due to the wide bandgap of oxide semiconductors ( about 3.5eV), with good transparency; (4) excellent uniformity and surface flatness.

However, how to reduce defect states and improve electrical performance and stability is an urgent challenge for solution-based metal oxide TFTs.

The study found that the electrical performance of solution-based oxide TFTs can be effectively improved through the heterojunction channel, and the heterostructure can make full use of the output of the front channel layer (providing high μ _sat ) and the back channel layer (maintaining low I _OFF ). This characteristic is used to adjust the electrical performance of the device. More importantly, the two-dimensional electron gas formed on the finely designed oxide heterointerface can greatly enhance the saturation mobility of the device.

Based on this, the present invention provides a method for preparing an In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, comprising the steps of:

Step S10: dissolving [In(NO ₃ ) ₃ ·xH ₂ O] and [Sm(NO ₃ ) ₃ ·xH ₂ O] in water to prepare an In-Sm-O precursor solution;

Step S20: providing a substrate, and ultrasonically cleaning and drying the substrate;

Step S30: cleaning the dried substrate with plasma, then coating the substrate with an In(NO ₃ ) ₃ solution, and performing the first annealing treatment to obtain an In ₂ O ₃ layer;

Step S40: performing plasma cleaning on the In ₂ O ₃ layer, then coating the In-Sm-O precursor solution on the In ₂ O ₃ layer, and performing a second annealing treatment to obtain In-Sm-O layer;

Step S50: Evaporating two metal electrodes arranged at intervals on the In—Sm—O layer to manufacture an In ₂ O ₃ /In—Sm—O heterojunction thin film transistor device.

In this embodiment, the In-Sm-O layer is formed by doping In ₂ O ₃ with Sm, so that the In-Sm-O layer acts as a back channel layer and plays a role of self-passivation, and the stability of the device bias is also improved. Obtain significant improvement; and, growing In-Sm-O film on In ₂ O ₃ film can reduce the lattice mismatch, so that In ₂ O ₃ / In-Sm-O film shows a better crystalline state; at the same time, In There is a different band difference between ₂ O ₃ and In-Sm-O ( _ΔEC = 0.30eV), which makes 2DEG form at the interface of In ₂ O ₃ /In-Sm-O. Using mobility curve fitting and variable temperature Hall test, it is found that The single-layer In ₂ O ₃ TFT is TLC transmission, while the In ₂ O ₃ /In-Sm-O heterojunction TFT is PC transmission; after testing, the mobility of In ₂ O ₃ /In-Sm-O TFT is as high as 38.6% cm ² /Vs, SS is 0.7V/dec, I _on /I _off is 10 ⁷ . The study found that the significantly enhanced electron mobility of In ₂ O ₃ /In-Sm-O TFT is attributed to the formation of 2DEG (Two-dimensional electron gas) at the In ₂ O ₃ /In-Sm-O interface and the effect of volume stacking, The electron transport mechanism is changed, and the device mobility is greatly improved.

Specifically, the present embodiment utilizes a volume packing model to explain the enhancement effect of mobility in a heterostructure TFT. When a positive gate voltage is applied to the gate, carriers accumulate at the SiO ₂ /In ₂ O ₃ interface; the SiO ₂ /In ₂ O ₃ interface forms a conductive channel, and since the In ₂ O ₃ layer is as thin as 3nm, it conducts electricity The channel and 2DEG will overlap. On the one hand, the scattering of carriers can be reduced under PC conduction, so that the mobility and SS can be improved. On the other hand, the formation of 2DEG greatly increases the concentration of intermediate carriers in the conductive channel, and the mobility will be further enhanced.

In some embodiments, the concentration of the In-Sm-O precursor solution is 0.02-0.2M; the In-Sm-O precursor solution within this concentration range can be effectively spin-coated on the surface of In ₂ O ₃ An In-Sm-O layer with a continuous and smooth interface and no pinholes or hillocks in the film can be obtained, thereby producing a high-quality In ₂ O ₃ /In-Sm-O heterojunction film.

In a preferred embodiment, the concentration of the In-Sm-O precursor solution is 0.05M; the In-Sm-O precursor solution with a concentration of 0.05M grows In-Sm-O on the surface of the In ₂ O ₃ layer O thin film can reduce lattice mismatch and avoid defects.

In some embodiments, the doping amount x of the Sm element in the In-Sm-O precursor solution is 0<x≤50%; doping in the front channel layer film (In-Sm-O layer) The Sm element will reduce the oxygen vacancy concentration V _o in the film. When the Sm doping amount is greater than 50%, it will not only continue to reduce the carrier concentration of the In-Sm-O layer, but also increase the resistance of the gate. The contact barrier height between the aluminum metal and the In-Sm-O back channel layer will also increase enough to weaken the transmission characteristics of the high-mobility TFT device, thereby reducing the μ _sat of the corresponding device; when Sm is 0, At this time, the back channel layer (upper layer semiconductor) is intrinsic In ₂ O ₃ , and its energy band structure is the same as that of the lower layer, so heterojunction cannot be effectively formed, and 2DEG cannot be effectively formed at the interface. At the same time, intrinsic In ₂ O ₃ itself has many defects related to oxygen vacancies, which cannot effectively passivate the front channel layer (lower semiconductor). Therefore, when the doping amount x of the Sm element in the In-Sm-O precursor solution is 0<x≤50%, the In-Sm-O layer can be effectively used for self-passivation of the back channel layer The effect makes the bias stability of the device significantly improved.

In some embodiments, the substrate is composed of a silicon substrate and a _SiO2 layer grown on the surface of the silicon substrate; the _In2O3 layer is spin _- coated on the _SiO2 layer away from the silicon substrate side of the slice. Specifically, the silicon substrate is heavily doped p-type Si; the SiO ₂ layer is grown and formed by a thermal growth method, and in this embodiment, the thickness of the SiO ₂ layer is 100 nm, but not limited thereto, other thicker _SiO2 layers are also available.

Specifically, a SiO ₂ layer is grown on the surface of the silicon substrate, and the In(NO ₃ ) ₃ solution is coated on the side of the SiO ₂ layer away from the silicon substrate. When the gate is applied with a positive gate When the voltage is high, the carriers accumulate at the SiO ₂ /In ₂ O ₃ interface, and the SiO ₂ /In ₂ O ₃ interface forms a conductive channel, and since the thickness of the In ₂ O ₃ layer is only 3nm, the conductive channel and 2DEG will overlap, on the one hand, the scattering of carriers can be reduced under PC conduction, so that the mobility and SS can be improved; on the other hand, the formation of 2DEG can greatly increase the carrier concentration in the conductive channel, so that the mobility can be further improved enhanced.

In some embodiments, the plasma is O ₂ plasma or H ₂ plasma; in a preferred embodiment, in the step S30 and step S40, the substrate and the In ₂ O ₃ All layers are cleaned with O ₂ plasma for 3-10 minutes to effectively remove surface impurities.

In some embodiments, the coating method is spin coating, and the rotation speed of the spin coating is 3000-4500rpm; the duration of the spin coating is 20-40s; at this rotation speed and the duration of the spin coating, In ₂ O ₃ layer and In-Sm-O layer with uniform thickness and smooth interface can be prepared.

In some embodiments, the annealing temperature of the first annealing treatment and the second annealing treatment are both 250-400° C., and the annealing time is 1-2 hours.

In some embodiments, the steps of ultrasonically cleaning and drying the substrate include: sequentially ultrasonically cleaning the substrate with acetone, ethanol, and deionized water for 10-15 minutes, and then drying with nitrogen. Ultrasonic cleaning of the substrate with different solvents can remove some impurities in advance, and then treat with plasma, so that all impurities on the surface of the substrate can be removed to ensure the cleanliness of the substrate.

In some embodiments, the metal electrode is an Al electrode, and the thickness of the Al electrode is 80-120 nm.

In addition, the present invention also provides an In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device, using the preparation of the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device method made.

Examples are further given below to describe the present invention in detail. It should also be understood that the following examples are only used to further illustrate the present invention, and should not be construed as limiting the protection scope of the present invention. Some non-essential improvements and adjustments made by those skilled in the art according to the above contents of the present invention all belong to the present invention scope of protection.

Example 1

The preparation of In ₂ O ₃ /In-Sm-O heterojunction thin film transistor devices with Sm doping amounts of 0, 10%, 20%, and 30% includes the following steps:

Step S1, configuration of precursor solution: dissolve [In(NO ₃ ) ₃ ·xH ₂ O] and [Sm(NO ₃ ) ₃ ·xH ₂ O] in deionized water, and stir at room temperature for 1-2 hours to Prepare In-Sm-O precursor solution;

The concentration of the precursor solution used for preparing the front channel layer is 0.1M In(NO ₃ ) ₃ aqueous solution. The precursor solution used to prepare the back channel layer is a 0.05M In-Sm-O precursor solution, wherein the doping amounts of Sm are 0, 10%, 20%, and 30%, respectively. When the doping amount of Sm is 0, the precursor solution used to prepare the back channel layer is 0.1M In(NO ₃ ) ₃ aqueous solution.

Step S2, substrate cleaning: the substrate is heavy p-type Si with 100nm SiO ₂ thermally grown, that is, SiO ₂ /P ⁺⁺ Si substrate; and ultrasonic cleaning is performed for 10 to 15 minutes using acetone, ethanol, and deionized water in sequence , and blow dry with nitrogen.

Step S3, spin-coating In ₂ O ₃ layer: clean the cleaned substrate with O ₂ plasma for 3-10 minutes; then, spin-coat 0.1M In(NO ₃ ) ₃ aqueous solution on the SiO ₂ / The duration of the P ⁺⁺ Si substrate is 20-40s.

Step S4, the first annealing treatment: after the spin coating, the film is annealed on a heating platform at 250-400° C. for 1-2 hours.

Step S5, spin-coating In-Sm-O layer: After cleaning the annealed samples with O ₂ plasma for 3-10 minutes, spin-coat 0.05M In-Sm-O precursor solutions with different Sm doping amounts on the five groups of samples , and then annealed on a heating stage at 250-400°C for 1-2 hours to prepare In ₂ O ₃ /In-Sm-O heterogeneous materials with Sm doping amounts of 0, 10%, 20%, and 30%, respectively. Junction film.

Step S6, evaporating electrode: using a vacuum coater to form an Al electrode with a thickness of 80-120 nm, and preparing an In ₂ O ₃ /In-Sm-O heterojunction TFT device with the structure shown in FIG. 1 .

The properties of the prepared In ₂ O ₃ /In-Sm-O heterojunction thin films with Sm doping amounts of 0, 10%, 20%, and 30% were analyzed, as follows:

(1) Microstructure analysis of In ₂ O ₃ /In-Sm-O heterojunction thin films

Using XRD test, TEM test and AFM test, the microstructure of In ₂ O ₃ /In-Sm-O heterojunction film was studied, specifically: the XRD test results are shown in Figure 2, which can be seen from Figure 2, where The films with Sm doping amount of 0, 10, and 20% are all polycrystalline, but with the increase of Sm doping amount, the intensity of (2,2,2) main peak becomes weaker. Although the incorporation of Sm into the In ₂ O ₃ film makes the crystallinity worse, there is a weak (2,2,2) main peak in the XRD pattern of the In-Sm-O (20%) film, indicating that it is still in a crystalline state . The 0, 10, 20% doped In-Sm-O thin films show crystalline state, which may be because the prepared In-Sm-O thin films are thin, and the annealing is sufficient to help form the crystal structure. However, In-Sm-O (30%) is amorphous due to doping too much Sm.

In addition, the TEM test results of the In ₂ O ₃ /In-Sm-O film with a Sm doping amount of 20% are shown in Figure 3, and it can be observed that the In ₂ O ₃ /In-Sm-O (20%) heterogeneous The junction film is very flat, and the interface of In ₂ O ₃ /In-Sm-O is continuous and smooth, there are no pinholes or hillocks in the film, the atoms are arranged neatly, and the total thickness is about 4.5nm, which shows that the In ₂ O 3 prepared in this example ₃ /In-Sm-O heterojunction films are of very high quality, growing In-Sm-O films on In ₂ O ₃ films can reduce lattice mismatch, making In ₂ O ₃ /In-Sm-O films Shown as a better crystalline state. Figure 4 is the XRR pattern of In ₂ O ₃ /In-Sm-O heterojunction films with different Sm doping amounts, calculated by doping 0, 10, 20 and 30% In ₂ O ₃ /In-Sm The thicknesses of -O are 4.33, 4.41, 4.56, and 4.81 nm, respectively, which are similar to the films from the TEM test results, demonstrating the structural validity of the XRR calculations.

Figure 5 is the AFM image of In ₂ O ₃ /In-Sm-O heterojunction films with different Sm doping amounts, doped with 0, 10, 20 and 30% In ₂ O ₃ /In-Sm-O films The RMS were 0.23, 0.24, 0.25 and 0.29 nm, respectively, and all films were observed to be very smooth with excellent uniformity.

Therefore, it can be concluded that as the concentration of Sm in the In-Sm-O layer increases, the surface of the film hardly changes, and the quality of the film does not change significantly due to the secondary spin coating.

(2) Changes in the optical bandgap of the In-Sm-O layer

In order to study the change of optical bandgap of In-Sm-O layer with different Sm doping amount, UV-vis test was carried out, and the result is shown in Figure 6; (a) in Figure 6 is In-Sm-O with different Sm doping amount The transmission spectrum of the film shows that the transmittance of the film with 0-30% Sm doping amount is higher than 90% between 400 and 800 nm, showing good visible transmittance, indicating that the In-Sm-O film It has broad development prospects in transparent display technology. Figure 6 (b) is the optical bandgap diagram of In-Sm-O thin films with different Sm doping amounts. It can be seen that the optical bandgap of In-Sm-O thin films increases with the increase of Sm doping amount. , 20 and 30% In-Sm-O films have E _g of 3.41eV, 3.68eV, 3.78eV and 3.95eV, respectively, because Sm ₂ O ₃ (4.33eV) is compared to In ₂ O ₃ (3.42eV ) has a larger E _g .

(3) Band structure of In ₂ O ₃ /In-Sm-O thin films

In order to study the energy band structure of In ₂ O ₃ /In-Sm-O thin film, this example carried out UPS test on In ₂ O ₃ /In-Sm-O thin film, and combined In ₂ O ₃ and In-Sm-O (20%) the forbidden band width of the thin film, and obtain the conduction band energy level and the Fermi level position of In ₂ O ₃ /In-Sm-O (20%).

Firstly, the UPS spectra of In ₂ O ₃ , In-Sm-O (20%) and In ₂ O ₃ /In-Sm-O (20%) were tested. (a) in Figure 7 is In ₂ O ₃ , In -Sm-O (20%) and In ₂ O ₃ /In-Sm-O (20%) UPS full spectrum, where the cut-off edge E _cut-off at the high binding energy is the secondary electron cut-off region, reflecting the film The location of the Fermi level of , and its local enlarged view is shown in (b) in Figure 7. The cut-off edge E _VBM of low binding energy reflects the position of the valence band of the film, and its partial enlarged view is shown in (c) in Figure 7. The excitation light source of UPS in the test is He-I, and its energy is 21.2eV. The Fermi level (E _F ) of the film can be obtained by subtracting the energy of the excitation light source from the cut-off edge E _cut-off , and the valence band position (E _V ) is obtained by subtracting the cut-off edge E _VBM from _{EF .} E _g is the conduction band position (E _C ) of the substance, and the calculation formula is as follows:

EF＝E _cut-off -21.2eV

E _V =E _F -E _VBM

E _C ＝E _V +E _g

The UV-Vis test results show that the forbidden band width of In ₂ O ₃ is 3.41eV, and the forbidden band width of In-Sm-O (20%) is 3.78eV. From (b) in Figure 7, it can be concluded that the Fermi level of the In ₂ O ₃ /In-Sm-O heterojunction is -4.06eV, and from (c) in Figure 7, it can be concluded that In ₂ O The _EVBM of ₃ is 2.89eV, while the EVBM of In-Sm-O (20%) is _2.96eV . Combining the test results of UPS and UV-vis, the In ₂ O ₃ /In-Sm-O (20%) film The energy level structure of the In ₂ O ₃ /In-Sm-O (20%) heterojunction is shown in Fig. 8, and the conduction band forms an energy barrier of 0.30eV.

The performance analysis of In ₂ O ₃ /In-Sm-O heterojunction thin film transistor devices with Sm doping amounts of 0, 10%, 20%, and 30% was performed, as follows:

(1) In-Sm-O single-layer TFT performance

Figure 9 is the transfer curve of In-Sm-O single-layer TFT, and the μ and I _on /I _off of In-Sm-O single-layer TFT with different Sm doping amounts are summarized in Table 1. Undoped In ₂ O ₃ TFT has obvious switching performance, μ is 10.2cm ² /Vs, SS is 1.34V/dec, I _on /I _off is 6.95×10 ⁴ . While the off-state current of In-Sm-O (10%) single-layer TFT drops to 10 ^-8 A, although Sm doping can reduce O _V , thereby reducing I _off , but In-Sm-O (10%) single-layer TFT mobility also decreased significantly (1.6cm ² /Vs). Further increasing the Sm doping concentration, the characteristics of the TFT will be significantly reduced. When the Sm doping amount is higher than 20%, there is no transfer characteristic curve. This is because after the Sm doping concentration is greater than 20%, In-Sm-O (20 %) tend to exhibit insulator-like properties rather than conducting semiconductors.

(2) In ₂ O ₃ /In-Sm-O heterojunction TFT device performance

Figure 10 shows the transfer characteristic curves of In ₂ O ₃ /In-Sm-O TFTs with different Sm doping amounts and the corresponding output characteristic curves. The average values of electrical performance parameters are shown in Table 2. The μ _sat and V of 15 devices were measured The average values of _TH and SS and the distribution statistics are shown in Figure 11.

Due to the high carrier concentration of undoped In ₂ O ₃ TFT, the TFT will show high I _off (10 ^-7 A) and negative V _TH (-5V). In contrast, with the further increase of the Sm doping amount in the In-Sm-O layer, the V _TH of the In ₂ O ₃ /In-Sm-O TFT shifts to the positive direction, and in the In ₂ O ₃ /In-Sm In -O(30%) TFT, V _TH increased to 1.7V and I _off decreased to 10 ^-10 A. This is due to the increase of Sm doping amount, resulting in the increase of In-Sm-O layer resistance, so that V _TH shifts positively, and I _off decreases, indicating that the Sm doping amount in the In-Sm-O layer can be adjusted. V _TH , I _off to regulate.

In addition, the device mobility can be effectively improved by introducing the In ₂ O ₃ /In-Sm-O heterojunction. For the In ₂ O ₃ /In-Sm-O (20%) TFT device, μ increased to 38.6cm ² /Vs, SS value decreased to 0.7 V/dec, and I _on /I _off increased to 2.02×10 ⁷ . When the Sm doping amount is further increased to 30%, the mobility drops suddenly by 17.0cm ² /Vs, and the SS value is 0.5V/dec. This is because the overall resistance of the In ₂ O ₃ /In-Sm-O heterojunction semiconductor layer can be divided into three parts: vertical internal resistance, contact resistance and channel resistance. Contact series resistance is composed of vertical internal resistance and contact resistance, which has a significant impact on the performance of TFT. In general, larger contact series resistance reduces the μ and SS of the TFT. For the In-Sm-O back channel layer with relatively low Sm doping amount (such as In-Sm-O 20%), the small contact series resistance makes In ₂ O ₃ /In-Sm-O (20%) TFT able to have a higher mobility. However, as the Sm doping amount continues to increase (30%), it will lead to a higher contact series resistance. Higher contact series resistance leads to a drop in the voltage applied across the conducting channel, resulting in reduced I _DS and reduced device mobility (known as contact-limited behavior).

(3) Mechanism analysis of In ₂ O ₃ /In-Sm-O heterojunction TFT devices

Compared with In ₂ O ₃ TFT, the heterostructure of In ₂ O ₃ /In-Sm-O significantly improves the mobility of TFT. In order to study the mechanism of mobility enhancement, this embodiment conducts a TFT conduction model analysis. The conduction mechanism of oxide semiconductor TFT is composed of percolation conduction (PC) and trap-limited conduction (TLC). In both mechanisms, the field-effect mobility obeys the following exponent function:

μ _FE = K(V _GS - V _{TH, P} ) ^γ

where _VGS is the gate voltage, _VTH is the threshold voltage, and _VP is the percolation voltage, defined as the voltage at which PC transmission occurs. For the parameter K, it is mainly used to measure the strength of the potential barrier in PC transmission. For the parameter γ, the dominant conduction mechanism is used to distinguish different charge transport processes.

In this embodiment, the mobility of In ₂ O ₃ /In—Sm—O (20%) TFT and In ₂ O ₃ TFT is fitted, and the fitting result is shown in FIG. 12 . For In ₂ O ₃ /In-Sm-O (20%) TFT, in the low threshold voltage region (V _GS <15.6V), the K value of the fitting curve is 4.9, and the γ value is 0.69. The results show that in the low gate The voltage area is dominated by TCL conduction.

When the V _GS value exceeds 11.6V (V _P =11.6V), the same parameters are no longer applicable, the K value is 28.1, and the γ value is 0.09, indicating that the TCL conduction changes to the PC conduction as the gate voltage increases. For the TFT of In ₂ O ₃ , the curve can show: μ _FE =2.6(V _GS -V _TH ) ^0.67 , where the V _TH value is -4V, the K value is 2.6, and the γ value is 0.67, indicating that the In ₂ O ₃ TFT The transport mechanism is TLC. Compared with In ₂ O ₃ TFT, In ₂ O ₃ /In-Sm-O(20%) TFT exhibits a different electron conduction mechanism.

In order to further verify the electronic conduction mechanism, we conducted a variable temperature Hall test. Figure 13 shows the test results. In the temperature range of 10-300K, In ₂ O ₃ /In-Sm-O (20%) Hall mobility (μ _Hall ) is estimated to be about 25cm ² /Vs, which does not change significantly with temperature, and the surface carrier density remains unchanged, up to 4×10 ¹⁵ cm ^-2 . This temperature-independent behavior confirms that the electron transport mode of In ₂ O ₃ /In-Sm-O(20%) heterojunction is PC conduction. PC transport process shows that In ₂ O ₃ /In-Sm-O (20%) heterogeneous films should have higher carrier density. In addition, the carrier density in the In ₂ O ₃ /In-Sm-O (20%) heterogeneous film is comparable to the 2DEG density (10 ¹⁵ cm ^-2 ) at the interface reported by Lee et al. It is deduced that there may be 2DEG structure at the interface of In ₂ O ₃ /In-Sm-O(20%), which makes In ₂ O ₃ /In-Sm-O(20%) heterojunction TFT form a high-speed PC transmission process. As a comparison, the _{In 2} O ₃ film was also tested, and the Hall mobility and carrier surface density of the _{In 2} O ₃ film decreased as the temperature decreased. Lower TCL transfer process.

In order to analyze the 2DEG generation mechanism of In ₂ O ₃ /In-Sm-O(20%), combined with UPS and UV-vis test results, the band structure of In ₂ O ₃ /In-Sm-O(20%) was extracted . When the In ₂ O ₃ /In-Sm-O (20%) heterojunction is formed, the charges are redistributed in the metal oxide film, and a new Fermi level (-4.06eV) is established, and the energy band near the interface is due to Bending occurs due to the electric field formed by charge transfer. Since the conduction band edge of _In2O3 bends downward, forming a potential well, while the conduction band of In-Sm _- O (20%) bends upward, expelling electrons into the potential well, these electron accumulations will be confined to _{In2O 3} /In-Sm-O two-dimensional interface, a high-mobility transistor similar to the modulation-doped AlGaAs/GaAs heterojunction is formed, and these electrons constitute the 2DEG. Due to the large energy level difference (0.30eV) between the In ₂ O ₃ layer and the In-Sm-O layer, a layer of high charge carriers is bound on the XY plane of the In ₂ O ₃ /In-Sm-O heterointerface Concentrations of 2DEG are present.

Based on the above analysis, the volume packing model (FIG. 14) was used to explain the mobility enhancement effect in the heterostructure TFT. When a positive gate voltage is applied to the gate, carriers accumulate at the SiO ₂ /In ₂ O ₃ interface. The SiO ₂ /In ₂ O ₃ interface forms a conductive channel. Since the In ₂ O ₃ layer is as thin as 3nm, the conductive channel and 2DEG will overlap. On the one hand, the scattering of carriers can be reduced under PC conduction, making the migration Rate and SS are improved. On the other hand, the formation of 2DEG greatly increases the carrier concentration in the conductive channel, and the mobility will be further enhanced.

(4) Device stability of In ₂ O ₃ /In-Sm-O heterojunction TFT

In order to evaluate the bias stability of In ₂ O ₃ /In-Sm-O heterojunction TFT. The PBS and NBS tests were carried out, and the test results are shown in Figures 15-16, and the V _TH variation (ΔV _TH ) with the bias time is plotted. Under the effect of PBS, V _TH shifts to the positive direction. After introducing the In-Sm-O layer, the stability of PBS is improved, and ΔV _TH is reduced from 10V to 0.5V. The NBS of the similar In ₂ O ₃ /In-Sm-O heterojunction TFT is also significantly improved, and ΔV _TH is reduced from -12V to -0.8V. The shift of V _TH is mainly due to the adsorption of O ₂ or H ₂ O on the surface caused by V _o after the surface of the semiconductor layer interacts with air. Sm doping can effectively reduce the V _o concentration of the In ₂ O ₃ film, and the low V _o concentration In-Sm-O acts as a passivation layer as the back channel layer to reduce the interaction between the conductive channel and the atmosphere. role, play a role in self-passivation. Therefore, the positive and negative bias stability of In ₂ O ₃ /In-Sm-O heterojunction TFT is greatly improved with the increase of Sm doping amount.

In summary, the In ₂ O ₃ /In-Sm-O heterojunction thin film transistor device and its preparation method provided by the present invention have the following advantages:

(1) According to the results of AFM, TEM, and XRD, the In ₂ O ₃ /In-Sm-O (20%) heterojunction film is a polycrystalline structure with a thickness of about 4.5nm. The atoms are neatly arranged and the surface roughness is not A significant change occurs, about 0.25nm, indicating that the aqueous solution method can simply and quickly prepare high-quality In ₂ O ₃ /In-Sm-O heterojunction thin films.

(2) Compared with single-layer In-Sm-O TFT, the mobility of In ₂ O ₃ /In-Sm-O(20%) TFT is significantly improved, μ _sat =38.6cm ² /Vs, I _on /I _off =2.02×10 ⁷ , SS=0.7V/dec, V _TH =1.6V. The In-Sm-O self-passive layer effectively improves the bias stability of In ₂ O ₃ /In-Sm-O TFT. Under the bias of 30min, the offset of V _TH is within 0.8V, compared with the upper layer Undoped In ₂ O ₃ TFT (~11V) has a significant improvement.

(3) Through the analysis of UPS results, it is found that there is a conduction band difference between In ₂ O ₃ and In-Sm-O (ΔE _C =0.30eV), which makes 2DEG form at the interface of In ₂ O ₃ /In-Sm-O. Using the mobility curve fitting and variable temperature Hall test, it is found that the single-layer In ₂ O ₃ TFT is TLC transmission, while the In ₂ O ₃ /In-Sm-O heterojunction TFT is PC transmission.

It should be understood that the application of the present invention is not limited to the above examples, and those skilled in the art can make improvements or transformations according to the above descriptions, and all these improvements and transformations should belong to the protection scope of the appended claims of the present invention.

Claims (10)

1. In ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized by comprising the following steps of:

will [ In (NO) ₃ ) ₃ ·xH ₂ O]And [ Sm (NO) ₃ ) ₃ ·xH ₂ O]Dissolving In water to prepare an In-Sm-O precursor solution;

providing a substrate, and carrying out ultrasonic cleaning and blow-drying on the substrate;

cleaning the blow-dried substrate with plasma, and then washing In (NO) ₃ ) ₃ Coating the solution on the substrate, and carrying out primary annealing treatment to obtain In ₂ O ₃ A layer;

for the In ₂ O ₃ Plasma cleaning the layer, and coating the In-Sm-O precursor solution on the In ₂ O ₃ Carrying out secondary annealing treatment on the layer to obtain an In-Sm-O layer;

two metal electrodes arranged at intervals are vapor-plated on the In-Sm-O layer to prepare In ₂ O ₃ the/In-Sm-O heterojunction thin film transistor device.

2. In according to claim 1 ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized In that the concentration of the In-Sm-O precursor solution is 0.02-0.2M.

3. In according to claim 1 ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized In that the doping amount x of the Sm element In the In-Sm-O precursor solution is 0<x≤50％。

4. In according to claim 1 ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized In that the substrate consists of a silicon substrate and SiO grown on the surface of the silicon substrate ₂ Layer composition; said In (NO) ₃ ) ₃ Solution coating of the SiO ₂ The side of the layer facing away from the silicon substrate.

5. The In of claim 1 ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized In that the plasma is O ₂ Plasma or H ₂ Plasma is generated.

6. In according to claim 1 ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized In that the coating mode is spin coating, and the rotating speed of the spin coating is 3000-4500 rpm; the duration of the spin coating is 20-40 s.

7. In according to claim 1 ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized In that the annealing temperatures of the first annealing treatment and the second annealing treatment are both 250-400 ℃, and the annealing time is 1-2 hours.

8. The method of claim 1In ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized In that the steps of carrying out ultrasonic cleaning and blow-drying on the substrate comprise:

and ultrasonically cleaning the substrate by acetone, ethanol and deionized water for 10-15 min respectively in sequence, and then drying by using nitrogen.

9. The In of claim 1 ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device is characterized In that the metal electrode is an Al electrode, and the thickness of the Al electrode is 80-120 nm.

10. In ₂ O ₃ In-Sm-O heterojunction thin film transistor device using In according to any of claims 1 to 9 ₂ O ₃ The preparation method of the/In-Sm-O heterojunction thin film transistor device.

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