CN115480971A - A test card, test method, device and medium for NVMe hard disk backplane - Google Patents

Abstract

The application discloses a test card, a test method, a test device and a test medium of an NVMe hard disk back plate, which are applied to the technical field of servers. The NVMe hard disk back plate is connected with the server mainboard, an NVMe hard disk interface of the NVMe hard disk back plate is connected with a male head interface, the male head interface is connected with a female head interface arranged on the PCIe Switch chip, and the server mainboard sends a test signal to the PCIe Switch chip; and then the fault of the NVMe hard disk back plate can be determined according to the feedback information. This application replaces PCIeNVME hard disk with PCIe Switch chip and is connected with NVMe hard disk backplate, then sends test signal with the same mode, accomplishes the test of NVMe hard disk backplate, and PCIe Switch chip's cost is lower than PCIe NVMe hard disk, has reduced the test cost of NVMe hard disk backplate.

Description

A test card, test method, device and medium for NVMe hard disk backplane

technical field

The present application relates to the technical field of servers, in particular to a test card, a test method, a device and a medium of an NVMe hard disk backplane.

Background technique

High-speed serial computer expansion bus standard (Peripheral Component Interconnect Express, PCIe) is a high-speed serial computer expansion bus standard, non-volatile memory host controller interface specification (NVMExpress, NVMe) is a logical device interface specification, PCIe NVMe A hard disk is a hard disk based on the NVMe interface specification of PCIe signals. With the rapid popularization and mass application of PCIe NVMe hard disks, the design scale of NVMe hard disk backplanes in servers is getting larger and larger, and the number of supported PCIe NVMe hard disks is increasing. After the NVMe hard disk backplane is processed, a functional test is required. Figure 1 is a schematic structural diagram of the test device for the current NVMe hard disk backplane; Power on and check whether the PCIe NVMe hard disk is recognized and functions normally.

However, a large number of PCIe NVMe hard drives need to be used in the test, and repeated long-term multiple tests of plugging and unplugging and powering on and off will cause a certain amount of loss of PCIe NVMe hard drives. Due to the high unit price of PCIe NVMe hard drives, the testing cost is high.

It can be seen that how to reduce the test cost of the NVMe hard disk backplane is an urgent problem to be solved by those skilled in the art.

Contents of the invention

The purpose of this application is to provide a test card, test method, device and medium for an NVMe hard disk backplane, so as to reduce the test cost of the NVMe hard disk backplane.

In order to solve the above-mentioned technical problems, the application provides a test card for an NVMe hard disk backplane, including: a PCIeSwitch chip, a male interface, and a female interface;

The PCIe Switch chip is connected to the male interface through the female interface, the male interface is connected to the NVMe hard disk interface of the NVMe hard disk backplane, and the NVMe hard disk backplane is connected to the server motherboard; Server motherboard is used to generate test signal; And send described test signal to described PCIe Switch chip through the cable between described NVMe hard disk backplane and described PCIe Switch chip; Then determine according to the feedback information of described test signal The NVMe hard disk backplane is faulty.

Preferably, it also includes: a power module;

The power supply module is used to convert the electrical signal sent by the server motherboard into the standard voltage of the PCIe Switch chip to supply power to the PCIe Switch chip.

In order to solve the above-mentioned technical problems, the application also provides a test method of an NVMe hard disk backplane, which is applied to a test card comprising a PCIe Switch chip, a male interface, and a female interface; the PCIe Switch chip communicates with the The male interface is connected, the male interface is connected with the NVMe hard disk interface of the NVMe hard disk backplane, and the NVMe hard disk backplane is connected with the server motherboard; the method includes:

generate test signals;

Send the test signal to the PCIe Switch chip through the cable between the NVMe hard disk backplane and the PCIe Switch chip;

Determining the fault of the NVMe hard disk backplane according to the feedback information of the test signal.

Preferably, determining the failure of the NVMe hard disk backplane according to the feedback information of the test signal comprises:

After sending the test signal, if the server motherboard does not detect the insertion of the PCIe Switch chip, it is determined that there is a fault in the NVMe hard disk backplane.

Preferably, determining the failure of the NVMe hard disk backplane according to the feedback information of the test signal comprises:

If the transmission bandwidth of the test signal does not meet the preset bandwidth range, it is determined that there is a fault in the NVMe hard disk backplane.

Preferably, determining the failure of the NVMe hard disk backplane according to the feedback information of the test signal comprises:

If the transmission rate of the test signal does not meet the preset rate range, it is determined that there is a fault in the NVMe hard disk backplane.

Preferably, the types of the test signal include: I2C signal and CLK signal.

In order to solve the above-mentioned technical problems, the application also provides a test device for an NVMe hard disk backplane, which is applied to a test card including a PCIe Switch chip, a male interface, and a female interface; the PCIe Switch chip communicates with the The male interface is connected, the male interface is connected with the NVMe hard disk interface of the NVMe hard disk backplane, and the NVMe hard disk backplane is connected with the server motherboard; the device includes:

A generation module is used to generate a test signal;

A sending module, configured to send the test signal to the PCIe Switch chip through a cable between the NVMe hard disk backplane and the PCIe Switch chip;

A determination module is configured to determine the fault of the NVMe hard disk backplane according to the feedback information of the test signal.

In order to solve the above-mentioned technical problems, the present application also provides a test device for an NVMe hard disk backplane, including: a memory for storing computer programs;

The processor is used to implement the steps of the test method for the above-mentioned NVMe hard disk backplane when executing the computer program.

In order to solve the above-mentioned technical problems, the present application also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the above-mentioned NVMe hard disk backplane test method is realized. step.

The NVMe hard disk backplane test card provided in this application is connected to the server mainboard, and the server mainboard is used to generate and send test signals. Because the PCIe Switch chip does not have a dedicated connection interface, the PCIe Switch chip is provided with a female interface, and the NVMe hard disk interface on the NVMe hard disk backplane is connected to the male interface, and the male interface is connected to the female interface set on the PCIe Switch chip. , the server motherboard can send a test signal to the PCIe Switch chip. The main board of the server generates a test signal; then sends the test signal to the PCIe Switch chip through the cable between the NVMe hard disk backplane and the PCIe Switch chip; finally determines the fault of the NVMe hard disk backplane according to the feedback information of the test signal. The PCIe Switch chip is a PCIe signal expansion switching chip, which is similar to the signal transmission mode of the PCIe NVMe hard disk. Therefore, this application replaces the PCIe NVMe hard disk with the PCIe Switch chip, that is, uses the PCIe Switch chip to connect to the NVMe hard disk backplane, and then uses the same The way to send test signals can also realize the test of the NVMe hard disk backplane, and the cost of the PCIe Switch chip is lower than that of the PCIe NVMe hard disk, thereby reducing the test cost of the NVMe hard disk backplane.

The present application also provides a test method for the NVMe hard disk backplane, which is applied to the test card of the above-mentioned NVMe hard disk backplane, so it has the same beneficial effect as the above-mentioned test card.

The present application also provides a test device for an NVMe hard disk backplane and a computer-readable storage medium, which correspond to the above method, and thus have the same beneficial effect as the above method.

Description of drawings

In order to illustrate the embodiments of the present application more clearly, the following will briefly introduce the accompanying drawings used in the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. As far as people are concerned, other drawings can also be obtained based on these drawings on the premise of not paying creative work.

Fig. 1 is the structural schematic diagram of the testing device of NVMe hard disk backplane at present;

Fig. 2 is the simplified structural schematic diagram that a kind of test card that the embodiment of the application provides is connected with NVMe hard disk backplane;

Fig. 3 is the interface diagram of a kind of test card provided by the embodiment of the present application;

Fig. 4 is the concrete structural representation that a kind of test card that the embodiment of the application provides is connected with NVMe hard disk backboard;

Fig. 5 is the flow chart of the testing method of a kind of NVMe hard disk backplane that the embodiment of the application provides;

Fig. 6 is the structural diagram of the testing device of the NVMe hard disk backplane that the embodiment of the present application provides;

FIG. 7 is a structural diagram of a testing device for an NVMe hard disk backplane provided by another embodiment of the present application.

detailed description

The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of this application.

The core of the application is to provide a test card, test method, device and medium for an NVMe hard disk backplane, so as to reduce the test cost of the NVMe hard disk backplane.

In order to enable those skilled in the art to better understand the solution of the present application, the present application will be further described in detail below in conjunction with the drawings and specific implementation methods.

The embodiment of the present application is mainly to design a test card of NVMe hard disk backplane, which is the design of NVMe hard disk backplane application based on server platform, and is used for factory function test of NVMe hard disk backplane in server. PCIe NVMe hard disk is compared with SAS Hard disk (Serial Attached SCSI) and solid state disk (Solid State Disk, SSD) have the advantages of faster read and write speed, lower delay, and stronger performance. With the advancement of technology, the application of NVMe hard drives is becoming more and more common, the price is gradually decreasing, and the cost performance is gradually improving. In the new generation of server products, a complete NVMe hard disk design has appeared, that is, only NVMe hard disks are supported, and SAS, SSD or mechanical hard disks are not supported. NVMe is a logical device interface specification, which is similar to the Advanced Host Controller Interface (AHCI), a bus transmission protocol specification based on the device logic interface (equivalent to the application layer in the communication protocol), used to access Non-volatile memory media attached via the PCIe bus.

Fig. 2 is a simplified schematic diagram of the connection between a test card and the NVMe hard disk backplane provided by the embodiment of the present application; The female interface is connected to the male interface, the male interface is connected to the NVMe hard disk interface of the NVMe hard disk backplane 1, and the NVMe hard disk backplane is connected to the server mainboard; the server mainboard is used to generate test signals; and through the NVMe hard disk backplane 1 and The cable between the PCIe Switch chips 2 sends the test signal to the PCIe Switch chip 2; then the fault of the NVMe hard disk backplane 1 is determined according to the feedback information of the test signal. That is, this application provides a test card design for NVMe hard disk backplane, which can be used for functional testing after the NVMe hard disk backplane PCBA is processed, avoiding the use and consumption of high-cost NVMe hard disks. PCBA is Printed Circuit Board Assembly, which is a printed circuit board assembly. Board (Printed Circuit Board, PCB) empty board via Surface Mounted Technology (Surface Mounted Technology, SMT) upper part or dual inline-pinpackage (dual inline-pinpackage, DIP) plug-in. In one of the solutions of the embodiment of the present application, the PCIe Gen4Switch (PCIe 4.0Switch) can be used on the test card to simulate the PCIe NVMe hard disk, and the test card can include 8 SFF-8639 female interfaces (CONN1-CONN8), and include 8 SFF-8639 high-speed cable with male interface. Insert one end of the cable into the female interface of the test card, and use the SFF-8639 male interface at the other end of the cable to connect the SFF-8639 female interface of the NVMe hard disk backplane. The designed test card can simulate 8 PCIe NVMe hard disks to realize hard disk For functional testing of the backplane, this test card can not only achieve the purpose of functional testing but also greatly reduce the cost of testing. Among them, SFF-8639, also known as U.2, is a hard disk interface standard under SNIA and supports PCIeNVMe hard disks. The solutions of the embodiments of the present application are not limited to the examples provided, and improvements without creative labor on this basis are within the scope of protection of the present application.

In order to solve the problem of high test costs caused by the lack of a dedicated test card when performing functional tests on the NVMe hard disk backplane in the server, only PCIeNVMe hard disks can be used for testing, this embodiment defines a NVMe hard disk backplane test card design. Taking one of the specific cases as an example here, Fig. 3 is a schematic diagram of the interface of a test card provided by the embodiment of the present application; as shown in Fig. 3 , the test card 3 includes a PCIe Switch chip 2, eight SFF-8639 mother connectors (CONN1-CONN8), 8 high-speed cables with SFF-8639 male connectors, 4 power modules, etc. Among them, the PCIe Switch chip 2 can specifically adopt the PCIeGen4 Switch chip, and the PCIe Gen4 Switch chip can select 52line PCIe signal or more line number chips to simulate the PCIe NVMe hard disk. The PCIe Gen4 Switch chip is divided into 8 groups of PCIe4.0x4 signals, respectively connected to 8 SFF-8639 female interfaces (CONN1-CONN8) in the test card 3, where CONN1-CONN4 includes I2C signals, CLK signals, electrical signals, etc., CONN5-CONN8 Including I2C signals, electrical signals, etc. Fig. 4 is the specific structural representation that a kind of test card that the embodiment of the application provides is connected with NVMe hard disk backboard; As shown in Fig. 4, cable 1 to cable 8 are respectively connected with 1 SFF-8639 male interface, finally through The SFF-8639 male interface is connected to the SFF-8639 hard disk interface in the NVMe hard disk backplane 1 to realize the transmission of PCIE4.0 signals, I2C signals, CLK signals, and P12V and P5V power supply signals. Among them, the P12V and P5V electrical signals in the NVMe hard disk backplane 1 are transmitted to the test card 3 through the cable 1-cable 8, and the power module 4 in the test card 3 converts the P12V power into 1.8V, 0.84V and other levels to supply power to PCIe Switch chip 2. Through the design of the test card, it can support up to 8 NVMe hard disk interface function tests, replacing 8 PCIe NVMe hard disks. The cost of the test card 3 is about 80% lower than that of 8 NVMe hard disks. The cable is connected to the SFF-8639 male interface design method. When the interface is damaged after multiple plugging and unplugging, the cable can be replaced separately, reducing the maintenance cost of the test card 3, and the comprehensive test consumption cost is reduced by more than 85%. To sum up, the test card 3 proposed in the embodiment of the present application can realize the PCIe signal function test of the NVMe hard disk backplane 1, support the highest rate of PCIe4.0, and effectively reduce the test consumption cost. In the solution provided in this example, the structure of the test card 3 is not limited to the above-mentioned interface, and the PCIe Gen4Switch chip can choose a chip with 52line PCIe signals or more lines, and realize the function through peripheral circuit design. In actual application, the number of PCIe NVMe hard disks simulated by PCIe Switch chip 2 is not limited, and the model of PCIe Switch chip 2 can be adjusted according to actual needs. For example, PCIe Switch chip 2 with different line numbers can support different NVMe hard disk interface designs. Use PCIe Switch chips 2 and cables with different speeds can support NVMe hard disk backplane tests with different speeds. For example, PCIe5.0 Switch chips support PCIe5.0 NVMe hard disk backplane tests.

When the server NVMe hard disk backplane PCBA processing is completed and the functional test is performed, the NVMe hard disk backplane is directly connected to the server main board or connected to the hard disk backplane cable in the server to enter the state to be tested. Connect the test card to the NVMe hard disk backplane through the SFF-8639 male interface high-speed cable, and the test card can simulate the PCIe NVMe hard disk for testing. The types of test signals include: I2C signal, CLK signal, connect the female interface and male interface between the NVMe hard disk backplane and the PCIe Switch chip through cables, so as to realize the signal transmission between the NVMe hard disk backplane and the PCIe Switch chip , and then determine the fault of the NVMe hard disk backplane according to the feedback information of the test signal. The specific fault determination methods include: 1. If the server motherboard does not detect the insertion of the PCIe Switch chip after the test signal is sent, it is determined that the NVMe hard disk backplane exists Fault. 2. If the transmission bandwidth of the test signal does not meet the preset bandwidth range, it is determined that the NVMe hard disk backplane is faulty. 3. If the transmission rate of the test signal does not meet the preset rate range, it is determined that the NVMe hard disk backplane is faulty.

In the test card for the NVMe hard disk backplane provided in the embodiment of the present application, the NVMe hard disk backplane is connected to a server mainboard, and the server mainboard is used to generate and send test signals. Because the PCIe Switch chip does not have a dedicated connection interface, the PCIe Switch chip is provided with a female interface, and the NVMe hard disk interface on the NVMe hard disk backplane is connected to the male interface, and the male interface is connected to the female interface set on the PCIe Switch chip. , the server motherboard can send a test signal to the PCIeSwitch chip. The server mainboard generates a test signal; then sends the test signal to the PCIe Switch chip through the cable between the NVMe hard disk backplane and the PCIeSwitch chip; finally determines the fault of the NVMe hard disk backplane according to the feedback information of the test signal. The PCIe Switch chip is a PCIe signal expansion switching chip, which is similar to the signal transmission mode of the PCIeNVMe hard disk. Therefore, in the embodiment of the present application, the PCIe NVMe hard disk is replaced by the PCIe Switch chip, that is, the PCIe Switch chip is connected to the NVMe hard disk backplane, and then the PCIe Switch chip is connected to the NVMe hard disk backplane. Sending the test signal in the same way can also realize the test of the NVMe hard disk backplane, and the cost of the PCIe Switch chip is lower than that of the PCIe NVMe hard disk, thereby reducing the test cost of the NVMe hard disk backplane.

In actual testing, the PCIe Switch chip needs power supply, and the power supply method is not limited. This embodiment provides a specific solution. The PCIe Switch chip includes a power supply module; The cable sends the electrical signal to the power module, so that the power module converts the electrical signal into a standard voltage of the PCIe Switch chip to supply power to the PCIe Switch chip. As shown in Figure 4, the P12V and P5V electrical signals in the NVMe hard disk backplane 1 are transmitted to the test card 3 through the cable 1-cable 8, and the power module 4 in the test card 3 converts the P12V to 1.8V, 0.84 V and other levels to supply power to PCIe Switch chip 2.

In order to solve the above technical problems, the embodiment of the present application also provides a test method for an NVMe hard disk backplane, which is applied to a test card including a PCIe Switch chip, a male interface, and a female interface; the PCIe Switch chip is connected to the male interface through the female interface. The interface is connected, the male interface is connected with the NVMe hard disk interface of the NVMe hard disk backplane, and the NVMe hard disk backplane is connected with the server motherboard; 5, the method includes the following steps:

S10: Generate a test signal.

S11: Send the test signal to the PCIe Switch chip through the cable between the NVMe hard disk backplane and the PCIe Switch chip.

S12: Determine the fault of the NVMe hard disk backplane according to the feedback information of the test signal.

Since the embodiments of the method part are applied to the above-mentioned test card, please refer to the description of the embodiment of the test card part for the embodiments of the method part, and details are not repeated here.

The test method for the NVMe hard disk backplane provided in this embodiment is applied to the above-mentioned test card, so it has the same beneficial effect as the above-mentioned test card.

The purpose of this application is to test the NVMe hard disk backplane, that is, to find the fault in the NVMe hard disk backplane. After sending the test signal, the fault of the NVMe hard disk backplane can be determined in the following way: 1. If after sending the test signal, if If the server mainboard does not detect the insertion of the PCIe Switch chip, it is determined that the NVMe hard disk backplane is faulty. 2. If the transmission bandwidth of the test signal does not meet the preset bandwidth range, it is determined that the NVMe hard disk backplane is faulty. 3. If the transmission rate of the test signal does not meet the preset rate range, it is determined that the NVMe hard disk backplane is faulty. After it is determined that the NVMe hard disk backplane is faulty, the faulty NVMe hard disk backplane can also be marked, so that the staff can quickly find the faulty NVMe hard disk backplane and repair it.

In the foregoing embodiments, the method for testing the NVMe hard disk backplane is described in detail, and the present application also provides corresponding embodiments of the testing device for the NVMe hard disk backplane. It should be noted that this application describes the embodiments of the device part from two perspectives, one is based on the perspective of functional modules, and the other is based on the perspective of hardware.

Based on the perspective of functional modules, this embodiment provides a test device for an NVMe hard disk backplane, which is applied to a test card including a PCIe Switch chip, a male interface, and a female interface; the PCIe Switch chip is connected to the male interface through the female interface , the male interface is connected to the NVMe hard disk interface of the NVMe hard disk backplane, and the NVMe hard disk backplane is connected to the server motherboard; FIG. The unit includes:

Generating module 10, is used for generating test signal;

The sending module 11 is used to send the test signal to the PCIe Switch chip through the cable between the NVMe hard disk backplane and the PCIe Switch chip;

The determination module 12 is configured to determine the fault of the NVMe hard disk backplane according to the feedback information of the test signal.

Since the embodiment of the device part corresponds to the embodiment of the method part, please refer to the description of the embodiment of the method part for the embodiment of the device part, and details will not be repeated here.

The testing device for the NVMe hard disk backplane provided in this embodiment corresponds to the above-mentioned method, so it has the same beneficial effect as the above-mentioned method.

Based on the perspective of hardware, this embodiment provides another testing device for NVMe hard disk backplane. FIG. 7 is a structural diagram of a testing device for NVMe hard disk backplane provided by another embodiment of the present application. As shown in FIG. The test device of the hard disk backplane includes: a memory 20 for storing computer programs;

The processor 21 is configured to implement the steps of the method for testing the NVMe hard disk backplane mentioned in the above-mentioned embodiments when executing the computer program.

Wherein, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, and the like. Processor 21 can adopt at least one hardware form in Digital Signal Processor (Digital Signal Processor, DSP), Field-Programmable Gate Array (Field-Programmable Gate Array, FPGA), Programmable Logic Array (Programmable LogicArray, PLA) accomplish. The processor 21 may also include a main processor and a coprocessor, the main processor is a processor for processing data in the wake-up state, and is also called a central processing unit (Central Processing Unit, CPU); Low-power processor for processing data in standby state. In some embodiments, the processor 21 may be integrated with a graphics processor (Graphics Processing Unit, GPU), and the GPU is used for rendering and drawing the content that needs to be displayed on the display screen. In some embodiments, the processor 21 may also include an artificial intelligence (AI) processor, and the AI processor is used to process calculation operations related to machine learning.

Memory 20 may include one or more computer-readable storage media, which may be non-transitory. The memory 20 may also include high-speed random access memory, and non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201, wherein, after the computer program is loaded and executed by the processor 21, the relevant steps of the method for testing the NVMe hard disk backplane disclosed in any of the foregoing embodiments can be implemented. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. Wherein, the operating system 202 may include Windows, Unix, Linux and so on. The data 203 may include, but is not limited to, data related to the test method of the NVMe hard disk backplane.

In some embodiments, the testing device for the NVMe hard disk backplane may further include a display screen 22 , an input/output interface 23 , a communication interface 24 , a power supply 25 and a communication bus 26 .

Those skilled in the art can understand that the structure shown in the figure does not constitute a limitation on the test device for the NVMe hard disk backplane, and may include more or less components than those shown in the figure.

The testing device for the NVMe hard disk backplane provided by the embodiment of the present application includes a memory and a processor. When the processor executes the program stored in the memory, the following method can be implemented: a testing method for the NVMe hard disk backplane.

The testing device for the NVMe hard disk backplane provided in this embodiment corresponds to the above-mentioned method, so it has the same beneficial effect as the above-mentioned method.

Finally, the present application also provides an embodiment corresponding to a computer-readable storage medium. A computer program is stored on a computer-readable storage medium, and when the computer program is executed by a processor, the steps described in the foregoing method embodiments are implemented.

It can be understood that if the methods in the above embodiments are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or part of the contribution to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium , executing all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic disk or optical disk and other various media that can store program codes. .

The computer-readable storage medium provided in this embodiment corresponds to the above-mentioned method, so it has the same beneficial effects as the above-mentioned method.

The test card, test method, device and medium of the NVMe hard disk backplane provided by this application have been introduced in detail above. Each embodiment in the description is described in a progressive manner, each embodiment focuses on the difference from other embodiments, and the same and similar parts of each embodiment can be referred to each other. As for the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and for the related information, please refer to the description of the method part. It should be pointed out that those skilled in the art can make some improvements and modifications to the application without departing from the principles of the application, and these improvements and modifications also fall within the protection scope of the claims of the application.

It should also be noted that in this specification, relative terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that these entities or operations There is no such actual relationship or order between the operations. Furthermore, the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus comprising a set of elements includes not only those elements, but also includes elements not expressly listed. other elements of or also include elements inherent in such a process, method, article, or device. Without further limitations, an element defined by the phrase "comprising a" does not preclude the presence of additional same elements in a process, method, article or apparatus comprising the aforementioned element.

Claims (10)

1. The utility model provides a test card of NVMe hard disk backplate which characterized in that includes: PCIe Switch chip, male interface, female interface;

the PCIe Switch chip is connected with the female head interface, the female head interface is connected with the male head interface through a cable, the male head interface is connected with an NVMe hard disk interface of the NVMe hard disk back plate, and the NVMe hard disk back plate is connected with a server mainboard; the server mainboard is used for generating a test signal; the test signal is sent to the PCIe Switch chip through a cable between the NVMe hard disk back plate and the PCIe Switch chip; and then determining the fault of the NVMe hard disk backboard according to the feedback information of the test signal.

2. The test card of NVMe hard disk backplane of claim 1, further comprising: a power supply module;

the power supply module is used for converting the electric signal sent by the server mainboard into the standard voltage of the PCIe Switch chip so as to supply power to the PCIe Switch chip.

3. A test method of an NVMe hard disk backboard is characterized by being applied to a test card comprising a PCIe Switch chip, a male interface and a female interface; the PCIe Switch chip is connected with the female head interface, the female head interface is connected with the male head interface through a cable, the male head interface is connected with an NVMe hard disk interface of the NVMe hard disk back plate, and the NVMe hard disk back plate is connected with a server mainboard; the method comprises the following steps:

generating a test signal;

sending the test signal to the PCIe Switch chip through a cable between the NVMe hard disk backplane and the PCIe Switch chip;

and determining the fault of the NVMe hard disk back plate according to the feedback information of the test signal.

4. The test method of the NVMe hard disk backplane of claim 3, wherein the determining the fault of the NVMe hard disk backplane according to the feedback information of the test signal comprises:

after the test signal is sent, if the server mainboard does not detect the insertion of the PCIe Switch chip, it is determined that the NVMe hard disk back plate has a fault.

5. The test method of the NVMe hard disk backplane of claim 3, wherein the determining the fault of the NVMe hard disk backplane according to the feedback information of the test signal comprises:

and if the transmission bandwidth of the test signal does not meet the preset bandwidth range, determining that the NVMe hard disk back plate has a fault.

6. The test method of the NVMe hard disk backplane of claim 3, wherein the determining the fault of the NVMe hard disk backplane according to the feedback information of the test signal comprises:

and if the transmission rate of the test signal does not meet the preset rate range, determining that the NVMe hard disk back plate has a fault.

7. The NVMe hard disk backplane testing method according to any one of claims 4 to 6, wherein the types of the test signals comprise: I2C signal, CLK signal.

8. A testing device for an NVMe hard disk backboard is characterized by being applied to a test card comprising a PCIe Switch chip, a male interface and a female interface; the PCIe Switch chip is connected with the female head interface, the female head interface is connected with the male head interface through a cable, the male head interface is connected with an NVMe hard disk interface of the NVMe hard disk back plate, and the NVMe hard disk back plate is connected with a server mainboard; the device comprises:

the generating module is used for generating a test signal;

the sending module is used for sending the test signal to the PCIe Switch chip through a cable between the NVMe hard disk backplane and the PCIe Switch chip;

and the determining module is used for determining the fault of the NVMe hard disk backboard according to the feedback information of the test signal.

9. The testing device of the NVMe hard disk backboard is characterized by comprising a memory, a test module and a test module, wherein the memory is used for storing a computer program;

a processor for implementing the steps of the NVMe hard disk backplane testing method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a computer program which, when executed by a processor, implements the steps of the method for testing NVMe hard disk backplanes according to any one of claims 1 to 7.

Images