CN115437445B - Voltage stabilizing circuit module, memory storage device and voltage control method - Google Patents

Abstract

The invention provides a voltage stabilizing circuit module, a memory storage device and a voltage control method. The method includes: generating an output voltage according to the input voltage by a driving circuit; generating a feedback voltage according to the output voltage; controlling the driving circuit by a voltage stabilizing circuit to adjust the output voltage according to the feedback voltage; and adjusting the output voltage by a compensation circuit. The output of the voltage stabilizing circuit is compensated; and the compensation circuit is activated or deactivated according to the input bias voltage of the switching circuit. Therefore, the operating performance of the voltage stabilizing circuit module under different load conditions can be improved.

Description

Voltage stabilizing circuit module, memory storage device and voltage control method

Technical field

The present invention relates to a voltage control technology, and in particular to a voltage stabilizing circuit module, a memory storage device and a voltage control method.

Background technique

As memory control chips become smaller and smaller, voltage stabilizing circuit modules such as low dropout regulator (Capless LDO) are gradually being used in the packaging structure of memory control chips. Generally speaking, the electrical parameters used in various voltage stabilizing circuit modules are preset before leaving the factory to meet most usage requirements. However, in practice, when the voltage stabilizing circuit module operates under different load conditions, the operating performance of the voltage stabilizing circuit module is not easy to maintain stability.

Contents of the invention

The invention provides a voltage stabilizing circuit module, a memory storage device and a voltage control method, which can effectively improve the working performance of the voltage stabilizing circuit module under different load conditions.

Exemplary embodiments of the present invention provide a voltage stabilizing circuit module, which includes a driving circuit, a feedback circuit, a voltage stabilizing circuit, a compensation circuit and a switching circuit. The feedback circuit is connected to the drive circuit. The voltage stabilizing circuit is connected to the driving circuit and the feedback circuit. The compensation circuit is connected to the driving circuit and the voltage stabilizing circuit. The switch circuit is connected to the drive circuit, the voltage stabilizing circuit and the compensation circuit. The driving circuit is used to generate an output voltage according to the input voltage. The feedback circuit is used to generate a feedback voltage according to the output voltage. The voltage stabilizing circuit is used to control the driving circuit to adjust the output voltage according to the feedback voltage. The compensation circuit is used to compensate the output of the voltage stabilizing circuit. The switch circuit is used to activate or deactivate the compensation circuit according to an input bias voltage of the switch circuit, and the input bias voltage of the switch circuit is affected by the output of the voltage stabilizing circuit.

In an exemplary embodiment of the present invention, the operation of the switching circuit to turn on or off the compensation circuit according to the input bias voltage of the switching circuit includes: turning on the compensation circuit in a heavy load mode; and In light load mode, the compensation circuit is turned off.

In an exemplary embodiment of the present invention, the operation of the switching circuit to activate or deactivate the compensation circuit according to the input bias voltage of the switching circuit includes: in response to the input bias voltage of the switching circuit The compensation circuit is enabled when a critical condition is met; and the compensation circuit is turned off in response to the input bias voltage of the switching circuit not meeting the critical condition.

In an exemplary embodiment of the present invention, the operation of the switching circuit to turn on or off the compensation circuit according to the input bias voltage of the switching circuit includes: in a heavy load mode, the compensation circuit is turned on to the output terminal of the voltage stabilizing circuit; and in the light load mode, disconnecting the compensation circuit from the output terminal of the voltage stabilizing circuit.

In an exemplary embodiment of the present invention, in the heavy load mode, the driving voltage of the driving circuit is controlled by the voltage stabilizing circuit and the compensation circuit at the same time, and in the light load mode, the driving voltage of the driving circuit The voltage is controlled by the voltage stabilizing circuit and is not controlled by the compensation circuit.

In an exemplary embodiment of the present invention, the switching circuit includes a transistor element, a first terminal of the transistor element is connected to the output terminal of the voltage stabilizing circuit, and a second terminal of the transistor element is connected to the compensation circuit. circuit, and the third terminal of the transistor element is connected to the output voltage.

In an exemplary embodiment of the present invention, the operation of the switching circuit to activate or deactivate the compensation circuit according to the input bias voltage of the switching circuit includes: depending on the relationship between the first terminal and the third terminal. Whether the voltage difference reaches a critical value, the compensation circuit is started or turned off.

In an exemplary embodiment of the present invention, the transistor element includes a P-type metal-oxide-semiconductor field effect transistor.

In an exemplary embodiment of the present invention, the voltage stabilizing circuit includes an error amplifier. The error amplifier is used to compare the reference voltage and the feedback voltage and adjust the output voltage according to the comparison result.

In an exemplary embodiment of the present invention, the compensation circuit is used to compensate the high-frequency response of the voltage stabilizing circuit. The voltage stabilizing circuit further includes a signal amplifier connected between the output end of the driving circuit and the output end of the error amplifier. The signal amplifier is used to compensate for the low frequency response of the voltage stabilizing circuit.

In an exemplary embodiment of the present invention, the compensation circuit includes an impedance element and a capacitance element. The impedance element is connected in series between the switch circuit and the capacitance element.

An exemplary embodiment of the present invention further provides a memory storage device, which includes a connection interface unit, a rewritable non-volatile memory module, a memory control circuit unit and a voltage stabilizing circuit module. The connection interface unit is used to connect to the host system. The voltage stabilizing circuit module is connected to at least one of the connection interface unit, the rewritable non-volatile memory module and the memory control circuit unit. The voltage stabilizing circuit module is used to: generate an output voltage according to the input voltage by the driving circuit; generate a feedback voltage according to the output voltage; control the driving circuit by the voltage stabilizing circuit to adjust the output voltage according to the feedback voltage; use compensation The circuit compensates the output of the voltage stabilizing circuit; and activates or deactivates the compensation circuit according to the input bias of the switching circuit, and the input bias of the switching circuit is affected by the output of the voltage stabilizing circuit. .

Exemplary embodiments of the present invention further provide a voltage control method for a memory storage device. The voltage control method includes: generating an output voltage according to the input voltage by a driving circuit; generating a feedback voltage according to the output voltage; controlling the driving circuit by a voltage stabilizing circuit to adjust the output voltage according to the feedback voltage; and adjusting the output voltage by a compensation circuit. The output of the voltage stabilizing circuit is compensated; and the compensation circuit is started or turned off according to the input bias of the switching circuit, and the input bias of the switching circuit is affected by the output of the voltage stabilizing circuit.

In an exemplary embodiment of the present invention, the step of activating or deactivating the compensation circuit according to the input bias of the switching circuit includes: activating the compensation circuit in a heavy load mode; and in a light load mode. , close the compensation circuit.

In an exemplary embodiment of the present invention, the step of activating or deactivating the compensation circuit according to the input bias of the switching circuit includes: activating the compensation circuit in response to the input bias of the switching circuit meeting a critical condition. the compensation circuit; and in response to the input bias of the switching circuit not meeting the critical condition, turning off the compensation circuit.

In an exemplary embodiment of the present invention, the step of activating or shutting down the compensation circuit according to the output voltage includes: conducting the compensation circuit to the output end of the voltage stabilizing circuit in a heavy load mode; and In the light load mode, the compensation circuit is disconnected from the output terminal of the voltage stabilizing circuit.

In an exemplary embodiment of the present invention, the memory storage device includes the switch circuit, the switch circuit is used to activate or deactivate the compensation circuit according to the input bias voltage of the switch circuit, the switch circuit Comprising a transistor element, a first end of the transistor element is connected to the output end of the voltage stabilizing circuit, a second end of the transistor element is connected to the compensation circuit, and a third end of the transistor element is connected to the the output voltage.

In an exemplary embodiment of the present invention, the step of activating or deactivating the compensation circuit according to the input bias voltage of the switch circuit includes: using the transistor element according to the relationship between the first terminal and the third terminal. Whether the voltage difference between the two circuits reaches a critical value, the compensation circuit is started or turned off.

In an exemplary embodiment of the present invention, the step of controlling the driving circuit to adjust the output voltage by the voltage stabilizing circuit according to the feedback voltage includes: comparing a reference voltage with the feedback voltage and adjusting the output voltage according to the comparison result. The output voltage.

In an exemplary embodiment of the present invention, the compensation circuit is used to compensate for the high-frequency response of the voltage stabilizing circuit, and the voltage control method further includes: using a signal amplifier to compensate for the low-frequency response of the voltage stabilizing circuit, wherein The signal amplifier is connected between the output terminal of the driving circuit and the output terminal of the voltage stabilizing circuit.

Based on the above, after the driving circuit generates an output voltage according to the input voltage, the feedback circuit can generate a feedback voltage according to the output voltage, and the voltage stabilizing circuit can control the driving circuit to adjust the output voltage according to the feedback voltage. Furthermore, a compensation circuit for compensating the output of the voltage stabilizing circuit may be activated or deactivated according to the output voltage. Therefore, the operating performance of the voltage stabilizing circuit module under different load conditions can be effectively improved.

Description of drawings

FIG. 1 is a schematic diagram of a voltage stabilizing circuit module according to an exemplary embodiment of the present invention;

FIG. 2 is a schematic diagram of starting a compensation circuit in a voltage stabilizing circuit module according to an exemplary embodiment of the present invention;

FIG. 3 is a schematic diagram of turning off the compensation circuit in the voltage stabilizing circuit module according to an exemplary embodiment of the present invention;

FIG. 4 is a schematic diagram of a voltage stabilizing circuit module according to an exemplary embodiment of the present invention;

FIG. 5 is a schematic diagram of a voltage stabilizing circuit module according to an exemplary embodiment of the present invention;

Figure 6 is a schematic diagram of a memory storage device according to an example embodiment of the present invention;

FIG. 7 is a flowchart of a voltage control method according to an exemplary embodiment of the present invention.

Detailed ways

Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numbers are used in the drawings and description to refer to the same or similar parts.

Several exemplary embodiments are provided below to illustrate the present invention. However, the present invention is not limited to the illustrated exemplary embodiments. Appropriate combinations between the exemplary embodiments are also allowed. The word "connection" used throughout the description of this case (including the claims) can refer to any direct or indirect means of connection. For example, if a first device is described as being connected to a second device, it should be understood that the first device can be directly connected to the second device, or the first device can be indirectly connected through other devices or some connection means. ground to the second device. Furthermore, the term "signal" may refer to at least one current, voltage, charge, temperature, data, or any other signal or signals.

FIG. 1 is a schematic diagram of a voltage stabilizing circuit module according to an exemplary embodiment of the present invention. Referring to FIG. 1 , the voltage stabilizing circuit module 10 may include a low dropout regulator (CaplessLDO) without an output series resistor or a similar voltage control circuit module.

The voltage stabilizing circuit module 10 includes a driving circuit 11 , a feedback circuit 12 , a voltage stabilizing circuit 13 , a compensation circuit 14 and a switching circuit 15 . The driving circuit 11 can generate a voltage (also called an output voltage) V(out) according to the voltage (also called an input voltage) V(in). Voltage V(out) can be provided to external loads. In addition, the impedance element R and the capacitance element C can be connected to the output terminal of the driving circuit 11 . In an exemplary embodiment, the capacitance of the capacitive element C (eg, 100 picofarads (pF)) may be smaller than the capacitance of the larger capacitive element C (eg, 1 micron) used in a conventional low dropout voltage regulator. Farad (μF)). However, the present invention does not limit the actual capacitance of the capacitive element C.

Feedback circuit 12 is connected to drive circuit 11 . The feedback circuit 12 can generate a voltage (also referred to as a feedback voltage) V(fb) according to the voltage V(out). Voltage V(fb) may reflect the current state of voltage V(out). For example, the voltage value of voltage V(fb) may be directly related to the voltage value of voltage V(out). In addition, voltage V(fb) can also reflect changes in current I(out). Current I(out) is also provided to the external load.

The voltage stabilizing circuit 13 is connected to the driving circuit 11 and the feedback circuit 12 . The voltage stabilizing circuit 13 can receive the voltage V(fb). In particular, the voltage stabilizing circuit 13 can control the driving circuit 11 to adjust the voltage V(out) according to the voltage V(fb). For example, the voltage stabilizing circuit 13 can monitor the change of the voltage V(out) according to the voltage V(fb) and try to overcome the change to restore the voltage V(out) to a stable state. For example, in response to the voltage value of voltage V(out) decreasing, the voltage stabilizing circuit 13 can control the driving circuit 11 to adjust the voltage V(out) so that the voltage V(out) returns to a stable state (for example, the voltage of the voltage V(out) value to the default value). Alternatively, in response to the voltage value of voltage V(out) rising, the voltage stabilizing circuit 13 can also control the driving circuit 11 to adjust the voltage V(out) so that the voltage V(out) returns to a stable state (for example, the voltage V(out) voltage value drops to the preset value).

In an exemplary embodiment, the voltage stabilizing circuit 13 can generate a voltage (also called a control voltage) V(d) according to the voltage V(fb). For example, voltage V(d) may be generated at the output terminal of the voltage stabilizing circuit 13 . Voltage V(d) may affect the driving voltage of the driving circuit 11 . For example, the voltage V(d) may be positively related to the driving voltage of the driving circuit 11 . Therefore, by adjusting the voltage V(d), the voltage V(out) output by the driving circuit 11 can be adjusted synchronously.

The compensation circuit 14 may be connected to the voltage stabilizing circuit 13 via the switching circuit 15 . The compensation circuit 14 can be used to compensate the output of the voltage stabilizing circuit 13 . For example, the compensation circuit 14 can be connected to the output end of the voltage stabilizing circuit 13 via the switch circuit 15 and perform high-frequency compensation on the output of the voltage stabilizing circuit 13 .

The switch circuit 15 is connected to the drive circuit 11 , the voltage stabilizing circuit 13 and the compensation circuit 14 . The switch circuit 15 can receive the voltages V(d) and V(out) synchronously. The switch circuit 15 can activate or deactivate the compensation circuit 14 according to the input bias voltage of the switch circuit 15 . In particular, this input bias can be affected by voltages V(d) and V(out). For example, the input bias voltage of the switching circuit 15 may be equal to or positively related to the voltage difference between the voltages V(d) and V(out). That is, if the voltage difference between the voltages V(d) and V(out) is larger, it means that the input bias voltage of the switch circuit 15 is also larger. In an example embodiment, the switch circuit 15 can conduct the compensation circuit 14 to the output end of the voltage stabilizing circuit 13 according to the input bias voltage to activate the compensation circuit 14 . Alternatively, in an exemplary embodiment, the switch circuit 15 can also disconnect the compensation circuit 14 from the output end of the voltage stabilizing circuit 13 according to the input bias voltage to turn off the compensation circuit 14 .

In an exemplary embodiment, the voltage stabilizing circuit module 10 can operate in one of a heavy-load mode and a light-load mode. In the heavy load mode, the switching circuit 15 can activate the compensation circuit 14. For example, in the heavy load mode, the switch circuit 15 can conduct the compensation circuit 14 to the output end of the voltage stabilizing circuit 13 . In response to the compensation circuit 14 being turned on to the output terminal of the voltage stabilizing circuit 13 (that is, the compensation circuit 14 is activated), the compensation circuit 14 can perform high-frequency compensation on the output of the voltage stabilizing circuit 13 . In addition, in the light load mode, the switch circuit 15 can disconnect the compensation circuit 14 from the output terminal of the voltage stabilizing circuit 13 . In response to the compensation circuit 14 being disconnected from the output terminal of the voltage stabilizing circuit 13 (ie, the compensation circuit 14 is turned off), the compensation circuit 14 stops compensating the output of the voltage stabilizing circuit 13 .

In an exemplary embodiment, when the external load is relatively large (that is, the current value of the current I(out) increases), it means that the voltage stabilizing circuit module 10 is currently operating in the heavy load mode. In contrast, when the external load is relatively small (that is, the current value of the current I(out) decreases), it means that the voltage stabilizing circuit module 10 is currently operating in the light load mode. In an exemplary embodiment, the compensation circuit 14 performs high-frequency compensation on the output of the voltage stabilizing circuit 13 in the heavy load mode, thereby optimizing the high-frequency response of the voltage stabilizing circuit 13 . However, in the light load mode, the compensation circuit 14 compensates the output of the voltage stabilizing circuit 13, which may make the high-frequency response of the voltage stabilizing circuit 13 worse. Therefore, in an exemplary embodiment, by dynamically activating or disabling the compensation circuit 14 , the voltage stabilizing circuit 13 can be effectively optimized (or at least maintained) regardless of whether the voltage stabilizing circuit module 10 is currently operating in a heavy load mode or a light load mode. high frequency response.

In an exemplary embodiment, the voltage V(fb) can feed back the load condition of the external load to the voltage stabilizing circuit 13, thereby affecting the input bias voltage of the switching circuit 15. In an example embodiment, the switch circuit 15 can activate or deactivate the startup compensation circuit 14 according to whether the input bias voltage meets a critical condition. For example, switching circuit 15 may enable compensation circuit 14 in response to the input bias meeting a critical condition. Additionally, switching circuit 15 may turn off compensation circuit 14 in response to the input bias not meeting the critical condition.

In an example embodiment, in the heavy load mode, the current value of the current I(out) increases. At this time, according to the change of voltage V(fb), the input bias voltage of the switch circuit 15 will meet the critical condition (ie, the voltage difference between voltage V(d) and V(out) is greater than the critical value). In response to the input bias meeting the critical condition, switching circuit 15 may activate compensation circuit 14. On the contrary, in light load mode, the current value of current I(out) decreases. At this time, according to the change of voltage V(fb), the input bias voltage of the switch circuit 15 does not meet the critical condition (that is, the voltage difference between voltage V(d) and V(out) is not greater than the critical value). In response to the input bias not meeting the critical condition, switching circuit 15 may turn off compensation circuit 14 .

From another perspective, in the heavy load mode, in response to the voltage difference between the voltages V(d) and V(out) being greater than the critical value, the compensation circuit 14 will be connected to the driving circuit 11 and the voltage stabilizing circuit 13 on the signal transmission path between. Therefore, in the heavy load mode, the driving voltage of the driving circuit 11 can be controlled by the voltage stabilizing circuit 13 and the compensation circuit 14 at the same time. However, in the light load mode, in response to the voltage difference between the voltages V(d) and V(out) not being greater than the critical value, the compensation circuit 14 is removed from the signal transmission path between the driving circuit 11 and the voltage stabilizing circuit 13 disconnect. Therefore, in the light load mode, the driving voltage of the driving circuit 11 can be controlled by the voltage stabilizing circuit 13 but not controlled by the compensation circuit 14 .

FIG. 2 is a schematic diagram of a startup compensation circuit in a voltage stabilizing circuit module according to an exemplary embodiment of the present invention.

Referring to FIG. 2 , in the heavy load mode, the switch circuit 15 can conduct the compensation circuit 14 to the output end of the voltage stabilizing circuit 13 . Therefore, the compensation circuit 14 can compensate the high frequency response of the voltage stabilizing circuit 13 . The compensated voltage V(d) may be transmitted to the driving circuit 11 to control the driving circuit 11 to adjust (or maintain) the output voltage V(out).

FIG. 3 is a schematic diagram of turning off the compensation circuit in the voltage stabilizing circuit module according to an exemplary embodiment of the present invention.

Please refer to FIG. 3 . In the light load mode, the switch circuit 15 can disconnect the compensation circuit 14 from the output end of the voltage stabilizing circuit 13 . After the compensation circuit 14 is turned off, the compensation circuit 14 will not be able to compensate the output of the voltage stabilizing circuit 13 (ie, the voltage V(d)). At this time, the voltage V(d) that is not compensated by the compensation circuit 14 can be transmitted to the driving circuit 11 to control the driving circuit 11 to adjust (or maintain) the output voltage V(out).

FIG. 4 is a schematic diagram of a voltage stabilizing circuit module according to an exemplary embodiment of the present invention.

Referring to FIG. 4 , the voltage stabilizing circuit module 40 may include the voltage stabilizing circuit module 10 of FIG. 1 . The driving circuit 11 may include a signal amplifier 401 and a transistor element 402. The transistor element 402 may include an N-type metal-oxide-semiconductor field-effect transistor (N MOSFET) or other types of transistors. The drain (D) of transistor element 402 may be connected to voltage V(in). The source (S) of transistor element 402 may be connected to voltage V(out). Signal amplifier 401 may be connected to the gate (G) of transistor element 402 . Therefore, the voltage V(d) can be amplified by the signal amplifier 401 and then transmitted to the gate (G) of the transistor element 402 . The transistor element 402 can be controlled by the voltage of the gate (G) (ie, the driving voltage) to generate the voltage V(out) according to the voltage V(in). In particular, the voltage of the gate (G) (ie, the driving voltage) can be used to control or adjust the voltage value of the voltage V(out). In addition, the impedance element R(1) and the capacitance element C(1) may be connected to the output end of the driving circuit 11. For example, the impedance element R(1) and the capacitance element C(1) may respectively include the impedance element R and the capacitance element C in FIG. 1, which will not be described in detail here. It should be noted that, generally speaking, one or more series resistors can be connected in series between the output terminal of the driving circuit 11 and the external load. However, as shown in FIG. 4 , the output terminal of the driving circuit 11 is not connected to any series resistor. Therefore, the versatility of the voltage stabilizing circuit module 40 can be increased.

Feedback circuit 12 may include impedance elements R(2) and R(3). The impedance elements R(2) and R(3) can be connected in series to form a voltage dividing circuit. This voltage dividing circuit can generate voltage V(fb) based on voltage V(out). The voltage value of voltage V(fb) may be positively related to the voltage value of voltage V(out). At the same time, the voltage V(fb) may reflect changes in the current I(out) and/or the current load condition of the voltage stabilizing circuit module 40 .

The voltage stabilizing circuit 13 may include an error amplifier 411, a signal amplifier 412, an impedance element R(4), an impedance element R(5), a capacitance element C(2), and a capacitance element C(3). The error amplifier 411 can receive the voltage V(fb) and the voltage (also called reference voltage) V(ref). The error amplifier 411 can compare the voltage V(ref) and V(fb) and generate the voltage V(d) according to the comparison result, and then adjust the voltage V(out) through the voltage V(d). The signal amplifier 412, the impedance element R(5) and the capacitance element C(3) may be connected between the output end of the error amplifier 411 and the output end of the driving circuit 11 (or between the voltages V(out) and V(d)) , to form another signal feedback channel between the driving circuit 11 and the voltage stabilizing circuit 13 . This signal feedback channel can be used to compensate for the low frequency response of the voltage stabilizing circuit 13 . In addition, the impedance element R(4) and the capacitance element C(2) are connected to the output terminal (or voltage V(d)) of the error amplifier 411.

The compensation circuit 14 includes an impedance element R(Z) and a capacitance element C(Z). The impedance element R(Z) and the capacitance element C(Z) are connected in series to form a frequency compensation circuit. For example, the impedance element R(Z) may be connected in series between the switch circuit 15 and the capacitance element C(Z). Therefore, the compensation circuit 14 can be used to perform high-frequency compensation on the output of the error amplifier 411 (ie, the voltage V(d)).

The switching circuit 15 includes a transistor element 421 . Transistor element 421 may include a P-type metal-oxide-semiconductor field effect transistor (P MOSFET) or other types of transistors. The source (S) (also referred to as the first terminal) of the transistor element 421 may be connected to the output terminal (or voltage V(d)) of the error amplifier 411 . The drain (D) (also referred to as the second terminal) of the transistor element 421 may be connected to the compensation circuit 14 (or the impedance element R(Z)). The gate (G) (also called the third terminal) of the transistor element 421 may be connected to the output terminal (or voltage V(out)) of the driving circuit 11 . Therefore, the transistor element 421 can turn on or off the compensation circuit 14 according to the voltage difference between the voltages V(d) and V(out).

In an example embodiment, the transistor element 421 can operate according to whether the voltage difference between the first terminal (ie, the source (S)) and the third terminal (ie, the gate (G)) reaches a critical value. Activate or deactivate the compensation circuit 14. For example, in the heavy load mode, in response to the voltage difference between the first terminal and the third terminal reaching (eg, greater than) a critical value, the transistor element 421 may conduct the compensation circuit 14 to the voltage stabilizing circuit 13 ( Or the output terminal of the error amplifier 411) to compensate the voltage V(d). Alternatively, in the light load mode, in response to the voltage difference between the first terminal and the third terminal not reaching (eg, not greater than) the critical value, the transistor element 421 may switch the compensation circuit 14 from the voltage stabilizing circuit. The output terminal of voltage stabilizing circuit 13 (or error amplifier 411) is disconnected to prevent the working efficiency of voltage stabilizing circuit 13 from being affected by compensation circuit 14.

FIG. 5 is a schematic diagram of a voltage stabilizing circuit module according to an exemplary embodiment of the present invention.

Referring to FIG. 5 , the voltage stabilizing circuit module 50 may include the voltage stabilizing circuit module 10 of FIG. 1 . The driving circuit 11 may include a signal amplifier 501 and a transistor element 502. The signal amplifier 501 and the transistor element 502 may be the same as or similar to the signal amplifier 401 and the transistor element 402 of FIG. 4 . The voltage V(d) can be amplified by the signal amplifier 501 and then transmitted to the gate (G) of the transistor element 502 . The transistor element 502 can be controlled by the voltage of the gate (G) (ie, the driving voltage) to generate the voltage V(out) according to the voltage V(in). The impedance element R(1) and the capacitance element C(1) may be connected to the output end of the driving circuit 11. In addition, the feedback circuit 12 may include impedance elements R(2) and R(3) to generate the voltage V(fb) according to the voltage V(out). It should be noted that, similar to the exemplary embodiment of FIG. 4 , in the exemplary embodiment of FIG. 5 , the output terminal of the driving circuit 11 is also not connected to any series resistor. Therefore, the versatility of the voltage stabilizing circuit module 50 can be increased.

The voltage stabilizing circuit 13 may include an error amplifier 511, an impedance element R(4) and a capacitance element C(2). The error amplifier 511 can compare the voltage V(ref) and V(fb) and generate the voltage V(d) according to the comparison result, and then adjust the voltage V(out) through the voltage V(d). The impedance element R ( 4 ) can be connected in series between the output terminal of the error amplifier 511 and the driving circuit 11 . The capacitive element C(2) may be connected between the impedance element R(4) and the driving circuit 11. In addition, the compensation circuit 14 may include an impedance element R(Z) and a capacitance element C(Z) to form a frequency compensation circuit.

The switching circuit 15 includes a transistor element 521 . Transistor element 521 may be the same as or similar to transistor element 421 of FIG. 4 . That is, the transistor element 521 can turn on or off the compensation circuit 14 according to the voltage difference between the voltages V(d) and V(out). For example, in the heavy load mode, in response to the voltage difference between voltages V(d) and V(out) reaching (eg, greater than) a critical value, transistor element 521 may conduct compensation circuit 14 to voltage stabilizing circuit 13 (or The output terminal of the error amplifier 511) is used to compensate the voltage V(d). In addition, in the light load mode, in response to the voltage difference between the voltages V(d) and V(out) not reaching (eg, not greater than) the threshold value, the transistor element 521 may switch the compensation circuit 14 from the voltage stabilizing circuit 13 (or the output end of the error amplifier 511 ) is disconnected to prevent the working performance of the voltage stabilizing circuit 13 from being affected by the compensation circuit 14 from being reduced.

It should be noted that in the exemplary embodiments of FIGS. 1 to 4 , the connection relationships between the various electronic circuits (or electronic components) can be adjusted according to practical needs, and are not limited by the present invention. Alternatively, more useful electronic circuits (or electronic components) can be appropriately added to the voltage stabilizing circuit module 10, 40 or 50 or used to replace specific electronic circuits (or electronic components) in the voltage stabilizing circuit module 10, 40 or 50. Electronic components), the present invention is not limited.

In an exemplary embodiment, the voltage stabilizing circuit module 10 of FIG. 1, the voltage stabilizing circuit module 40 of FIG. 4, or the voltage stabilizing circuit module 50 of FIG. 5 may be disposed in a memory storage device. Alternatively, in an exemplary embodiment, the voltage stabilizing circuit module 10 of FIG. 1 , the voltage stabilizing circuit module 40 of FIG. 4 , or the voltage stabilizing circuit module 50 of FIG. 5 can also be installed in other types of electronic devices.

Figure 6 is a schematic diagram of a memory storage device according to an example embodiment of the present invention.

Referring to FIG. 6 , the memory storage device 60 includes a connection interface unit 61 , a memory control circuit unit 62 , a rewritable non-volatile memory module 63 and a voltage stabilizing circuit module 64 .

The connection interface unit 61 is used to connect the memory storage device 60 to the host system. Memory storage device 60 may communicate with the host system via connection interface unit 61 . In an exemplary embodiment, the connection interface unit 61 is compatible with the Peripheral Component Interconnect Express (PCI Express) standard. In an exemplary embodiment, the connection interface unit 61 may also be compliant with the Serial Advanced Technology Attachment (SATA) standard, the Parallel Advanced Technology Attachment (PATA) standard, the Institute of Electrical and Electronics Engineers (Institute of Electrical and Electronics Engineers) Electrical and Electronic Engineers (IEEE) 1394 standard, Universal Serial Bus (USB) standard, SD interface standard, Ultra High Speed I (UHS-I) interface standard, Ultra High Speed II -II, UHS-II) interface standard, Memory Stick (MS) interface standard, MCP interface standard, MMC interface standard, eMMC interface standard, Universal Flash Storage (UFS) interface standard, eMCP interface standard , CF interface standard, Integrated Device Electronics (IDE) standard or other suitable standards. The connection interface unit 61 and the memory control circuit unit 62 may be packaged in a chip, or the connection interface unit 61 may be arranged outside a chip including the memory control circuit unit 62 .

The memory control circuit unit 62 is connected to the connection interface unit 61 and the rewritable non-volatile memory module 63 . The memory control circuit unit 62 is used to execute multiple logic gates or control instructions implemented in hardware or firmware and write and read data in the rewritable non-volatile memory module 63 according to instructions from the host system. and erase operations.

The rewritable non-volatile memory module 63 is used to store data written by the host system. The rewritable non-volatile memory module 63 may include a single-level cell (SLC) NAND flash memory module (ie, a flash memory module that can store 1 bit in one memory cell), a second-level Memory cell (Multi Level Cell, MLC) NAND type flash memory module (that is, a flash memory module that can store 2 bits in one memory cell), triple level memory cell (Triple Level Cell, TLC) NAND type flash memory module (i.e., a flash memory module that can store 3 bits in one storage unit), Quad Level Cell (QLC) NAND flash memory module (i.e., a flash memory module that can store 4 bits in one storage unit) flash memory module), other flash memory modules, or other memory modules with the same characteristics.

Each memory cell in the rewritable non-volatile memory module 63 stores one or more bits based on changes in voltage (hereinafter also referred to as critical voltage). Specifically, there is a charge trapping layer between the control gate and the channel of each memory cell. By applying a write voltage to the control gate, the amount of electrons in the charge trapping layer can be changed, thereby changing the critical voltage of the memory cell. This operation of changing the threshold voltage of the memory cell is also called "writing data to the memory cell" or "programming the memory cell." As the threshold voltage changes, each memory cell in the rewritable non-volatile memory module 63 has multiple memory states. By applying a read voltage, it is possible to determine which storage state a memory cell belongs to, and thus obtain one or more bits stored in the memory cell.

In an exemplary embodiment, the storage units of the rewritable non-volatile memory module 63 may constitute multiple physical programming units, and these physical programming units may constitute multiple physical erasing units. Specifically, memory cells on the same word line may form one or more physical programming units. If one storage unit can store more than 2 bits, the physical programming units on the same word line can be at least classified into lower physical programming units and upper physical programming units. For example, the Least Significant Bit (LSB) of a memory unit belongs to the lower physical programming unit, and the Most Significant Bit (MSB) of a memory unit belongs to the upper physical programming unit. Generally speaking, in MLC NAND flash memory, the writing speed of the lower physical programming unit will be greater than the writing speed of the upper physical programming unit, and/or the reliability of the lower physical programming unit is higher than that of the upper physical programming unit. Reliability of programmed units.

In an example embodiment, the physical programming unit is the smallest unit of programming. That is, the physical programming unit is the smallest unit for writing data. For example, the entity programming unit may be an entity page (page) or an entity sector (sector). If the physical programming units are physical pages, these physical programming units may include data bit areas and redundancy bit areas. The data bit area contains multiple physical sectors to store user data, while the redundant bit area is used to store system data (for example, management data such as error correction codes). In an example embodiment, the data bit area includes 32 physical sectors, and the size of one physical sector is 512 bytes (B). However, in other example embodiments, the data bit zone may also include 8, 16, or more or less physical sectors, and the size of each physical sector may also be larger or smaller. On the other hand, the physical erasure unit is the smallest unit of erasure. That is, each physical erase unit contains a minimum number of memory cells that are erased together. For example, the physical erasure unit is a physical block.

The voltage stabilizing circuit module 64 may include the voltage stabilizing circuit module 10 of FIG. 1 , the voltage stabilizing circuit module 40 of FIG. 4 , or the voltage stabilizing circuit module 50 of FIG. 5 . The voltage stabilizing circuit module 64 can be disposed inside the memory storage device 60 and connected to at least one of the connection interface unit 61 , the memory control circuit unit 62 and the rewritable non-volatile memory module 63 to perform related voltage stabilizing operations. . Alternatively, the voltage stabilizing circuit module 64 may also be disposed inside at least one of the connection interface unit 61 , the memory control circuit unit 62 and the rewritable non-volatile memory module 63 . For implementation details of the voltage stabilizing circuit module 64, please refer to the exemplary embodiments of FIG. 1 to FIG. 5 and will not be repeated here.

FIG. 7 is a flowchart of a voltage control method according to an exemplary embodiment of the present invention.

Referring to FIG. 7 , in step S701 , the driving circuit generates an output voltage according to the input voltage. In step S702, a feedback voltage is generated according to the output voltage. In step S703, the voltage stabilizing circuit controls the driving circuit to adjust the output voltage according to the feedback voltage. In step S704, the output of the voltage stabilizing circuit is compensated by a compensation circuit. In step S705, the compensation circuit is enabled or disabled according to the input bias of the switch circuit. In particular, the input bias of the switching circuit is affected by the output of the voltage stabilizing circuit.

However, each step in Figure 7 has been described in detail above and will not be described again here. It is worth noting that each step in Figure 7 can be implemented as multiple program codes or circuits, and is not limited in this case. In addition, the method in Figure 7 can be used in conjunction with the above example embodiments or can be used alone, and is not limited in this case.

To sum up, the voltage stabilizing circuit module, the memory storage device and the voltage control method provided by the embodiments of the present invention can be used according to the current load condition (such as heavy load or light load) during the period when the driving circuit generates the output voltage according to the input voltage. ), dynamically activate or deactivate the compensation circuit that can be used to compensate the output of the voltage stabilizing circuit. Therefore, the operating performance of the voltage stabilizing circuit module under different load conditions can be effectively improved.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention, but not to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: The technical solutions described in the foregoing embodiments can still be modified, or some or all of the technical features can be equivalently replaced; and these modifications or substitutions do not deviate from the essence of the corresponding technical solutions from the technical solutions of the embodiments of the present invention. scope.

Claims (33)

1. A voltage stabilizing circuit module, characterized by comprising: Drive circuit; a feedback circuit connected to the drive circuit; A voltage stabilizing circuit connected to the driving circuit and the feedback circuit; compensation circuit; and a switching circuit connected to the driving circuit, the voltage stabilizing circuit and the compensation circuit, wherein the driving circuit is used to generate an output voltage according to the input voltage, The feedback circuit is used to generate a feedback voltage according to the output voltage, The voltage stabilizing circuit is used to control the driving circuit to adjust the output voltage according to the feedback voltage, The compensation circuit is used to compensate the output of the voltage stabilizing circuit, and The switch circuit is used to activate or deactivate the compensation circuit according to an input bias voltage of the switch circuit, and the input bias voltage of the switch circuit is affected by the output of the voltage stabilizing circuit. 2. The voltage stabilizing circuit module according to claim 1, wherein the operation of the switching circuit to start or close the compensation circuit according to the input bias voltage of the switching circuit includes: In heavy load mode, enable the compensation circuit; and In light load mode, the compensation circuit is turned off. 3. The voltage stabilizing circuit module according to claim 1, wherein the operation of the switching circuit to activate or deactivate the compensation circuit according to the input bias voltage of the switching circuit includes: In response to the input bias of the switching circuit meeting a critical condition, activating the compensation circuit; and In response to the input bias of the switching circuit not meeting the critical condition, the compensation circuit is turned off. 4. The voltage stabilizing circuit module according to claim 1, wherein the operation of the switching circuit to activate or deactivate the compensation circuit according to the input bias voltage of the switching circuit includes: In the heavy load mode, the compensation circuit is turned on to the output terminal of the voltage stabilizing circuit; and In the light load mode, the compensation circuit is disconnected from the output terminal of the voltage stabilizing circuit. 5. The voltage stabilizing circuit module according to claim 1, wherein in the heavy load mode, the driving voltage of the driving circuit is controlled by the voltage stabilizing circuit and the compensation circuit at the same time, and In the light load mode, the driving voltage of the driving circuit is controlled by the voltage stabilizing circuit and is not controlled by the compensation circuit. 6. The voltage stabilizing circuit module according to claim 1, wherein the switching circuit includes a transistor element, a first terminal of the transistor element is connected to the output terminal of the voltage stabilizing circuit, and a second terminal of the transistor element is connected to the compensation circuit, and a third terminal of the transistor element is connected to the output voltage. 7. The voltage stabilizing circuit module according to claim 6, wherein the operation of the switching circuit to activate or deactivate the compensation circuit according to the input bias voltage of the switching circuit includes: The compensation circuit is started or turned off according to whether the voltage difference between the first terminal and the third terminal reaches a critical value. 8. The voltage stabilizing circuit module of claim 6, wherein the transistor element comprises a P-type metal-oxide-semiconductor field effect transistor. 9. The voltage stabilizing circuit module of claim 1, wherein the voltage stabilizing circuit includes an error amplifier, and The error amplifier is used to compare the reference voltage and the feedback voltage and adjust the output voltage according to the comparison result. 10. The voltage stabilizing circuit module according to claim 9, wherein the compensation circuit is used to compensate for the high frequency response of the voltage stabilizing circuit, The voltage stabilizing circuit further includes a signal amplifier connected between the output end of the driving circuit and the output end of the error amplifier, and The signal amplifier is used to compensate for the low frequency response of the voltage stabilizing circuit. 11. The voltage stabilizing circuit module according to claim 1, wherein the compensation circuit includes an impedance element and a capacitance element, and the impedance element is connected in series between the switch circuit and the capacitance element. 12. A memory storage device, characterized in that it includes: A connection interface unit for connecting to the host system; Rewritable non-volatile memory module; memory control circuit unit; and a voltage stabilizing circuit module connected to at least one of the connection interface unit, the rewritable non-volatile memory module and the memory control circuit unit, The voltage stabilizing circuit module is used to: The driving circuit generates an output voltage according to the input voltage; generating a feedback voltage based on the output voltage; The voltage stabilizing circuit controls the driving circuit to adjust the output voltage according to the feedback voltage; The output of the voltage stabilizing circuit is compensated by a compensation circuit; and The compensation circuit is activated or deactivated according to the input bias voltage of the switching circuit, and the input bias voltage of the switching circuit is affected by the output of the voltage stabilizing circuit. 13. The memory storage device of claim 12, wherein the operation of the voltage stabilizing circuit module to enable or disable the compensation circuit according to the input bias of the switching circuit includes: In heavy load mode, enable the compensation circuit; and In light load mode, the compensation circuit is turned off. 14. The memory storage device of claim 12, wherein the operation of the voltage stabilizing circuit module to enable or disable the compensation circuit according to the input bias of the switching circuit includes: In response to the input bias of the switching circuit meeting a critical condition, activating the compensation circuit; and In response to the input bias of the switching circuit not meeting the critical condition, the compensation circuit is turned off. 15. The memory storage device of claim 12, wherein the operation of the voltage stabilizing circuit module to enable or disable the compensation circuit according to the input bias of the switching circuit includes: In the heavy load mode, the compensation circuit is turned on to the output terminal of the voltage stabilizing circuit; and In the light load mode, the compensation circuit is disconnected from the output terminal of the voltage stabilizing circuit. 16. The memory storage device according to claim 12, wherein in the heavy load mode, the driving voltage of the driving circuit is controlled by the voltage stabilizing circuit and the compensation circuit simultaneously, and In the light load mode, the driving voltage of the driving circuit is controlled by the voltage stabilizing circuit and is not controlled by the compensation circuit. 17. The memory storage device of claim 12, wherein the voltage stabilizing circuit module includes the switching circuit to enable or disable the compensation circuit according to the input bias of the switching circuit. , The switching circuit includes a transistor element, a first end of the transistor element is connected to the output end of the voltage stabilizing circuit, a second end of the transistor element is connected to the compensation circuit, and a third end of the transistor element is connected to the output end of the voltage stabilizing circuit. terminal is connected to the output voltage. 18. The memory storage device of claim 17, wherein the operation of the switching circuit to enable or disable the compensation circuit based on the input bias of the switching circuit includes: The transistor element activates or deactivates the compensation circuit according to whether the voltage difference between the first terminal and the third terminal reaches a critical value. 19. The memory storage device of claim 17, wherein the transistor elements comprise P-type metal-oxide-semiconductor field effect transistors. 20. The memory storage device of claim 12, wherein the voltage stabilizing circuit includes an error amplifier, and The error amplifier is used to compare the reference voltage and the feedback voltage and adjust the output voltage according to the comparison result. 21. The memory storage device of claim 20, wherein the compensation circuit is used to compensate for a high frequency response of the voltage stabilizing circuit, The voltage stabilizing circuit further includes a signal amplifier connected between the output end of the driving circuit and the output end of the error amplifier, and The signal amplifier is used to compensate for the low frequency response of the voltage stabilizing circuit. 22. The memory storage device of claim 12, wherein the compensation circuit includes an impedance element and a capacitance element, and the impedance element is connected in series between the switch circuit and the capacitance element. 23. A voltage control method, characterized in that it is used in a memory storage device, and the voltage control method includes: The driving circuit generates an output voltage according to the input voltage; generating a feedback voltage based on the output voltage; The voltage stabilizing circuit controls the driving circuit to adjust the output voltage according to the feedback voltage; The output of the voltage stabilizing circuit is compensated by a compensation circuit; and The compensation circuit is activated or deactivated according to the input bias voltage of the switching circuit, and the input bias voltage of the switching circuit is affected by the output of the voltage stabilizing circuit. 24. The voltage control method according to claim 23, wherein the step of turning on or off the compensation circuit according to the input bias of the switching circuit includes: In heavy load mode, enable the compensation circuit; and In light load mode, the compensation circuit is turned off. 25. The voltage control method according to claim 23, wherein the step of turning on or off the compensation circuit according to the input bias of the switching circuit includes: In response to the input bias of the switching circuit meeting a critical condition, activating the compensation circuit; and In response to the input bias of the switching circuit not meeting the critical condition, the compensation circuit is turned off. 26. The voltage control method according to claim 23, wherein the step of activating or closing the compensation circuit according to the output voltage includes: In the heavy load mode, the compensation circuit is turned on to the output terminal of the voltage stabilizing circuit; and In the light load mode, the compensation circuit is disconnected from the output terminal of the voltage stabilizing circuit. 27. The voltage control method according to claim 23, wherein in the heavy load mode, the driving voltage of the driving circuit is controlled by the voltage stabilizing circuit and the compensation circuit at the same time, and In the light load mode, the driving voltage of the driving circuit is controlled by the voltage stabilizing circuit and is not controlled by the compensation circuit. 28. The voltage control method of claim 23, wherein the memory storage device includes the switching circuit to enable or disable the compensation circuit according to the input bias voltage of the switching circuit, The switching circuit includes a transistor element, a first end of the transistor element is connected to the output end of the voltage stabilizing circuit, a second end of the transistor element is connected to the compensation circuit, and a third end of the transistor element is connected to the output end of the voltage stabilizing circuit. terminal is connected to the output voltage. 29. The voltage control method of claim 28, wherein the step of turning on or off the compensation circuit according to the input bias of the switching circuit includes: The transistor element activates or deactivates the compensation circuit according to whether the voltage difference between the first terminal and the third terminal reaches a critical value. 30. The voltage control method of claim 28, wherein the transistor element includes a P-type metal-oxide-semiconductor field effect transistor. 31. The voltage control method according to claim 23, wherein the step of controlling the driving circuit to adjust the output voltage by the voltage stabilizing circuit according to the feedback voltage includes: The reference voltage is compared with the feedback voltage and the output voltage is adjusted according to the comparison result. 32. The voltage control method according to claim 23, wherein the compensation circuit is used to compensate the high frequency response of the voltage stabilizing circuit, and the voltage control method further includes: The low frequency response of the voltage stabilizing circuit is compensated by a signal amplifier, wherein the signal amplifier is connected between the output terminal of the driving circuit and the output terminal of the voltage stabilizing circuit. 33. The voltage control method according to claim 23, wherein the compensation circuit includes an impedance element and a capacitance element, and the impedance element is connected in series between the switching circuit and the capacitance element.