CN115340064B

CN115340064B - Manufacturing method of semiconductor device with slope structure and semiconductor structure

Info

Publication number: CN115340064B
Application number: CN202211008628.7A
Authority: CN
Inventors: 汪志玉; 姚阳文; 方羊; 胡永宝; 闾新明
Original assignee: Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
Current assignee: Semiconductor Manufacturing Electronics Shaoxing Corp SMEC
Priority date: 2022-08-22
Filing date: 2022-08-22
Publication date: 2025-02-25
Anticipated expiration: 2042-08-22
Also published as: CN115340064A

Abstract

The embodiment of the present application relates to a method for manufacturing a semiconductor device with a slope structure and a semiconductor structure, wherein the method includes: providing a substrate including a device area and a test area; forming a functional structure layer on the device area and the test area; forming a sacrificial layer on the functional structure layer; synchronously etching the portion of the sacrificial layer located in the device area and the portion located in the test area to form a first groove in the device area and a second groove in the test area; the bottom of the sidewalls of the first groove and the second groove have an inclination angle greater than 90 degrees with the upper surface of the functional structure layer, so that the sacrificial layer forms a slope structure at the corresponding position; and obtaining the geometric dimension parameters of the slope structure by optically measuring multiple repeated structures. In this way, the problem that the geometric dimension parameters of the slope structure in the device area are difficult to measure is solved, and the measurement is simple, fast, and highly accurate, providing an important basis for judging whether the process continues and evaluating the performance of the semiconductor device.

Description

Method for manufacturing semiconductor device with slope structure and semiconductor structure

Technical Field

The present invention relates to the field of semiconductors, and more particularly, to a method for manufacturing a semiconductor device having a ramp structure and a semiconductor structure.

Background

In the manufacture of semiconductor devices, the actual geometric parameters of each manufactured part are made to meet the design requirements, and the actual geometric parameters are important to the operation and performance of the final semiconductor device. Taking a MEMS (Micro Electro MECHANICAL SYSTEM ) sensor as an example, by forming two substrates (i.e., an upper electrode plate and a lower electrode plate) on a substrate and forming a cavity between the two substrates, the conversion of a motion signal into an electrical signal is achieved by using a capacitance change between the two substrates caused by vibration occurring in the cavity. A support structure needs to be formed between the two substrates to ensure the presence of the cavity. In the related art, the sidewall of the support structure is designed in a non-steep shape, thereby reducing the problem of stress concentration and improving the strength of the upper electrode plate.

However, in order to achieve a better effect, the angle between the side wall of the support structure and the lower electrode plate needs to satisfy a certain angle range. How to simply, quickly and accurately measure the specific angle value of the included angle and determine whether the specific angle value falls into the designed angle range is a technical problem which needs to be solved by the technicians in the field.

Disclosure of Invention

In view of the above, an embodiment of the present application provides a method for manufacturing a semiconductor device with a ramp structure and a semiconductor structure for solving at least one of the problems in the background art.

In order to achieve the above purpose, the technical scheme of the application is realized as follows:

In a first aspect, in this embodiment, there is provided a method for manufacturing a semiconductor device having a ramp structure, the method including:

Providing a substrate, wherein the substrate comprises at least one device region and at least one test region;

forming a functional structure layer on the device region and the test region;

forming a sacrificial layer on the functional structure layer;

Etching the part of the sacrificial layer located in the device region and the part of the sacrificial layer located in the test region synchronously to form a first groove in the device region and a second groove in the test region, wherein the first groove is used for filling a supporting structure, the number of the second grooves located in at least one test region is multiple, the parts of the sacrificial layer located in the test region are divided into a plurality of repeated structures by the multiple second grooves, and an inclination angle larger than 90 degrees is formed between the bottoms of the side walls of the first groove and the second groove and the upper surface of the functional structure layer, so that the sacrificial layer forms a slope structure at a corresponding position;

And obtaining the geometric dimension parameters of the slope structure by carrying out optical measurement on the repeated structures.

Optionally, the number of the repeating structures located in at least one of the test areas is 4 or more.

Optionally, the distance between two adjacent repeated structures is in the range of 2-15 microns, and the bottom line width of each repeated structure is in the range of 2-15 microns.

Optionally, the obtaining the geometric dimension parameter of the slope structure by performing optical measurement on the repeated structures includes:

and obtaining the angle of the slope structure by carrying out optical measurement on the repeated structures, wherein the sum of the angle of the slope structure and the inclination angle is equal to 180 degrees.

Optionally, the method further comprises:

judging whether the angle of the slope structure belongs to a preset angle range, and executing the subsequent process if the judging result is that the angle belongs to the preset angle range.

Optionally, the preset angle range is 20-45 degrees.

Optionally, the performing the subsequent process includes:

filling the first trench with the support structure;

the sacrificial layer is removed to form a cavity at the location of the sacrificial layer.

In a second aspect, in this embodiment, there is provided a semiconductor structure including:

A substrate comprising at least one device region and at least one test region thereon;

A functional structural layer formed on the device region and the test region;

the support structure is formed on the functional structure layer, and a cavity with a first angle is formed between the bottom of the side wall of the support structure and the upper surface of the functional structure layer, and the first angle is smaller than 90 degrees;

And a plurality of repeating units positioned in at least one test area, wherein each repeating unit is arranged in parallel, a second angle is formed between the bottoms of the two side walls of each repeating unit and the upper surface of the functional structural layer along the arrangement direction, and the second angle is equal to the first angle.

Optionally, the number of repeating units located in at least one of the test zones is 4 or more.

Optionally, the distance between two adjacent repeating units is in the range of 2-15 microns, and the bottom line width of each repeating unit is in the range of 2-15 microns.

The manufacturing method of the semiconductor device with the slope structure and the semiconductor structure provided by the embodiment of the application comprise the steps of providing a substrate, forming a functional structure layer on the device region and the test region, forming a sacrificial layer on the functional structure layer, synchronously etching the part of the sacrificial layer, which is positioned in the device region, and the part of the sacrificial layer, which is positioned in the test region to form a first groove in the device region and a second groove in the test region, wherein the first groove is used for filling a supporting structure, the number of the second grooves positioned in the at least one test region is multiple, the multiple second grooves divide the part of the sacrificial layer, which is positioned in the test region, into multiple repeated structures, an inclined angle of more than 90 degrees is formed between the bottoms of the side walls of the first groove and the second groove and the upper surface of the functional structure layer, so that the sacrificial layer forms the slope structure at the corresponding position, and obtaining the geometric dimension parameter of the slope structure through optical measurement of the multiple repeated structures. Therefore, the problem that the geometric dimension parameter of the slope structure of the device region is difficult to measure is solved, the measurement is simple, convenient and quick, the accuracy is high, and an important basis is provided for judging whether the process is continued or not and evaluating the performance of the semiconductor device.

Additional aspects and advantages of the application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the application.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute a limitation on the application. In the drawings:

FIG. 1 is a schematic cross-sectional view of a MEMS sensor during fabrication;

Fig. 2 is a schematic flow chart of a method for manufacturing a semiconductor device with a ramp structure according to an embodiment of the present application;

Fig. 3 to 6 are schematic structural cross-sectional views of a semiconductor device having a ramp structure according to an embodiment of the present application in a manufacturing process;

FIG. 7 is a schematic top view of a test zone according to an embodiment of the present application;

FIG. 8 is a schematic top view of a test zone according to another embodiment of the present application;

FIG. 9 is a schematic diagram of the beam propagation path for optical measurements of a repeating structure using a machine.

Detailed Description

Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the application are shown in the drawings, it should be understood that the application may be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the application may be practiced without one or more of these details. In other instances, well-known functions and constructions are not described in detail since they would obscure the application in some of the features that are well known in the art, i.e., not all features of an actual embodiment are described herein.

In the drawings, the size of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like numbers refer to like elements throughout.

It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application. When a second element, component, region, layer or section is discussed, it does not necessarily mean that the first element, component, region, layer or section is present.

Spatial relationship terms such as "under", "above", "over" and the like may be used herein for convenience of description to describe one element or feature as illustrated in the figures in relation to another element or feature. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "under" and "under" may include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatially relative descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The meaning of "a plurality of" is two or more, unless specifically defined otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.

In order to provide a thorough understanding of the present application, detailed steps and detailed structures will be presented in the following description in order to explain the technical solution of the present application. Preferred embodiments of the present application are described in detail below, however, the present application may have other embodiments in addition to these detailed descriptions.

Fig. 1 shows a schematic cross-sectional structure of a MEMS sensor during the fabrication process. As shown, the sidewall 1301 of the sacrificial layer 130 is not vertically connected to the upper surface 1201 of the functional structural layer 120 (for layout reasons, the sacrificial layer 130 is not completely shown, and thus the left side of the sacrificial layer 130 is not a sidewall thereof, and the right side is not a sidewall thereof), and the sacrificial layer 130 has a slope structure 131, so that an included angle is formed between the sidewall 1301 of the sacrificial layer 130 and the upper surface 1201 of the functional structural layer 120. If the slope structure 131 is directly measured, the film thickness a of the sacrificial layer 130 at the location of the slope structure 131 and the projection width c of the slope structure 131 are measured to obtain the angle θ of the included angle, and the angle θ=arctan a/c is calculated by the following trigonometric function formula. Here, the projection width c refers to the width of the orthographic projection of the slope structure 131 on the upper surface of the functional structure layer 120.

However, the measuring process of the method is complicated, the film thickness a and the projection width c need to be collected by using different machines for multiple times, the occupied resources are more, the inner boundary is not easy to grasp when the projection width c of the slope structure 131 is measured, large errors are easy to generate, a set of data processing operation needs to be established, and the data processing process is long.

Based on the above, the embodiment of the application firstly provides a manufacturing method of a semiconductor device with a slope structure, which is simple, convenient, quick and high in accuracy, and in the manufacturing method, a certain measuring step is adopted to obtain the geometric dimension parameter of the slope structure, so that an important basis is provided for judging whether the working procedure is continued and evaluating the performance of the semiconductor device. The semiconductor device may be a MEMS sensor, such as a MEMS microphone, etc., although it will be understood that the semiconductor device may be any other semiconductor device having a ramp structure and requiring knowledge of the geometric parameters of the ramp structure.

Referring to fig. 2, a method for manufacturing a semiconductor device with a ramp structure according to an embodiment of the present application includes:

step S01, providing a substrate, wherein the substrate comprises at least one device area and at least one test area;

Step S02, forming a functional structure layer on the device region and the test region;

Step S03, forming a sacrificial layer on the functional structure layer;

Step S04, synchronously etching the part of the sacrificial layer located in the device region and the part of the sacrificial layer located in the test region to form a first groove in the device region and a second groove in the test region, wherein the first groove is used for filling the supporting structure, the number of the second grooves located in at least one test region is multiple, the parts of the sacrificial layer located in the test region are divided into a plurality of repeated structures by the plurality of second grooves, and an inclination angle larger than 90 degrees is formed between the bottoms of the side walls of the first groove and the second groove and the upper surface of the functional structure layer, so that the sacrificial layer forms a slope structure at the corresponding position;

step S05, obtaining geometric dimension parameters of the slope structure by performing optical measurement on the repeated structures.

Next, a method for manufacturing the semiconductor device having the ramp structure in the present embodiment will be further explained with reference to fig. 3 to 6 by taking the structure of the MEMS microphone as an example.

First, please refer to fig. 3. A substrate 100 is provided. The substrate 100 may be any carrier to which subsequent layers of material are added. For example, the substrate 100 may be a silicon (Si) substrate, a germanium (Ge) substrate, a compound semiconductor material substrate, a silicon-on-insulator (SOI) substrate, or a germanium-on-insulator (GeOI) substrate, or the like. In a specific application, the substrate 100 is a silicon wafer. The substrate 100 includes a device region and a test region thereon. It is understood that the device region refers to the region used to form the semiconductor device, the test region refers to the region where the semiconductor processing factory adds test cells in a wafer-mounted position for process monitoring during wafer processing, and the test region may also be understood as the region used to form test cells.

Next, a functional structure layer 120 is formed on the device region and the test region. Functional structural layer 120 is the structural layer that performs the function of the device and is thus retained in the final fabricated device. In a specific application where the semiconductor device is a MEMS sensor, the functional structure layer 120 is, for example, a layer for forming a lower electrode plate, and the material of the functional structure layer 120 is, for example, polysilicon (poly).

Optionally, other layers may be provided between the substrate 100 and the functional structural layer 120, for example, fig. 3 shows a case that further dielectric layers 110 are included. Dielectric layer 110 may be used to separate functional structure layer 120 from substrate 100. The material of the dielectric layer 110 is, for example, silicon oxide.

In addition, a plurality of first grooves G1 may be further included in the dielectric layer 110, and the functional structure layer 120 is not only formed on the dielectric layer 110 but also partially located in the first grooves G1.

A sacrificial layer 130 is formed on the functional structure layer 120. It will be appreciated that the sacrificial layer 130 is removed in a subsequent process. The material of the sacrificial layer 130 is, for example, silicon oxide.

In the test area, the functional structure layer 120 may further include a plurality of second grooves G2, the plurality of second grooves G2 divide the functional structure layer 120 into a plurality of repeating areas 1202, the plurality of repeating areas 1202 may be used to define positions for forming the repeating structures in the subsequent process, and the dividing the functional structure layer 120 into the plurality of repeating areas 1202 is beneficial to reducing difficulty in obtaining geometric parameters of the ramp structure in optical measurement. The "repetition" described herein refers to the reappearance of the same thing, the "repetition structure" refers to any one of the same structures, the "repetition region 1202" refers to any one of the same regions, and the functional structure layer 120 is divided into a plurality of the same regions in the test region as shown in fig. 3, and the repetition region 1202 refers to one of the plurality of the same regions.

Fig. 7 is a schematic top view of a test area according to an embodiment of the application, and fig. 8 is a schematic top view of a test area according to another embodiment of the application. As shown, the repeating areas 1202 are arranged in parallel. The width x of each repeating region 1202 is in the range of 1.5 microns to 15.5 microns, and the spacing y between adjacent repeating regions 1202 is in the range of 1.5 microns to 15.5 microns. Here, the width of each of the repeating regions 1202 refers to the dimension of each of the repeating regions 1202 in the arrangement direction, and the interval between adjacent repeating regions 1202, that is, the width of the second groove G2.

By way of example, the width x of each repeating region 1202 may comprise at least one of 6 microns, 8 microns, 10 microns, and the spacing y between adjacent repeating regions 1202 may comprise at least one of 4 microns, 6 microns, 8 microns. The values of x and y can be referred to in the following table 1:

TABLE 1

x/μm	6	8	10
				y/μm	4	6	8

The selection of the proper width x and the proper spacing y is beneficial to forming the slope structure which can equivalently replace the slope structure of the device region in the test region, so that the geometric dimension parameter of the slope structure of the device region can be equivalently obtained by carrying out optical measurement on the test unit to which the harmonic structure belongs.

As a possible implementation, the width x of each of the repeating areas 1202 has a plurality of values in the test zone (see FIG. 7), for example, including both repeating areas 1202 having a width of 6 microns and repeating areas 1202 having a width of 8 microns and/or 10 microns. The spacing y between adjacent repeating regions 1202 may also include a variety of values, including, for example, both where the spacing y is equal to 4 microns and where the spacing y is equal to 6 microns and/or 8 microns. In this way, a plurality of different sub-test regions can be formed on a substrate 100, and by measuring each sub-test region, the test unit closest to the ramp structure of the device region, i.e. the test unit most suitable for equivalently replacing the chip of the device region, can be found, so that the geometric dimension parameter of the ramp structure of the device region can be determined according to the optical measurement result of the test unit.

As another possible embodiment, there may be only the width x of one type of repeating area 1202 and the spacing y between two adjacent repeating areas 1202 in the test area (see fig. 8). The width x and the spacing y may be empirically set, for example, after finding the test unit most suitable for equivalent replacement of the device area chip, its x and y values are determined as the test area x and y values in the current manufacturing process. Therefore, the design can be simplified, and the area of the test area can be saved.

Next, please refer to fig. 4. The portion of the sacrificial layer 130 located in the device region and the portion located in the test region are simultaneously etched to form a first trench V1 in the device region and a second trench V2 in the test region. It is easy to understand that etching the part of the sacrificial layer 130 located in the device region and the part located in the test region synchronously means that the two different positions are etched in the same etching process, and the etchant, the ambient temperature, the atmosphere and the etching time used in the etching process are the same. Thus, the formation of the first trench V1 in the device region and the formation of the second trench V2 in the test region should also be theoretically identical. An inclination angle α of more than 90 degrees is provided between the bottom of the sidewall of the first trench V1 and the upper surface of the functional structure layer 120 so that the sacrificial layer 130 forms the slope structure 131 at the corresponding position, and similarly, an inclination angle α of more than 90 degrees is provided between the bottom of the sidewall of the second trench V2 and the upper surface of the functional structure layer 120 so that the sacrificial layer 130 also forms the slope structure 131 at the corresponding position.

Wherein the first trenches V1 are used for filling the support structure, and the step of filling the support structure will be explained later. The number of the first grooves V1 is not particularly limited here.

For smooth optical measurement, the number of second trenches V2 in the at least one test region is plural, and the plural second trenches V2 divide the portion of the sacrificial layer 130 in the test region into plural repeating structures 1302. Here, the plurality of repeating structures 1302 are respectively in one-to-one correspondence with the plurality of repeating regions 1202 of the functional structure layer 120.

It will be appreciated that the width x of the repeating region 1202 should be equal to or greater than the bottom linewidth of the repeating structure 1302. Here, the bottom line width of the repeating structure 1302 also refers to the dimension of the lower surface of the repeating structure 1302 in the direction along the arrangement of the repeating structure 1302. The bottom linewidth of the repeating structure 1302 should be equal to or greater than twice the projected width c of the ramp structure 131. The repeating structures 1302 are arranged in parallel. The bottom of both sidewalls of each repeating structure 1302 along the arrangement direction includes a slope structure 131.

Here, the sidewall of the repeating structure 1302 refers to the outer sidewall of the repeating structure 1302.

The number of repeating structures 1302 located in at least one test zone is greater than or equal to 4. Thus, the optical measurement of the repeating structure 1302 is advantageously performed using a machine. In order to more accurately obtain the geometric parameters of the ramp structure 131, the number of repeating structures 1302 located in at least one test zone may be 10 or more.

The spacing between two adjacent repeating structures 1302 is in the range of 2 microns to 15 microns, and the bottom linewidth of each repeating structure is in the range of 2 microns to 15 microns. The width of each repeating structure 1302 may include at least one of 5 microns to 6 microns, 7 microns to 8 microns, 9 microns to 10 microns, and the spacing between adjacent repeating structures 1302 may include at least one of 4 microns to 5 microns, 6 microns to 7 microns, 8 microns to 9 microns, corresponding to the size of each repeating region 1202.

As one possible implementation, the width of each repeating structure 1302 and the spacing between adjacent repeating structures 1302 may each have multiple values, e.g., more than three values, in the test zone. As another possible implementation, there may be only one repeat structure 1302 width and spacing between adjacent repeat structures 1302 in the test zone.

Next, by optically measuring the plurality of repeating structures 1302, the geometric parameters of the ramp structure 131 are obtained.

Here, the plurality of repeating structures 1302 are measured, resulting in higher accuracy of the data.

The obtaining of the geometric parameters of the ramp structure 131 by optically measuring the plurality of repeating structures 1302 may specifically include obtaining the angle θ of the ramp structure 131 by optically measuring the plurality of repeating structures 1302. It will be appreciated that the sum of the angle θ of the ramp structure 131 and the tilt angle α is equal to 180 degrees. Optical measurements of the plurality of repeating structures 1302 may be performed using an angular measurement machine such as a film measurement system, for example, GEMINI SERIES, 8000CD, available from Nandk. The machine irradiates light onto the repeating structure 1302, and monitors the signal reflected back from the repeating structure 1302 to obtain the angle θ of the ramp structure 131. A schematic diagram of the beam propagation path of the machine in performing optical measurements on the repeating structure 1302 can be referred to in fig. 9. As shown, an incident beam (Incident Beam) is emitted by the machine and irradiated on the repeating structure 1302, and the reflected beam (REFLECTED BEAM) and the transmitted beam (TRANSMITTED BEAM) are formed after the effect of the repeating structure 1302, so that the machine outputs various geometric dimension parameters, such as direct output angle values, through monitoring and spectrum analysis of the reflected beam and the transmitted beam.

As an optional implementation manner, the method provided by the embodiment of the application further comprises the steps of judging whether the angle of the slope structure 131 belongs to a preset angle range, and executing subsequent procedures if the judging result is that the angle belongs to the preset angle range.

Here, the preset angle range is, for example, 20 degrees to 45 degrees. It can be appreciated that the angle of the slope structure 131 is in the range of 20 degrees to 45 degrees, which is more beneficial to reducing stress concentration.

Next, please refer to fig. 5. Performing subsequent processing may include filling the support structure 140 within the first trench V1. Here, the material of the support structure 140 may be silicon nitride. In practical applications, the supporting structure 140 may not only fill the first trench V1, but also cover the surface of the sacrificial layer 130, thereby forming a structure with a wide upper portion and a narrow bottom portion.

Next, please refer to fig. 6. Performing a subsequent process may further include removing the sacrificial layer 130 to form a cavity 150 at the location of the sacrificial layer 130. In a MEMS sensor, the cavity 150 may provide a movable space for vibration of the functional structural layer 120. It will be appreciated that the step of forming the upper electrode plate should also be included in the subsequent process, and will not be described here since the step of forming the upper electrode plate is a common step in the manufacturing process of the MEMS sensor.

The manufacturing method of the device with the slope structure can simplify the process of measuring the geometric dimension parameters of the slope structure, enable the whole measuring process to be simple, convenient and quick, enable a single machine to complete all measurement, directly obtain the angle value of the slope structure, improve the accuracy of measurement through measuring a plurality of repeated structures, and provide reference comments for measuring the parameters of the complex structure.

When the angle of the slope structure is judged not to belong to the preset angle range, scrapping treatment can be carried out after the step, waste of time and cost caused by executing the subsequent step is avoided, and in addition, under certain conditions, the process can be adjusted in time, so that the adjusted angle of the slope structure belongs to the preset angle range. For structures where the angle of the ramp structure falls within a preset angle range and the subsequent process is continued, geometric parameters of the ramp structure, particularly the angle, will assist the engineer in evaluating the performance of the product.

On the basis, the embodiment of the application also provides a semiconductor structure. The semiconductor structure is used, for example, to form a MEMS device, including, for example, a MEMS microphone, etc. The semiconductor structure may be a wafer that has semiconductor devices formed on its surface but has not yet been diced, so that test areas remain on the semiconductor structure.

The semiconductor structure comprises a substrate, a functional structure layer, a supporting structure and a plurality of repeating units, wherein the substrate comprises at least one device area and at least one test area, the functional structure layer is formed on the device area and the test area, the supporting structure is formed on the functional structure layer, a cavity with a first angle is formed between the bottom of the side wall of the supporting structure and the upper surface of the functional structure layer, the first angle is smaller than 90 degrees, the repeating units are arranged in parallel in the at least one test area, a second angle is formed between the bottoms of the two side walls of the repeating units and the upper surface of the functional structure layer along the arrangement direction, and the second angle is equal to the first angle.

Wherein the side walls refer to the outer side walls of the corresponding structure, e.g. the side walls of the support structure refer specifically to the outer side walls of the support structure, and the two side walls of the repeating unit refer specifically to the two opposite outer side walls of the repeating unit. The first angle is equal to the angle θ. The repeating unit may be the repeating structure 1302, or may be a cavity left after the repeating structure 1302 is removed, which is not particularly limited in the present application. It should be appreciated that even though the repeating unit is a cavity left after the repeating structure 1302 is removed, the repeating unit is consistent with the position, shape, and geometry parameters of the repeating structure 1302.

Optionally, the number of repeating units located in at least one test zone is greater than or equal to 4.

Optionally, the interval between two adjacent repeating units is in the range of 2-15 microns, and the bottom line width of each repeating unit is in the range of 2-15 microns.

It should be noted that the embodiment of the semiconductor structure provided by the application and the embodiment of the manufacturing method of the semiconductor device with the slope structure belong to the same conception, and all technical features in the technical proposal recorded in each embodiment can be arbitrarily combined under the condition of no conflict. Therefore, reference may be made to the above embodiment of the method for manufacturing a semiconductor device having a ramp structure for the semiconductor structure provided in the embodiment of the present application, which is not described herein.

It should be understood that the above examples are illustrative and are not intended to encompass all possible implementations encompassed by the claims. Various modifications and changes may be made in the above embodiments without departing from the scope of the disclosure. Likewise, the individual features of the above embodiments can also be combined arbitrarily to form further embodiments of the invention which may not be explicitly described. Therefore, the above examples merely represent several embodiments of the present invention and do not limit the scope of protection of the patent of the present invention.

Claims

1. A method of manufacturing a semiconductor device having a ramp structure, the method comprising:

forming a functional structure layer on the device region and the test region;

forming a sacrificial layer on the functional structure layer;

2. The method for manufacturing a semiconductor device having a ramp structure according to claim 1, wherein the number of the repeating structures located in at least one of the test regions is 4 or more.

3. The method of manufacturing a semiconductor device having a ramp structure according to claim 1, wherein a pitch between two adjacent repeating structures is in a range of 2 micrometers to 15 micrometers, and a bottom line width of each of the repeating structures is in a range of 2 micrometers to 15 micrometers.

4. The method of manufacturing a semiconductor device having a ramp structure according to claim 1, wherein said obtaining geometric parameters of said ramp structure by optically measuring said plurality of repeating structures comprises:

5. The method for manufacturing a semiconductor device having a ramp structure according to claim 4, wherein the method further comprises:

6. The method for manufacturing a semiconductor device having a ramp structure according to claim 5, wherein the predetermined angle range is 20 degrees to 45 degrees.

7. The method of manufacturing a semiconductor device having a ramp structure according to claim 5, wherein the performing a subsequent process includes:

filling the first trench with the support structure;

the sacrificial layer is removed to form a cavity at a location of a portion of the sacrificial layer that is located in the device region.

8. A semiconductor structure, comprising:

A functional structural layer formed on the device region and the test region;

9. The semiconductor structure of claim 8, wherein the number of repeating units located within at least one of the test regions is 4 or more.

10. The semiconductor structure of claim 8, wherein a pitch between two adjacent repeating units is in a range of 2-15 microns, and a bottom linewidth of each repeating unit is in a range of 2-15 microns.