[go: up one dir, main page]

CN115332225A - Inorganic interposer structure and method for making the same - Google Patents

Inorganic interposer structure and method for making the same Download PDF

Info

Publication number
CN115332225A
CN115332225A CN202211261431.4A CN202211261431A CN115332225A CN 115332225 A CN115332225 A CN 115332225A CN 202211261431 A CN202211261431 A CN 202211261431A CN 115332225 A CN115332225 A CN 115332225A
Authority
CN
China
Prior art keywords
inorganic
interposer structure
inorganic interposer
passive components
wires
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211261431.4A
Other languages
Chinese (zh)
Inventor
赵作明
华菲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Huafeng Jixin Electronics Co ltd
Original Assignee
Beijing Huafeng Jixin Electronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Huafeng Jixin Electronics Co ltd filed Critical Beijing Huafeng Jixin Electronics Co ltd
Priority to CN202211261431.4A priority Critical patent/CN115332225A/en
Publication of CN115332225A publication Critical patent/CN115332225A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386Geometry or layout of the interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895Local interconnects; Local pads, as exemplified by patent document EP0896365
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/20Inductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/40Resistors
    • H10D1/47Resistors having no potential barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/60Capacitors
    • H10D1/68Capacitors having no potential barriers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The embodiment of the invention provides an inorganic intermediate layer structure and a manufacturing method of the inorganic intermediate layer structure, and belongs to the technical field of semiconductor packaging. The inorganic interposer structure has a conductive trace embedded therein for electrical transmission between multiple chips and between a chip and the passive component. The passive components are embedded into the inorganic intermediate layer structure, so that the space occupied by the passive components on an external circuit board (for example, on a substrate) can be reduced, and the communication distance between a chip and the passive components can be closer; and the arrangement of the conducting wires in the inorganic intermediate layer can be flexibly designed according to communication among multiple chips, communication between the chips and passive components and communication between the chips and an external circuit board, so that the complexity of the circuit design of the packaging structure formed based on the inorganic intermediate layer structure can be enhanced.

Description

无机中介层结构及无机中介层结构的制作方法Inorganic interposer structure and manufacturing method of inorganic interposer structure

技术领域technical field

本发明涉及半导体封装技术领域,具体地涉及一种无机中介层结构及无机中介层结构的制作方法。The invention relates to the technical field of semiconductor packaging, in particular to an inorganic interposer structure and a manufacturing method of the inorganic interposer structure.

背景技术Background technique

在芯片封装中,中介层是多芯片模块或电路板传递电信号的管道,可以充当多颗裸片和电路板之间的连接和通信桥梁。中介层按其组成材料可以分为有机中介层和无机中介层。有机中介层由有填充剂的有机材料等制成,无机中介层可以由玻璃或陶瓷等材料制成。无机中介层基于其良好的机械新能,良好的热导和硅晶元较小的热胀不匹配性,在高功耗,高可靠性,但导线间距要求低的领域会有更好的应用前景。In chip packaging, the interposer is a conduit for electrical signals transmitted by multi-chip modules or circuit boards, and can act as a connection and communication bridge between multiple dies and circuit boards. Interposers can be classified into organic interposers and inorganic interposers according to their constituent materials. The organic interlayer is made of organic materials with fillers, and the inorganic interlayer can be made of materials such as glass or ceramics. Based on its good mechanical properties, good thermal conductivity and small thermal expansion mismatch of silicon wafers, the inorganic interposer will have better applications in fields with high power consumption, high reliability, but low wire spacing requirements prospect.

现有的无机中介层还存在很多可以改进的结构和工艺,例如,提高线宽来满足更多复杂芯片的集成,才能提高芯片封装的结构和性能。There are still many structures and processes that can be improved in the existing inorganic interposer. For example, the structure and performance of chip packaging can only be improved by increasing the line width to meet the integration of more complex chips.

发明内容Contents of the invention

本发明实施例的目的是提供一种无机中介层结构,该无机中介层结构可以提高芯片封装的结构和性能。The purpose of the embodiments of the present invention is to provide an inorganic interposer structure, which can improve the structure and performance of chip packaging.

为了实现上述目的,本发明实施例提供一种无机中介层结构,所述无机中介层结构中被嵌入被动元器件,所述无机中介层结构中具有导线,所述导线用于基于该无机中介层结构进行封装的多芯片之间以及芯片与所述被动元器件之间的电传输。In order to achieve the above object, an embodiment of the present invention provides an inorganic interposer structure, in which passive components are embedded, the inorganic interposer structure has wires, and the wires are used to The structure performs electrical transmission among the packaged multi-chips and between the chips and the passive components.

可选地,所述被动元器件包括电容、电感、电阻和电压调节器。Optionally, the passive components include capacitors, inductors, resistors and voltage regulators.

可选地,所述无机中介层结构为多层结构,所述无机中介层结构的层数根据所述导线的布置和/或所述被动元器件的数量、结构和大小选择。Optionally, the inorganic interposer structure is a multilayer structure, and the number of layers of the inorganic interposer structure is selected according to the arrangement of the wires and/or the number, structure and size of the passive components.

可选地,所述无机中介层结构的每层结构上设置有穿孔,用于通过所述穿孔进行对准后,对所述无机中介层结构的多层结构进行烧结。Optionally, each layer structure of the inorganic interposer structure is provided with a perforation, which is used for sintering the multi-layer structure of the inorganic interposer structure after alignment through the perforation.

可选地,所述穿孔为金属穿孔,用于连接所述无机中介层结构的多层结构中的所述导线和所述被动元器件,以实现层与层之间通信。Optionally, the through-holes are metal through-holes, which are used to connect the wires and the passive components in the multi-layer structure of the inorganic interposer structure, so as to realize communication between layers.

可选地,所述无机中介层结构的材料根据所述被动元器件的热胀系数或所述被动元器件的制造工艺进行选择,其中,所述无机中介层和所述被动元器件的热胀系数的偏差在预设范围内,所述无机中介层和所述被动元器件的制作工艺具有内似性。Optionally, the material of the inorganic interposer structure is selected according to the coefficient of thermal expansion of the passive component or the manufacturing process of the passive component, wherein the thermal expansion of the inorganic interposer and the passive component If the deviation of the coefficient is within the preset range, the manufacturing process of the inorganic intermediary layer and the passive component has internal similarity.

可选地,所述无机中介层结构的材料为陶瓷或玻璃。Optionally, the material of the inorganic interposer structure is ceramic or glass.

可选地,所述无机中介层结构包括线路板和侧壁支撑结构,所述无机中介层结构通过所述线路板和所述侧壁支撑结构构成容纳芯片的空间。Optionally, the inorganic interposer structure includes a circuit board and a sidewall support structure, and the inorganic interposer structure forms a space for accommodating chips through the circuit board and the sidewall support structure.

本发明实施例还提供一种无机中介层结构的制作方法,所述无机中介层结构的制作方法包括:将导线和被动元器件布置在所述无机中介层结构的至少一层结构上,所述无机中介层结构为多层结构;以及连接所述无机中介层结构的每层结构,所述导线用于基于该无机中介层结构进行封装的多芯片之间以及芯片与所述被动元器件之间的电传输。An embodiment of the present invention also provides a method for manufacturing an inorganic interposer structure, the method for manufacturing an inorganic interposer structure includes: arranging wires and passive components on at least one layer of the inorganic interposer structure, the The inorganic interposer structure is a multi-layer structure; and each layer structure of the inorganic interposer structure is connected, and the wires are used between multiple chips packaged based on the inorganic interposer structure and between chips and the passive components electrical transmission.

可选地,在所述将导线和被动元器件布置在所述无机中介层结构的至少一层结构上之前,所述中介层结构的制作方法还包括:根据所述导线的布置和/或待嵌入所述无机中介层结构的所述被动元器件的数量、结构和大小,确定所述无机中介层结构的层数。Optionally, before arranging the wires and passive components on at least one layer of the inorganic interposer structure, the method for manufacturing the interposer structure further includes: according to the arrangement of the wires and/or to be The number, structure and size of the passive components embedded in the inorganic interposer structure determine the number of layers of the inorganic interposer structure.

可选地,在所述确定所述无机中介层结构的层数之后,所述中介层结构的制作方法还包括:根据所述导线和所述被动元器件在所述中介层结构的多层结构上的布置,在所述无机中介层结构的每层结构上设置穿孔,用于通过所述穿孔进行对准后,对所述无机中介层结构的多层结构进行烧结。Optionally, after the determination of the number of layers of the inorganic interposer structure, the method for manufacturing the interposer structure further includes: In the above arrangement, perforations are provided on each layer structure of the inorganic interposer structure, for alignment through the through holes, and then the multilayer structure of the inorganic interposer structure is sintered.

可选地,所述穿孔为金属穿孔,用于连接所述无机中介层结构的多层结构中的所述导线和所述被动元器件,以实现层与层之间通信。Optionally, the through-holes are metal through-holes, which are used to connect the wires and the passive components in the multi-layer structure of the inorganic interposer structure, so as to realize communication between layers.

可选地,所述被动元器件包括电容、电感、电阻和电压调节器。Optionally, the passive components include capacitors, inductors, resistors and voltage regulators.

可选地,所述无机中介层结构的材料根据所述被动元器件的热胀系数或所述被动元器件的制造工艺进行选择,其中,所述无机中介层和所述被动元器件的热胀系数的偏差在预设范围内,所述无机中介层和所述被动元器件的制作工艺具有内似性。Optionally, the material of the inorganic interposer structure is selected according to the coefficient of thermal expansion of the passive component or the manufacturing process of the passive component, wherein the thermal expansion of the inorganic interposer and the passive component If the deviation of the coefficient is within the preset range, the manufacturing process of the inorganic intermediary layer and the passive component has internal similarity.

可选地,所述无机中介层结构的材料为陶瓷或玻璃。Optionally, the material of the inorganic interposer structure is ceramic or glass.

可选地,所述无机中介层结构包括线路板和侧壁支撑结构,无机中介层结构的制作方法还包括:连接所述线路板和所述侧壁支撑结构,所述无机中介层结构通过所述线路板和所述侧壁支撑结构构成容纳芯片的空间。Optionally, the inorganic interposer structure includes a circuit board and a sidewall support structure, and the manufacturing method of the inorganic interposer structure further includes: connecting the circuit board and the sidewall support structure, and the inorganic interposer structure passes through the The circuit board and the side wall support structure form a space for accommodating chips.

通过上述技术方案,本发明实施例将被动元器件嵌入无机中介层结构中,既可以减少外部电路板(例如,基板上)被动元器件所占空间,还可以使芯片与被动元器件之间的通信距离更近;且导线在无机中介层中的布置可以根据多芯片之间通信、芯片与被动元器件之间通信、以及芯片与外部电路板通信进行灵活设计,可以增强基于该无机中介层结构形成的封装结构电路设计的复杂性。Through the above technical solution, the embodiment of the present invention embeds the passive components into the inorganic interposer structure, which can not only reduce the space occupied by the passive components on the external circuit board (for example, on the substrate), but also make the space between the chip and the passive components The communication distance is shorter; and the arrangement of wires in the inorganic interposer can be flexibly designed according to the communication between multiple chips, the communication between the chip and passive components, and the communication between the chip and the external circuit board, which can enhance the structure based on the inorganic interposer. The complexity of the circuit design of the formed package structure.

本发明实施例的其它特征和优点将在随后的具体实施方式部分予以详细说明。Other features and advantages of the embodiments of the present invention will be described in detail in the following detailed description.

附图说明Description of drawings

附图是用来提供对本发明实施例的进一步理解,并且构成说明书的一部分,与下面的具体实施方式一起用于解释本发明实施例,但并不构成对本发明实施例的限制。在附图中:The accompanying drawings are used to provide a further understanding of the embodiments of the present invention, and constitute a part of the specification, and are used together with the following specific embodiments to explain the embodiments of the present invention, but do not constitute limitations to the embodiments of the present invention. In the attached picture:

图1是本发明实施例提供的无机中介层结构的切面示意图;Fig. 1 is a cross-sectional schematic diagram of an inorganic interposer structure provided by an embodiment of the present invention;

图2是示例无机中介层结构制作的示意图;Fig. 2 is the schematic diagram that example inorganic interposer structure is made;

图3本发明实施例提供的无机中介层结构的制作方法的流程示意图。FIG. 3 is a schematic flowchart of a method for fabricating an inorganic interposer structure provided by an embodiment of the present invention.

具体实施方式Detailed ways

以下结合附图对本发明实施例的具体实施方式进行详细说明。应当理解的是,此处所描述的具体实施方式仅用于说明和解释本发明实施例,并不用于限制本发明实施例。The specific implementation manners of the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation manners described here are only used to illustrate and explain the embodiments of the present invention, and are not intended to limit the embodiments of the present invention.

图1是本发明实施例提供的无机中介层结构的切面示意图,请参考图1,所述无机中介层结构中被嵌入被动元器件,所述无机中介层结构中具有导线,所述导线用于基于该无机中介层结构进行封装的多芯片之间以及芯片与所述被动元器件之间的电传输。Fig. 1 is a cross-sectional schematic diagram of an inorganic interposer structure provided by an embodiment of the present invention, please refer to Fig. 1, passive components are embedded in the inorganic interposer structure, and there are wires in the inorganic interposer structure, and the wires are used for Based on the inorganic interposer structure, the electric transmission between the packaged multi-chips and between the chips and the passive components is carried out.

本发明实施例优选的所述无机中介层结构的材料为陶瓷或玻璃。The preferred material of the inorganic interposer structure in the embodiment of the present invention is ceramic or glass.

本发明实施例优选的所述被动元器件包括电容、电感、电阻和电压调节器等。The preferred passive components in the embodiment of the present invention include capacitors, inductors, resistors, voltage regulators and the like.

以示例说明,可以将设计在外部电路板(例如,基板上)的被动元器件嵌入无机中介层结构中,既可以减少基板上被动元器件和导线所占空间,还可以使基于该无机中介层结构进行封装的芯片与被动元器件之间、以及被动元器件之间的通信距离更近。As an example, passive components designed on an external circuit board (for example, on a substrate) can be embedded in an inorganic interposer structure, which can not only reduce the space occupied by passive components and wires on the substrate, but also enable The communication distance between the chip packaged with the structure and the passive components, and between the passive components is closer.

所述无机中介层中还具有导线,可以进一步缩短通信距离,保证电器件之间的通信质量,同时导线的布置可以根据多芯片之间通信、芯片与被动元器件之间通信、以及芯片与外部电路板(例如,基板上芯片)通信进行灵活设计,可以增强基于该无机中介层结构形成的封装结构电路设计的复杂性,更适用于高功耗半导体产品。There are wires in the inorganic intermediary layer, which can further shorten the communication distance and ensure the communication quality between electrical devices. The flexible design of circuit board (for example, chip on substrate) communication can enhance the complexity of the circuit design of the packaging structure based on the inorganic interposer structure, and is more suitable for high power consumption semiconductor products.

本发明实施例优选的所述无机中介层结构可以包括线路板和侧壁支撑结构,所述无机中介层结构通过所述线路板和所述侧壁支撑结构构成容纳芯片的空间。In the preferred embodiment of the present invention, the inorganic interposer structure may include a circuit board and a sidewall support structure, and the inorganic interposer structure forms a space for accommodating chips through the circuit board and the sidewall support structure.

请参考图1,以电容嵌入无机中介层结构为例,线路板中加深的线示出了导线。基于图1为无机中介层结构的侧视图,侧壁支撑结构中加深的横线示出了电容的电极,加深的竖线输出了连接穿孔(后文会详细介绍),也可以看作为导线。Please refer to FIG. 1 , taking the capacitor embedded in the inorganic interposer structure as an example, the deepened line in the circuit board shows the wire. Based on the side view of the inorganic interposer structure in Figure 1, the deepened horizontal lines in the sidewall support structure show the electrodes of the capacitor, and the deepened vertical lines output the connection perforations (described in detail later), which can also be regarded as wires.

继续参考图1,多个芯片可以位于该无机中介层结构的线路板的上表面,以及线路板和侧壁支撑结构构成容纳芯片的空间,以实现多芯片之间的通信。该优选的无机中介层结构可以在线路板上布置多导线,在侧壁支撑结构内布置被动元器件以及连接穿孔和被动元器件的导线,既可以实现导线和被动元器件的布局,又可以不限制位于线路板和侧壁支撑结构构成的空间的芯片的高度和大小。Continuing to refer to FIG. 1 , multiple chips can be located on the upper surface of the circuit board of the inorganic interposer structure, and the circuit board and the sidewall support structure form a space for accommodating the chips, so as to realize communication between the multiple chips. The preferred inorganic interposer structure can arrange multiple wires on the circuit board, arrange passive components and wires connecting through holes and passive components in the side wall support structure, which can realize the layout of wires and passive components without Limit the height and size of the chip in the space formed by the circuit board and the sidewall support structure.

进一步优选的,所述无机中介层结构的材料根据所述被动元器件的热胀系数或所述被动元器件的制造工艺进行选择。其中,所述无机中介层和所述被动元器件的热胀系数的偏差在预设范围内,所述无机中介层和所述被动元器件的制作工艺具有内似性。Further preferably, the material of the inorganic interposer structure is selected according to the coefficient of thermal expansion of the passive components or the manufacturing process of the passive components. Wherein, the deviation of the coefficient of thermal expansion of the inorganic intermediary layer and the passive component is within a preset range, and the manufacturing process of the inorganic intermediary layer and the passive component has internal similarity.

本发明实施例可以充分利用被动元器件(例如,电容)和无机中介层结构(例如,陶瓷中介层)制造工艺的内似性,以较低成本嵌入被动元器件;被动元器件(例如,电容)和无机中介层结构(例如,陶瓷中介层)可以使用热胀系数相同的材料,不会有应力产生,可靠性不会受影响。基于上述两点,本发明实施例的无机中介层结构可以实现嵌入很多的被动元器件,以增强封装结构电路设计的复杂性。The embodiments of the present invention can make full use of the internal similarity of the manufacturing process of passive components (for example, capacitors) and inorganic interposer structures (for example, ceramic interposers), and embed passive components at a relatively low cost; passive components (for example, capacitors) ) and inorganic interposer structures (for example, ceramic interposer) can use materials with the same thermal expansion coefficient, without stress generation, and reliability will not be affected. Based on the above two points, the inorganic interposer structure of the embodiment of the present invention can realize the embedding of many passive components, so as to enhance the complexity of circuit design of the packaging structure.

本发明实施例优选的所述无机中介层结构为多层结构,所述无机中介层结构的层数根据所述导线的布置和/或所述被动元器件的数量、结构和大小选择。In the preferred embodiment of the present invention, the inorganic interposer structure is a multi-layer structure, and the number of layers of the inorganic interposer structure is selected according to the arrangement of the wires and/or the number, structure and size of the passive components.

优选的,所述无机中介层结构的每层结构上设置有穿孔,用于通过所述穿孔进行对准后,对所述无机中介层结构的多层结构进行烧结。Preferably, each layer structure of the inorganic interposer structure is provided with a perforation, which is used for sintering the multi-layer structure of the inorganic interposer structure after alignment through the perforation.

进一步优选的,所述穿孔为金属穿孔,用于连接所述无机中介层结构的多层结构中的所述导线和所述被动元器件,以实现层与层之间通信。Further preferably, the through holes are metal through holes, used to connect the wires and the passive components in the multilayer structure of the inorganic interposer structure, so as to realize communication between layers.

请参考图2示出的无机中介层结构的制作过程。图2示出了被动元器件(例如,嵌入式电容、嵌入式电感、嵌入式电阻等)嵌入无机中介层结构的制作过程。以示例说明,被动元器件(例如,电容)和中介层介质(无机材料)可一起嵌入在无机中介层结构的多层结构中,通过穿孔(优选为金属穿孔,或称为金属通孔)对准后,通过高温烧结形成完整的无机中介层结构。其中,高温烧结可以根据无机中介层结构的材料和金属穿孔的材料进行选择,一般可以在700℃-1600℃。图2中垂直的虚线即是对准的穿孔,以实现层与层之间通信,该穿孔还可以连接芯片,以实现多芯片之间、芯片与被动元器件之间、以及芯片与外部电路板之间的通信。图2示出了4层的电容、电感、电阻嵌入无机中介层结构,而所述无机中介层结构的层数可以根据所述导线的布置和/或所述被动元器件的数量、结构和大小进行选择。Please refer to the fabrication process of the inorganic interposer structure shown in FIG. 2 . FIG. 2 shows the fabrication process of passive components (eg, embedded capacitors, embedded inductors, embedded resistors, etc.) embedded in the inorganic interposer structure. By way of example, passive components (e.g., capacitors) and interposer dielectrics (inorganic materials) can be embedded together in a multilayer structure of an inorganic interposer structure through vias (preferably metal vias, or metal vias) to the After that, a complete inorganic interposer structure is formed by high-temperature sintering. Among them, the high-temperature sintering can be selected according to the material of the inorganic interposer structure and the material of the metal perforation, and generally can be at 700°C-1600°C. The vertical dotted line in Figure 2 is the aligned perforation to achieve communication between layers, and the perforation can also connect chips to realize between multiple chips, between chips and passive components, and between chips and external circuit boards communication between. Figure 2 shows a 4-layer capacitor, inductance, and resistance embedded in an inorganic interposer structure, and the number of layers of the inorganic interposer structure can be based on the arrangement of the wires and/or the number, structure and size of the passive components. Make a selection.

需要说明,无机中介层结构中的导线制作过程与被动元器件嵌入无机中介层结构的制作过程类似,此处不再赘述。It should be noted that the fabrication process of wires in the inorganic interposer structure is similar to the fabrication process of passive components embedded in the inorganic interposer structure, and will not be repeated here.

图3是本发明实施例提供的无机中介层结构的制作方法的流程示意图;请参考图3,所述无机中介层结构的制作方法可以包括以下步骤:Fig. 3 is a schematic flow chart of a method for manufacturing an inorganic interposer structure provided by an embodiment of the present invention; please refer to Fig. 3, the method for manufacturing an inorganic interposer structure may include the following steps:

步骤S110将导线和被动元器件布置在所述无机中介层结构的至少一层结构上,所述无机中介层结构为多层结构。In step S110, wires and passive components are arranged on at least one layer of the inorganic interposer structure, and the inorganic interposer structure is a multilayer structure.

本发明实施例优选的所述无机中介层结构的材料为陶瓷或玻璃。The preferred material of the inorganic interposer structure in the embodiment of the present invention is ceramic or glass.

本发明实施例优选的所述被动元器件包括电容、电感、电阻和电压调节器等。The preferred passive components in the embodiment of the present invention include capacitors, inductors, resistors, voltage regulators and the like.

优选的,在步骤S110之前,所述中介层结构的制作方法还包括:根据所述导线的布置和/或待嵌入所述无机中介层结构的所述被动元器件的数量、结构和大小,确定所述无机中介层结构的层数。Preferably, before step S110, the manufacturing method of the interposer structure further includes: according to the arrangement of the wires and/or the number, structure and size of the passive components to be embedded in the inorganic interposer structure, determine The number of layers of the inorganic interlayer structure.

优选的,在所述确定所述无机中介层结构的层数之后,所述中介层结构的制作方法还包括:根据所述导线和所述被动元器件在所述中介层结构的多层结构上的布置,在所述无机中介层结构的每层结构上设置穿孔,用于通过所述穿孔进行对准后,对所述无机中介层结构的多层结构进行烧结。Preferably, after the determination of the number of layers of the inorganic interposer structure, the manufacturing method of the interposer structure further includes: arrangement, and a perforation is provided on each layer structure of the inorganic interposer structure, for alignment through the perforation, and then sintering the multilayer structure of the inorganic interposer structure.

本发明实施例优选的所述穿孔为金属穿孔,用于连接所述无机中介层结构的多层结构中的所述导线和所述被动元器件,以实现层与层之间通信。In the embodiment of the present invention, preferably, the through holes are metal through holes, which are used to connect the wires and the passive components in the multilayer structure of the inorganic interposer structure, so as to realize communication between layers.

请参考图2,被动元器件(例如,嵌入式电容、嵌入式电感、嵌入式电阻等)和中介层介质(无机材料)可一起嵌入在无机中介层结构的多层结构中,以通过穿孔(优选为金属穿孔,或称为金属通孔)对准后,通过高温烧结形成完整的无机中介层结构,图2中垂直的虚线即是对准的穿孔,以实现层与层之间通信,该穿孔还可以连接芯片,以实现多芯片之间、芯片与被动元器件之间、以及芯片与外部电路板之间的通信。Referring to Figure 2, passive components (e.g., embedded capacitors, embedded inductors, embedded resistors, etc.) and interposer dielectrics (inorganic materials) can be embedded together in the multilayer structure of the inorganic interposer It is preferably a metal through hole, or called a metal through hole) After alignment, a complete inorganic interposer structure is formed by high-temperature sintering. The vertical dotted line in Figure 2 is the aligned perforation to achieve layer-to-layer communication. Through holes can also connect chips to realize communication between multiple chips, between chips and passive components, and between chips and external circuit boards.

本发明实施例优选的所述无机中介层结构的材料根据所述被动元器件的热胀系数或所述被动元器件的制造工艺进行选择,其中,所述无机中介层和所述被动元器件的热胀系数的偏差在预设范围内,所述无机中介层和所述被动元器件的制作工艺具有内似性。In the preferred embodiment of the present invention, the material of the inorganic interposer structure is selected according to the thermal expansion coefficient of the passive components or the manufacturing process of the passive components, wherein the inorganic interposer and the passive components The deviation of the coefficient of thermal expansion is within a preset range, and the manufacturing process of the inorganic intermediary layer and the passive component has internal similarity.

本发明实施例可以充分利用被动元器件(例如,电容)和无机中介层结构(例如,陶瓷中介层)制造工艺的内似性,以较低成本嵌入被动元器件;被动元器件(例如,电容)和无机中介层结构(例如,陶瓷中介层)可以使用热胀系数相同的材料,不会有应力产生,可靠性不会受影响。基于上述两点,本发明实施例的无机中介层结构可以实现嵌入很多的被动元器件,以增强封装结构电路设计的复杂性。The embodiments of the present invention can make full use of the internal similarity of the manufacturing process of passive components (for example, capacitors) and inorganic interposer structures (for example, ceramic interposers), and embed passive components at a relatively low cost; passive components (for example, capacitors) ) and inorganic interposer structures (for example, ceramic interposer) can use materials with the same thermal expansion coefficient, without stress generation, and reliability will not be affected. Based on the above two points, the inorganic interposer structure of the embodiment of the present invention can realize the embedding of many passive components, so as to enhance the complexity of circuit design of the packaging structure.

步骤S120:连接所述无机中介层结构的每层结构,所述导线用于基于该无机中介层结构进行封装的多芯片之间以及芯片与所述被动元器件之间的电传输。Step S120: Connect each layer of the inorganic interposer structure, and the wires are used for electrical transmission between multiple chips packaged based on the inorganic interposer structure and between chips and the passive components.

承接上述示例,通过高温烧结穿孔,连接无机中介层结构的每层结构,形成完整的无机中介层结构,以实现多芯片之间、芯片与被动元器件之间、以及芯片与外部电路板之间的通信。Following the above example, through high temperature sintering and perforation, each layer structure of the inorganic interposer structure is connected to form a complete inorganic interposer structure, so as to realize the multi-chip, between the chip and passive components, and between the chip and the external circuit board. Communication.

请参考图1,本发明实施例优选的所述无机中介层结构包括线路板和侧壁支撑结构,无机中介层结构的制作方法还包括:连接所述线路板和所述侧壁支撑结构,所述无机中介层结构通过所述线路板和所述侧壁支撑结构构成容纳芯片的空间。Please refer to FIG. 1, the preferred inorganic interposer structure in the embodiment of the present invention includes a circuit board and a sidewall support structure, and the manufacturing method of the inorganic interposer structure further includes: connecting the circuit board and the sidewall support structure, the The inorganic interlayer structure constitutes a space for accommodating chips through the circuit board and the side wall support structure.

以示例说明,分别通过如图2所示的分层制作过程,制作路板和侧壁支撑结构,导线嵌入无机中介层结构的制作过程与被动元器件嵌入无机中介层结构类似。可以在线路板上布置多导线,在侧壁支撑结构内布置被动元器件以及连接穿孔和被动元器件的导线。连接所述线路板和所述侧壁支撑结构,所述无机中介层通过所述线路板和所述侧壁支撑结构构成容纳芯片的空间,既可以实现导线和被动元器件的布局,又可以不限制位于线路板和侧壁支撑结构构成的空间的芯片的高度和大小。To illustrate by way of example, the circuit board and the sidewall support structure are manufactured through the layered manufacturing process as shown in Figure 2, and the manufacturing process of the wire-embedded inorganic interposer structure is similar to that of passive components embedded in the inorganic interposer structure. Multiple wires can be arranged on the circuit board, passive components and wires connecting through-holes and passive components can be arranged in the sidewall support structure. Connecting the circuit board and the side wall support structure, the inorganic interlayer forms a space for accommodating chips through the circuit board and the side wall support structure, which can not only realize the layout of wires and passive components, but also avoid Limit the height and size of the chip in the space formed by the circuit board and the sidewall support structure.

据此,本发明实施例将导线和被动元器件嵌入无机中介层结构中,既可以减少外部电路板(例如,基板上)被动元器件和导线所占空间,还可以使芯片与被动元器件之间的通信距离更近;同时,导线嵌入无机中介层中,而非外接连接线,可以进一步缩短通信距离,保证电器件之间的通信质量,同时导线的布置可以根据多芯片之间通信、芯片与被动元器件之间通信、以及芯片与外部电路板(例如,基板上芯片)通信进行灵活设计,可以增强基于该无机中介层结构形成的封装结构电路设计的复杂性。Accordingly, the embodiment of the present invention embeds wires and passive components into the inorganic interposer structure, which can not only reduce the space occupied by passive components and wires on the external circuit board (for example, on the substrate), but also make the gap between the chip and the passive components The communication distance between them is closer; at the same time, the wires are embedded in the inorganic interposer instead of external connecting wires, which can further shorten the communication distance and ensure the communication quality between electrical devices. Flexible design of communication with passive components, and communication between chips and external circuit boards (eg, chips on substrates) can enhance the complexity of circuit design of packaging structures based on the inorganic interposer structure.

还需要说明的是,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、商品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、商品或者设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括要素的过程、方法、商品或者设备中还存在另外的相同要素。It should also be noted that the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus comprising a set of elements includes not only those elements, but also includes Other elements not expressly listed, or elements inherent in the process, method, commodity, or apparatus are also included. Without further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

以上仅为本申请的实施例而已,并不用于限制本申请。对于本领域技术人员来说,本申请可以有各种更改和变化。凡在本申请的精神和原理之内所作的任何修改、等同替换、改进等,均应包含在本申请的权利要求范围之内。The above are only examples of the present application, and are not intended to limit the present application. For those skilled in the art, various modifications and changes may occur in this application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

Claims (16)

1.一种无机中介层结构,其特征在于,所述无机中介层结构中被嵌入被动元器件,1. An inorganic interposer structure, characterized in that passive components are embedded in the inorganic interposer structure, 所述无机中介层结构中具有导线,所述导线用于基于该无机中介层结构进行封装的多芯片之间以及芯片与所述被动元器件之间的电传输。There are wires in the inorganic interposer structure, and the wires are used for electrical transmission between multiple chips packaged based on the inorganic interposer structure and between chips and the passive components. 2.根据权利要求1所述的无机中介层结构,其特征在于,所述被动元器件包括电容、电感、电阻和电压调节器。2. The inorganic interposer structure according to claim 1, wherein the passive components include capacitors, inductors, resistors and voltage regulators. 3.根据权利要求1所述的无机中介层结构,其特征在于,所述无机中介层结构为多层结构,3. The inorganic interposer structure according to claim 1, wherein the inorganic interposer structure is a multilayer structure, 所述无机中介层结构的层数根据所述导线的布置和/或所述被动元器件的数量、结构和大小选择。The number of layers of the inorganic interposer structure is selected according to the arrangement of the wires and/or the number, structure and size of the passive components. 4.根据权利要求1所述的无机中介层结构,其特征在于,所述无机中介层结构的每层结构上设置有穿孔,4. The inorganic interposer structure according to claim 1, characterized in that, each layer of the inorganic interposer structure is provided with perforations, 用于通过所述穿孔进行对准后,对所述无机中介层结构的多层结构进行烧结。After being aligned through the through holes, the multilayer structure of the inorganic interposer structure is sintered. 5.根据权利要求4所述的无机中介层结构,其特征在于,所述穿孔为金属穿孔,用于连接所述无机中介层结构的多层结构中的所述导线和所述被动元器件,以实现层与层之间通信。5. The inorganic interposer structure according to claim 4, wherein the through holes are metal through holes for connecting the wires and the passive components in the multilayer structure of the inorganic interposer structure, To achieve communication between layers. 6.根据权利要求1所述的无机中介层结构,其特征在于,所述无机中介层结构的材料根据所述被动元器件的热胀系数或所述被动元器件的制造工艺进行选择,6. The inorganic interposer structure according to claim 1, wherein the material of the inorganic interposer structure is selected according to the coefficient of thermal expansion of the passive components or the manufacturing process of the passive components, 其中,所述无机中介层和所述被动元器件的热胀系数的偏差在预设范围内,所述无机中介层和所述被动元器件的制作工艺具有内似性。Wherein, the deviation of the coefficient of thermal expansion of the inorganic intermediary layer and the passive component is within a preset range, and the manufacturing process of the inorganic intermediary layer and the passive component has internal similarity. 7.根据权利要求1所述的无机中介层结构,其特征在于,所述无机中介层结构的材料为陶瓷或玻璃。7. The inorganic interposer structure according to claim 1, wherein the material of the inorganic interposer structure is ceramic or glass. 8.根据权利要求1-7中任意一项所述的无机中介层结构,其特征在于,所述无机中介层结构包括线路板和侧壁支撑结构,所述无机中介层结构通过所述线路板和所述侧壁支撑结构构成容纳芯片的空间。8. The inorganic interposer structure according to any one of claims 1-7, wherein the inorganic interposer structure comprises a circuit board and a sidewall support structure, and the inorganic interposer structure passes through the circuit board and the sidewall support structure form a space for accommodating chips. 9.一种无机中介层结构的制作方法,其特征在于,所述无机中介层结构的制作方法包括:9. A method for making an inorganic interposer structure, characterized in that the method for making the inorganic interposer structure comprises: 将导线和被动元器件布置在所述无机中介层结构的至少一层结构上,所述无机中介层结构为多层结构;以及Disposing wires and passive components on at least one layer of the inorganic interposer structure, the inorganic interposer structure being a multilayer structure; and 连接所述无机中介层结构的每层结构,connecting each layer structure of said inorganic interposer structure, 所述导线用于基于该无机中介层结构进行封装的多芯片之间以及芯片与所述被动元器件之间的电传输。The wires are used for electrical transmission between multiple chips packaged based on the inorganic interposer structure and between the chips and the passive components. 10.根据权利要求9所述的无机中介层结构的制作方法,其特征在于,在所述将导线和被动元器件布置在所述无机中介层结构的至少一层结构上之前,所述中介层结构的制作方法还包括:10. The manufacturing method of the inorganic interposer structure according to claim 9, characterized in that, before said arranging wires and passive components on at least one layer of said inorganic interposer structure, said interposer The method of making the structure also includes: 根据所述导线的布置和/或待嵌入所述无机中介层结构的所述被动元器件的数量、结构和大小,确定所述无机中介层结构的层数。The number of layers of the inorganic interposer structure is determined according to the arrangement of the wires and/or the quantity, structure and size of the passive components to be embedded in the inorganic interposer structure. 11.根据权利要求10所述的无机中介层结构的制作方法,其特征在于,在所述确定所述无机中介层结构的层数之后,所述中介层结构的制作方法还包括:11. The fabrication method of the inorganic interposer structure according to claim 10, characterized in that, after the number of layers of the inorganic interposer structure is determined, the fabrication method of the interposer structure further comprises: 根据所述导线和所述被动元器件在所述中介层结构的多层结构上的布置,在所述无机中介层结构的每层结构上设置穿孔,用于通过所述穿孔进行对准后,对所述无机中介层结构的多层结构进行烧结。According to the arrangement of the wires and the passive components on the multilayer structure of the interposer structure, through holes are provided on each layer structure of the inorganic interposer structure for alignment through the through holes, The multilayer structure of the inorganic interposer structure is sintered. 12.根据权利要求11所述的无机中介层结构的制作方法,其特征在于,所述穿孔为金属穿孔,用于连接所述无机中介层结构的多层结构中的所述导线和所述被动元器件,以实现层与层之间通信。12. The manufacturing method of the inorganic interposer structure according to claim 11, wherein the perforation is a metal perforation for connecting the wires and the passive Components to enable layer-to-layer communication. 13.根据权利要求9所述的无机中介层结构的制作方法,其特征在于,所述被动元器件包括电容、电感、电阻和电压调节器。13. The manufacturing method of the inorganic interposer structure according to claim 9, wherein the passive components include capacitors, inductors, resistors and voltage regulators. 14.根据权利要求9所述的无机中介层结构的制作方法,其特征在于,所述无机中介层结构的材料根据所述被动元器件的热胀系数或所述被动元器件的制造工艺进行选择,14. The manufacturing method of the inorganic interposer structure according to claim 9, wherein the material of the inorganic interposer structure is selected according to the coefficient of thermal expansion of the passive components or the manufacturing process of the passive components , 其中,所述无机中介层和所述被动元器件的热胀系数的偏差在预设范围内,所述无机中介层和所述被动元器件的制作工艺具有内似性。Wherein, the deviation of the coefficient of thermal expansion of the inorganic intermediary layer and the passive component is within a preset range, and the manufacturing process of the inorganic intermediary layer and the passive component has internal similarity. 15.根据权利要求9所述的无机中介层结构的制作方法,其特征在于,所述无机中介层结构的材料为陶瓷或玻璃。15. The manufacturing method of the inorganic interposer structure according to claim 9, wherein the material of the inorganic interposer structure is ceramic or glass. 16.根据权利要求9-15中任意一项所述的无机中介层结构的制作方法,其特征在于,所述无机中介层结构包括线路板和侧壁支撑结构,无机中介层结构的制作方法还包括:16. according to the manufacture method of the described inorganic interposer structure in any one of claim 9-15, it is characterized in that, described inorganic interposer structure comprises circuit board and sidewall support structure, the manufacture method of inorganic interposer structure also comprises include: 连接所述线路板和所述侧壁支撑结构,所述无机中介层结构通过所述线路板和所述侧壁支撑结构构成容纳芯片的空间。The circuit board and the side wall support structure are connected, and the inorganic interposer structure forms a space for accommodating chips through the circuit board and the side wall support structure.
CN202211261431.4A 2022-10-14 2022-10-14 Inorganic interposer structure and method for making the same Pending CN115332225A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211261431.4A CN115332225A (en) 2022-10-14 2022-10-14 Inorganic interposer structure and method for making the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211261431.4A CN115332225A (en) 2022-10-14 2022-10-14 Inorganic interposer structure and method for making the same

Publications (1)

Publication Number Publication Date
CN115332225A true CN115332225A (en) 2022-11-11

Family

ID=83914973

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211261431.4A Pending CN115332225A (en) 2022-10-14 2022-10-14 Inorganic interposer structure and method for making the same

Country Status (1)

Country Link
CN (1) CN115332225A (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4522667A (en) * 1980-06-25 1985-06-11 General Electric Company Method for making multi-layer metal core circuit board laminate with a controlled thermal coefficient of expansion
WO1988002183A1 (en) * 1986-09-19 1988-03-24 Hughes Aircraft Company Trimming passive components buried in multilayer structures
US20080061427A1 (en) * 2006-09-11 2008-03-13 Industrial Technology Research Institute Packaging structure and fabricating method thereof
JP2008103657A (en) * 2006-09-20 2008-05-01 Alps Electric Co Ltd Circuit module, and its manufacturing method
US20140048906A1 (en) * 2012-03-23 2014-02-20 Stats Chippac, Ltd. Semiconductor Device and Method of Forming a Fan-Out PoP Device with PWB Vertical Interconnect Units
US20160181169A1 (en) * 2014-12-23 2016-06-23 Intel Corporation Organic-inorganic hybrid structure for integrated circuit packages
CN113809058A (en) * 2020-06-16 2021-12-17 英特尔公司 Microelectronic structure including bridge
US20220278021A1 (en) * 2019-07-31 2022-09-01 Tripent Power Llc Aluminum nitride multilayer power module interposer and method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4522667A (en) * 1980-06-25 1985-06-11 General Electric Company Method for making multi-layer metal core circuit board laminate with a controlled thermal coefficient of expansion
WO1988002183A1 (en) * 1986-09-19 1988-03-24 Hughes Aircraft Company Trimming passive components buried in multilayer structures
US20080061427A1 (en) * 2006-09-11 2008-03-13 Industrial Technology Research Institute Packaging structure and fabricating method thereof
JP2008103657A (en) * 2006-09-20 2008-05-01 Alps Electric Co Ltd Circuit module, and its manufacturing method
US20140048906A1 (en) * 2012-03-23 2014-02-20 Stats Chippac, Ltd. Semiconductor Device and Method of Forming a Fan-Out PoP Device with PWB Vertical Interconnect Units
US20160181169A1 (en) * 2014-12-23 2016-06-23 Intel Corporation Organic-inorganic hybrid structure for integrated circuit packages
US20220278021A1 (en) * 2019-07-31 2022-09-01 Tripent Power Llc Aluminum nitride multilayer power module interposer and method
CN113809058A (en) * 2020-06-16 2021-12-17 英特尔公司 Microelectronic structure including bridge

Similar Documents

Publication Publication Date Title
TWI566653B (en) A substrate-less electronic devcie and the method to fabricate thereof
CN108807297B (en) Electronic package and method of making the same
US7889509B2 (en) Ceramic capacitor
TWI251321B (en) An integrated circuit package substrate having a thin film capacitor structure
CN1115169A (en) Fastening base board
JP2019530977A (en) Power module and method for manufacturing a power module
TW201411800A (en) Three-dimensional modules for electronic integration
TWI264744B (en) Solid electrolytic capacitor, transmission-line device, method of producing the same, and composite electronic component using the same
TW200806107A (en) Multilayer wiring board capable of reducing noise over wide frequency band with simple structure
KR100887133B1 (en) Low Temperature Cofired Ceramic Substrate
CN103094126B (en) The preparation method of the trickle three-dimensional conducting wire of ceramic components
CN103377818A (en) High-frequency element with through-hole via inductor and manufacturing method thereof
TW201343016A (en) A substrate-less electronic component
CN115332225A (en) Inorganic interposer structure and method for making the same
CN110323061B (en) Three-dimensional module with multiple firing modes
US20070169959A1 (en) Microelectronic device with mixed dielectric
TW202145852A (en) Substrate structure with increased routing area of core layer and the manufacturing method thereof for providing additional circuit layout in the core layer to improve the space utilization and the flexibility of circuit layout
CN112768362A (en) Preparation method of embedded packaging device
KR101243304B1 (en) Interposer and its manufacturing method
JP4704503B1 (en) Electronic device substrate and electronic device
CN115064524B (en) Conductive hole array capacitor, preparation method, chip, preparation method and electronic equipment
TWI775280B (en) Capacitor integrated structure, capacitor unit and manufacturing method thereof
TWI817388B (en) Composite structure of ceramic substrate
JP5507278B2 (en) Machinable ceramic circuit board and manufacturing method thereof
TWI820690B (en) Power module and manufacturing method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20221111

RJ01 Rejection of invention patent application after publication