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CN115314159A - Inter-chip data transmission method and device - Google Patents

Inter-chip data transmission method and device Download PDF

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Publication number
CN115314159A
CN115314159A CN202210923504.5A CN202210923504A CN115314159A CN 115314159 A CN115314159 A CN 115314159A CN 202210923504 A CN202210923504 A CN 202210923504A CN 115314159 A CN115314159 A CN 115314159A
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chip
forwarded
data packet
network data
network
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CN115314159B (en
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不公告发明人
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Chengdu Aich Technology Co Ltd
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Chengdu Aich Technology Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W28/00Network traffic management; Network resource management
    • H04W28/02Traffic management, e.g. flow control or congestion control
    • H04W28/06Optimizing the usage of the radio link, e.g. header compression, information sizing, discarding information
    • H04W28/065Optimizing the usage of the radio link, e.g. header compression, information sizing, discarding information using assembly or disassembly of packets
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The invention discloses a method and a device for data transmission between chips, relates to the technical field of wireless communication, and aims to solve the problem that network data packets cannot be cooperatively processed between the conventional master chip and the conventional slave chip, and all the network data packets can only be processed by a master control chip or a slave chip, so that the use of a memory is unbalanced. The inter-chip data transmission method comprises the following steps: receiving a network data packet to be forwarded from a chip; determining the type of the network data packet to be forwarded; determining a forwarding rule matched with the network data packet to be forwarded according to a predefined forwarding channel and the type; forwarding the network data packet to be forwarded to a target chip according to the forwarding rule; the target chip is a master control chip or a slave chip. The inter-chip data transmission method provided by the invention is used for data transmission between the master control chip and the slave chip.

Description

Inter-chip data transmission method and device
Technical Field
The present invention relates to the field of wireless communication technologies, and in particular, to a method and an apparatus for transmitting data between chips.
Background
The data transmission between the master control chip and the slave chip has complex control flow and data flow interaction, and different types of network data packets transmitted at the same time can follow different network transmission protocols.
The processing of the network data packet consumes the memory resource of the chip, and the existing dual-chip system generally forwards all the received network data packet to the master control chip for processing or all the received network data packet is processed by the slave chip, for example: when the slave chip is a transparent transmission WiFi chip, all network data packets are processed in the master control chip; when the slave chip is an MCU WiFi chip, the network data packet is processed in the slave chip; because the memory of the slave chip is very small compared with the master control chip, if all network data packets are processed by the slave chip, the memory occupation of the slave chip is increased, the operation of the slave chip is influenced, and the performance of the whole system is further influenced.
Disclosure of Invention
The invention aims to provide a method and a device for data transmission between chips, which are used for solving the problem that the existing master chip and the existing slave chip cannot carry out cooperative processing on network data packets, and all the network data packets can be processed only by a master control chip or a slave chip, so that the use of a memory is unbalanced.
In order to achieve the above purpose, the invention provides the following technical scheme:
the invention provides a method for transmitting data between chips, which comprises the following steps:
receiving a network data packet to be forwarded from a chip;
determining the type of the network data packet to be forwarded;
determining a forwarding rule matched with the network data packet to be forwarded according to a predefined forwarding channel and the type;
forwarding the network data packet to be forwarded to a target chip according to the forwarding rule; the target chip is a master control chip or a slave chip.
Optionally, the network data packet to be forwarded includes a check flag bit and a first check value, where the first check value is obtained by performing check calculation on the network data packet to be forwarded, and the first check value is located at the tail of the network data packet to be forwarded; the check flag bit is used for enabling the target chip to determine whether the network data packet to be forwarded is a target network data packet to be forwarded.
Optionally, the process of determining, by the target chip, whether the network data packet to be forwarded is a target network data packet to be forwarded includes:
the target chip judges whether the network data packet to be forwarded contains the check flag bit;
if the network data packet to be forwarded does not contain the check flag bit, entering a callback function for abnormal branch processing;
if the network data packet to be forwarded contains the check flag bit, checking the network data packet to be forwarded, and calculating to obtain a second check value;
comparing the second check value with the first check value, and if the second check value is the same as the first check value, processing the network data packet to be forwarded by the target chip;
if not, entering a callback function of abnormal branch processing.
Optionally, determining, according to a predefined forwarding channel and the type, a forwarding rule matched with the network packet to be forwarded includes:
judging whether a forwarding rule matched with the type of the network data packet to be forwarded exists in the forwarding rules, and if so, forwarding the network data packet to be forwarded according to the forwarding rule matched with the type of the network data packet to be forwarded;
and if the network data packet does not exist, forwarding the network data packet to the main control chip.
Optionally, the predefined forwarding channel is configured to specify that the network packet to be forwarded is forwarded to the master chip or to the slave chip.
Optionally, when the target chip is the slave chip, the slave chip processes the network data packet to be forwarded.
Optionally, when the target chip is the main control chip, the network data packet to be forwarded is sent to a network node established on the side of the main control chip according to the forwarding rule, and the network node receives the network data packet to be forwarded and sends the network data packet to the main control chip for processing; and when the slave chip network successfully acquires the IP address and the MAC address, the slave chip network synchronously transmits the IP address and the MAC address to the network node, so that the network node receives and transmits network data packets.
Optionally, when the master control chip and the slave chip execute an instruction to send data to the outside, the master control chip sends the data to the slave chip through the network node, and the slave chip sends the data through WiFi-driven configuration;
when the slave chip executes a data command sent to the outside, the slave chip directly sends the data through the configuration of the WiFi drive.
Optionally, the forwarding rule includes an IP address of the master control chip, a port number of the slave chip, a port number of the master control chip, a designated transport layer protocol, and a transport protocol type.
The invention also provides a device for transmitting data between chips, which comprises:
the slave chip receiving module is used for receiving the network data packet to be forwarded from the chip;
the type determining module is used for determining the type of the network data packet to be forwarded;
a forwarding rule determining module, configured to determine, according to a predefined forwarding channel and the type, a forwarding rule matching the network packet to be forwarded;
the forwarding module is used for forwarding the network data packet to be forwarded to a target chip according to the forwarding rule; the target chip is a master control chip or a slave chip.
Compared with the prior art, in the inter-chip data transmission method provided by the invention, the network data packet to be forwarded is received from the chip; determining the type of the network data packet to be forwarded; determining a forwarding rule matched with the network data packet to be forwarded according to a predefined forwarding channel and the type; forwarding the network data packet to be forwarded to a target chip according to the forwarding rule; the target chip is a master control chip or a slave chip. The user can designate whether the network data packet to be forwarded is forwarded to the master control chip or the slave chip through the predefined forwarding channel, the forwarding rule matched with the network data packet to be forwarded is determined according to the type of the network data packet to be forwarded, and the network data packet to be forwarded is forwarded to the target chip according to the forwarding rule. By the method, a user can select whether to forward the received network data packet to the master control chip or the slave chip for processing according to needs, and select to forward the received network data packet to the master control chip instead of the slave chip for processing, so that the consumption of the memory of the slave chip can be reduced, and the system performance can be improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and do not limit the invention. In the drawings:
fig. 1 is a flowchart of a method for transmitting data between chips according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a forwarding path between a master chip and a slave chip according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a data transmission channel between a master chip and a slave chip according to an embodiment of the present invention;
fig. 4 is a schematic diagram illustrating a generation process of a network data packet with a check flag according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a process of checking a network data packet to be forwarded by a target chip according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an inter-chip data transmission device according to an embodiment of the present invention.
Detailed Description
In order to facilitate clear description of technical solutions of the embodiments of the present invention, in the embodiments of the present invention, terms such as "first" and "second" are used to distinguish the same items or similar items having substantially the same functions and actions. For example, the first threshold and the second threshold are only used for distinguishing different thresholds, and the sequence order of the thresholds is not limited. Those skilled in the art will appreciate that the terms "first," "second," etc. do not denote any order or quantity, nor do the terms "first," "second," etc. denote any order or importance.
It is intended that the words "exemplary" or "such as" and "like" be used herein to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g.," is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present relevant concepts in a concrete fashion.
In the present invention, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a and b combination, a and c combination, b and c combination, or a, b and c combination, wherein a, b and c can be single or multiple.
If there is an Lwip protocol between the master control chip and the slave chip, the received network data packets are generally sent to the master control chip or the slave chip for processing between the existing master and slave chips, and the network data of the master and slave chips cannot be well distributed and processed, which results in unbalanced memory usage.
Based on the above problems, the present invention provides a method and an apparatus for inter-chip data transmission, wherein a user selects whether a received network data packet is processed at a master control chip end or a slave chip end at an upper layer, so as to solve the problem that the network data packet cannot be cooperatively processed between the master chip and the slave chip, and all network data packets can only be processed by the master control chip or the slave chip, which results in unbalanced memory usage.
Fig. 1 is a flowchart of an inter-chip data transmission method according to an embodiment of the present invention, and as shown in fig. 1, the inter-chip data transmission method includes the following steps:
step 101: and receiving the network data packet to be forwarded from the chip.
Step 102: and determining the type of the network data packet to be forwarded.
The types of the network data packet to be forwarded include: ICMP, IGMP, ARP, etc.
Step 103: and determining a forwarding rule matched with the network data packet to be forwarded according to a predefined forwarding channel and the type.
The predefined forwarding channel is used for appointing a network data packet to be forwarded to the master control chip or the slave chip; the forwarding to the master chip or the slave chip can be represented by a structure variable by defining the structure variable.
The type of the network data packet to be forwarded is matched with the transmission protocol type in the forwarding rule, so that the forwarding rule matched with the network data packet to be forwarded is determined. The forwarding rule includes a transport layer protocol type correspondingly adopted by the type of the network data packet to be forwarded.
Step 104: and forwarding the network data packet to be forwarded to a target chip according to the forwarding rule.
The target chip is a master control chip or a slave chip. The forwarding rule comprises an IP address of the master control chip, a port number of the slave chip, a port number of the master control chip, a designated transport layer protocol and a transport protocol type. The type of protocol transported includes TCP or UDP.
Optionally, determining, according to a predefined forwarding channel and the type, a forwarding rule matched with the network packet to be forwarded includes:
judging whether a forwarding rule matched with the type of the network data packet to be forwarded exists in the forwarding rules, and if so, forwarding the network data packet to be forwarded according to the forwarding rule matched with the type of the network data packet to be forwarded;
and if the network data packet does not exist, forwarding the network data packet to the main control chip.
Because the memory of the slave chip is smaller than that of the master control chip, when a forwarding rule matched with the type of the network data packet to be forwarded does not exist, the network data packet to be forwarded is forwarded according to a default forwarding rule, and the default forwarding rule defaults to forward the network data packet to be forwarded to the master control chip for processing, so that the occupation of the memory of the slave chip is reduced.
Optionally, when the target chip is the slave chip, the slave chip processes the network data packet to be forwarded.
Optionally, when the target chip is the main control chip, the network data packet to be forwarded is sent to a network node established on the side of the main control chip according to the forwarding rule, and the network node receives the network data packet to be forwarded and sends the network data packet to the main control chip for processing; and when the slave chip network successfully acquires the IP address and the MAC address, the slave chip network synchronously transmits the IP address and the MAC address to the network node, so that the network node receives and transmits network data packets.
The network node may be a wlan0 network node, and the wlan0 network node is equivalent to a network card.
Before the master control chip communicates with the slave chip, system initialization needs to be performed, and the initialization on the master control chip side includes: the network connection initialization of the main control chip side is used for establishing user mode and kernel mode information transmission at the main control chip side; initializing a communication channel of a slave chip and necessary hardware peripheral resources such as SDIO (serial digital input output) equipment, flow control and the like on the side of a master control chip; a network node is initialized and established for receiving/transmitting network data packets. Initializing the slave chip after the initialization of the master control chip is finished, wherein the initialization of the slave chip comprises the following steps: initializing hardware peripheral resources such as SDIO (secure digital input output) equipment, flow control and the like so as to establish a communication channel with a main control chip subsequently; establishing a callback function of network node network attribute change, and synchronizing network node information to a master control chip side from the chip side; creating a virtual network node; setting a Repeater forwarding rule for a network data packet of a Repeater forwarding module; initializing resources of a communication channel with a main control chip; and the slave chip is registered to receive a message callback function, and the callback function is mainly used for user-defined service development.
Fig. 2 is a schematic diagram of a forwarding path between a master chip and a slave chip provided in an embodiment of the present invention, and as shown in fig. 2, a HOST chip end is a master chip end, a DEVICE chip end is a slave chip end, when the slave chip is a WiFi chip, both the master chip and the slave chip have Lwip protocol stacks, a network data communication function of a forwarding module Repeater is implemented at the slave chip side, the forwarding module Repeater includes a Filter rule, and a specific forwarding rule is configured by the Filter rule. Firstly, a Wlan0 network node is established by software configuration at the side of a master control chip, then the IP address and the MAC address of the slave chip side are synchronized to the master control chip through a registered callback function, and the master control chip can use the IP address and the MAC information of the slave chip to transmit and receive network data packets.
Referring to fig. 2, when the target chip is the main control chip, the network data packet to be forwarded is sent to the wlan0 network node established on the side of the main control chip according to the forwarding rule, and the wlan0 network node sends the received network data packet to be forwarded to the main control chip for processing.
The network data packet received by the WiFi of the slave chip side is forwarded to the master control chip side through the data transmission channel through the Repeater module, so that the consumption of slave chip resources can be reduced.
Referring to fig. 2, when the target chip is a slave chip, the target chip processes the network packet to be forwarded.
And forwarding the network data packet to the slave chip side, and forwarding the network data packet configured by the WiFi drive to a protocol stack Lwip of the slave chip for processing through matching a forwarding rule.
Referring to fig. 2, when the master control chip and the slave chip execute an instruction to send data to the outside, the master control chip sends the data to the slave chip through the network node, and the slave chip sends the data through the WiFi driver configuration;
when the slave chip executes the data sending instruction outwards, the slave chip sends out the data directly through the WiFi-driven configuration.
The user can appoint whether the network data packet to be forwarded is forwarded to the main control chip or the slave chip through the predefined forwarding channel, the forwarding rule matched with the network data packet to be forwarded is determined according to the type of the network data packet to be forwarded, and the network data packet to be forwarded is forwarded to the target chip according to the forwarding rule. By the method, a user can select whether to forward the received network data packet to the master control chip or the slave chip for processing according to needs, and select to forward the received network data packet to the master control chip instead of the slave chip for processing, so that the consumption of the memory of the slave chip can be reduced, and the system performance can be improved.
Fig. 3 is a schematic diagram of a data transmission channel between a master control chip and a slave chip according to an embodiment of the present invention, as shown in fig. 3, when the slave chip sends data, the data is transmitted to an Adapter node for processing, and after the Adapter node packages the data, the data may be sent to the master control chip through a network node or a hardware transmission peripheral device arranged at a slave chip end, so as to complete data transmission of the slave chip; meanwhile, the master control chip can receive data sent by the slave chip through a network node or a hardware peripheral arranged at the master control chip end, and send the data to the Adapter node of the master control chip for processing, and the data sent by the slave chip is obtained after the processing is finished, so that the data sending flow from the slave chip to the master control chip is finished.
When the master control chip sends data, the data are transmitted to the Adapter node for processing, after the Adapter node packages the data, the data are sent to the slave chip through the network node or the hardware transmission peripheral arranged at the master control chip end, the data sending of the master control chip is completed, meanwhile, the slave chip receives the data from the master control chip through the network node or the hardware transmission peripheral arranged at the slave chip end, the data are sent to the Adapter node of the slave chip for processing, the data sent from the master control chip are obtained after the processing is completed, and then the data sending process from the master control chip to the slave chip is completed. The hardware transmission peripheral of the master chip or the slave chip can be SDIO or SPI.
Because of complex control flow and data flow interaction in data transmission between chips, different types of network data packets transmitted at the same time can follow different network transmission protocols. During data transmission, errors may occur, which may cause one or more frames transmitted on the link to be corrupted, for example, bit errors occur, so that the receiving side receives the wrong data, which may affect the security of the data. Based on this, the data transmission error can be prevented by adding the check flag bit to the transmitted data.
Specifically, the network data packet to be forwarded includes a check flag bit and a first check value, where the first check value is obtained by performing check calculation on the network data packet to be forwarded, and the first check value is located at the tail of the network data packet to be forwarded; the check flag bit is used for enabling the target chip to determine whether the network data packet to be forwarded is a target network data packet to be forwarded.
The generation process of the network data packet to be forwarded including the check flag bit and the first check value may be described with reference to fig. 4, as shown in fig. 4, the check flag bit is added before data transmission, then the data is checked, the first check value is calculated and spliced to the tail of the data, and the network data packet to be forwarded is generated.
When the network data packet to be forwarded is forwarded to the master control chip or the slave chip, the master control chip or the slave chip checks the received network data packet to be forwarded to determine whether the received network data packet is a target network data packet to be forwarded, and the process that the target chip determines whether the received network data packet to be forwarded is the target network data packet to be forwarded is as follows:
the target chip judges whether the network data packet to be forwarded contains the check flag bit;
if the network data packet to be forwarded does not contain the check flag bit, entering a callback function for abnormal branch processing;
if the network data packet to be forwarded contains the check flag bit, checking the network data packet to be forwarded, and calculating to obtain a second check value;
comparing the second check value with the first check value, and if the second check value is the same as the first check value, processing the network data packet to be forwarded by the target chip;
if not, entering a callback function for processing the abnormal branch.
The above process is described with reference to fig. 3 and fig. 5, when the network data packet to be forwarded is forwarded to the master control chip or the slave chip for processing, the master control chip or the slave chip performs a check processing on the received network data packet at the Adapter node, first, it is determined whether the network data packet includes a check flag bit, if not, the network data packet enters an abnormal branch processing, if so, a second check value is obtained by calculation, the second check value is compared with the first check value, if the comparison is passed, the network data packet is processed, and if not, the network data packet enters an abnormal branch processing.
Referring to fig. 3, the method of adding the check flag bit may also be used for data transmission between the master control chip and the slave chip, if the transmission with the check mode is selected, data transmission is implemented at the master control chip, the check flag bit is added before the self-defined message to generate final transmission data, after the data is transmitted to the Adapter node at the master control chip side, the check flag bit of the data is checked, if the check flag bit exists, the data is checked at the Adapter node data, the check value is calculated and spliced to the tail of the transmission data, and after the processing, the data is transmitted to the slave chip side through the hardware transmission peripheral; if the mode without verification is selected, a verification flag bit is not added to the self-defined message, after the data are transmitted to the Adapter node, the transmitted data are checked for the verification flag bit, and the transmitted data are directly transmitted to the slave chip through the hardware transmission peripheral equipment because the verification flag bit does not exist; the method comprises the steps that a slave chip receives data sent by a master control chip end through a hardware transmission peripheral, when the data are transmitted to an Adapter node on the slave chip side, after the Adapter node receives the data, check of a check flag bit can be preferentially carried out on the transmitted data, if the check flag bit exists, the transmitted data are checked on the Adapter on the receiving side, a new check value is calculated, then the check values spliced to the tail portion of the data are compared, if the check values pass, the transmitted data are directly sent to the slave chip to be processed, and if the check values do not pass, the data enter a callback function of processing of abnormal branches, and meanwhile, the master control chip end is informed of check failure. If the mode without verification is selected for sending, the Adapter node at the slave chip side checks the verification flag bit of the incoming data, and if the verification flag bit does not exist, the incoming data is directly sent to the slave chip for processing. After the slave chip receives the processed verification data, the slave chip can judge the command sent by the master control end according to the transmitted data, and then call different functions at the slave chip end according to different commands to acquire related data or realize related functions.
The above-mentioned scheme provided by the embodiment of the present invention is introduced mainly from the perspective of interaction between network elements. It is understood that in order to realize the above functions, hardware structures and/or software modules for performing the respective functions are included. Those of skill in the art will readily appreciate that the present invention can be implemented in hardware or a combination of hardware and computer software, with the exemplary elements and algorithm steps described in connection with the embodiments disclosed herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The functional modules may be divided according to the above method examples, for example, the functional modules may be divided corresponding to the functions, or two or more functions may be integrated into one processing module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. It should be noted that, the division of the modules in the embodiment of the present invention is schematic, and is only one logic function division, and another division manner may be available in actual implementation.
Fig. 6 shows a schematic structural diagram of an inter-chip data transmission apparatus according to an embodiment of the present invention, in a case where each functional module is divided according to each function. As shown in fig. 6, the apparatus includes:
a slave chip receiving module 601, configured to receive, from a chip, a network packet to be forwarded;
a type determining module 602, configured to determine a type of the network packet to be forwarded;
a forwarding rule determining module 603, configured to determine, according to a predefined forwarding channel and the type, a forwarding rule matching the network packet to be forwarded;
a forwarding module 604, configured to forward the network packet to be forwarded to a target chip according to the forwarding rule; the target chip is a master control chip or a slave chip.
Optionally, the network data packet to be forwarded includes a check flag bit and a first check value, where the first check value is obtained by performing check calculation on the network data packet to be forwarded, and the first check value is located at the tail of the network data packet to be forwarded; the check flag bit is used for enabling the target chip to determine whether the network data packet to be forwarded is a target network data packet to be forwarded.
Optionally, the apparatus may further include a checking module, configured to determine, by the target chip, whether the network packet to be forwarded is a target network packet to be forwarded.
Optionally, the verification module may include:
a check flag bit judging unit, configured to judge, by the target chip, whether the network packet to be forwarded includes the check flag bit;
a processing unit not including a check flag bit, configured to enter a callback function of abnormal branch processing if the network data packet to be forwarded does not include the check flag bit;
the calculation and verification unit is used for verifying the network data packet to be forwarded if the network data packet to be forwarded contains the verification flag bit, and calculating to obtain a second verification value;
a check value comparing unit, configured to compare the second check value with the first check value, and if the second check value is the same as the first check value, the target chip processes the network data packet to be forwarded;
and the check value difference processing unit is used for entering the callback function of the abnormal branch processing if the second check value is different from the first check value.
Optionally, the forwarding module 604 may include:
a matching rule forwarding unit, configured to determine whether a forwarding rule matching the type of the network data packet to be forwarded exists in the forwarding rule, and if so, forward the network data packet according to the forwarding rule matching the type of the network data packet to be forwarded;
and the default forwarding rule unit is used for forwarding the network data packet to the main control chip if a forwarding rule matched with the type of the network data packet does not exist.
Optionally, the predefined forwarding channel is configured to designate the network packet to be forwarded to the master chip or to be forwarded to the slave chip.
Optionally, when the target chip is the slave chip, the slave chip processes the network data packet to be forwarded.
Optionally, when the target chip is the main control chip, the network data packet to be forwarded is sent to a network node established on the side of the main control chip according to the forwarding rule, and the network node receives the network data packet to be forwarded and sends the network data packet to the main control chip for processing; and when the slave chip network successfully acquires the IP address and the MAC address, the slave chip network synchronously transmits the IP address and the MAC address to the network node, so that the network node receives and transmits network data packets.
Optionally, the apparatus may further include an outward sending data instruction execution module, which is specifically configured to send the data to the slave chip through the network node by using the master chip when the master chip executes an outward sending data instruction, and send the data by using WiFi driving configuration by using the slave chip;
when the slave chip executes a data sending command to the outside, the slave chip directly sends the data through the configuration of WiFi drive.
Optionally, the forwarding rule includes an IP address of the master control chip, a port number of the slave chip, a port number of the master control chip, a designated transport layer protocol, and a transport protocol type.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, it may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the procedures or functions described in the embodiments of the present invention are performed in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, a terminal, a user device, or other programmable apparatus. The computer program or instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer program or instructions may be transmitted from one website, computer, server or data center to another website, computer, server or data center by wire or wirelessly. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that integrates one or more available media. The usable medium may be a magnetic medium, such as a floppy disk, a hard disk, a magnetic tape; or optical media such as Digital Video Disks (DVDs); it may also be a semiconductor medium, such as a Solid State Drive (SSD).
While the invention has been described in connection with various embodiments, other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a review of the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the word "a" or "an" does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.
While the invention has been described in conjunction with specific features and embodiments thereof, it will be evident that various modifications and combinations can be made thereto without departing from the spirit and scope of the invention. Accordingly, the specification and figures are merely exemplary of the invention as defined in the appended claims and are intended to cover any and all modifications, variations, combinations, or equivalents within the scope of the invention. It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (10)

1. An inter-chip data transmission method, comprising:
receiving a network data packet to be forwarded from a chip;
determining the type of the network data packet to be forwarded;
determining a forwarding rule matched with the network data packet to be forwarded according to a predefined forwarding channel and the type;
forwarding the network data packet to be forwarded to a target chip according to the forwarding rule; the target chip is a master control chip or a slave chip.
2. The method according to claim 1, wherein the network data packet to be forwarded includes a check flag bit and a first check value, the first check value is obtained by performing a check calculation on the network data packet to be forwarded, and the first check value is located at a tail of the network data packet to be forwarded; the check flag bit is used for enabling the target chip to determine whether the network data packet to be forwarded is a target network data packet to be forwarded.
3. The method of claim 2, wherein the determining, by the target chip, whether the network packet to be forwarded is a target network packet to be forwarded is performed by:
the target chip judges whether the network data packet to be forwarded contains the check flag bit;
if the network data packet to be forwarded does not contain the check flag bit, entering a callback function for abnormal branch processing;
if the network data packet to be forwarded contains the check flag bit, checking the network data packet to be forwarded, and calculating to obtain a second check value;
comparing the second check value with the first check value, and if the second check value is the same as the first check value, processing the network data packet to be forwarded by the target chip;
if not, entering a callback function for processing the abnormal branch.
4. The method of claim 1, wherein determining the forwarding rule matching the network packet to be forwarded according to the predefined forwarding channel and the type comprises:
judging whether a forwarding rule matched with the type of the network data packet to be forwarded exists in the forwarding rules, and if so, forwarding the network data packet to be forwarded according to the forwarding rule matched with the type of the network data packet to be forwarded;
and if the network data packet does not exist, forwarding the network data packet to the main control chip.
5. The method according to claim 1, wherein the predefined forwarding channel is used to designate the network packet to be forwarded to the master chip or to be forwarded to the slave chip.
6. The method of claim 1, wherein the slave chip processes the network packet to be forwarded when the target chip is the slave chip.
7. The method according to claim 1, wherein when the target chip is the main control chip, the network data packet to be forwarded is sent to a network node established on the side of the main control chip according to the forwarding rule, and the network node receives the network data packet to be forwarded and sends the network data packet to the main control chip for processing; and when the slave chip network successfully acquires the IP address and the MAC address, the slave chip network synchronously transmits the IP address and the MAC address to the network node, so that the network node receives and transmits network data packets.
8. The method of claim 7, wherein when the master chip executes the command to send data out, the master chip sends the data to the slave chip through the network node, and the slave chip sends the data out through a WiFi-driven configuration;
when the slave chip executes a data command sent to the outside, the slave chip directly sends the data through the configuration of the WiFi drive.
9. The method of claim 1, wherein the forwarding rules include an IP address of a master chip, a slave chip port number, a master chip port number, a specified transport layer protocol, and a protocol type of transport.
10. An inter-chip data transmission apparatus, comprising:
the slave chip receiving module is used for receiving the network data packet to be forwarded from the chip;
the type determining module is used for determining the type of the network data packet to be forwarded;
a forwarding rule determining module, configured to determine, according to a predefined forwarding channel and the type, a forwarding rule matching the network packet to be forwarded;
the forwarding module is used for forwarding the network data packet to be forwarded to a target chip according to the forwarding rule; the target chip is a master control chip or a slave chip.
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Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5963609A (en) * 1996-04-03 1999-10-05 United Microelectronics Corp. Apparatus and method for serial data communication between plurality of chips in a chip set
JP2007104539A (en) * 2005-10-07 2007-04-19 Canon Inc Data transfer apparatus and data transfer method
CN101072338A (en) * 2007-06-20 2007-11-14 中兴通讯股份有限公司 Inter-chip data and message same frame transmission system and method
US20090003327A1 (en) * 2007-06-29 2009-01-01 Huawei Technologies Co., Ltd. Method and system of data communication, switching network board
CN102508808A (en) * 2011-11-14 2012-06-20 北京北大众志微系统科技有限责任公司 System and method for realizing communication of master chip and extended chip
US20150254182A1 (en) * 2014-03-07 2015-09-10 Cavium, Inc. Multi-core network processor interconnect with multi-node connection
CN105024948A (en) * 2014-04-30 2015-11-04 深圳市中兴微电子技术有限公司 A chip-based data transmission method, device and system
CN109408456A (en) * 2018-12-07 2019-03-01 中国地质大学(武汉) One kind is based on S905D chip and STM32 chip collaborative work hardware circuit
US20200097424A1 (en) * 2018-08-23 2020-03-26 Shenzhen GOODIX Technology Co., Ltd. Master chip, slave chip, and inter-chip dma transmission system
CN111371632A (en) * 2018-12-25 2020-07-03 阿里巴巴集团控股有限公司 Communication method, device, equipment and storage medium
CN112130987A (en) * 2019-06-25 2020-12-25 杭州海康消防科技有限公司 Data processing method, device, master chip, slave chip and system
CN112540941A (en) * 2019-09-21 2021-03-23 华为技术有限公司 Data forwarding chip and server
CN113014627A (en) * 2021-02-10 2021-06-22 深圳震有科技股份有限公司 Message forwarding method and device, intelligent terminal and computer readable storage medium
CN113254385A (en) * 2021-06-02 2021-08-13 南京蓝洋智能科技有限公司 Network structure, compiling and loading method of parallel inference model and chip system
CN113328963A (en) * 2021-06-24 2021-08-31 新华三信息安全技术有限公司 Routing table entry issuing and message forwarding method, device and network equipment
CN113360163A (en) * 2021-04-19 2021-09-07 深圳市创成微电子有限公司 Multi-chip device and chip upgrading method
CN113485823A (en) * 2020-11-23 2021-10-08 中兴通讯股份有限公司 Data transmission method, device, network equipment and storage medium
WO2021249260A1 (en) * 2020-06-10 2021-12-16 中兴通讯股份有限公司 Data transmission method and apparatus, circuit board, storage medium and electronic apparatus
CN114759942A (en) * 2020-12-25 2022-07-15 杭州旗捷科技有限公司 Chip and data conversion method

Patent Citations (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5963609A (en) * 1996-04-03 1999-10-05 United Microelectronics Corp. Apparatus and method for serial data communication between plurality of chips in a chip set
JP2007104539A (en) * 2005-10-07 2007-04-19 Canon Inc Data transfer apparatus and data transfer method
CN101072338A (en) * 2007-06-20 2007-11-14 中兴通讯股份有限公司 Inter-chip data and message same frame transmission system and method
US20090003327A1 (en) * 2007-06-29 2009-01-01 Huawei Technologies Co., Ltd. Method and system of data communication, switching network board
CN102508808A (en) * 2011-11-14 2012-06-20 北京北大众志微系统科技有限责任公司 System and method for realizing communication of master chip and extended chip
US20150254182A1 (en) * 2014-03-07 2015-09-10 Cavium, Inc. Multi-core network processor interconnect with multi-node connection
CN105024948A (en) * 2014-04-30 2015-11-04 深圳市中兴微电子技术有限公司 A chip-based data transmission method, device and system
US20200097424A1 (en) * 2018-08-23 2020-03-26 Shenzhen GOODIX Technology Co., Ltd. Master chip, slave chip, and inter-chip dma transmission system
EP3644192A1 (en) * 2018-08-23 2020-04-29 Shenzhen Goodix Technology Co., Ltd. Master chip, slave chip, and dma transfer system between chips
CN109408456A (en) * 2018-12-07 2019-03-01 中国地质大学(武汉) One kind is based on S905D chip and STM32 chip collaborative work hardware circuit
CN111371632A (en) * 2018-12-25 2020-07-03 阿里巴巴集团控股有限公司 Communication method, device, equipment and storage medium
CN112130987A (en) * 2019-06-25 2020-12-25 杭州海康消防科技有限公司 Data processing method, device, master chip, slave chip and system
CN112540941A (en) * 2019-09-21 2021-03-23 华为技术有限公司 Data forwarding chip and server
WO2021249260A1 (en) * 2020-06-10 2021-12-16 中兴通讯股份有限公司 Data transmission method and apparatus, circuit board, storage medium and electronic apparatus
CN113485823A (en) * 2020-11-23 2021-10-08 中兴通讯股份有限公司 Data transmission method, device, network equipment and storage medium
CN114759942A (en) * 2020-12-25 2022-07-15 杭州旗捷科技有限公司 Chip and data conversion method
CN113014627A (en) * 2021-02-10 2021-06-22 深圳震有科技股份有限公司 Message forwarding method and device, intelligent terminal and computer readable storage medium
CN113360163A (en) * 2021-04-19 2021-09-07 深圳市创成微电子有限公司 Multi-chip device and chip upgrading method
CN113254385A (en) * 2021-06-02 2021-08-13 南京蓝洋智能科技有限公司 Network structure, compiling and loading method of parallel inference model and chip system
CN113328963A (en) * 2021-06-24 2021-08-31 新华三信息安全技术有限公司 Routing table entry issuing and message forwarding method, device and network equipment

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
BINCHENG QUE: "An improved chipset of synchronous rectification controller applied in isolated topology", 《2010 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS (ICCCAS)》 *
刘兴涛;康宾;周三友;郭彦涛;: "自主可控路由器控制交换系统设计", 无线电工程, no. 08 *
刘连生;姜健飞;: "基于FPGA的ARINC429多通道芯片设计", 微电子学, no. 01 *
李攀;田文娟;李娟;黎小玉;: "FC协议处理芯片设计与实现", 电子技术应用, no. 09 *

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