CN115296621B - A UWB Low Noise Amplifier Based on Gate-Source Low Coupling Structure - Google Patents

Abstract

The invention discloses an ultra-wideband low-noise amplifier based on a gate-source low-coupling structure, which is applied to the field of low-noise amplifier chips and aims to solve the problems that the conventional cascode amplifier is narrow in bandwidth and high in noise caused by high gate-source coupling of a second-stage cascode transistor. The cascode amplifier is improved, and on one hand, a grid-source low-coupling connection structure is adopted, so that parasitic capacitance is reduced, noise coefficient is reduced, and bandwidth is increased; on the other hand, the bandwidth is further expanded by combining a negative feedback structure.

Description

A UWB Low Noise Amplifier Based on Gate-Source Low Coupling Structure

technical field

The invention belongs to the field of low-noise amplifier chips, in particular to an ultra-wideband cascode low-noise amplifier.

Background technique

Low-noise amplifiers are often used in the first stage of radio frequency and microwave receiving systems to amplify received signals, and the noise figure and bandwidth directly affect system performance. With the rapid development of ultra-wideband systems, such as electronic warfare systems, higher requirements are placed on ultra-wideband low-noise amplifiers.

UWB LNAs can be divided into two categories: traveling wave amplifiers and non-traveling wave amplifiers. The traveling wave amplifier is composed of multiple transistors connected in parallel, the input and output ports are connected together with a small inductance, and the capacitance of the port forms an artificial transmission line structure similar to that of a low-pass filter. Although it has certain advantages in terms of bandwidth, the length of the artificial transmission line is longer, which will introduce losses and make the noise figure higher.

Non-traveling-wave amplifiers usually use input and output reactance matching structures, which have advantages in terms of noise, but their bandwidth is relatively narrow compared with traveling-wave amplifiers. The traditional cascode amplifier is a typical broadband non-traveling wave amplifier, but the bandwidth is still relatively narrow, and the gate-source coupling of the second-stage cascode transistor is relatively high, resulting in high noise.

Contents of the invention

In order to solve the above-mentioned technical problems, the present invention proposes an ultra-wideband low-noise amplifier based on a gate-source low-coupling structure, which improves the traditional cascode amplifier, adopts a gate-source low-coupling connection structure, and reduces the , Coupling between sources, reducing the noise figure, increasing the bandwidth; and combining the "negative feedback" structure to expand the bandwidth.

The technical solution adopted in the present invention is: an ultra-wideband low-noise amplifier based on a gate-source low coupling structure, including: a first-stage common-source transistor T1, a second-stage common-gate transistor T2, and a feed branch circuit for drain voltage Vd , the first-stage Vg feed branch, the second-stage Vg feed branch, and the negative feedback branch, the drain of the first-stage common-source transistor T1 and the source of the second-stage common-gate transistor T2 are improved through the rear gate- The source is connected in a low-coupling connection structure, thereby reducing the gate-source coupling parasitic capacitance of the second-stage common-gate transistor T2;

The feed branch of the drain voltage Vd is connected between the drain voltage Vd port and the drain of the second common-gate transistor T2, and the drain of the second common-gate transistor T2 is specifically connected to the feed branch of the drain voltage Vd through the transmission line TL3; the drain The voltage Vd port is also connected to the gate of the second-stage common-gate transistor T2 through the second-stage Vg feed branch, and provides the gate voltage for the second-stage common-gate transistor T2 in the form of resistor division;

The first stage Vg feeding branch is connected to the gate of the first stage common source transistor T1 through the transmission line TL2;

The gate of the first-stage common-source transistor T1 is connected to the input port through the transmission line TL2 and the DC blocking capacitor C _B1 in turn, and the source of the first-stage common-source transistor T1 is grounded;

The drain of the second-stage common-gate transistor T2 is connected to the output port through the transmission line TL3 , the transmission line TL4 , and the DC blocking capacitor C _B2 in turn, and the gate of the second-stage common-gate transistor T2 is connected to the capacitor CG to provide a radio frequency ground.

It also includes a negative feedback branch connected before the gate of the first-stage common-source transistor T1 and after the drain of the second-stage common-gate transistor T2.

Beneficial effects of the present invention: the first-level common-source transistor T1 and the second-level common-gate transistor T2 of the present invention are connected through an improved rear gate-source low-coupling connection structure, which has the following advantages:

1. The present invention provides a low-coupling connection structure based on the gate-source, which improves the cascode low-noise amplifier, reduces the parasitic capacitance of the gate-source coupling of the transistor T2, and analyzes theoretically to reduce the parasitic capacitance In the future, the noise figure of the entire frequency will be reduced, and there will be a certain effect of expanding the bandwidth;

2. Expand the bandwidth by combining the "negative feedback" and "cascode" structure.

Description of drawings

Fig. 1 is a structural diagram of an ultra-wideband low-noise amplifier of the present invention;

2 is a schematic diagram of the metal layers M1, M2 and the dielectric layer of the GaAs chip;

Fig. 3 is a schematic diagram of a traditional connection structure;

4 is a schematic diagram of an improved gate-source low coupling connection structure;

Figure 5 is a comparison diagram of the S-parameter simulation of the traditional connection structure and the improved gate-source low-coupling connection structure;

6 is a schematic diagram of an equivalent circuit of transistors T1, T2 and a connection structure;

Fig. 7 is a comparison diagram of the minimum noise figure of transistors T1 and T2 respectively adopting the traditional connection structure and the improved gate-source low coupling connection structure;

Fig. 8 is the test result of amplifiers S11 and S22;

Fig. 9 is the test result of amplifier S21;

Figure 10 is the amplifier noise figure test results.

Detailed ways

In order to facilitate those skilled in the art to understand the technical content of the present invention, the content of the present invention will be further explained below in conjunction with the accompanying drawings.

As shown in Figure 1, the amplifier of the present invention includes: a first-stage common-source transistor T1, a second-stage common-gate transistor T2, a negative feedback branch, a feed branch of drain voltage Vd, and a first-stage Vg feed branch , The second-level Vg feed branch circuit, the first-level common-source transistor T1 and the second-level common-gate transistor T2 are connected together through a connection structure; specifically: the gate of the second-level common-gate transistor T2 is connected to the capacitor CG , providing radio frequency ground; the drain output port of the second-stage common-gate transistor T2 is connected to the transmission line TL3; the negative feedback branch is composed of a resistor R ₁ and a capacitor C ₁ , and the negative feedback branch is connected between the transmission line TL3 and the gate of the transistor T1 The transmission line TL4 and the DC blocking capacitor C _B2 are connected between the transmission line TL3 and the output port; the inductance L ₁ and the feed capacitor C _B3 connected in parallel to the ground constitute the feed branch of the leakage voltage Vd, and the feed of the leakage voltage Vd The electrical branch is connected to TL3; the leakage voltage port Vd provides the gate voltage of the second-stage common-gate transistor T2 through the second-stage Vg feeder branch, and the second-stage Vg feeder branch is composed of resistors R _B2 and R _B3 ; The transmission line TL2 is connected to the gate of the first-stage common-source transistor T1, and the DC blocking capacitor C _B1 is connected between the transmission line TL2 and the input port; the first-stage Vg feed branch is connected in series with the transmission line TL1 by a resistor R _B1 and connected in parallel to the ground capacitor C _B4 constitutes, the first stage Vg feeding branch is connected between the transmission line TL2 and the Vg feeding port. The transmission lines TL1, TL2, TL3, and TL4 play the role of connection and partial impedance matching.

The amplifier chip of the present invention is manufactured by GaAs technology, and the schematic diagram of the chip medium is shown in FIG. 2 . GaAs is the substrate material, M1 metal layer is deposited on the substrate material, an insulating layer is deposited on the M1 metal layer, and an M2 layer of metal is deposited on the insulating layer. The transistors, capacitors, inductors, resistors, and transmission lines in the amplifier of the present invention all need to be fabricated with M1 or M2 metal layers.

In a cascode amplifier, the drain of the first-stage common-source transistor T1 needs to be used as an output to be connected to the source of the second-stage common-gate transistor T2; the gate of the second-stage common-gate transistor T2 needs to be connected to The CG capacitor and the second stage Vg feed branch. In the present invention, the transmission line connecting the first-stage common-source transistor T1 and the second-stage common-gate transistor T2 and the transmission line connecting the gate of the second-stage common-gate transistor T2 to the CG capacitor are referred to as "connection structure". The traditional connection structure is shown in Figure 3. The first-level common-source transistor T1 and the second-level common-gate transistor T2 are connected by an M2 metal layer (or M1 metal layer), and the gate of the second-level common-gate transistor T2 is connected to the The CG capacitor is connected by the M1 metal layer (or M2 metal layer), that is, "between the first-stage common-source transistor T1 and the second-stage common-gate transistor T2", "between the gate of the second-stage common-gate transistor T2 and the CG capacitor The "between" use different metal layers to realize the connection, one of them uses the M1 metal layer to realize the connection, and the other uses the M2 metal layer to realize the connection. The advantage of this traditional connection method is that the two signals are respectively input to the two sources of the second-stage common-gate transistor T2, which reduces the inductance and loss of the transmission line, and makes the input signal of the second-stage common-gate transistor T2 more balanced; the disadvantage is that there are two layers of metal Overlap, due to the limitation of current and processing technology, the overlapping part of the two transmission lines has a certain width, so a parasitic coupling capacitance will be introduced. The equivalent circuit of the first-level common-source transistor T1, the second-level common-gate transistor T2 and the connection structure is shown in FIG. 6 , and the parasitic coupling capacitance introduced by the connection structure is C _gs ′ in FIG. 6 .

Bring the transistor equivalent circuit into Figure 6, the gate-source of the first-stage common-source transistor T1 is equivalent to capacitor C _gs1 , the gate-drain is equivalent to C _gd1 , the drain-source is VCCS1, capacitor C The parallel connection of _ds1 and conductance G _ds1 is equivalent. The second-stage common-gate transistor T2 is equivalent to the capacitor C _gs2 between the gate and the source, C _gd2 between the drain and the source, and VCCS2, the capacitor C _ds2 , and the conductance G _ds2 to be equivalent in parallel between the drain and source. Among them, VCCS1 and VCCS2 are No. 1 and No. 2 Voltage Control Current Sources (VCCS, Voltage Control Current Source), and their currents are I _d1 = g _m1 V _gs1 e ^jωτ1 , I _d2 = g _m2 V _gs2 e ^jωτ1 . g _m1 and g _m2 represent the transconductance of No. 1 and No. 2 voltage-controlled current sources respectively, τ1 and τ2 represent the delays of No. 1 and No. 2 voltage-controlled current sources respectively, ω represents the angular frequency, V _gs1 and V _gs2 represent the The voltage of the gate capacitance of the first-stage common-source transistor T1 and the second-stage common-gate transistor T2.

In order to reduce the parasitic capacitance C _gs ′, the low noise amplifier of the present invention adopts a gate-source low coupling connection structure, as shown in FIG. 4 . That is, the drain of the first-level common-source transistor T1 is connected to the single-side source of the second-level common-gate transistor T2, thus avoiding the overlap of the gate connection lines of the second-level common-gate transistor T2, so that the parasitic capacitance can be greatly reduced C _gs '.

"Between the first-level common-source transistor T1 and the second-level common-gate transistor T2", "between the gate of the second-level common-gate transistor T2 and the CG capacitor" can be realized by using the M1 metal layer as shown in Figure 4 In the same way, the M2 metal layer can also be used to realize the connection, or different metal layers can be used to realize the connection. No matter whether the connection method of the present invention is realized by using the same metal layer or using different metal layers to realize the connection respectively, there will be no problems as shown in the figure. 3 shows the overlapping of two metal layers.

The S-parameter simulation comparison of the traditional connection structure and the improved gate-source low coupling connection structure is shown in Figure 5. The simulation results show that at the frequency of 5GHz, the S-parameter between the gate and the source of the traditional connection structure is -7.4dB, and the S-parameter of the improved gate-source low coupling connection structure is -54.2dB. The parasitic coupling capacitance C _gs ' introduced by the traditional connection structure is about 0.12pF, while the parasitic coupling capacitance C _gs ' introduced by the improved gate-source low coupling connection structure is about 0.0006pF. Therefore, the parasitic coupling capacitance introduced by the improved gate-source low coupling connection structure of the present invention is greatly reduced.

The following analyzes the effect of the improved rear gate-source low-coupling connection structure of the present invention from two aspects of noise figure and ultra-wideband:

1. Theoretical analysis of noise figure

The noise figure of a cascode amplifier can be expressed by the following formula:

分别代表第一级共源晶体管T1输入参考噪声电压、噪声电流，R_s为晶体管源极电阻(考虑到第一级共源晶体管T1、第二级共栅晶体管T2尺寸相同，则电阻相同)，T为温度。γ₂是第二级共栅晶体管T2的偏置相关系数，G_ds2是第二级共栅晶体管T2的漏源电导，ω₀是噪声计算第一级等效谐振频率，ω_T1＝(g_m1/C_gs1)。C_x代表连接结构及前后的寄生电容之和，在本发明中特指C_x＝C_ds1+[(C_gs2+C_gs’)//CG]。“//”代表电容(C_gs2+C_gs’)与电容CG并联。The noise figure is composed of two parts, _F1 represents the noise figure introduced by the first-stage common-source transistor T1, and _F2 represents the noise figure of the connection part and the second-stage common-gate transistor T2.

Represent the input reference noise voltage and noise current of the first-stage common-source transistor T1, R _s is the transistor source resistance (considering that the first-stage common-source transistor T1 and the second-stage common-gate transistor T2 have the same size, the resistance is the same), T is the temperature. γ ₂ is the bias correlation coefficient of the second-stage common-gate transistor T2, G _ds2 is the drain-source conductance of the second-stage common-gate transistor T2, ω ₀ is the first-stage equivalent resonance frequency for noise calculation, ω _T1 = (g _m1 /C _gs1 ). C _x represents the sum of the connection structure and the parasitic capacitance before and after, and specifically refers to C _x =C _ds1 +[(C _gs2 +C _gs ')//CG] in the present invention. "//" means that the capacitor (C _gs2 +C _gs ') is connected in parallel with the capacitor CG.

The first and second terms on the far right of the equation are related to the input first-stage common-source transistor T1, and the third term is related to the connection structure and the second-stage common-gate transistor T2. The noise figure of the second-stage common-gate transistor T2 and the connection structure can be reduced by reducing the parasitic capacitance _Cx . In traditional methods, capacitors and inductors are often connected in series or in parallel to reduce parasitic parameters through resonance. For example, parallel capacitor-inductor branch, parallel capacitor and inductor branch, connection structure series inductance. Through the resonance method, C _x can be significantly reduced near the resonance frequency, thereby reducing the noise figure; but the disadvantage of the traditional method is that the frequency range for noise reduction is limited, and the noise figure will even increase outside the resonance frequency.

The invention proposes a low-noise amplifier based on a gate-source low-coupling connection structure, which reduces the parasitic capacitance C _gs '. Compared with the traditional resonance method, although it can only reduce C _gs ', C _ds1 and C _gs2 cannot be further offset by resonance, and the capacitance reduction is relatively small; but its advantage is that it can reduce the noise figure in the entire frequency band, and then cover ultra- broadband applications.

As shown in FIG. 7 , the present invention compares and simulates the first-stage common-source transistor T1 and the second-stage common-gate transistor T2 respectively using a traditional connection structure and an improved gate-source low-coupling connection structure. The upper limit of the operating frequency of the amplifier is 22GHz, the minimum noise figure NFmin is 1.02dB after adopting the traditional connection structure, and the minimum noise figure NFmin of the improved gate-source low coupling structure is about 0.85dB, which is reduced by 0.17dB. By adopting the improved gate-source low coupling connection structure of the present invention, the noise figure is improved in the whole frequency band, and the improvement is more obvious as the frequency increases.

2. Implementation of ultra-broadband

In order to realize the 2-22GHz ultra-broadband low-noise amplifier, the invention combines the grid-source low-coupling connection structure with the cascode structure and the negative feedback structure to further expand the bandwidth.

In the amplifier, the gate-drain capacitance C _gd is an important factor affecting the bandwidth, which leads to the deterioration of the gain and isolation performance, and reduces the cut-off frequency at the same time. As shown in the following formula, due to the Miller effect, the input port capacitance will be increased for the single-stage common source amplifier C _gd , and the equivalent capacitance of the input port is:

C _in ＝C _gs +(1+A)C _gd

In the formula, A is the amplification factor of the transistor, and the Miller effect will increase the difficulty of matching and make the gain roll-off more obvious. The cascode structure amplifier uses two-stage transistors for amplification, and the feedback signal needs to pass through two transistors, so the effect of the Miller effect will be reduced, thereby expanding the bandwidth.

As shown in Figure 1, a negative feedback structure is added between the transmission line TL3 and the transistor T1, that is, a signal path is added to achieve broadband gain and impedance matching at the cost of reducing the gain, while improving stability and gain flatness. Capacitor _C1 plays the role of DC blocking and frequency regulation, and resistor _R1 plays the role of adjusting the feedback amount.

The invention applies the grid-source low-coupling structure to the cascode amplifier and cooperates with the negative feedback structure to realize the 2-22GHz ultra-wideband low-noise amplifier. Its reflection coefficient is shown in Figure 8, its gain is shown in Figure 9, and its noise figure is shown in Figure 10. The test results show that in the range of 2-22GHz, S11≤-6.3dB, S22≤-5.3dB, gain in the range of 14.3-16dB, noise figure NF≤1.5dB(2-18GHz), NF≤1.7dB(18- 22GHz). In the ultra-wide frequency band, a relatively flat gain is obtained. For GaAs-based low-noise amplifiers, a very good noise figure of ≤1.5dB is obtained within the range of 2-18GHz.

Those skilled in the art will appreciate that the embodiments described here are to help readers understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Various modifications and variations of the present invention will occur to those skilled in the art. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included within the scope of the claims of the present invention.

Claims (7)

1. An ultra-wideband low noise amplifier based on a gate-source low coupling structure, comprising: the drain electrode of the first-stage common-gate transistor T1 is connected with the source electrode of the second-stage common-gate transistor T2 through an improved gate-source low coupling connection structure, so that the gate-source coupling parasitic capacitance of the second-stage common-gate transistor T2 is reduced;

the drain electrode of the first-stage common-source transistor T1 is connected with the source electrode of the second-stage common-gate transistor T2 through an improved back-gate-source low-coupling connection structure, and the method specifically comprises the following steps: the drain electrode of the first-stage common source transistor T1 is connected with the single-side source electrode of the second-stage common gate transistor T2;

a feeding branch of the drain voltage Vd is connected between the port of the drain voltage Vd and the drain electrode of the second common-gate transistor T2, and the drain electrode of the second common-gate transistor T2 is connected with the feeding branch of the drain voltage Vd through a transmission line TL 3; the drain voltage Vd port is also connected with the grid electrode of the second-stage common-gate transistor T2 through a second-stage Vg feed branch, and provides grid electrode voltage for the second-stage common-gate transistor T2 in a resistance voltage division mode;

the first-stage Vg feed branch is connected with the grid electrode of the first-stage common-source transistor T1 through a transmission line TL 2;

the grid electrode of the first-stage common-source transistor T1 sequentially passes through the transmission line TL2 and the blocking capacitor C _B1 The source electrode of the first-stage common source transistor T1 is grounded;

the drain electrode of the second-stage common-gate transistor T2 sequentially passes through the transmission line TL3, the transmission line TL4 and the blocking capacitor C _B2 The grid electrode of the second-stage common-gate transistor T2 is connected with the capacitor CG to provide radio frequency ground;

the negative feedback branch is connected to the front of the grid electrode of the first-stage common-source transistor T1 and the rear of the drain electrode of the second-stage common-gate transistor T2, and the drain electrode of the second common-gate transistor T2 is connected with the negative feedback branch through a transmission line TL 3; the negative feedback branch comprises a resistor R ₁ Capacitor C ₁ Resistance R ₁ Is connected with the grid electrode of the first stage common source transistor T1, and a resistor R ₁ Second terminal and capacitor C ₁ Is connected to a first terminal of a capacitor C ₁ And the second terminal thereof is connected to the drain of the second stage common-gate transistor T2 via a transmission line TL 3.

2. The ultra-wideband low-noise amplifier based on the gate-source low-coupling structure as claimed in claim 1, wherein the first stage Vg feeding branch comprises: resistance R _B1 Transmission line TL1 and capacitor C _B4 (ii) a Resistance R _B1 Series transmission line TL1 back-to-ground capacitance C _B4 And (4) connecting in parallel.

3. The ultra-wideband low-noise amplifier based on the gate-source low-coupling structure as claimed in claim 2, wherein the second stage Vg feeding branch comprises a resistor R _B2 Resistance R _B3 (ii) a Resistance R _B2 Is connected with the port of the drain voltage Vd, and a resistor R _B2 Second terminal and resistor R _B3 Is connected to a first terminal of a resistor R _B3 Is also connected with the grid electrode of the second stage common-gate transistor T2, and a resistor R _B3 The second terminal of (a) is grounded.

4. The ultra-wideband low-noise structure based on the gate-source low-coupling structure as claimed in claim 3Acoustic amplifier, characterised in that the feed branch of the leakage voltage Vd comprises an inductance L ₁ A feed capacitor C _B3 (ii) a Inductor L ₁ Is connected to the drain of a second common-gate transistor T2 via a transmission line TL3, an inductance L ₁ The second end of the capacitor is connected with a Vd port, and a feed capacitor C _B3 Is grounded, and a feed capacitor C _B3 Is connected with the drain voltage Vd port.

5. The ultra-wideband low-noise amplifier based on the gate-source low-coupling structure as claimed in claim 4, wherein the ultra-wideband low-noise amplifier based on the gate-source low-coupling structure is made of a GaAs chip, and the GaAs chip comprises a bottom substrate material, an M1 metal layer deposited on the substrate material, an insulating layer deposited on the M1 metal layer, and an M2 metal layer deposited on the insulating layer.

6. The ultra-wideband low-noise amplifier based on the gate-source low-coupling structure as claimed in claim 5, wherein a connection line between the drain of the first-stage common-gate transistor T1 and the single-side source of the second-stage common-gate transistor T2, and a connection line of the gate of the second-stage common-gate transistor T2 are implemented by using an M1 metal layer, or implemented by using an M2 metal layer.

7. The ultra-wideband low-noise amplifier based on the gate-source low-coupling structure as claimed in claim 5, wherein a connection line between the drain of the first-stage common-gate transistor T1 and the single-side source of the second-stage common-gate transistor T2 is implemented by using one of a metal layer M1 and a metal layer M2, and a connection line for the gate of the second-stage common-gate transistor T2 is implemented by using the other of the metal layer M1 and the metal layer M2.

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