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CN115295451A - Bonding apparatus and bonding method - Google Patents

Bonding apparatus and bonding method Download PDF

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Publication number
CN115295451A
CN115295451A CN202210975978.4A CN202210975978A CN115295451A CN 115295451 A CN115295451 A CN 115295451A CN 202210975978 A CN202210975978 A CN 202210975978A CN 115295451 A CN115295451 A CN 115295451A
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chip
wafer
bonding
carrier film
bonded
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王力
龙俊舟
陶超
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Wuhan Xinxin Semiconductor Manufacturing Co Ltd
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Wuhan Xinxin Semiconductor Manufacturing Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67144Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68354Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The invention provides a bonding device and a bonding method, which are used for bonding a chip on a wafer, and the bonding device comprises: a carrier film, wherein a plurality of chips are adhered to the first surface; and the pressing unit is arranged above the wafer and comprises a pressing head, and the pressing head is used for pressing the chip bonded on the first surface of the bearing film downwards to the wafer so as to enable the chip to be bonded on the wafer. The technical scheme of the invention can reduce the pollution to the bonding surface of the chip and the falling of the chip in the transmission process, thereby improving the yield of products.

Description

键合装置及键合方法Bonding device and bonding method

技术领域technical field

本发明涉及半导体领域,特别涉及一种键合装置及键合方法。The invention relates to the field of semiconductors, in particular to a bonding device and a bonding method.

背景技术Background technique

芯片-晶圆三维键合集成技术相对于使用封装工艺的三维堆叠芯片采用了无凸点(Bumpless)工艺,突破凸点尺寸导致的输入/输出密度限制和寄生效应,为目前最前沿的三维集成技术。Chip-wafer three-dimensional bonding integration technology adopts bumpless technology compared with three-dimensional stacked chips using packaging technology, which breaks through the input/output density limitation and parasitic effects caused by bump size, and is the most cutting-edge three-dimensional integration technology at present. technology.

目前,芯片-晶圆三维键合集成技术采用在已经切好的晶圆上取合格的芯片,再进行机械手臂的交互,最后定位键合到所需的晶圆上。具体步骤包括:首先,如图1a所示,切割好的芯片12位于蓝膜11上,并对芯片12与蓝膜11之间进行解胶,第一机械手臂13定位到待抓取的芯片12;然后,如图1b所示,第一机械手臂13抓取芯片12;然后,如图1c所示,第一机械手臂13将抓取的芯片12进行逆时针90°翻转后,采用第二机械手臂14吸附第一机械手臂13上的芯片12;然后,如图1d所示,第二机械手臂14将吸附的芯片12进行逆时针90°翻转,并将吸附的芯片12移动到待键合的晶圆15上方,以将芯片12键合于晶圆15上。At present, the chip-wafer three-dimensional bonding integration technology adopts the method of taking qualified chips on the cut wafers, then interacting with the robotic arm, and finally positioning and bonding them on the required wafers. The specific steps include: first, as shown in Figure 1a, the cut chip 12 is positioned on the blue film 11, and the glue between the chip 12 and the blue film 11 is debonded, and the first mechanical arm 13 is positioned to the chip 12 to be grasped Then, as shown in Figure 1b, the first mechanical arm 13 grabs the chip 12; Then, as shown in Figure 1c, the first mechanical arm 13 flips the chip 12 counterclockwise by 90° counterclockwise, and then uses the second mechanical The arm 14 absorbs the chip 12 on the first mechanical arm 13; then, as shown in FIG. above the wafer 15 to bond the chip 12 on the wafer 15 .

但是,在上述步骤中,第一机械手臂13抓取芯片12的键合面,导致芯片12的键合面存在污染风险,由于芯片与晶圆键合对键合面的要求非常高,因此,芯片12键合面的污染导致键合后的产品不良;并且,在采用第二机械手臂14吸附第一机械手臂13上的芯片12时,可能会因为机械原因导致芯片12掉落。However, in the above steps, the first robotic arm 13 grabs the bonding surface of the chip 12, resulting in the risk of contamination of the bonding surface of the chip 12. Since the bonding of the chip and the wafer has very high requirements on the bonding surface, therefore, Pollution on the bonding surface of the chip 12 leads to defective products after bonding; and, when the second robot arm 14 is used to absorb the chip 12 on the first robot arm 13 , the chip 12 may fall due to mechanical reasons.

因此,可以对键合装置及键合方法作进一步的优化。Therefore, the bonding device and bonding method can be further optimized.

发明内容Contents of the invention

本发明的目的在于提供一种键合装置及键合方法,能够减少对芯片键合面的污染以及芯片传送过程中的掉落,从而提高产品良率。The object of the present invention is to provide a bonding device and a bonding method, which can reduce the contamination of the bonding surface of the chip and the drop of the chip during the transfer process, thereby improving the product yield.

为实现上述目的,本发明提供了一种键合装置,用于将芯片键合于晶圆上,所述键合装置包括:To achieve the above object, the present invention provides a bonding device for bonding a chip on a wafer, the bonding device comprising:

承载膜,所述承载膜的第一面粘结有多个所述芯片;a carrier film, the first surface of the carrier film is bonded with a plurality of the chips;

压着单元,设置于所述晶圆上方,所述压着单元包括压着头,所述压着头用于将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆,以使得所述芯片键合于所述晶圆上。A pressing unit is arranged above the wafer, the pressing unit includes a pressing head, and the pressing head is used to press the chips bonded on the first surface of the carrier film downward toward the a wafer, such that the chips are bonded to the wafer.

可选地,所述键合装置还包括:Optionally, the bonding device also includes:

传送单元,包括翻转部、传送部和移动部,所述翻转部用于将所述承载膜从所述第一面向上翻转为第二面向上,所述传送部用于将翻转后的所述承载膜移动到所述晶圆上方,所述移动部用于控制所述压着头的位置移动。The conveying unit includes an inverting part, a conveying part and a moving part, the inverting part is used to invert the carrier film from the first face upward to the second face upward, and the conveying part is used for inverting the reversed The carrier film is moved above the wafer, and the moving part is used to control the movement of the bonding head.

可选地,所述压着单元还包括:Optionally, the crimping unit also includes:

紫外灯,用于在键合之后对所述承载膜执行解胶,以使得所述芯片脱离所述承载膜。and an ultraviolet lamp for performing debonding on the carrier film after bonding, so that the chip is detached from the carrier film.

可选地,所述芯片上形成有对准标记;所述键合装置还包括:Optionally, an alignment mark is formed on the chip; the bonding device further includes:

对准模块,用于在所述压着头将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆之前识别所述对准标记,并通过控制所述承载膜的位置调整,以使得所述芯片与所述晶圆对准。an alignment module for identifying the alignment mark before the crimp head presses the chip bonded on the first side of the carrier film down toward the wafer, and by controlling the carrier film The position of the chip is adjusted so that the chip is aligned with the wafer.

可选地,所述对准标记位于部分厚度或全部厚度的所述芯片中。Optionally, the alignment marks are located in part or all of the thickness of the chip.

可选地,所述对准标记的形状包含十字形、圆形、多边形、圆弧形和L形中的至少一种。Optionally, the shape of the alignment mark includes at least one of a cross shape, a circle shape, a polygon shape, an arc shape and an L shape.

本发明还提供一种键合方法,用于将芯片键合于晶圆上,所述键合方法包括:The present invention also provides a bonding method for bonding a chip on a wafer, the bonding method comprising:

提供一承载膜,所述承载膜的第一面粘结有多个所述芯片;providing a carrier film, the first surface of the carrier film is bonded with a plurality of the chips;

采用设置于所述晶圆上方的压着头将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆,以使得所述芯片键合于所述晶圆上。The chip bonded to the first surface of the carrier film is pressed down toward the wafer by using a pressing head arranged above the wafer, so that the chip is bonded on the wafer.

可选地,在采用设置于所述晶圆上方的压着头将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆之前,所述键合方法还包括:Optionally, before using a pressing head arranged above the wafer to press the chip bonded on the first side of the carrier film downward to the wafer, the bonding method further includes:

采用翻转部将所述承载膜从所述第一面向上翻转为第二面向上;using an inverting part to invert the carrier film from the first face up to the second face up;

采用传送部将翻转后的所述承载膜移动到所述晶圆上方;moving the flipped carrier film over the wafer by using a transfer unit;

采用移动部控制所述压着头的位置移动。A moving part is used to control the positional movement of the crimping head.

可选地,所述键合方法还包括:Optionally, the bonding method also includes:

采用紫外灯照射所述承载膜,以对所述承载膜执行解胶后使得所述芯片脱离所述承载膜。The carrier film is irradiated with an ultraviolet lamp, so that the chip is detached from the carrier film after the carrier film is debonded.

可选地,在采用所述翻转部将所述承载膜从所述第一面向上翻转为第二面向上之前,所述键合方法还包括:Optionally, before using the inverting part to invert the carrier film from the first face up to the second face up, the bonding method further includes:

采用等离子体刻蚀工艺形成对准标记于所述芯片上。An alignment mark is formed on the chip by using a plasma etching process.

可选地,所述对准标记位于部分厚度或全部厚度的所述芯片中。Optionally, the alignment marks are located in part or all of the thickness of the chip.

可选地,所述对准标记的形状包含十字形、圆形、多边形、圆弧形和L形中的至少一种。Optionally, the shape of the alignment mark includes at least one of a cross shape, a circle shape, a polygon shape, an arc shape and an L shape.

与现有技术相比,本发明的技术方案具有以下有益效果:Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

1、本发明的键合装置,包括:第一面粘结有多个所述芯片的承载膜;设置于所述晶圆上方的压着单元,所述压着单元中的压着头用于将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆,以使得所述芯片键合于所述晶圆上。本发明提供的键合装置,在将所述芯片键合于所述晶圆上之前,所述芯片的键合面并未与其他部件接触,使得减少了对所述芯片键合面的污染,从而提高了键合后产品的良率;并且,直接通过所述承载膜作为载体将所述芯片传送到所述晶圆上方,避免导致传送过程中的芯片掉落。1. The bonding device of the present invention includes: a carrier film with a plurality of chips bonded on the first surface; a crimping unit arranged above the wafer, and a crimping head in the crimping unit is used for The chip bonded to the first side of the carrier film is pressed down against the wafer such that the chip is bonded to the wafer. In the bonding device provided by the present invention, before the chip is bonded on the wafer, the bonding surface of the chip is not in contact with other components, so that the pollution to the bonding surface of the chip is reduced, Therefore, the yield rate of the bonded product is improved; moreover, the chip is directly transported over the wafer by using the carrier film as a carrier, so as to avoid dropping of the chip during the transport process.

2、本发明的键合方法,包括:采用设置于所述晶圆上方的压着头将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆,以使得所述芯片键合于所述晶圆上。本发明提供的键合方法,在将所述芯片键合于所述晶圆上之前,所述芯片的键合面并未与其他部件接触,使得减少了对所述芯片键合面的污染,从而提高了键合后产品的良率;并且,直接采用所述承载膜作为载体将所述芯片传送到所述晶圆上方,避免导致传送过程中的芯片掉落。2. The bonding method of the present invention includes: using a pressing head arranged above the wafer to press the chip bonded on the first surface of the carrier film downward to the wafer, so that the The chip is bonded on the wafer. In the bonding method provided by the present invention, before the chip is bonded on the wafer, the bonding surface of the chip is not in contact with other components, so that the pollution to the bonding surface of the chip is reduced, Therefore, the yield rate of the bonded product is improved; moreover, the chip is directly transferred to the wafer by using the carrier film as a carrier, so as to avoid dropping of the chip during the transfer process.

附图说明Description of drawings

图1a~图1d是一种键合方法中的各个步骤的示意图;Fig. 1a~Fig. 1d are the schematic diagrams of each step in a kind of bonding method;

图2是本发明一实施例的键合方法的流程图;Fig. 2 is the flowchart of the bonding method of an embodiment of the present invention;

图3a~图3g是图2所示的键合方法中的各个步骤的示意图;Fig. 3a~Fig. 3g are the schematic diagrams of each step in the bonding method shown in Fig. 2;

图4是本发明一实施例的芯片上的对准标记的示意图;4 is a schematic diagram of an alignment mark on a chip according to an embodiment of the present invention;

图5是本发明另一实施例的芯片上的对准标记的示意图。FIG. 5 is a schematic diagram of alignment marks on a chip according to another embodiment of the present invention.

其中,附图1a~图5的附图标记说明如下:Wherein, the reference numerals of accompanying drawings 1a to 5 are explained as follows:

11-蓝膜;12-芯片;13-第一机械手臂;14-第二机械手臂;15-晶圆;21-芯片;211-对准标记;22-晶圆;23-承载膜;24-压着头。11-blue film; 12-chip; 13-first robot arm; 14-second robot arm; 15-wafer; 21-chip; 211-alignment mark; 22-wafer; 23-carrier film; 24- Hold your head down.

具体实施方式Detailed ways

为使本发明的目的、优点和特征更加清楚,以下对本发明提出的键合装置及键合方法作进一步详细说明。需说明的是,附图均采用非常简化的形式且均使用非精准的比例,仅用以方便、明晰地辅助说明本发明实施例的目的。In order to make the purpose, advantages and features of the present invention clearer, the bonding device and bonding method proposed by the present invention will be further described in detail below. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

本发明一实施例提供一种键合装置,用于将芯片键合于晶圆上,所述键合装置包括:承载膜,所述承载膜的第一面粘结有多个所述芯片;压着单元,设置于所述晶圆上方,所述压着单元包括压着头,所述压着头用于将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆,以使得所述芯片键合于所述晶圆上。An embodiment of the present invention provides a bonding device for bonding a chip to a wafer, the bonding device includes: a carrier film, a plurality of chips are bonded to a first surface of the carrier film; A pressing unit is arranged above the wafer, the pressing unit includes a pressing head, and the pressing head is used to press the chips bonded on the first surface of the carrier film downward toward the a wafer, such that the chips are bonded to the wafer.

下面参阅图3a~图3g以及图4~图5更为详细的介绍本实施例提供的键合装置。Referring to FIGS. 3 a to 3 g and FIGS. 4 to 5 , the bonding device provided by this embodiment will be described in more detail below.

所述承载膜23的第一面涂覆有粘性胶,通过所述粘性胶使得所述承载膜23的第一面粘结有多个所述芯片21。The first surface of the carrying film 23 is coated with adhesive glue, and the first surface of the carrying film 23 is bonded with a plurality of chips 21 through the adhesive glue.

所述承载膜23可以为蓝膜等涂覆有粘性胶的膜,且所述承载膜23为能够透光的半透明或透明材料。The carrying film 23 can be a film coated with adhesive glue such as a blue film, and the carrying film 23 is a translucent or transparent material capable of transmitting light.

并且,为了避免后续将芯片21键合于待键合的晶圆22上的过程中导致相邻的芯片21之间产生干扰,可以利用所述承载膜23的弹性,采用扩晶机拉扯所述承载膜23,以使得相邻所述芯片21之间的间距增大,并且使得所述芯片21能够与待键合晶圆22上对应位置处的芯片对准。Moreover, in order to avoid interference between adjacent chips 21 in the subsequent process of bonding the chip 21 to the wafer 22 to be bonded, the elasticity of the carrier film 23 can be used to pull the chip 23 by a crystal expander. The carrying film 23 increases the distance between adjacent chips 21 and enables the chips 21 to be aligned with the chips at corresponding positions on the wafer 22 to be bonded.

所述键合装置还包括扩晶环(未图示),在对所述承载膜23进行扩晶之后,所述扩晶环用于固定所述承载膜23且将所述承载膜23绷紧,所述扩晶环位于所述承载膜23的边缘,所述扩晶环环绕所有的芯片21。The bonding device also includes a crystal expansion ring (not shown), after the carrier film 23 is expanded, the crystal expansion ring is used to fix the carrier film 23 and tighten the carrier film 23 , the crystal expansion ring is located at the edge of the carrier film 23 , and the crystal expansion ring surrounds all the chips 21 .

所述键合装置还包括机械手臂(未图示),所述扩晶环固定于所述机械手臂上,从而使得所述承载膜23固定于所述机械手臂上。The bonding device further includes a mechanical arm (not shown), the crystal expansion ring is fixed on the mechanical arm, so that the carrier film 23 is fixed on the mechanical arm.

优选的,所述承载膜23的第一面粘结所述芯片21的背面,以使得所述芯片21的正面能够与晶圆22键合,并且能够避免对所述承载膜23与所述芯片21之间解胶时,所述承载膜23粘结所述芯片21正面而导致的无法将所述芯片21正面附着的粘性胶去除干净,进而避免导致影响芯片21的性能。其中,所述芯片21包含衬底以及形成于衬底上的绝缘介质层,绝缘介质层中形成有器件结构,所述芯片21的背面为所述衬底的远离所述绝缘介质层的一面,所述芯片21的正面和背面为相对的面。Preferably, the first side of the carrier film 23 is bonded to the back side of the chip 21, so that the front side of the chip 21 can be bonded to the wafer 22, and the bonding between the carrier film 23 and the chip can be avoided. 21, the carrier film 23 is bonded to the front of the chip 21 so that the sticky glue attached to the front of the chip 21 cannot be removed cleanly, thereby avoiding affecting the performance of the chip 21. Wherein, the chip 21 includes a substrate and an insulating dielectric layer formed on the substrate, a device structure is formed in the insulating dielectric layer, and the back side of the chip 21 is a side of the substrate away from the insulating dielectric layer, The front and back of the chip 21 are opposite faces.

如图3a所示,初始状态时,所述承载膜23的第一面向上,若所述承载膜23的第一面粘结所述芯片21的背面,则所述芯片21的正面向上。As shown in FIG. 3 a , in the initial state, the first surface of the carrier film 23 faces upward, and if the first surface of the carrier film 23 is bonded to the back of the chip 21 , the front of the chip 21 faces upward.

所述键合装置还包括传送单元(未图示),所述传送单元包括翻转部、传送部和移动部,如图3b所示,所述翻转部用于翻转所述承载膜23,以将所述承载膜23从所述第一面向上翻转为第二面向上,所述第一面和所述第二面为相对的面;如图3c所示,所述传送部用于将翻转后的所述承载膜23移动到待键合的所述晶圆22的上方,并控制所述承载膜23的位置移动,使所述承载膜23的第一面粘结的所述芯片21与所述晶圆22的对应位置对准;所述移动部用于控制所述压着头24在垂直和水平方向进行位置移动。The bonding device also includes a transfer unit (not shown), the transfer unit includes a turning part, a transferring part and a moving part, as shown in Figure 3b, the turning part is used to turn over the carrier film 23, so that The carrier film 23 is turned upside down from the first side to the second side up, and the first side and the second side are opposite sides; as shown in FIG. The carrier film 23 is moved to the top of the wafer 22 to be bonded, and the position of the carrier film 23 is controlled to move, so that the first surface of the carrier film 23 is bonded to the chip 21 and the The corresponding position of the wafer 22 is aligned; the moving part is used to control the position movement of the bonding head 24 in the vertical and horizontal directions.

其中,若所述承载膜23粘结所述芯片21的背面,则所述芯片21从正面向上翻转为背面向上。Wherein, if the carrier film 23 is bonded to the back of the chip 21 , the chip 21 is turned from the front up to the back up.

其中,所述机械手臂与所述翻转部和所述传送部连接,所述翻转部通过所述机械手臂翻转所述承载膜23,所述传送部通过所述机械手臂移动所述承载膜23。Wherein, the robot arm is connected with the turning part and the conveying part, the turning part turns the carrier film 23 through the robot arm, and the transfer part moves the carrier film 23 through the robot arm.

因此,与图1a~图1d中所示的传送芯片12的过程相比,本实施例中的所述传送部在移动所述芯片21到所述晶圆22上方的过程中,直接采用所述承载膜23作为载体传送所述芯片21,避免了所述传送部和所述机械手臂等部件直接接触并传送所述芯片21;且在所述芯片21移动到所述晶圆22上方之前,无需将所述芯片21从所述承载膜23上中转到其他部件上,从而避免导致传送过程中芯片21掉落。Therefore, compared with the process of transferring the chip 12 shown in FIGS. 1a to 1d, the transfer unit in this embodiment directly uses the The carrier film 23 is used as a carrier to transport the chip 21, avoiding the direct contact and transport of the chip 21 by the transfer part and the mechanical arm and other components; and before the chip 21 moves above the wafer 22, there is no need to Transfer the chips 21 from the carrier film 23 to other components, so as to avoid dropping the chips 21 during the transfer process.

所述压着单元设置于所述晶圆22上方,所述压着单元包括压着头24,如图3c~图3e所示,所述压着头24设置于所述晶圆22上方,所述压着头24可以垂向下移至接触所述承载膜23的第二面后,继续将所述承载膜23的第一面粘结的待键合的所述芯片21向下压向所述晶圆22,以使得所述芯片21键合于所述晶圆22上。其中,所述压着头24可以从所述承载膜23的中心到所述承载膜23的外边缘逐次向下压所述芯片21,且所述压着头24每次向下压的所述芯片21的数量可以为一个或至少两个,即所述压着头24每向下压一次可以使得至少一个芯片21键合于所述晶圆22上。The crimping unit is arranged above the wafer 22, and the crimping unit includes a crimping head 24, as shown in FIGS. 3c to 3e, the crimping head 24 is arranged above the wafer 22, so The crimping head 24 can move down vertically to contact the second surface of the carrier film 23, and then continue to press the chips 21 to be bonded on the first surface of the carrier film 23 downward toward the carrier film 23. the wafer 22 so that the chips 21 are bonded on the wafer 22 . Wherein, the crimping head 24 can press down the chip 21 successively from the center of the carrier film 23 to the outer edge of the carrier film 23, and the crimping head 24 presses down each time. The number of chips 21 can be one or at least two, that is, at least one chip 21 can be bonded to the wafer 22 every time the crimping head 24 presses down once.

并且,如图3f所示,在将所有的所述芯片21键合于所述晶圆22上之后,可以将所述压着头24移走。And, as shown in FIG. 3 f , after all the chips 21 are bonded on the wafer 22 , the bonding head 24 can be removed.

如图4~图5所示,所述芯片21上形成有对准标记211。As shown in FIGS. 4 to 5 , an alignment mark 211 is formed on the chip 21 .

所述对准标记211位于部分厚度的所述芯片21中,此时,所述对准标记211可以位于所述芯片21的正面或背面;或者,所述对准标记211位于全部厚度的所述芯片21中,即所述对准标记211贯穿所述芯片21。The alignment mark 211 is located in the chip 21 of a partial thickness. At this time, the alignment mark 211 can be located on the front or back of the chip 21; or, the alignment mark 211 is located in the entire thickness of the chip 21. In the chip 21 , that is, the alignment mark 211 runs through the chip 21 .

所述对准标记211位于所述芯片21边缘的非功能区,例如位于切割道上,以避免影响所述芯片21的性能。The alignment mark 211 is located in a non-functional area on the edge of the chip 21 , such as on a dicing line, so as not to affect the performance of the chip 21 .

所述对准标记211可以位于所述芯片21的边上或者位于所述芯片21的角上。The alignment mark 211 may be located on the side of the chip 21 or on the corner of the chip 21 .

所述对准标记211的形状可以包含十字形、圆形、多边形、圆弧形和L形等中的至少一种。The shape of the alignment mark 211 may include at least one of a cross shape, a circle shape, a polygon shape, an arc shape, and an L shape.

如图4所示,在一个具体实施例中,所述芯片21的四个角处均形成有一个十字形的对准标记211,四个所述对准标记211可以位于部分厚度或全部厚度的所述芯片21中;如图5所示,在另一个具体实施例中,所述芯片21的每个角被切割掉一个四边形的区域,使得所述芯片21的四个角处均形成有一个L形的对准标记211,所述对准标记211贯穿所述芯片21。As shown in FIG. 4 , in a specific embodiment, a cross-shaped alignment mark 211 is formed at the four corners of the chip 21, and the four alignment marks 211 can be located in a part of the thickness or in the entire thickness. In the chip 21; as shown in FIG. 5, in another specific embodiment, each corner of the chip 21 is cut off a quadrilateral area, so that each corner of the chip 21 is formed with a An L-shaped alignment mark 211 , the alignment mark 211 runs through the chip 21 .

所述键合装置还包括对准模块(未图示),所述对准模块用于在所述压着头24将所述承载膜23的第一面粘结的所述芯片21向下压向所述晶圆22之前识别所述芯片21上的所述对准标记211以及所述晶圆22上的对准标记(未图示),以使得所述芯片21与所述晶圆22对准。其中,所述对准模块仅需识别所述承载膜23上的部分芯片21上的对准标记211,通过所述传送部控制所述承载膜23的位置移动,将部分芯片21与晶圆22进行对准操作即可实现所有的所述芯片21与所述晶圆22的对准。The bonding device also includes an alignment module (not shown), and the alignment module is used to press down the chip 21 bonded on the first surface of the carrier film 23 at the pressing head 24 Identify the alignment mark 211 on the chip 21 and the alignment mark (not shown) on the wafer 22 before the wafer 22, so that the chip 21 is aligned with the wafer 22 allow. Wherein, the alignment module only needs to recognize the alignment marks 211 on some of the chips 21 on the carrier film 23, and controls the position movement of the carrier film 23 through the transfer unit to align the part of the chips 21 with the wafer 22. Alignment of all the chips 21 and the wafer 22 can be realized by performing the alignment operation.

并且,如图3d所示,在将所述承载膜23上待键合的芯片21移动到所述晶圆22上的待键合位置的上方之后,采用所述对准模块识别待键合的所述芯片21上的对准标记211,使得所述压着头24与待键合的所述芯片21对准,进而使得所述压着头24能够将待键合的所述芯片21准确地键合于所述晶圆22上的待键合位置上。And, as shown in FIG. 3d, after the chip 21 to be bonded on the carrier film 23 is moved above the position to be bonded on the wafer 22, the alignment module is used to identify the chip to be bonded. The alignment mark 211 on the chip 21 makes the crimping head 24 align with the chip 21 to be bonded, so that the crimping head 24 can accurately align the chip 21 to be bonded. Bonding on the position to be bonded on the wafer 22 .

因此,与图1a~图1d中所示的从蓝膜11上每次抓取单颗芯片12,并将抓取的单颗芯片12与晶圆15对准后再进行键合相比,本实施例中将所述承载膜23上所有的芯片21整体移动到所述晶圆22上方,并采用压着头24将所有的芯片21与晶圆22依次完成键合,使得无需在键合前将每颗芯片21与晶圆22进行对准操作,从而简化了工艺步骤。Therefore, compared with the single chip 12 that is grabbed from the blue film 11 each time shown in FIGS. In the embodiment, all the chips 21 on the carrier film 23 are moved to the top of the wafer 22 as a whole, and the bonding head 24 is used to complete the bonding of all the chips 21 and the wafer 22 in sequence, so that there is no need to perform bonding before bonding. Aligning each chip 21 with the wafer 22 simplifies the process steps.

其中,在识别所述对准标记211时,若所述对准标记211位于部分厚度的所述芯片21中,当所述对准标记211位于所述芯片21的远离所述承载膜23的一面时,所述对准模块发出的光能够穿过所述承载膜23和部分厚度的所述芯片21后识别到所述对准标记211;当所述对准标记211位于所述芯片21的与所述承载膜23接触的一面时,所述对准模块发出的光能够穿过所述承载膜23后识别到所述对准标记211。若所述对准标记211位于全部厚度的所述芯片21中,所述对准模块发出的光能够穿过所述承载膜23后识别到所述对准标记211。Wherein, when identifying the alignment mark 211, if the alignment mark 211 is located in the chip 21 with a partial thickness, when the alignment mark 211 is located on the side of the chip 21 away from the carrier film 23 When, the light emitted by the alignment module can pass through the carrier film 23 and part of the thickness of the chip 21 to identify the alignment mark 211; When the carrier film 23 is in contact with one side, the light emitted by the alignment module can pass through the carrier film 23 and identify the alignment mark 211 . If the alignment mark 211 is located in the entire thickness of the chip 21 , the light emitted by the alignment module can pass through the carrier film 23 and identify the alignment mark 211 .

所述压着单元还包括紫外灯组件(未图示),用于在将所有的所述芯片21键合于所述晶圆22上之后对所述承载膜23执行解胶,以使得所述芯片21脱离所述承载膜23。其中,可以采用所述紫外灯组件同时照射整个所述承载膜23,以使得所有的所述芯片21与所述承载膜23之间解胶。如图3g所示,解胶之后,可以将所述承载膜23移走。The pressing unit also includes an ultraviolet lamp assembly (not shown), which is used to debond the carrier film 23 after all the chips 21 are bonded on the wafer 22, so that the The chips 21 are detached from the carrier film 23 . Wherein, the ultraviolet lamp assembly can be used to irradiate the entire carrier film 23 at the same time, so that all the chips 21 and the carrier film 23 are debonded. As shown in FIG. 3g, after degumming, the carrier film 23 can be removed.

综上所述,本发明提供的键合装置,包括:承载膜,所述承载膜的第一面粘结有多个所述芯片;压着单元,设置于所述晶圆上方,所述压着单元包括压着头,所述压着头用于将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆,以使得所述芯片键合于所述晶圆上。本发明提供的键合装置,在将所述芯片键合于所述晶圆上之前,所述芯片的键合面并未与其他部件接触,使得减少了对所述芯片键合面的污染,从而提高了键合后产品的良率;并且,直接通过所述承载膜作为载体将所述芯片传送到所述晶圆上方,避免导致传送过程中的芯片掉落。In summary, the bonding device provided by the present invention includes: a carrier film, a plurality of chips are bonded to the first surface of the carrier film; a pressing unit is arranged above the wafer, and the pressing unit is arranged above the wafer. The bonding unit includes a crimping head, and the crimping head is used for pressing the chip bonded on the first side of the carrier film downward to the wafer, so that the chip is bonded to the wafer superior. In the bonding device provided by the present invention, before the chip is bonded on the wafer, the bonding surface of the chip is not in contact with other components, so that the pollution to the bonding surface of the chip is reduced, Therefore, the yield rate of the bonded product is improved; moreover, the chip is directly transported over the wafer by using the carrier film as a carrier, so as to avoid dropping of the chip during the transport process.

本发明一实施例提供了一种键合方法,用于将芯片键合于晶圆上,参阅图2,图2是本发明一实施例的键合方法的流程图,从图2中可看出,所述键合方法包括:An embodiment of the present invention provides a bonding method for bonding a chip on a wafer. Referring to FIG. 2, FIG. 2 is a flow chart of a bonding method according to an embodiment of the present invention. Out, described bonding method comprises:

步骤S1,提供一承载膜,所述承载膜的第一面粘结有多个所述芯片;Step S1, providing a carrier film, the first surface of the carrier film is bonded with a plurality of the chips;

步骤S2,采用设置于所述晶圆上方的压着头将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆,以使得所述芯片键合于所述晶圆上。Step S2, using a pressing head arranged above the wafer to press the chip bonded on the first surface of the carrier film downward to the wafer, so that the chip is bonded to the wafer. circle on.

下面参阅图3a~图3g以及图4~图5更为详细的介绍本实施例提供的键合方法:Referring to Figures 3a-3g and Figures 4-5, the bonding method provided by this embodiment will be described in more detail below:

按照步骤S1,参阅图3a,提供一承载膜23,所述承载膜23的第一面涂覆有粘性胶,通过所述粘性胶使得所述承载膜23的第一面粘结有多个所述芯片21。According to step S1, referring to FIG. 3a, a carrier film 23 is provided, the first surface of the carrier film 23 is coated with adhesive glue, and the first surface of the carrier film 23 is bonded with a plurality of The above-mentioned chip 21.

所述承载膜23可以为蓝膜等涂覆有粘性胶的膜,且所述承载膜23为能够透光的半透明或透明材料。The carrying film 23 can be a film coated with adhesive glue such as a blue film, and the carrying film 23 is a translucent or transparent material capable of transmitting light.

通过将一器件晶圆(未图示)粘附于所述承载膜23的第一面上,再对器件晶圆进行切割后获得多个所述芯片21,使得所述承载膜23的第一面粘结有多个所述芯片21。A device wafer (not shown) is adhered to the first surface of the carrier film 23, and then the device wafer is cut to obtain a plurality of chips 21, so that the first surface of the carrier film 23 A plurality of chips 21 are surface-bonded.

为了避免后续将芯片21键合于待键合的晶圆22上的过程中导致相邻的芯片21之间产生干扰,在切割器件晶圆之后,可以利用所述承载膜23的弹性,采用扩晶机拉扯所述承载膜23,以对所述承载膜23进行扩晶,使得相邻所述芯片21之间的间距增大,并且使得所述芯片21能够与待键合晶圆22上对应位置处的芯片对准。In order to avoid interference between adjacent chips 21 during the subsequent process of bonding the chips 21 to the wafer 22 to be bonded, after cutting the device wafer, the elasticity of the carrier film 23 can be used to expand The crystal machine pulls the carrying film 23 to expand the carrying film 23, so that the distance between adjacent chips 21 increases, and the chips 21 can correspond to the wafer 22 to be bonded. chip alignment at the position.

在对所述承载膜23进行扩晶之后,可以将所述承载膜23固定于扩晶环(未图示)上,所述扩晶环位于所述承载膜23的边缘,所述扩晶环环绕所有的芯片21,所述扩晶环用于将所述承载膜23绷紧;并且,将所述扩晶环固定于一机械手臂(未图示)上,从而将所述承载膜23固定于所述机械手臂上。After carrying out crystal expansion to the carrier film 23, the carrier film 23 can be fixed on a crystal expansion ring (not shown), the crystal expansion ring is located at the edge of the carrier film 23, and the crystal expansion ring Around all the chips 21, the crystal expansion ring is used to tighten the carrier film 23; and, the crystal expansion ring is fixed on a mechanical arm (not shown), thereby fixing the carrier film 23 on the robotic arm.

优选的,所述承载膜23的第一面粘结所述芯片21的背面,以使得所述芯片21的正面能够与晶圆22键合,并且能够避免后续对所述承载膜23与所述芯片21之间解胶时,所述承载膜23粘结所述芯片21正面而导致的无法将所述芯片21正面附着的粘性胶去除干净,进而避免导致影响芯片21的性能。其中,所述芯片21包含衬底以及形成于衬底上的绝缘介质层,绝缘介质层中形成有器件结构,所述芯片21的背面为所述衬底的远离所述绝缘介质层的一面,所述芯片21的正面和背面为相对的面。Preferably, the first side of the carrier film 23 is bonded to the back side of the chip 21, so that the front side of the chip 21 can be bonded to the wafer 22, and can avoid subsequent bonding between the carrier film 23 and the chip 21. When dissolving the glue between the chips 21 , the carrier film 23 is bonded to the front of the chip 21 so that the sticky glue adhering to the front of the chip 21 cannot be removed cleanly, thereby avoiding affecting the performance of the chip 21 . Wherein, the chip 21 includes a substrate and an insulating dielectric layer formed on the substrate, a device structure is formed in the insulating dielectric layer, and the back side of the chip 21 is a side of the substrate away from the insulating dielectric layer, The front and back of the chip 21 are opposite faces.

如图3a所示,所述承载膜23的第一面向上,若所述承载膜23的第一面粘结所述芯片21的背面,则所述芯片21的正面向上。As shown in FIG. 3 a , the first surface of the carrier film 23 faces upward, and if the first surface of the carrier film 23 is bonded to the back surface of the chip 21 , the front surface of the chip 21 faces upward.

并且,提供一传送单元(未图示),所述传送单元包括翻转部、传送部和移动部;在后续采用设置于所述晶圆22上方的压着头24将所述承载膜23的第一面粘结的所述芯片21向下压向所述晶圆22之前,所述键合方法还可包括:首先,参阅图3b,采用翻转部翻转所述承载膜23,以将所述承载膜23从所述第一面向上翻转为第二面向上,所述第一面和所述第二面为相对的面;然后,如图3c所示,采用传送部将翻转后的所述承载膜23移动到待键合的所述晶圆22上方;然后,采用移动部控制所述压着头24在垂直和水平方向进行位置移动。And, a transfer unit (not shown) is provided, and the transfer unit includes an inverting part, a transfer part and a moving part; subsequently, the crimping head 24 arranged on the wafer 22 is used to place the first part of the carrier film 23 Before the chip 21 bonded on one side is pressed downward to the wafer 22, the bonding method may further include: first, referring to FIG. The film 23 is turned from the first face up to the second face up, and the first face and the second face are opposite faces; then, as shown in FIG. The film 23 is moved above the wafer 22 to be bonded; then, a moving part is used to control the position movement of the crimping head 24 in the vertical and horizontal directions.

其中,若所述承载膜23粘结所述芯片21的背面,则所述芯片21从正面向上翻转为背面向上。Wherein, if the carrier film 23 is bonded to the back of the chip 21 , the chip 21 is turned from the front up to the back up.

其中,所述机械手臂与所述翻转部和所述传送部连接,所述翻转部通过所述机械手臂翻转所述承载膜23,所述传送部通过所述机械手臂移动所述承载膜23。Wherein, the robot arm is connected with the turning part and the conveying part, the turning part turns the carrier film 23 through the robot arm, and the transfer part moves the carrier film 23 through the robot arm.

因此,与图1a~图1d中所示的传送芯片12的过程相比,本实施例中在移动所述芯片21到所述晶圆22上方的过程中,直接采用所述承载膜23作为载体传送所述芯片21,避免了所述传送部和所述机械手臂等部件直接接触并传送所述芯片21;且在所述芯片21移动到所述晶圆22上方之前,无需将所述芯片21从所述承载膜23上中转到其他部件上,从而避免导致传送过程中芯片21掉落。Therefore, compared with the process of transferring the chip 12 shown in FIGS. 1a to 1d, in this embodiment, the carrier film 23 is directly used as the carrier in the process of moving the chip 21 to the top of the wafer 22. Transferring the chip 21 avoids direct contact between the transfer unit and the robotic arm and other components and transfers the chip 21; Transfer from the carrier film 23 to other components, so as to prevent the chip 21 from falling during the transfer process.

按照步骤S2,参阅图3d~图3f,采用设置于所述晶圆22上方的压着头24垂向下移至接触所述承载膜23的第二面,并继续将所述承载膜23的第一面粘结的所述芯片21向下压向所述晶圆22,以使得所述芯片21键合于所述晶圆22上。其中,所述压着头24可以从所述承载膜23的中心到所述承载膜23的外边缘逐次向下压所述芯片21,且所述压着头24每次向下压的所述芯片21的数量可以为一个或至少两个,即所述压着头24每向下压一次可以使得至少一个芯片21键合于所述晶圆22上。According to step S2, referring to FIG. 3d to FIG. 3f, the crimping head 24 arranged above the wafer 22 is used to move vertically down to contact the second surface of the carrier film 23, and continue to press the carrier film 23 The chip 21 bonded on the first side is pressed down to the wafer 22 so that the chip 21 is bonded to the wafer 22 . Wherein, the crimping head 24 can press down the chip 21 successively from the center of the carrier film 23 to the outer edge of the carrier film 23, and the crimping head 24 presses down each time. The number of chips 21 can be one or at least two, that is, at least one chip 21 can be bonded to the wafer 22 every time the crimping head 24 presses down once.

并且,如图3f所示,在将所有的所述芯片21键合于所述晶圆22上之后,可以将所述压着头24移走。And, as shown in FIG. 3 f , after all the chips 21 are bonded on the wafer 22 , the bonding head 24 can be removed.

并且,参阅图4~图5,在采用所述翻转部将所述承载膜23从所述第一面向上翻转为第二面向上之前,所述键合方法还可包括:采用等离子体刻蚀工艺刻蚀所述芯片21,以形成对准标记211于所述芯片21上。并且,可在对器件晶圆切割形成多个所述芯片21之前或之后,采用等离子体刻蚀工艺刻蚀形成所述对准标记211。Moreover, referring to FIGS. 4 to 5 , before using the inverting part to invert the carrier film 23 from the first face up to the second face up, the bonding method may further include: using plasma etching The chip 21 is etched by a process to form an alignment mark 211 on the chip 21 . Moreover, the alignment marks 211 may be etched and formed by using a plasma etching process before or after dicing the device wafer to form a plurality of the chips 21 .

需要说明的是,在其他实施例中,还可以采用激光照射在所述芯片21上形成所述对准标记211。It should be noted that, in other embodiments, the alignment mark 211 may also be formed on the chip 21 by laser irradiation.

所述对准标记211位于部分厚度的所述芯片21中,此时,所述对准标记211可以位于所述芯片21的正面或背面;或者,所述对准标记211位于全部厚度的所述芯片21中,即所述对准标记211贯穿所述芯片21。The alignment mark 211 is located in the chip 21 of a partial thickness. At this time, the alignment mark 211 can be located on the front or back of the chip 21; or, the alignment mark 211 is located in the entire thickness of the chip 21. In the chip 21 , that is, the alignment mark 211 runs through the chip 21 .

所述对准标记211位于所述芯片21边缘的非功能区,例如位于切割道上,以避免影响所述芯片21的性能。The alignment mark 211 is located in a non-functional area on the edge of the chip 21 , such as on a dicing line, so as not to affect the performance of the chip 21 .

所述对准标记211可以位于所述芯片21的边上或者位于所述芯片21的角上。The alignment mark 211 may be located on the side of the chip 21 or on the corner of the chip 21 .

所述对准标记211的形状可以包含十字形、圆形、多边形、圆弧形和L形等中的至少一种。The shape of the alignment mark 211 may include at least one of a cross shape, a circle shape, a polygon shape, an arc shape, and an L shape.

如图4所示,在一个具体实施例中,所述芯片21的四个角处均形成有一个十字形的对准标记211,四个所述对准标记211可以位于部分厚度或全部厚度的所述芯片21中;如图5所示,在另一个具体实施例中,所述芯片21的每个角被切割掉一个四边形的区域,使得所述芯片21的四个角处均形成有一个L形的对准标记211,所述对准标记211贯穿所述芯片21。As shown in FIG. 4 , in a specific embodiment, a cross-shaped alignment mark 211 is formed at the four corners of the chip 21, and the four alignment marks 211 can be located in a part of the thickness or in the entire thickness. In the chip 21; as shown in FIG. 5, in another specific embodiment, each corner of the chip 21 is cut off a quadrilateral area, so that each corner of the chip 21 is formed with a An L-shaped alignment mark 211 , the alignment mark 211 runs through the chip 21 .

并且,在采用所述传送部将翻转后的所述承载膜23移动到所述晶圆22上方之后且在采用所述移动部垂向下移所述压着头24之前,所述键合方法还包括:如图3d所示,采用对准模块(未图示)识别所述对准标记211以及所述晶圆22上的对准标记(未图示),并通过所述传送部对所述承载膜23位置进行调整,以使得所述芯片21与所述晶圆22对准。其中,所述对准模块仅需识别所述承载膜23上的部分芯片21上的对准标记211,将部分芯片21与晶圆22进行对准操作即可实现所有的所述芯片21与所述晶圆22的对准。And, after using the transferring part to move the reversed carrier film 23 above the wafer 22 and before using the moving part to vertically move down the bonding head 24, the bonding method It also includes: as shown in FIG. 3d, using an alignment module (not shown) to identify the alignment marks 211 and the alignment marks (not shown) on the wafer 22, and aligning the alignment marks (not shown) on the wafer 22 through the transfer part The position of the carrier film 23 is adjusted so that the chip 21 is aligned with the wafer 22 . Wherein, the alignment module only needs to identify the alignment marks 211 on some of the chips 21 on the carrier film 23, and align some of the chips 21 with the wafer 22 to realize the alignment of all the chips 21 and all of the chips 21. Alignment of wafer 22 described above.

并且,在将所述芯片21与所述晶圆22对准之后,还可以采用所述对准模块识别待键合的所述芯片21上的对准标记211,使得所述压着头24与待键合的所述芯片21对准,进而使得所述压着头24能够将待键合的所述芯片21准确地键合于所述晶圆22上的待键合位置上。And, after the chip 21 is aligned with the wafer 22, the alignment module can also be used to identify the alignment mark 211 on the chip 21 to be bonded, so that the crimping head 24 and The chips 21 to be bonded are aligned so that the crimping head 24 can accurately bond the chips 21 to be bonded to the positions to be bonded on the wafer 22 .

因此,与图1a~图1d中所示的从蓝膜11上每次抓取单颗芯片12,并将抓取的单颗芯片12与晶圆15对准后再进行键合相比,本实施例中将所述承载膜23上所有的芯片21整体移动到所述晶圆22上方,并采用压着头24将所有的芯片21与晶圆22依次完成键合,使得无需在键合前将每颗芯片21与晶圆22进行对准操作,从而简化了工艺步骤。Therefore, compared with the single chip 12 that is grabbed from the blue film 11 each time shown in FIGS. In the embodiment, all the chips 21 on the carrier film 23 are moved to the top of the wafer 22 as a whole, and the bonding head 24 is used to complete the bonding of all the chips 21 and the wafer 22 in sequence, so that there is no need to perform bonding before bonding. Aligning each chip 21 with the wafer 22 simplifies the process steps.

其中,在识别所述对准标记211时,若所述对准标记211位于部分厚度的所述芯片21中,当所述对准标记211位于所述芯片21的远离所述承载膜23的一面时,所述对准模块发出的光能够穿过所述承载膜23和部分厚度的所述芯片21后识别到所述对准标记211;当所述对准标记211位于所述芯片21的与所述承载膜23接触的一面时,所述对准模块发出的光能够穿过所述承载膜23后识别到所述对准标记211。若所述对准标记211位于全部厚度的所述芯片21中,所述对准模块发出的光能够穿过所述承载膜23后识别到所述对准标记211。Wherein, when identifying the alignment mark 211, if the alignment mark 211 is located in the chip 21 with a partial thickness, when the alignment mark 211 is located on the side of the chip 21 away from the carrier film 23 When, the light emitted by the alignment module can pass through the carrier film 23 and part of the thickness of the chip 21 to identify the alignment mark 211; When the carrier film 23 is in contact with one side, the light emitted by the alignment module can pass through the carrier film 23 and identify the alignment mark 211 . If the alignment mark 211 is located in the entire thickness of the chip 21 , the light emitted by the alignment module can pass through the carrier film 23 and identify the alignment mark 211 .

在将所有的所述芯片21键合于所述晶圆22上之后,所述键合方法还包括:采用紫外灯组件同时照射整个所述承载膜23,以对所述承载膜23执行解胶后使得所述芯片21脱离所述承载膜23。如图3g所示,解胶之后,可以将所述承载膜23移走。After all the chips 21 are bonded on the wafer 22, the bonding method further includes: using an ultraviolet lamp assembly to irradiate the entire carrier film 23 at the same time, so as to perform debonding on the carrier film 23 Afterwards, the chip 21 is separated from the carrier film 23 . As shown in FIG. 3g, after degumming, the carrier film 23 can be removed.

综上所述,本发明提供的键合方法,包括:提供一承载膜,所述承载膜的第一面粘结有多个所述芯片;采用设置于所述晶圆上方的压着头将所述承载膜的第一面粘结的所述芯片向下压向所述晶圆,以使得所述芯片键合于所述晶圆上。本发明提供的键合方法,在将所述芯片键合于所述晶圆上之前,所述芯片的键合面并未与其他部件接触,使得减少了对所述芯片键合面的污染,从而提高了键合后产品的良率;并且,直接采用所述承载膜作为载体将所述芯片传送到所述晶圆上方,避免导致传送过程中的芯片掉落。In summary, the bonding method provided by the present invention includes: providing a carrier film, the first surface of the carrier film is bonded with a plurality of the chips; The chip bonded to the first side of the carrier film is pressed down against the wafer so that the chip is bonded to the wafer. In the bonding method provided by the present invention, before the chip is bonded on the wafer, the bonding surface of the chip is not in contact with other components, so that the pollution to the bonding surface of the chip is reduced, Therefore, the yield rate of the bonded product is improved; moreover, the chip is directly transferred to the wafer by using the carrier film as a carrier, so as to avoid dropping of the chip during the transfer process.

上述描述仅是对本发明较佳实施例的描述,并非对本发明范围的任何限定,本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰,均属于权利要求书的保护范围。The above description is only a description of the preferred embodiments of the present invention, and does not limit the scope of the present invention. Any changes and modifications made by those of ordinary skill in the field of the present invention based on the above disclosures shall fall within the protection scope of the claims.

Claims (12)

1. A bonding apparatus for bonding a chip to a wafer, the bonding apparatus comprising:
the first surface of the bearing film is adhered with a plurality of chips;
and the pressing unit is arranged above the wafer and comprises a pressing head, and the pressing head is used for pressing the chip bonded on the first surface of the bearing film downwards to the wafer so as to enable the chip to be bonded on the wafer.
2. The bonding apparatus of claim 1, wherein the bonding apparatus further comprises:
the conveying unit comprises a turnover part, a conveying part and a moving part, wherein the turnover part is used for turning the bearing film from the first surface to the second surface, the conveying part is used for moving the turned bearing film to the upper part of the wafer, and the moving part is used for controlling the position of the pressing head to move.
3. The bonding apparatus of claim 1, wherein the pressing unit further comprises:
and the ultraviolet lamp is used for performing dispergation on the carrier film after bonding so as to enable the chip to be separated from the carrier film.
4. The bonding apparatus of claim 1, wherein the chip has alignment marks formed thereon; the bonding apparatus further includes:
and the alignment module is used for identifying the alignment mark before the pressing head presses the chip bonded on the first surface of the bearing film downwards to the wafer, and controlling the position adjustment of the bearing film so as to align the chip with the wafer.
5. The bonding apparatus of claim 4, wherein the alignment mark is located in a portion or all of the thickness of the chip.
6. The bonding apparatus of claim 4, wherein the alignment mark has a shape including at least one of a cross, a circle, a polygon, a circular arc, and an L-shape.
7. A bonding method for bonding a chip to a wafer, the bonding method comprising:
providing a bearing film, wherein a plurality of chips are adhered to the first surface of the bearing film;
and pressing the chip bonded on the first surface of the bearing film downwards towards the wafer by using a pressing head arranged above the wafer so as to bond the chip on the wafer.
8. The bonding method according to claim 7, wherein before the chip bonded to the first surface of the carrier film is pressed down toward the wafer with a pressing head disposed above the wafer, the bonding method further comprises:
turning the bearing film from the first surface to the second surface upwards by using a turning part;
moving the overturned bearing film to the upper part of the wafer by adopting a conveying part;
and controlling the position movement of the pressing head by using a moving part.
9. The bonding method of claim 7, further comprising:
and irradiating the bearing film by adopting an ultraviolet lamp so as to enable the chip to be separated from the bearing film after the bearing film is subjected to dispergation.
10. The bonding method according to claim 8, wherein before the carrier film is flipped from the first face up to the second face up using the flip part, the bonding method further comprises:
and forming an alignment mark on the chip by adopting a plasma etching process.
11. The bonding method of claim 10, wherein the alignment mark is located in a partial thickness or a full thickness of the chip.
12. The bonding method according to claim 10, wherein the shape of the alignment mark comprises at least one of a cross shape, a circular shape, a polygonal shape, a circular arc shape, and an L-shape.
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